Datasheet TNY268GN Specification

Page 1
TNY263-268
®
TinySwitch-II Family
Enhanced, Energy Ef cient, Low Power Off-line Switcher
Product Highlights
Fully integrated auto-restart for short circuit and open loop fault
protection – saves external component costs Built-in circuitry practically eliminates audible noise with ordinary
dip-varnished transformer Programmable line undervoltage detect feature prevents power
on/off glitches – saves external components Frequency jittering dramatically reduces EMI (~10 dB)
– minimizes EMI fi lter component costs 132 kHz operation reduces transformer size – allows use of
EF12.6 or EE13 cores for low cost and small size Very tight tolerances and negligible temperature variation on key
parameters eases design and lowers cost Lowest component count switcher solution
Expanded scalable device family for low system cost
Better Cost/Per formance over RCC & Linears
Lower system cost than RCC, discrete PWM and other
integrated/hybrid solutions Cost effective replacement for bulky regulated linears
Simple ON/OFF control – no loop compensation needed
No bias winding – simpler, lower cost transformer
Simple design practically eliminates rework in manufacturing
EcoSmart
No load consumption <50 mW with bias winding and
<250 mW without bias winding at 265 VAC input Meets California Energy Commission (CEC), Energy Star, and
EU requirements Ideal for cell-phone charger and PC standby applications
High Performance at Low Cost
High voltage powered – ideal for charger applications
High bandwidth provides fast turn on with no overshoot
Current limit operation rejects line frequency ripple
Built-in current limit and thermal protection improves safety
®
– Extremely Energy Effi cient
+
Optional
UV Resistor
+
DC
Output
-
Wide-Range HV DC Input
TinySwitch-II
-
Figure 1. Typical Standby Application.
D
EN/UV
BP
S
PI-2684-021809
Output Power Table
Product
TNY263 P/G 5 W 7.5 W 3.7 W 4.7 W
TNY264 P/G 5.5 W 9 W 4 W 6 W
TNY265 P/G 8.5 W 11 W 5.5 W 7.5 W
TNY266 P/G 10 W 15 W 6 W 9.5 W
TNY267 P/G 13 W 19 W 8 W 12 W
TNY268 P/G 16 W 23 W 10 W 15 W
Table 1. Output Power Table.
Notes:
1. Minimum continuous power in a typical non-ventilated enclosed adapter measured at 50 °C ambient.
2. Minimum practical continuous power in an open frame design with adequate heat sinking, measured at 50 °C ambient (See Key Applications Considerations).
3. Packages: P: DIP-8B, G: SMD-8B. Please see Part Ordering Information.
3
230 VAC ± 15% 85-265 VAC
Open
1
Adapter
Frame
2
Adapter
Open
1
Frame
2
Description
TinySwitch-II integrates a 700 V power MOSFET, oscillator, high voltage switched current source, current limit and thermal shutdown circuitry onto a monolithic device. The start-up and operating power are derived directly from the voltage on the DRAIN pin, eliminating the need for a bias winding and associated circuitry. In addition, the TinySwitch-II devices incorporate auto-restart, line undervoltage sense, and frequency jittering. An innovative design minimizes audio frequency components in the simple ON/OFF control scheme to practically eliminate audible noise with standard taped/varnished
www.powerint.com February 2009
transformer construction. The fully integrated auto-restart circuit safely limits output power during fault conditions such as output short circuit or open loop, reducing component count and secondary feedback circuitry cost. An optional line sense resistor externally programs a line undervoltage threshold, which eliminates power down glitches caused by the slow discharge of input storage capacitors present in applications such as standby supplies. The operating frequency of 132 kHz is jittered to signifi cantly reduce both the quasi-peak and average EMI, minimizing fi ltering cost.
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TNY263-268
PI-2685-101600
EN/UV
D
S
S
S (HV RTN)
S (HV RTN)
BP
P Package (DIP-8B)
G Package (SMD-8B)
8
5
7
1
4
2
3
BYPASS
(BP)
240 MA50MA
ENABLE
1.0 V + V
ENABLE/
UNDER-
VOLTAGE
(EN/UV)
1.0 V
DRAIN
REGULATOR
5.8 V
LINE UNDER-VOLTAGE
FAULT
RESET
MAX
PRESENT
CURRENT
LIMIT STATE
MACHINE
5.8 V
4.8 V
THERMAL
SHUTDOWN
SRQ
Q
AUTO-
RESTART
COUNTER
6.3 V
JITTER
CLOCK
T
DC
OSCILLATOR
BYPASS PIN UNDER-VOLTAGE
+
-
V
I
LIMIT
CURRENT LIMIT COMPARATOR
LEADING
EDGE
BLANKING
-
+
(D)
Figure 2. Functional Block Diagram.
Pin Functional Description
DRAIN (D) Pin:
Power MOSFET drain connection. Provides internal operating current for both start-up and steady-state operation.
BYPASS (BP) Pin:
Connection point for a 0.1 μF external bypass capacitor for the internally generated 5.8 V supply.
ENABLE/UNDERVOLTAGE (EN/UV) Pin:
This pin has dual functions: enable input and line undervoltage sense. During normal operation, switching of the power MOSFET is controlled by this pin. MOSFET switching is terminated when a current greater than 240 μA is drawn from this pin. This pin also senses line undervoltage conditions through an external resistor connected to the DC line voltage. If there is no external resistor connected to this pin, TinySwitch-II detects its absence and disables the line undervoltage function.
SOURCE (S) Pin:
Control circuit common, internally connected to output MOSFET source.
SOURCE
(S)
PI-2643-030701
Figure 3. Pin Confi guration.
SOURCE (HV RTN) Pin:
Output MOSFET source connection for high voltage return.
2
Rev. H 02/09
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TNY263-268
TinySwitch-II Functional Description
MOSFET remains off (disabled). Since the sampling is done
only at the beginning of each cycle, subsequent changes in TinySwitch-II combines a high voltage power MOSFET switch with a power supply controller in one device. Unlike
the EN/UV pin voltage or current during the remainder of the
cycle are ignored. conventional PWM (pulse width modulator) controllers, TinySwitch-II uses a simple ON/OFF control to regulate the output voltage.
The current limit state machine reduces the current limit by
discrete amounts at light loads when TinySwitch-II is likely to
switch in the audible frequency range. The lower current limit The TinySwitch-II controller consists of an oscillator, enable circuit (sense and logic), current limit state machine,
5.8 V regulator, BYPASS pin undervoltage circuit, over­temperature protection, current limit circuit, leading edge blanking and a 700 V power MOSFET. TinySwitch-II incorporates additional circuitry for line undervoltage sense,
raises the effective switching frequency above the audio range
and reduces the transformer fl ux density, including the
associated audible noise. The state machine monitors the
sequence of EN/UV pin voltage levels to determine the load
condition and adjusts the current limit level accordingly in
discrete amounts. auto-restart and frequency jitter. Figure 2 shows the functional block diagram with the most important features.
Under most operating conditions (except when close to no-
load), the low impedance of the source follower keeps the
Oscillator
The typical oscillator frequency is internally set to an average of 132 kHz. Two signals are generated from the oscillator: the maximum duty cycle signal (DC
) and the clock signal that
MAX
indicates the beginning of each cycle.
voltage on the EN/UV pin from going much below 1.0 V in the
disabled state. This improves the response time of the
optocoupler that is usually connected to this pin.
5.8 V Regulator and 6.3 V Shunt Voltage Clamp
The 5.8 V regulator charges the bypass capacitor connected The TinySwitch-II oscillator incorporates circuitry that introduces a small amount of frequency jitter, typically 8 kHz peak-to-peak, to minimize EMI emission. The modulation rate of the frequency jitter is set to 1 kHz to optimize EMI reduction for both average and quasi-peak emissions. The frequency jitter should be measured with the oscilloscope triggered at the falling edge of the DRAIN waveform. The waveform in Figure 4 illustrates the frequency jitter of the TinySwitch-II.
to the BYPASS pin to 5.8 V by drawing a current from the
voltage on the DRAIN pin whenever the MOSFET is off. The
BYPASS pin is the internal supply voltage node for the
TinySwitch-II. When the MOSFET is on, the TinySwitch-II
operates from the energy stored in the bypass capacitor.
Extremely low power consumption of the internal circuitry
allows TinySwitch-II to operate continuously from current it
takes from the DRAIN pin. A bypass capacitor value of 0.1 μF
is suffi cient for both high frequency decoupling and energy
Enable Input and Current Limit State Machine
The enable input circuit at the EN/UV pin consists of a low impedance source follower output set at 1.0 V. The current through the source follower is limited to 240 μA. When the current out of this pin exceeds 240 μA, a low logic level (disable) is generated at the output of the enable circuit. This enable circuit output is sampled at the beginning of each cycle
storage.
In addition, there is a 6.3 V shunt regulator clamping the
BYPASS pin at 6.3 V when current is provided to the BYPASS
pin through an external resistor. This facilitates powering of
TinySwitch-II externally through a bias winding to decrease the
no-load consumption to about 50 mW. on the rising edge of the clock signal. If high, the power
MOSFET is turned on for that cycle (enabled). If low, the power
600
500
V
400
300
200
100
DRAIN
BYPASS Pin Undervoltage
The BYPASS pin undervoltage circuitry disables the power
MOSFET when the BYPASS pin voltage drops below 4.8 V.
Once the BYPASS pin voltage drops below 4.8 V, it must rise
back to 5.8 V to enable (turn-on) the power MOSFET.
PI-2741-041901
Over Temperature Protection
The thermal shutdown circuitry senses the die temperature.
The threshold is typically set at 135 °C with 70 °C hysteresis.
When the die temperature rises above this threshold the
power MOSFET is disabled and remains disabled until the die
temperature falls by 70 °C, at which point it is re-enabled. A
large hysteresis of 70 °C (typical) is provided to prevent
0
136 kHz 128 kHz
overheating of the PC board due to a continuous fault
condition.
Current Limit
The current limit circuit senses the current in the power
0510
Time (μs)
Figure 4. Frequency Jitter.
MOSFET. When this current exceeds the internal threshold
(I
), the power MOSFET is turned off for the remainder of
LIMIT
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Rev. H 02/09
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TNY263-268
that cycle. The current limit state machine reduces the current limit threshold by discrete amounts under medium and light loads.
The leading edge blanking circuit inhibits the current limit comparator for a short time (t
) after the power MOSFET is
LEB
turned on. This leading edge blanking time has been set so that current spikes caused by capacitance and secondary­side rectifi er reverse recovery time will not cause premature termination of the switching pulse.
Auto-Restart
In the event of a fault condition such as output overload, output short circuit, or an open loop condition, TinySwitch-II enters into auto-restart operation. An internal counter clocked by the oscillator gets reset every time the EN/UV pin is pulled low. If the EN/UV pin is not pulled low for 50 ms, the power MOSFET switching is normally disabled for 850 ms (except in the case of line undervoltage condition, in which case it is disabled until the condition is removed). The auto-restart alternately enables and disables the switching of the power MOSFET until the fault condition is removed. Figure 5 illustrates auto-restart circuit operation in the presence of an output short circuit.
In the event of a line undervoltage condition, the switching of the power MOSFET is disabled beyond its normal 850 ms time until the line undervoltage condition ends.
Line Undervoltage Sense Circuit
The DC line voltage can be monitored by connecting an external resistor from the DC line to the EN/UV pin. During power-up or when the switching of the power MOSFET is disabled in auto-restart, the current into the EN/UV pin must exceed 49 μA to initiate switching of the power MOSFET. During power-up, this is accomplished by holding the BYPASS pin to 4.8 V while the line undervoltage condition exists. The
BYPASS pin then rises from 4.8 V to 5.8 V when the line
undervoltage condition goes away. When the switching of the
power MOSFET is disabled in auto-restart mode and a line
undervoltage condition exists, the auto-restart counter is
stopped. This stretches the disable time beyond its normal
850 ms until the line undervoltage condition ends.
The line undervoltage circuit also detects when there is no
external resistor connected to the EN/UV pin (less than
~2 μA into the pin). In this case the line undervoltage function
is disabled.
TinySwitch-II Operation
TinySwitch-II devices operate in the current limit mode. When
enabled, the oscillator turns the power MOSFET on at the
beginning of each cycle. The MOSFET is turned off when the
current ramps up to the current limit or when the DC
reached. Since the highest current limit level and frequency of
a TinySwitch-II design are constant, the power delivered to the
load is proportional to the primary inductance of the transformer
and peak primary current squared. Hence, designing the supply
involves calculating the primary inductance of the transformer
for the maximum output power required. If the TinySwitch-II is
appropriately chosen for the power level, the current in the
calculated inductance will ramp up to current limit before the
DC
limit is reached.
MAX
Enable Function
TinySwitch-II senses the EN/UV pin to determine whether or
not to proceed with the next switching cycle as described
earlier. The sequence of cycles is used to determine the
current limit. Once a cycle is started, it always completes the
cycle (even when the EN/UV pin changes state half way
through the cycle). This operation results in a power supply in
which the output voltage ripple is determined by the output
capacitor, amount of energy per switch cycle and the delay of
the feedback.
MAX
limit is
300
200
100
0
10
5
0
0
V
DRAIN
V
DC-OUTPUT
1000 2000
Time (ms)
Figure 5. TinySwitch-II Auto-Restart Operation.
4
Rev. H 02/09
The EN/UV pin signal is generated on the secondary by
comparing the power supply output voltage with a reference
voltage. The EN/UV pin signal is high when the power supply
output voltage is less than the reference voltage.
PI-2699-030701
In a typical implementation, the EN/UV pin is driven by an
optocoupler. The collector of the optocoupler transistor is
connected to the EN/UV pin and the emitter is connected to
the SOURCE pin. The optocoupler LED is connected in series
with a Zener diode across the DC output voltage to be
regulated. When the output voltage exceeds the target
regulation voltage level (optocoupler LED voltage drop plus
Zener voltage), the optocoupler LED will start to conduct,
pulling the EN/UV pin low. The Zener diode can be replaced
by a TL431 reference circuit for improved accuracy.
ON/OFF Operation with Current Limit State Machine
The internal clock of the TinySwitch-II runs all the time. At the
beginning of each clock cycle, it samples the EN/UV pin to
decide whether or not to implement a switch cycle, and based
on the sequence of samples over multiple cycles, it determines
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TNY263-268
V
DRAIN
V
EN
CLOCK
D
DRAIN
I
MAX
PI-2749-050301
V
DRAIN
V
EN
CLOCK
D
DRAIN
I
MAX
PI-2667-090700
PI-2377-091100
V
DRAIN
V
EN
CLOCK
D
DRAIN
I
MAX
the appropriate current limit. At high loads, when the EN/UV pin is high (less than 240 μA out of the pin), a switching cycle with the full current limit occurs. At lighter loads, when EN/UV is high, a switching cycle with a reduced current limit occurs.
At near maximum load, TinySwitch-II will conduct during nearly all of its clock cycles (Figure 6). At slightly lower load, it will “skip” additional cycles in order to maintain voltage regulation at the power supply output (Figure 7). At medium loads, cycles will be skipped and the current limit will be reduced (Figure 8). At very light loads, the current limit will be
reduced even further (Figure 9). Only a small percentage of
cycles will occur to satisfy the power consumption of the
power supply.
The response time of the TinySwitch-II ON/OFF control
scheme is very fast compared to normal PWM control. This
provides tight regulation and excellent transient response.
Power Up/Down
The TinySwitch-II requires only a 0.1 μF capacitor on the
BYPASS pin. Because of its small size, the time to charge this
capacitor is kept to an absolute minimum, typically 0.6 ms.
Due to the fast nature of the ON/OFF feedback, there is no
overshoot at the power supply output. When an external
resistor (2 MΩ) is connected from the positive DC input to the
EN/UV pin, the power MOSFET switching will be delayed
during power-up until the DC line voltage exceeds the
threshold (100 V). Figures 10 and 11 show the power-up timing
waveform of TinySwitch-II in applications with and without an
external resistor (2 MΩ) connected to the EN/UV pin.
During power-down, when an external resistor is used, the
power MOSFET will switch for 50 ms after the output loses
regulation. The power MOSFET will then remain off without
any glitches since the undervoltage function prohibits restart
when the line voltage is low.
Figure 6. TinySwitch-II Operation at Near Maximum Loading.
Figure 12 illustrates a typical power-down timing waveform of
TinySwitch-II. Figure 13 illustrates a very slow power-down
timing waveform of TinySwitch-II as in standby applications.
The external resistor (2 MΩ) is connected to the EN/UV pin in
this case to prevent unwanted restarts.
The TinySwitch-II does not require a bias winding to provide
power to the chip, because it draws the power directly from
the DRAIN pin (see Functional Description above). This has
Figure 7. TinySwitch-II Operation at Moderately Heavy Loading.
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Figure 8. TinySwitch-II Operation at Medium Loading.
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TNY263-268
PI-2661-072400
V
DRAIN
V
EN
CLOCK
D
DRAIN
I
MAX
200
Figure 9. TinySwitch-II Operation at Very Light Load.
two main benefi ts. First, for a nominal application, this eliminates the cost of a bias winding and associated components. Secondly, for battery charger applications, the current-voltage characteristic often allows the output voltage to fall close to zero volts while still delivering power. This type of application normally requires a forward-bias winding which has many more associated components. With TinySwitch-II, neither are necessary. For applications that require a very low no-load power consumption (50 mW), a resistor from a bias winding to the BYPASS pin can provide the power to the chip. The minimum recommended current supplied is 750 μA. The BYPASS pin in this case will be clamped at 6.3 V. This method will eliminate the power draw from the DRAIN pin, thereby
200
100
V
DC-INPUT
0
10
5
V
BYPASS
0
400
200
V
DRAIN
0
0
12
Time (ms)
Figure 11. TinySwitch-II Power-up without Optional External UV
Resistor Connected to EN/UV Pin.
200
100
V
DC-INPUT
0
400
300
200
V
DRAIN
100
0
0
.5 1
Time (s)
Figure 12. Normal Power-down Timing (without UV).
PI-2381-1030801
PI-2348-030801
100
V
DC-INPUT
0
10
5
V
BYPASS
0
400
200
V
DRAIN
0
0
12
Time (ms)
Figure 10. TinySwitch-II Power-up with Optional External UV
Resistor (2 MΩ) Connected to EN/UV Pin.
6
Rev. H 02/09
200
PI-2383-030801
100
V
DC-INPUT
0
400
300
200
100
0
0
2.5 5
Time (s)
Figure 13. Slow Power-down Timing with Optional External
(2 MΩ) UV Resistor Connected to EN/UV Pin.
V
DRAIN
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PI-2395-030801
Page 7
85-265
VAC
D1
1N4005
RF1
8.2 Ω
Fusible
D3
1N4005
D2
1N4005
D4
1N4005
C1
3.3 μF 400 V
R1
1.2 kΩ
L1
2.2 mH
R2
200 kΩ
C2
3.3 μF 400 V
TinySwitch-II
1N4937
U1
TNY264
C3
2.2 nF
D6
TNY263-268
C8 680 pF
Y1 Safety
U2
LTV817
Shield
D5
1N5819
Q1
2N3904
R9
47 Ω
C7
10 μF
10 V
C5
330 μF
16 V
100 Ω
R3
22 Ω
R4
1.2 Ω 1/2 W
R7
R6
1 Ω
1/2 W
L2
3.3 μH
C6
100 μF
35 V
R8
270 Ω
VR1
BZX79-
B3V9
3.9 V
+ 5 V
500 mA
RTN
PI-2706-021809
T1
1 8
4 5
D
EN/UV
BP
S
C3
0.1 μF
Figure 14. 2.5 W Constant Voltage, Constant Current Battery Charger with Universal Input (85-265 VAC).
reducing the no-load power consumption and improving full­load effi ciency.
also saves the cost of adding a fuse or increasing the power rating of the current sense resistors to survive reverse battery conditions. For applications requiring undervoltage lock out
Current Limit Operation
Each switching cycle is terminated when the DRAIN current reaches the current limit of the TinySwitch-II. Current limit operation provides good line ripple rejection and relatively constant power delivery independent of input voltage.
BYPASS Pin Capacitor
The BYPASS pin uses a small 0.1 μF ceramic capacitor for decoupling the internal power supply of the TinySwitch-II.
Application Examples
The TinySwitch-II is ideal for low cost, high effi ciency power supplies in a wide range of applications such as cellular phone chargers, PC standby, TV standby, AC adapters, motor control, appliance control and ISDN or a DSL network termination. The 132 kHz operation allows the use of a low cost EE13 or EF12.6 core transformer while still providing good effi ciency. The frequency jitter in TinySwitch-II makes it possible to use a single inductor (or two small resistors for under 3 W applications if lower effi ciency is acceptable) in conjunction with two input capacitors for input EMI fi ltering. The auto-restart function removes the need to oversize the output diode for short circuit conditions allowing the design to be optimized for low cost and maximum effi ciency. In charger applications, it eliminates the need for a second optocoupler and Zener diode for open loop fault protection. Auto-restart
(UVLO), such as PC standby, the TinySwitch-II eliminates several components and saves cost. TinySwitch-II is well suited for applications that require constant voltage and constant current output. As TinySwitch-II is always powered from the input high voltage, it therefore does not rely on bias winding voltage. Consequently this greatly simplifi es designing chargers that must work down to zero volts on the output.
2.5 W CV/CC Cell-Phone Charger
As an example, Figure 14 shows a TNY264 based 5 V,
0.5 A, cellular phone charger operating over a universal input range (85 VAC to 265 VAC). The inductor (L1) forms a π-fi lter in conjunction with C1 and C2. The resistor R1 damps resonances in the inductor L1. Frequency jittering operation of TinySwitch-II allows the use of a simple π-fi lter described above in combination with a single low value Y1-capacitor (C8) to meet worldwide conducted EMI standards. The addition of a shield winding in the transformer allows conducted EMI to be met even with the output capacitively earthed (which is the worst case condition for EMI). The diode D6, capacitor C3 and resistor R2 comprise the clamp circuit, limiting the leakage inductance turn-off voltage spike on the TinySwitch-II DRAIN pin to a safe value. The output voltage is determined by the sum of the optocoupler U2 LED forward drop (~1 V), and Zener diode VR1 voltage. Resistor R8 maintains a bias current through the Zener diode to ensure it is operated close to the Zener test current.
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TNY263-268
A simple constant current circuit is implemented using the V
BE
of transistor Q1 to sense the voltage across the current sense resistor R4. When the drop across R4 exceeds the V
of
BE
transistor Q1, it turns on and takes over control of the loop by driving the optocoupler LED. Resistor R6 assures suffi cient voltage to keep the control loop in operation down to zero volts at the output. With the output shorted, the drop across R4 and R6 (~1.2 V) is suffi cient to keep the Q1 and LED circuit active. Resistors R7 and R9 limit the forward current that could be drawn through VR1 by Q1 under output short circuit conditions, due to the voltage drop across R4 and R6.
10 and 15 W Standby Circuits
Figures 15 and 16 show examples of circuits for standby applications. They both provide two outputs: an isolated 5 V and a 12 V primary referenced output. The fi rst, using TNY266P, provides 10 W, and the second, using TNY267P, 15 W of output power. Both operate from an input range of 140 VDC to 375 VDC, corresponding to a 230 VAC or 100/115 VAC with doubler input. The designs take advantage of the line undervoltage detect, auto-restart and higher switching frequency of TinySwitch-II. Operation at 132 kHz allows the use of a smaller and lower cost transformer core, EE16 for 10 W and EE22 for 15 W. The removal of pin 6 from the 8 pin DIP TinySwitch-II packages provides a large creepage distance which improves reliability in high pollution environments such as fan cooled power supplies.
Capacitor C1 provides high frequency decoupling of the high voltage DC supply, only necessary if there is a long trace length from the DC bulk capacitors of the main supply. The line sense resistors R2 and R3 sense the DC input voltage for line undervoltage. When the AC is turned off, the undervoltage detect feature of the TinySwitch-II prevents auto-restart glitches at the output caused by the slow discharge of large storage capacitance in the main converter. This is achieved by preventing the TinySwitch-II from switching when the input voltage goes below a level needed to maintain output regulation, and keeping it off until the input voltage goes above the undervoltage threshold, when the AC is turned on again. With R2 and R3, giving a combined value of 2 MΩ, the power
up undervoltage threshold is set at 200 VDC, slightly below the lowest required operating DC input voltage, for start-up at 170 VAC, with doubler. This feature saves several components needed to implement the glitch-free turn-off compared with discrete or TinySwitch-II based designs. During turn-on the rectifi ed DC input voltage needs to exceed 200 V undervoltage threshold for the power supply to start operation. But, once the power supply is on it will continue to operate down to 140 V rectifi ed DC input voltage to provide the required hold up time for the standby output.
The auxiliary primary side winding is rectifi ed and fi ltered by D2 and C2 to create a 12 V primary bias output voltage for the main power supply primary controller. In addition, this voltage is used to power the TinySwitch-II via R4. Although not necessary for operation, supplying the TinySwitch-II externally reduces the device quiescent dissipation by disabling the internal drain derived current source normally used to keep the BYPASS pin capacitor (C3) charged. An R4 value of 10 kΩ provides 600 μA into the BYPASS pin, which is slightly in excess of the current consumption of TinySwitch-II. The excess current is safely clamped by an on-chip active Zener diode to 6.3 V.
The secondary winding is rectifi ed and fi ltered by D3 and C6. For a 15 W design an additional output capacitor, C7, is required due to the larger secondary ripple currents compared to the 10 W standby design. The auto-restart function limits output current during short circuit conditions, removing the need to over rate D3. Switching noise fi ltering is provided by L1 and C8. The 5 V output is sensed by U2 and VR1. R5 is used to ensure that the Zener diode is biased at its test current and R6 centers the output voltage at 5 V.
In many cases the Zener regulation method provides suffi cient accuracy (typically ± 6% over a 0 °C to 50 °C temperature range). This is possible because TinySwitch-II limits the dynamic range of the optocoupler LED current, allowing the Zener diode to operate at near constant bias current. However, if higher accuracy is required, a TL431 precision reference IC may be used to replace VR1.
8
Rev. H 02/09
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Page 9
PERFORMANCE SUMMARY
Continuous Output Power: 10.24 W Efficiency: ≥ 75%
140 - 375
VDC
Input
C1
0.01 μF 1 kV
TinySwitch-II
U1
TNY266P
+12 VDC 20 mA
C2
82 μF
35 V
0 V
1N4148
D
S
D2
EN
BP
R4
10 kΩ
C3
0.1 μF 50 V
R1
200 kΩ
R2
1 MΩ
R3
1 MΩ
C5
2.2 nF 1 kV
D1
1N4005GP
C4
1 nF Y1
1
2
4
5
T1
TLP181Y
U2
10
8
D3
1N5822
C6
1000 μF
10 V
VR1
BZX79B3V9
R6
59 Ω
1%
TNY263-268
L1
10 μH
2 A
C8
470 μF
10 V
R5
680 Ω
+5 V, 2 A
RTN
Figure 15. 10 W Standby Supply.
PERFORMANCE SUMMARY
Continuous Output Power: 15.24 W Efficiency: ≥ 78%
140 - 375
VDC
Input
C1
0.01 μF 1 kV
TinySwitch-II
U1
TNY267P
+12 VDC 20 mA
C2
82 μF
35 V
D
S
D2
1N4148
EN
BP
R4
10 kΩ
C3
0.1 μF 50 V
R1
100 kΩ
R2
1 MΩ
R3
1 MΩ
C5
2.2 nF 1 kV
D1
1N4005GP
C4
1 nF Y1
1
2
4
5
T1
TLP181Y
U2
10
PI-2713-021809
D3
SB540
C6
1000 μF
8
10 V
C7
1000 μF
10 V
L1
10 μH
3 A
C8
470 μF
10 V
+5 V, 3 A
RTN
VR1
BZX79B3V9
R6
59 Ω
1%
R5
680 Ω
0 V
Figure 16. 15 W Standby Supply.
www.powerint.com
PI-2712-021809
9
Rev. H 02/09
Page 10
TNY263-268
Key Application Considerations
TinySwitch-II vs. TinySwitch
Table 2 compares the features and performance differences between the TNY254 device of the TinySwitch-II family with the TinySwitch-II family of devices. Many of the new features eliminate the need for or reduce the cost of circuit components. Other features simplify the design and enhance performance.
Design
Output Power
Table 1 (front page) shows the practical continuous output power levels that can be obtained under the following conditions:
TinySwitch-II vs. TinySwitch
Function
TinySwitch
TNY254
1.
The minimum DC input voltage is 90 V or higher for 85 VAC input, or 240 V or higher for 230 VAC input or 115 VAC input with a voltage doubler. This corresponds to a fi lter capacitor of 3 μF/W for universal input and 1 μF/W for 230 VAC or 115 VAC with doubler input.
2.
A secondary output of 5 V with a Schottky rectifi er diode.
3.
Assumed effi ciency of 77% (TNY267 & TNY268), 75% (TNY265 & TNY266) and 73% (TNY263 & TNY264). The parts are board mounted with SOURCE pins soldered
4. to suffi cient area of copper to keep the die temperature at or below 100 °C.
In addition to the thermal environment (sealed enclosure, ventilated, open frame, etc.), the maximum power capability of TinySwitch-II in a given application depends on transformer
TinySwitch-II
TNY263-268
TinySwitch-II
Advantages
Switching Frequency and Tolerance Temperature Variation (0-100 °C)**
Active Frequency Jitter N/A* ±4 kHz Lower EMI minimizing fi lter
Transformer Audible Noise Reduction
Line UV Detect N/A* Single resistor
Current Limit Tolerance Temperature Variation (0-100 °C)**
Auto-Restart N/A* 6% effective on-time Limits output short-circuit current to less than full
BYPASS Pin Zener Clamp N/A* Internally clamped to 6.3 V Allows TinySwitch-II to be powered from a low
44 kHz ±10% (at 25 °C)
+8%
N/A* Yes–built into controller Practically eliminates audible noise with ordinary dip
±11% (at 25 °C)
-8%
132 kHz ±6% (at 25 °C)
+2%)
programmable
±7% (at 25 °C) 0%)
Smaller transformer for low cost Ease of design
Manufacturability
Optimum design for lower cost
component costs
varnished transformer – no special construction or gluing required
Prevents power on/off glitches
Increases power capability and
simplifi es design for high volume manufacturing
load current
No output diode size penalty
Protects load in open loop fault conditions
No additional components required
voltage bias winding to improve effi ciency and to reduce on-chip power dissipation
DRAIN Creepage at Package 0.037 in. / 0.94 mm 0.137 in. / 3.48 mm Greater immunity to arcing as a result of dust,
*Not available. ** See typical performance curves.
Table 2. Comparison Between TinySwitch and TinySwitch-II.
debris or other contaminants build-up
10
Rev. H 02/09
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Page 11
TNY263-268
core size and design (continuous or discontinuous), effi ciency, minimum specifi ed input voltage, input storage capacitance, output voltage, output diode forward drop, etc., and can be different from the values shown in Table 1.
Audible Noise
The TinySwitch-II practically eliminates any transformer audio noise using simple ordinary varnished transformer construction. No gluing of the cores is needed. The audio noise reduction is accomplished by the TinySwitch-II controller reducing the current limit in discrete steps as the load is reduced. This minimizes the fl ux density in the transformer when switching at audio frequencies.
Worst Case EMI & Effi ciency Measurement
Since identical TinySwitch-II supplies may operate at several different frequencies under the same load and line conditions, care must be taken to ensure that measurements are made under worst case conditions. When measuring effi ciency or EMI verify that the TinySwitch-II is operating at maximum frequency and that measurements are made at both low and high line input voltages to ensure the worst case result is obtained.
Layout
Single Point Grounding
Use a single point ground connection at the SOURCE pin for the BYPASS pin capacitor and the Input Filter Capacitor (see Figure 17).
The voltage rating of a resistor should be considered for the undervoltage detect (Figure 15: R2, R3) resistors. For 1/4 W resistors, the voltage rating is typically 200 V continuous, whereas for 1/2 W resistors the rating is typically 400 V continuous.
Y-Capacitor
The placement of the Y-capacitor should be directly from the primary bulk capacitor positive rail to the common/return terminal on the secondary side. Such placement will maximize the EMI benefi t of the Y-capacitor and avoid problems in common-mode surge testing.
Optocoupler
It is important to maintain the minimum circuit path from the optocoupler transistor to the TinySwitch-II EN/UV and SOURCE pins to minimize noise coupling.
The EN/UV pin connection to the optocoupler should be kept to an absolute minimum (less than 12.7 mm or 0.5 in.), and this connection should be kept away from the DRAIN pin (minimum of 5.1 mm or 0.2 in.).
Output Diode
For best performance, the area of the loop connecting the secondary winding, the output diode and the output fi lter capacitor, should be minimized. See Figure 17 for optimized layout. In addition, suffi cient copper area should be provided at the anode and cathode terminals of the diode for adequate heatsinking.
Primary Loop Area
The area of the primary loop that connects the input fi lter capacitor, transformer primary and TinySwitch-II together should be kept as small as possible.
Primary Clamp Circuit
A clamp is used to limit peak voltage on the DRAIN pin at turn­off. This can be achieved by using an RCD clamp (as shown in Figure 14). A Zener and diode clamp (200 V) across the primary or a single 550 V Zener clamp from DRAIN to SOURCE can also be used. In all cases care should be taken to minimize the circuit path from the clamp components to the transformer and TinySwitch-II.
Thermal Considerations
Copper underneath the TinySwitch-II acts not only as a single point ground, but also as a heatsink. The hatched areas shown in Figure 17 should be maximized for good heat sinking of TinySwitch-II and the same applies to the output diode.
EN/UV pin
If a line undervoltage detect resistor is used then the resistor should be mounted as close as possible to the EN/UV pin to minimize noise pick up.
Input and Output Filter Capacitors
There are constrictions in the traces connected to the input and output fi lter capacitors. These constrictions are present for two reasons. The fi rst is to force all the high frequency currents to fl ow through the capacitor (if the trace were wide then it could fl ow around the capacitor). Secondly, the Constrictions minimize the heat transferred from the TinySwitch-II to the input fi lter capacitor and from the secondary diode to the output fi lter capacitor. The common/return (the negative output terminal in Figure 17) terminal of the output fi lter capacitor should be connected with a short, low impedance path to the secondary winding. In addition, the common/ return output connection should be taken directly from the secondary winding pin and not from the Y-capacitor connection point.
PC Board Cleaning
Power Integrations does not recommend the use of “no clean” fl u x .
For the most up-to-date information visit the PI website at: www.powerint.com.
www.powerint.com
11
Rev. H 02/09
Page 12
TNY263-268
+
Input Filter Capacitor
Safety Spacing
Y1-
Capacitor
Output Filter Capacitor
HV
PRI
T
r
a n s
f
S
D
o
r
m
TOP VIEW
TinySwitch-II
e
r
Opto-
C
BP
BP
Figure 17. Recommended Circuit Board Layout for TinySwitch-II with Undervoltage Lock Out Resistor.
S
EN/UV
coupler
SEC
DC
+
Out
Maximize hatched copper areas ( ) for optimum heat sinking
PI-2707-012901
12
Rev. H 02/09
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Page 13
TNY263-268
Absolute Maximum Ratings
(1,4)
DRAIN Voltage .................................. ................ -0.3 V to 700 V
DRAIN Peak Current: TNY263......................................400 mA
TNY264.....................................400 mA
.................................... TNY265......................................440 mA
TNY266.....................................560 mA
.................................... TNY267.....................................720 mA
TNY268.....................................880 mA
EN/UV Voltage .......................................................-0.3 V to 9 V
EN/UV Current ............................................................... 100 mA
BYPASS Voltage .................................................. ..-0.3 V to 9 V
Storage Temperature ....................................... -65 °C to 150 °C
Thermal Impedance
Thermal Impedance: P or G Package: (θ
) ........................... 70 °C/W
JA
(1)
(θJC)
............................................... 11 °C/W
(2)
; 60 °C/W
(3)
Conditions
Parameter Symbol
SOURCE = 0 V; T
See Figure 18
(Unless Otherwise Specifi ed)
Operating Junction Temperature Lead Temperature
(3)
....................................................... ..260 °C
(2)
.................... -40 °C to 150 °C
Notes:
1. All voltages referenced to SOURCE, T
= 25 °C.
A
2. Normally limited by internal circuitry.
3. 1/16 in. from case for 5 seconds.
4. Maximum ratings specifi ed may be applied one at a time, without causing permanent damage to the product. Exposure to Absolute Maximum Rating conditions for extended periods of time may affect product reliability.
Notes:
1. Measured on the SOURCE pin close to plastic interface.
2. Soldered to 0.36 sq. in. (232 mm2), 2 oz. (610 g/m2) copper clad.
3. Soldered to 1 sq. in. (645 mm
= -40 to 125 °C
J
Min Typ Max Units
2
), 2 oz. (610 g/m2) copper clad.
Control Functions
Output Frequency f
Maximum Duty Cycle DC
EN/UV Pin Turnoff Threshold Current
EN/UV Pin Voltage V
DRAIN Supply Current
BYPASS Pin Charge Current
I
I
OSC
I
DIS
I
S1
I
S2
CH1
CH2
EN
MAX
TJ = 25 °C
See Figure 4
TJ = -40 °C to 125 °C -300 -240 -170
EN/UV Open
(MOSFET
Switching)
See Note A, B
VBP = 0 V,
T
= 25 °C
J
See Note C, D
VBP = 4 V,
T
= 25 °C
J
See Note C, D
Average 124 132 140
Peak-Peak Jitter 8
S1 Open 62 65 68 %
I
= -125 μA
EN/UV
I
= 25 μA
EN/UV
V
= 0 V 430 500
EN/UV
0.4 1.0 1.5
1.3 2.3 2.7
TNY263 200 250
TNY264 225 270
TNY265 245 295
TNY266 265 320
TNY267 315 380
TNY268 380 460
TNY263-264 -5.5 -3.3 -1.8
TNY265-268 -7.5 -4.6 -2.5
TNY263-264 -3.8 -2.0 -1.0
TNY265-268 -4.5 -3.0 -1.5
kHz
μA
V
μA
μA
mA
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13
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Page 14
TNY263-268
Parameter Symbol
Control Functions (cont.)
BYPASS Pin Voltage
BYPASS Pin Voltage Hysteresis
EN/UV Pin Line Under­Voltage Threshold
Circuit Protection
Current Limit I
V
V
BPH
I
LUV
LIMIT
SOURCE = 0 V; T
See Figure 18
= -40 to 125 °C
J
Min Typ Max Units
(Unless Otherwise Specifi ed)
Conditions
BP
See Note C 5.6 5.85 6.15 V
0.80 0.95 1.20 V
TNY263
T
= 25 °C
J
TNY264
T
= 25 °C
J
TNY265
T
= 25 °C
J
TNY266
T
= 25 °C
J
TNY267
T
= 25 °C
J
TJ = 25 °C 44 49 54
di/dt = 42 mA/μs
See Note E
di/dt = 50 mA/μs
See Note E
di/dt = 55 mA/μs
See Note E
di/dt = 70 mA/μs
See Note E
di/dt = 90 mA/μs
See Note E
195 210 225
233 250 267
255 275 295
325 350 375
419 450 481
μA
mA
Initial Current Limit I
Leading Edge Blanking Time
Current Limit Delay
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
Output
ON-State Resistance
R
INIT
t
LEB
t
ILD
DS(ON)
TNY268
T
= 25 °C
J
TNY263
I
= 21 mA
D
TNY264
I
= 25 mA
D
TNY265
I
= 28 mA
D
di/dt = 110 mA/μs
See Figure 21
T
= 25 °C
J
TJ = 25 °C
See Note F
TJ = 25 °C
See Note F, G
See Note E
512 550 588
0.65 x
I
LIMIT(MIN)
170 215 ns
150 ns
125 135 150 °C
70 °C
= 25 °C 33 38
T
J
TJ = 100 °C 50 57
= 25 °C 28 32
T
J
TJ = 100 °C 42 48
= 25 °C 19 22
T
J
TJ = 100 °C 29 33
mA
Ω
14
Rev. H 02/09
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Page 15
TNY263-268
Parameter Symbol
Output (cont.)
ON-State Resistance
R
OFF-State Drain Leakage Current
Breakdown Voltage
BV
Rise Time t
Fall Time t
Drain Supply Voltage
DS(ON)
I
DSS
DSS
R
F
SOURCE = 0 V; T
See Figure 18
= -40 to 125 °C
J
(Unless Otherwise Specifi ed)
Conditions
TNY266
I
= 35 mA
D
TNY267
I
= 45 mA
D
TNY268
I
= 55 mA
D
VBP = 6.2 V,
V
= 0 V,
EN/UV
V
= 560 V,
DS
T
= 125 °C
J
VBP = 6.2 V, V
See Note H, T
T
TJ = 100 °C 21 24
T
TJ = 100 °C 11.7 13.5
T
TJ = 100 °C 7.8 9.0
TNY263-266 50
TNY267-268 100
= 0 V,
EN/UV
= 25 °C
J
Measured in a Typical Flyback
Converter Application
Min Typ Max Units
= 25 °C 14 16
J
= 25 °C 7.8 9.0
J
= 25 °C 5.2 6.0
J
700 V
50 ns
50 ns
50 V
Ω
μA
Output EN/UV Delay t
Output Disable Setup Time
Auto-Restart ON-Time
Auto-Restart Duty Cycle
EN/UV
t
DC
t
DST
AR
AR
See Figure 20 10
0.5
TJ = 25 °C See Note I
50 ms
5.6 %
NOTES:
Total current consumption is the sum of I
A.
I
and I
S2
Since the output MOSFET is switching, it is diffi cult to isolate the switching current from the supply current at the
B.
when EN/UV pin is open (MOSFET switching).
DSS
and I
S1
when EN/UV pin is shorted to ground (MOSFET not switching) and the sum of
DSS
DRAIN. An alternative is to measure the BYPASS pin current at 6.1 V. BYPASS pin is not intended for sourcing supply current to external circuitry.
C.
See Typical Performance Characteristics section for BYPASS pin start-up charging waveform.
D.
For current limit at other di/dt values, refer to Figure 25.
E.
This parameter is derived from characterization.
F.
This parameter is derived from the change in current limit measured at 1X and 4X of the di/dt shown in the I
G. H.
Breakdown voltage may be checked against minimum BV exceeding minimum BV
I.
Auto-restart on time has the same temperature characteristics as the oscillator (inversely proportional to frequency).
DSS
.
specifi cation by ramping the DRAIN pin voltage up to but not
DSS
specifi cation.
LIMIT
μs
μs
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15
Rev. H 02/09
Page 16
TNY263-268
D
S
NOTE: This test circuit is not applicable for current limit or output characteristic measurements.
Figure 18. TinySwitch-II General Test Circuit.
EN/UV
470 Ω
5 W
S2
470 Ω
S
S
BPS
2 MΩ
0.1 μF
S1
150 V
DC
50 V
10 V
PI-2686-101700
MAX
(internal signal)
t
P
EN/UV
Figure 19. TinySwitch-II Duty Cycle Measurement.
0.8
t
V
DRAIN
1
tP =
f
OSC
Figure 20. TinySwitch-II Output Enable Timing.
EN/UV
PI-2364-012699
16
Rev. H 02/09
Figure 21. Current Limit Envelope.
www.powerint.com
Page 17
Typical Performance Characteristics
B
kd
V
l
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
1234
Normalized di/dt
PI-2697-033104
Normalized Current Limit
TNY263 42 mA/μs 210 mA TNY264 50 mA/μs 250 mA TNY265 55 mA/μs 275 mA TNY266 70 mA/μs 350 mA TNY267 90 mA/μs 450 mA TNY268 110 mA/μs 550 mA
Normalized
di/dt = 1
Normalized
Current
Limit = 1
1
0.8
0.6
0.4
0.2
0
-50 0 50 100 150
Temperature (oC)
PI-2714-021809
1.2
Current Limit
(Normalized to 25 oC)
TNY263/268 TNY264-266 TNY267
TNY263-268
1.1
PI-2213-012301
tage o
1.0
own
rea
(Normalized to 25 °C)
0.9
-50 -25 0 25 50 75 100 125 150
Figure 22. Breakdown vs. Temperature.
Junction Temperature (°C)
1.2
1.0
PI-2680-021809
0.8
0.6
0.4
Output Frequency
(Normalized to 25 °C)
0.2
0
-50 -25 0 25 50 75 100 125
Figure 23. Frequency vs. Temperature.
Junction Temperature (°C)
Figure 24. Current Limit vs. Temperature.
7
6
5
4
www.powerint.com
3
2
1
BYPASS Pin Voltage (V)
0
Figure 26. BYPASS Pin Start-up Waveform.
0 0.2 0.4 0.6 0.8 1.0
Time (ms)
PI-2240-012301
Figure 25. Current Limit vs. di/dt.
300
T
= 25 °C
CASE
T
= 100 °C
250
200
150
Scaling Factors: TNY263 0.85 TNY264 1.0 TNY265 1.5 TNY266 2.0 TNY267 3.5 TNY268 5.5
CASE
PI-2221-032504
100
Drain Current (mA)
50
0
0246810
Figure 27. Output Characteristic.
Drain Voltage (V)
17
Rev. H 02/09
Page 18
TNY263-268
Drain Voltage (V)
Drain Capacitance (pF)
PI-2683-033104
0 100 200 300 400 500 600
1
10
100
1000
TNY263 1.0 TNY264 1.0 TNY265 1.5 TNY266 2.0 TNY267 3.5 TNY268 5.5
Scaling Factors:
35
20
25
30
5
10
15
0
0 200 400 600
Drain Voltage (V)
Power (mW)
PI-2225-033104
TNY263 1.0 TNY264 1.0 TNY265 1.5 TNY266 2.0 TNY267 3.5 TNY268 5.5
Scaling Factors:
1.2
1.0
0.8
0.6
0.4
0.2
0
-50 -25 0 25 50 75 100 125
Junction Temperature (°C)
PI-2698-012301
Under-Voltage Threshold
(Normalized to 25 °C)
Typical Performance Characteristics (cont.)
Figure 28. C
vs. Drain Voltage.
OSS
Figure 30. Under-voltage Threshold vs. Temperature.
Figure 29. Drain Capacitance Power.
18
Rev. H 02/09
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Page 19
-E-
.240 (6.10) .260 (6.60)
Pin 1
-D-
.125 (3.18) .145 (3.68)
-T­SEATING PLANE
.100 (2.54) BSC
D S
.367 (9.32) .387 (9.83)
.014 (.36) .022 (.56)
.004 (.10)
T E D S
.137 (3.48) MINIMUM
.048 (1.22) .053 (1.35)
.010 (.25) M
.057 (1.45) .068 (1.73)
(NOTE 6)
.015 (.38)
MINIMUM
.120 (3.05) .140 (3.56)
DIP-8B
Notes:
1. Package dimensions conform to JEDEC specification MS-001-AB (Issue B 7/85) for standard dual-in-line (DIP) package with .300 inch row spacing.
2. Controlling dimensions are inches. Millimeter sizes are shown in parentheses.
3. Dimensions shown do not include mold flash or other protrusions. Mold flash or protrusions shall not exceed .006 (.15) on any side.
4. Pin locations start with Pin 1, and continue counter-clock­ wise to Pin 8 when viewed from the top. The notch and/or dimple are aids in locating Pin 1. Pin 6 is omitted.
5. Minimum metal to metal spacing at the package body for the omitted lead location is .137 inch (3.48 mm).
6. Lead width measured at package body.
7. Lead spacing measured with the leads constrained to be perpendicular to plane T.
.008 (.20) .015 (.38)
.300 (7.62) BSC
(NOTE 7)
.300 (7.62) .390 (9.91)
TNY263-268
P08B
PI-2551-121504
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19
Rev. H 02/09
Page 20
-E-
.240 (6.10) .260 (6.60)
Pin 1
-D-
.125 (3.18) .145 (3.68)
TNY263-268
D S
.100 (2.54) (BSC)
.367 (9.32) .387 (9.83)
.004 (.10)
.137 (3.48) MINIMUM
.372 (9.45) .388 (9.86)
E S
.057 (1.45) .068 (1.73)
(NOTE 5)
.010 (.25)
SMD-8B
Pin 1
.046
.086
.060
.186
.060
.286
Solder Pad Dimensions
.046
.080
Notes:
1. Controlling dimensions are inches. Millimeter sizes are shown in parentheses.
2. Dimensions shown do not include mold flash or other protrusions. Mold flash or protrusions shall not exceed .006 (.15) on any side.
.420
3. Pin locations start with Pin 1, and continue counter-clock­ wise to Pin 8 when viewed from the top. Pin 6 is omitted.
4. Minimum metal to metal spacing at the package body for the omitted lead location is .137 inch (3.48 mm).
5. Lead width measured at package body.
6. D and E are referenced datums on the package body.
.032 (.81) .037 (.94)
Part Ordering Information
TNY 264 G N - TL
.048 (1.22) .053 (1.35)
.009 (.23)
.004 (.10) .012 (.30)
.004 (.10)
.036 (0.91) .044 (1.12)
• TinySwitch Product Family
• Series Number
• Package Identifi er
G Plastic Surface Mount SMD-8B
P Plastic DIP-8B
• Lead Finish
Blank Standard (Sn Pb)
N Pure Matte Tin (RoHS Compliant)
G RoHS Compliant and Halogen Free (P package only)
• Tape & Reel and Other Options
Blank Standard Confi gurations
TL Tape & Reel, 1 k pcs minimum, G Package only.
0 -
°
°
8
G08B
PI-2546-121504
20
Rev. H 02/09
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Page 21
TNY263-268
Revision Notes Date
A– 03/01
B Corrected fi rst page spacing and sentence in description describing innovative design.
Corrected Frequency Jitter in Figure 4 and Frequency Jitter in Parameter Table. Added last sentence to Over Temperature Protection section. Clarifi ed detecting when there is no external resistor connected to the EN/UV pin. Corrected Figure 6 and its description in the text. Corrected formatting, grammar and style errors in text and fi gures. Corrected and moved Worst Case EMI & Effi ciency Measurement section. Added PC Board Cleaning section. Replaced Figure 21 and SMD-8B Package Drawing.
C Corrected q
Updated Figures 15 and 16 and text description for Zener performance.
for P/G package.
JA
Corrected DIP-8B and SMD-8B Package Drawings.
D Corrected EN/UV under-voltage threshold in text.
Corrected 2 MW connected between positive DC input to EN/UV pin in text and Figures 15 and 16.
E Added TNY263 and TNY265. 04/04
F Added lead-free ordering information. 12/04
G 1) Typographical correction in OFF-STATE Drain Leakage Current parameter condition.
2) Removed IDS condition from BV
3) Added Note 4 to Absolute Maximum Ratings specifi cations.
parameter and added new Note H.
DSS
H Reformatted document, updated Figures 23 and 24 and Part Ordering Information. 02/09
07/01
04/03
03/04
04/05
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21
Rev. H 02/09
Page 22
For the latest updates, visit our website: www.powerint.com
Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power Integrations does not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS MAKES NO WARRANT Y HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS.
Patent Information
The products and applications illustrated herein (including transformer construction and circuits external to the products) may be covered by one or more U.S. and foreign patents, or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of Power Integrations patents may be found at www.powerint.com. Power Integrations grants its customers a license under certain patent rights as set forth at http://www.powerint.com/ip.htm.
Life Support Policy
POWER INTEGRATIONS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF POWER INTEGRATIONS. As used herein:
1.
A Life support device or system is one which, (i) is intended for surgical implant into the body, or (ii) supports or sustains life, and (iii) whose failure to perform, when properly used in accordance with instructions for use, can be reasonably expected to result in signifi cant injury or death to the user.
2.
A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
The PI logo, TOPSwitch, TinySwitch, LinkSwitch, DPA-Switch, PeakSwitch, EcoSmart, Clampless, E-Shield, Filterfuse, StakFET, PI Expert and PI FACTS are trademarks of Power Integrations, Inc. Other trademarks are property of their respective companies. ©2001, Power Integrations, Inc.
Power Integrations Worldwide Sales Support Locations
World Headquarters
5245 Hellyer Avenue San Jose, CA 95138, USA. Main: +1-408-414-9200 Customer Service: Phone: +1-408-414-9665 Fax: +1-408-414-9765 e-mail: usasales@powerint.com
China (Shanghai)
Room 1601/1610, Tower 1 Kerry Everbright City No. 218 Tianmu Road West Shanghai, P.R.C. 200070 Phone: +86-021-6354-6323 Fax: +86-021-6354-6325 e-mail: chinasales@powerint.com
China (Shenzhen)
Rm A, B & C 4th Floor, Block C, Electronics Science and Technology Bldg., 2070 Shennan Zhong Rd, Shenzhen, Guangdong, China, 518031 Phone: +86-755-8379-3243 Fax: +86-755-8379-5828 e-mail: chinasales@powerint.com
Germany
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Rueckertstrasse 3 D-80336, Munich Germany Phone: +49-89-5527-3910 Fax: +49-89-5527-3920 e-mail: eurosales@powerint.com
India
#1, 14th Main Road Vasanthanagar Bangalore-560052 India Phone: +91-80-4113-8020 Fax: +91-80-4113-8023 e-mail: indiasales@powerint.com
Italy
Via De Amicis 2 20091 Bresso MI Italy Phone: +39-028-928-6000 Fax: +39-028-928-6009 e-mail: eurosales@powerint.com
Japan
Kosei Dai-3 Bldg. 2-12-11, Shin-Yokomana, Kohoku-ku Yokohama-shi Kanagwan 222-0033 Japan Phone: +81-45-471-1021 Fax: +81-45-471-3717 e-mail: japansales@powerint.com
Korea
RM 602, 6FL Korea City Air Terminal B/D, 159-6 Samsung-Dong, Kangnam-Gu, Seoul, 135-728, Korea Phone: +82-2-2016-6610 Fax: +82-2-2016-6630 e-mail: koreasales@powerint.com
Singapore
51 Newton Road #15-08/10 Goldhill Plaza Singapore, 308900 Phone: +65-6358-2160 Fax: +65-6358-2015 e-mail: singaporesales@powerint.com
Taiwan
5F, No. 318, Nei Hu Rd., Sec. 1 Nei Hu Dist. Taipei 114, Taiwan R.O.C. Phone: +886-2-2659-4570 Fax: +886-2-2659-4550 e-mail: taiwansales@powerint.com
Europe HQ
1st Floor, St. James’s House East Street, Farnham Surrey GU9 7TJ United Kingdom Phone: +44-1252-730-141 Fax: +44-1252-727-689 e-mail: eurosales@powerint.com
Applications Hotline
World Wide +1-408-414-9660
Applications Fax
World Wide +1-408-414-9760
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