Page 1
Ordering Information
TN5335
Low Threshold
N-Channel Enhancement-Mode
Vertical DMOS FETs
BV
/R
DSS
BV
DGS
350V 15Ω 2.0V 750mA TN5335K1 TN5335N8 TN5335NW
* Same as SOT-89. Product supplied on 2000 piece carrier tape reels.
DS(ON)
(max) (max) (min) TO-236AB TO-243AA* Wafer
V
GS(th)
I
D(ON)
Features
❏ Low threshold – 2.0V max.
❏ High input impedance
❏ Low input capacitance
❏ Fast switching speeds
❏ Low on resistance
❏ Free from secondary breakdown
❏ Low input and output leakage
Where ❋ = 2-week alpha date code
Applications
❏ Logic level interfaces – ideal for TTL and CMOS
❏ Solid state relays
❏ Battery operated systems
❏ Photo voltaic drives
❏ Analog switches
❏ General purpose line drivers
❏ Telecom switches
❏ Modem hook switches
Order Number / Package
Product marking for SOT-23
N3S❋
Where ❋ = 2-week alpha date code
Low Threshold DMOS Technology
These low threshold enhancement-mode (normally-off) transistors utilize a vertical DMOS structure and Supertex's well-proven
silicon-gate manufacturing process. This combination produces
devices with the power handling capabilities of bipolar transistors
and with the high input impedance and positive temperature
coefficient inherent in MOS devices. Characteristic of all MOS
structures, these devices are free from thermal runaway and
thermally induced secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a wide range
of switching and amplifying applications where very low threshold
voltage, high breakdown voltage, high input impedance, low input
capacitance, and fast switching speeds are desired.
Package Options
Product marking for TO-243AA
TN3S❋
Absolute Maximum Ratings
Drain-to-Source Voltage BV
Drain-to-Gate Voltage BV
Gate-to-Source Voltage ± 20V
Operating and Storage Temperature -55°C to +150°C
Soldering Temperature* 300°C
Distance of 1.6 mm from case for 10 seconds.
*
11/12/01
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the
Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.
DSS
DGS
Note: See Package Outline section for dimensions.
1
SDG
TO-236AB
(SOT-23)
top view
G
D
S
TO-243AA
(SOT-89)
D
Page 2
Thermal Characteristics
TN5335
Package ID (continuous)* ID (pulsed) Power Dissipation
θ
jc
θ
ja
IDR*I
@ TA = 25°C °C/W °C/W
TO-236AB 110mA 800mA 0.36W 200 350 110mA 800mA
TO-243AA 230mA 1.3A 1.6W
ID (continuous) is limited by max rated Tj.
*
†
Mounted on FR5 board, 25mm x 25mm x 1.57mm. Significant P
increase possible on ceramic substrate.
D
†
15 78
†
230mA 1.3A
Electrical Characteristics (@ 25°C unless otherwise specified)
Symbol Parameter Min Typ Max Unit Conditions
BV
DSS
V
GS(th)
∆V
GS(th)
I
GSS
I
DSS
I
D(ON)
R
DS(ON)
∆R
DS(ON)
G
FS
C
ISS
C
OSS
C
RSS
t
d(ON)
t
r
t
d(OFF)
t
f
V
SD
t
rr
Notes:
1. All D.C. parameters 100% tested at 25°C unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)
2. All A.C. parameters sample tested.
Drain-to-Source Breakdown Voltage 350 V VGS = 0V, ID = 100µA
Gate Threshold Voltage 0.6 2.0 V VGS = VDS, ID= 1mA
Change in V
with Temperature -4.5 mV/°CVGS = VDS, ID= 1mA
GS(th)
Gate Body Leakage 100 nA VGS = ± 20V, VDS = 0V
Zero Gate Voltage Drain Current 1.0 µAV
10 µAV
1.0 mA V
= 0V, VDS = 100V
GS
= 0V, VDS = Max Rating
GS
= 0V, VDS = 0.8 Max Rating
GS
= 125°C
T
A
5.0 nA VGS = 0V, VDS = 330V
ON-State Drain Current 300 VGS = 4.5V, VDS = 25V
750
mA
VGS = 10V, VDS = 25V
Static Drain-to Source 15 VGS = 3.0V, ID = 20mA
On-State Resistance
15 Ω V
= 4.5V, ID = 150mA
GS
15 VGS = 10V, ID = 200mA
Change in R
Forward Transconductance 125 m VDS = 25V, ID = 200mA
with Temperature 1.0 %/°CVGS = 4.5V, ID = 150mA
DS(ON)
Ω
Input Capacitance 110
Common Source Output Capacitance 60 pF
Reverse Transfer Capacitance 22
VGS = 0V, VDS = 25V
f = 1Mhz
Turn-ON Delay Time 20 VDD = 25V,
Rise Time 15
Turn-OFF Delay Time 25 R
ns
ID = 150mA,
= 25Ω
GEN
Fall Time 25
Diode Forward Voltage Drop 1.8 V VGS = 0V, ISD = 200mA
Reverse Recovery Time 800 ns VGS = 0V, ISD = 200mA
DRM
Switching Waveforms and Test Circuit
10V
INPUT
10%
0V
V
DD
OUTPUT
0V
©2001 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited.
t
d(ON)
t
(ON)
10%
90%
t
r
90%
t
d(OFF)
t
(OFF)
t
F
90%
10%
2
PULSE
GENERATOR
R
gen
INPUT
V
DD
R
L
OUTPUT
D.U.T.
11/12/01
1235 Bordeaux Drive, Sunnyvale, CA 94089
TEL: (408) 744-0100 • FAX: (408) 222-4895
www.supertex.com
Loading...