Datasheet TLC5922 Datasheet (TEXAS INSTRUMENTS)

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On/Off

Input Shift

DC Input

Shift

7−bit DC

Delay

Constant

Driver

MODE

0 1

MODE

111

0 6

7−bit DC

Constant

Driver

7−bit DC

Constant

Driver

On/Off

105 111

Maximum

OUTn Current

GNDVCC SINSCLK

SOUT

XLATMODE

OUT0

OUT1

OUT15

PGND BLANK

BLANK

112

Delay

x15

IREF

Current

BLANK

Current

On/Off Register

TLC5922

SLVS486A – SEPTEMBER 2003 – REVISED MARCH 2005

LED DRIVER

FEATURES

• Controlled In-Rush Current

• 16 Channels

• Drive Capability

– 0 to 80 mA (Constant-Current Sink)

• Constant Current Accuracy

– ±1% (typical)

APPLICATIONS

• Monocolor, Multicolor, Fullcolor LED Display

• Monocolor, Multicolor LED Signboard

• Display Backlighting

• Multicolor LED Lighting Applications

• Serial Data Interface, SPI Compatible

• Fast Switching Output: Tr/ Tf= 10ns (typical)

• CMOS Level Input/Output

DESCRIPTION

The TLC5922 is a 16-channel constant-current sink

• 30 MHz Data Transfer Rate driver. Each channel has an On/Off state and a

• V

= 3.0 V to 5.5 V

• Operating Temperature = –20 °C to 85 °C

• LED Supply Voltage up to 17 V

• 32-pin HTSSOP ( PowerPAD™) Package

• Dot Correction

128-step adjustable constant-current sink (dot correction). The dot correction adjusts the brightness variations between LED, LED channels, and other LED drivers. Both dot correction and On/Off state are accessible via a serial data interface. A single external resistor sets the maximum current of all 16 channels.

– 7 bit (128 Steps) – Individually Adjustable For Each Channel

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PowerPAD is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Figure 1. Functional Block Diagram

Page 2

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TLC5922

SLVS486A – SEPTEMBER 2003 – REVISED MARCH 2005

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

ORDERING INFORMATION

Package Part Number

(1)

(2)

–20 °C to 85 °C 4 mm x 4 mm, 32-pin HTSSOP TLC5922DAP

(1) For the most current package and ordering information, see the Package Option Addendum at the

end of this document, or see the TI website at www.ti.com .

(2) The DAP package is available in tape and reel. Add R suffix (TLC5922DAPR) to order quantities of

2000 parts per reel.

ABSOLUTE MAXIMUM RATINGS

(1) (2)

TLC5922 UNIT

Supply voltage Output current (dc) I Input voltage range

Output voltage range

ESD rating

stg

Storage temperature range –40 to 150 °C

(2)

L(LC)

, V

(BLANK)

(SOUT)

(OUT0)

(XLAT)

(SCLK)

– V

(OUT15)

, V

(SIN)

(MODE)

HBM (JEDEC JESD22-A114, Human Body Model)

CDM (JEDEC JESD22-C101, Charged Device Model)

–0.3 to 6 V

90 mA –0.3 to V –0.3 to V

+ 0.3 V

–0.3 to 18 V

2 kV

500 V

Continuous total power dissipation at (or below) TA= 25°C 3.9 W Power dissipation rating at (or above) TA= 25°C 31.4 mW/°C

(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) All voltage values are with respect to network ground terminal.

RECOMMENDED OPERATING CONDITIONS DC Characteristics

OLC

(1) Please contact TI sales for slightly extended temperature range.

Supply voltage 3 5.5 V Voltage applied to output, (Out0 - Out15) 17 V High-level input voltage 0.8 VCC VCC V Low-level input voltage GND 0.2 VCC V High-level output current V Low-level output current V Constant output current OUT0 to OUT15 80 mA Operating free-air temperature range

(1)

MIN NOM MAX UNIT

= 5 V at SOUT –1 mA

= 5 V at SOUT 1 mA

–20 85 °C

Page 3

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SLVS486A – SEPTEMBER 2003 – REVISED MARCH 2005

AC Characteristics

= 3 V to 5.5 V, TA= –20°C to 85°C (unless otherwise noted)

MIN TYP MAX UNIT

SCLK

wh0

wh1

su0

su1

su2

su3

Clock frequency SCLK 30 MHz

CLK pulse duration SCLK = H/L 16 ns

wl0

XLAT pulse duration XLAT = H 20 ns

SIN – SCLK ↑ 10 ns

Setup time

SCLK ↑ – XLAT ↓ 10 ns MODE ↑ ↓ – SCLK ↑ 10 ns MODE ↑ ↓ – XLAT ↓ 10 ns SCLK ↑ – SIN 10 ns

Hold time

XLAT ↓ – SCLK ↑ 10 ns SCLK ↑ – MODE ↑ ↓ 10 ns XLAT ↓ – MODE ↑ ↓ 10 ns

ELECTRICAL CHARACTERISTICS

= 3 V to 5.5 V, TA= –20°C to 85°C (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

OLC

LO0

∆ I

OLC0

∆ I

OLC1

∆ I

OLC2

∆ I

OLC3

(IREF)

(1) Measured at device start-up temperature. Once the IC is operating (self heating), lower ICCvalues are seen. See Figure 12 .

High-level output voltage IOH= –1 mA, SOUT V

–0.5 V

Low-level output voltage IOL= 1 mA, SOUT 0.5 V Input current –1 1 µA

VI= V MODE

or GND, BLANK, XLAT, SCLK, SIN,

No data transfer, All output OFF, VO= 1 V, R

= 10 k Ω

(IREF)

No data transfer, All output OFF, VO= 1 V, R

= 1.3 k Ω

Supply current mA

Constant output current All output ON, VO= 1 V, R Leakage output current 0.1 µA

Constant current error ± 1 ± 4 %

Constant current error ± 4 ± 8.5 %

Power supply rejection ratio ± 1 ± 4 %/V

Load regulation Ω , ± 2 ± 6 %/V

(IREF)

Data transfer 30 MHz, All output ON, VO= 1 V, R

= 1.3 k Ω

(IREF)

Data transfer 30 MHz, All output ON, VO= 1 V, R

= 600 k Ω

(IREF)

= 600 Ω 70 80 90 mA

(IREF)

All output OFF, VO= 15 V, R OUT0 to OUT15

All output ON, VO= 1 V, R OUT0 to OUT15

= 600 Ω ,

(IREF)

= 600 Ω ,

(IREF)

device to device, averaged current from OUT0 to OUT15, R

All output ON, VO= 1 V, R OUT0 to OUT15

All output ON, VO= 1 V to 3 V, R

= 600 Ω

(IREF)

= 600 Ω ,

(IREF)

= 600

(IREF)

36 65

OUT0 to OUT15

Reference voltage output R

= 600 Ω 1.20 1.24 1.28 V

(IREF)

TLC5922

(1)

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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17

GND

BLANK

XLAT

SCLK

SIN

PGND

OUT0 OUT1

PGND

OUT2 OUT3 OUT4 OUT5

PGND

OUT6 OUT7

VCC IREF MODE NC SOUT PGND OUT15 OUT14 PGND OUT13 OUT12 OUT11 OUT10 PGND OUT9 OUT8

TLC5922

SLVS486A – SEPTEMBER 2003 – REVISED MARCH 2005

SWITCHING CHARACTERISTICS

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

pd0

pd1

pd2

pd3

pd4

(1) See Figure 4 . Defined as from 10% to 90% (2) See Figure 5 . Defined as from 10% to 90% (3) See Figure 4 , Figure 10 (4) See Figure 5 and Figure 10 (5) See Figure 5 , and Figure 10

SOUT(see

Rise time ns

OUTx, V DCx = 7F (see

SOUT (see

Fall time ns

OUTx, V DCx = 7F (see

SCLK ↑ – SOUT ↑↓ (see MODE ↑↓ – SOUT ↑ ↓ (see

Propagation delay BLANK ↓ – OUT0 ↑ ↓ (see time

XLAT ↑ – OUT0 ↑ ↓ (see XLAT ↑ – I

(see

Output delay time 14 22 30 ns

OUTn ↑ ↓ – OUT(n+1) ↑ ↓ (see

(1)

) 16

= 5 V, TA= 60°C,

(2)

)

(1)

) 16

= 5 V, TA= 60°C,

(2)

)

(3)

) 300

(3)

) 300

(4)

) 60

(4)

) 60

(dot-correction)

OUT

(5)

)

(4)

)

10 30

1000

NAME NO.

BLANK 2 2 GND 1 Ground

IREF 31 I/O Reference current terminal MODE 30 I OUT0 7 O Constant current output

OUT1 8 O Constant current output OUT2 10 O Constant current output

TERMINAL

I/O DESCRIPTION

Blank (Light OFF). When BLANK = H, All OUTx outputs are forced OFF. When BLANK = L, ON/OFF of OUTx outputs are controlled by input data.

Mode select. When MODE = L, SIN, SOUT, SCLK, XLAT are connected to ON/OFF control logic. When MODE = H, SIN, SOUT, SCLK, XLAT are connected to dot-correction logic.

DAP PACKAGE

(TOP VIEW)

Terminal Functions

Page 5

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VCC

INPUT

GND

400 

SOUT

GND

10 

Terminal Functions (continued)

TERMINAL

NAME NO.

OUT3 11 O Constant current output OUT4 12 O Constant current output OUT5 13 O Constant current output OUT6 15 O Constant current output OUT7 16 O Constant current output OUT8 17 O Constant current output OUT9 18 O Constant current output OUT10 20 O Constant current output OUT11 21 O Constant current output OUT12 22 O Constant current output OUT13 23 O Constant current output OUT14 25 O Constant current output OUT15 26 O Constant current output

PGND Power ground

SCLK 4 I SIN 5 I Data input of serial I/F

SOUT 28 O Data output of serial I/F VCC 32 Power supply voltage NC 29 – Not Connected

XLAT 3 I

6, 9, 14,,,

19, 24, 27

I/O DESCRIPTION

Data shift clock. Note that the internal connections are switched by MODE (pin #30). At SCLK↑, the shift-registers selected by MODE shift the data.

Data latch. Note that the internal connections are switched by MODE (pin #30). At XLAT↑, the latches selected by MODE get new data.

TLC5922

SLVS486A–SEPTEMBER 2003–REVISED MARCH 2005

PIN EQUIVALENT INPUT AND OUTPUT SCHEMATIC DIAGRAMS

(Note: Resistor values are equivalent resistance and not tested).

Figure 2. Input Equivalent Circuit (BLANK, XLAT, SCLK, SIN, MODE)

Figure 3. Output Equivalent Circuit

Page 6

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SOUT

15 pF

OUTn

51 Ω

15 pF

TLC5922

SLVS486A – SEPTEMBER 2003 – REVISED MARCH 2005

PARAMETER MEASUREMENT INFORMATION

Figure 4. Test Circuit for tr0, tf0, td0, t

Figure 5. Test Circuit for tr1, tf1, t

, t

pd2

, t

pd3

pd4

Page 7

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MAX



IREF

 40

100

1 k

10 k

100 k

0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.080

48.8 k

9.76 k

4.88 k

2.44 k

1.63 k

1.22 k 976

813

697

− Reference Resistor −

OLC

− Output Current − mA

IREF

Ω

Outn

= 1 V

DC = 127

Outn



MAX

 DC

127

SLVS486A – SEPTEMBER 2003 – REVISED MARCH 2005

PRINCIPLES OF OPERATION

Setting Maximum Channel Current

The maximum output current per channel is set by a single external resistor, R IREF and GND. The voltage on IREF is set by an internal band gap V maximum channel current is equivalent to the current flowing through R maximum output current can be calculated by Equation 1 :

where: V

= 1.24V typ.

IREF

= User selected external resistor (R

IREF

Figure 6 shows the maximum output current, I between IREF terminal to ground, and I

should not be smaller than 600 Ω)

IREF

, versus R

O(LC)

is the constant output current of OUT0,.....OUT15.

O(LC)

(IREF)

. In Figure 6 , R

TLC5922

, which is placed between

(IREF)

with a typical value of 1.24V. The

multiplied by a factor of 40. The

is the value of the resistor

(IREF)

(1)

Setting Dot-Correction

The TLC5922 has the capability to fine adjust the current of each channel, OUT0 to OUT15 independently. This is also called dot correction. This feature is used to adjust the brightness deviations of LED connected to the output channels OUT0 to OUT15. Each of the 16 channels can be programmed with a 7-bit word. The channel output can be adjusted in 128 steps from 0% to 100% of the maximum output current I determines the output current for each OUTn:

where: I

Max

DCn = the programmed dot-correction value for output n (DCn = 0, 1, 2 ...127) n = 0, 1, 2 ... 15

Figure 6. Reference Resistor vs Output Current

= the maximum programmable current of each output

. Equation 2

MAX

(2)

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DC 15.6

111

DC 14.6

104

DC 0.6

DC 0.0

DC 15.0

105

DC 1.0

LSB MSB

DC OUT0 DC OUT15

DC OUT2 − DC OUT14

150

MSBLSB

On/Off Data

On/Off

OUT0

On/Off

OUT1

On/Off

OUT2

On/Off

OUT3

On/Off

OUT4

On/Off

OUT5

On/Off

OUT6

On/Off

OUT7

On/Off

OUT8

On/Off

OUT9

On/Off OUT10

On/Off OUT11

On/Off OUT12

On/Off OUT13

On/Off OUT14

On/Off OUT15

TLC5922

SLVS486A – SEPTEMBER 2003 – REVISED MARCH 2005

PRINCIPLES OF OPERATION (continued)

Dot-correction data are entered for all channels at the same time. The complete dot-correction data format consists of 16 x 7-bit words, which forms a 112-bit wide serial data packet. The channel data is put one after another. All data is clocked in with MSB first. Figure 7 shows the DC data format.

Figure 7. DC Data Format

MODE must be set to high to input data into the dot-correction register. The internal input shift register is then set to 112-bit width. After all serial data is clocked in, a rising edge of XLAT latches the data to the dot-correction register ( Figure 10 ).

Output Enable

All OUTn channels of TLC5922 can switched off with one signal. When BLANK signal is set to high, all OUTn are disabled, regardless of On/Off status of each OUTn. When BLANK is set to low, all OUTn work under normal conditions.

Table 1. BLANK Signal Truth Table

BLANK OUT0 - OUT15

LOW Normal condition HIGH Disabled

Setting Channel On/Off Status

All OUTn channels of TLC5922 can be switched on or off independently. Each of the channels can be programmed with a 1-bit word. On/Off data are entered for all channels at the same time. The complete On/Off data format consists of 16 x 1-bit words, which form a 16-bit wide data packet. The channel data is put one after another. All data is clocked in with MSB first. Figure 8 shows the On/Off data format.

Figure 8. On/Off Data

MODE must be set to low to input On/Off data into the On/Off register. The internal input shift register is then set to 16-bit width. After all serial data is clocked in, a rising edge of XLAT, during BLANK = high, is used to latch data into the On/Off register. Figure 10 shows the On/Off data input timing chart.

Delay Between Outputs

The TLC5922 has graduated delay circuits between outputs. These delay circuits can be found in the constant current block of the device (see Figure 1 ). The fixed delay time is 20 ns (typical), OUT0 has no delay, OUT1 has 20-ns delay, OUT2 has 40-ns delay, etc. This delay prevents large inrush currents, which reduce power supply bypass capacitor requirements when the outputs turn on.

Page 9

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TLC5922

SIN

SOUT

OUT0

OUT15

SCLK

XLAT

IREF

LED

TLC5922

SIN

SOUT

OUT0

OUT15

SCLK

MODE

XLAT

IREFBLANK

LED

IC 0 IC n

SIN

SCLK

MODE

XLAT

BLANK

Controller

SOUT

MODE BLANK

100 nF

f_(SCLK)  112  f_(update)  n

TLC5922

SLVS486A – SEPTEMBER 2003 – REVISED MARCH 2005

Serial Interface Data Transfer Rate

The TLC5922 includes a flexible serial interface, which can be connected to a microcontroller or digital signal processor. Only 3 pins are required to input data into the device. The rising edge of SCLK signal shifts the data from SIN pin to internal shift register. After all data is clocked in, a rising edge of XLAT latches the serial data to the internal registers. All data is clocked in with MSB first. Multiple TLC5922 devices can be cascaded by connecting SOUT pin of one device to the SIN pin of following device.

Figure 9. Cascading Devices

Figure 9 shows an example application with n cascaded TLC5922 devices connected to a controller. The maximum number of cascaded TLC5922 devices depends on the application system, and data transfer rate. Equation 3 calculates the minimum data input frequency needed.

where: f_(SCLK): The minimum data input frequency for SCLK and SIN. f_(update): The update rate of the whole cascaded system. n: The number of cascaded TLC5922 devices.

Operating Modes

The TLC5922 has different operating modes, depending on the MODE signal. Table 2 shows the available operating modes.

Table 2. TLC5922 Operating Modes Truth Table

MODE SIGNAL INPUT SHIFT REGISTER MODE

LOW 16 bit On/Off Mode HIGH 112 bit Dot-Correction Data Input Mode

(3)

Page 10

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SCLK

SOUT

SIN

MODE

XLAT

On/Off Mode Data

Input Cycle

DC Mode Data Input

Cycle

BLANK

OUT0

OUT1

DC Mode Data Input

Cycle

On/Off Mode Data

Input Cycle

On/Off Mode Data

Input Cycle

CLK

su2

pd1

On/Off

LSB

On/Off

MSB

LSB

MSB

LSB

MSB

MSB LSB

MSB

On/Off

MSB−

LSB

On/Off

LSB

On/OffOn/OffOn/Off

On/Off

TLC5922

SLVS486A – SEPTEMBER 2003 – REVISED MARCH 2005

Figure 10. Timing Chart Example for ON/OFF Setting to Dot-Correction

Page 11

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−20

3.2

3.9

0 25 85

1.48

− Power Dissipation − W P

TA − Free-Air Temperature − °C

− Output Voltage − V

−50 −30 −10 10 30 50 70 90 110 130 150

− Supply Current − mA

TA − Free-Air Temperature − °C

SLVS486A – SEPTEMBER 2003 – REVISED MARCH 2005

Power Rating - Free-Air Temperature

Figure 11 shows total power dissipation. Figure 12 shows supply current versus free-air temperature.

Power Dissipation

Temperature

TLC5922

A. Data Transfer = 30 MHz / All Outputs, ON/V

Free-Air Temperature

= 1 V / R

Figure 11.

Supply Current

(A)

IREF

= 600 Ω / AV

Figure 12.

= 5 V

Page 12

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Thermal Pad Mechanical Data

DAP (R–PDSO–G32)

THERMAL INFORMATION

The DAP PowerPAD™ package incorporates an exposed thermal die pad that is designed to be attached directly to an external heat sink. When the thermal die pad is soldered directly to the printed circuit board (PCB), the PCB can be used as a heatsink. In addition, through the use of thermal vias, the thermal die pad can be attached directly to a ground plane or special heat sink structure designed into the PCB. This design optimizes the heat transfer from the integrated circuit (IC).

For additional information on the PowerPAD package and how to take advantage of its heat dissipating abilities, refer to Technical Brief, PowerPAD Thermally Enhanced Package, Texas Instruments Literature No. SLMA002 and Application Brief, PowerPAD Made Easy, Texas Instruments Literature No. SLMA004. Both documents are available at www.ti.com. See Figure 1 for DAP package exposed thermal die pad dimensions.

3,91 3,31

Exposed Thermal Die Pad

4,11 3,35

NOTE: All linear dimensions are in millimeters.

Figure 1. DAP Package Exposed Thermal Die Pad Dimensions

PowerPAD is a trademark of Texas Instruments.

Bottom View

PPTD001

Page 13

PACKAGE OPTION ADDENDUM

www.ti.com

27-Feb-2006

PACKAGING INFORMATION

Orderable Device Status

(1)

Package

Type

Package Drawing

Pins Package

Qty

Eco Plan

TLC5922DAP ACTIVE HTSSOP DAP 32 46 Green (RoHS &

no Sb/Br)

TLC5922DAPG4 ACTIVE HTSSOP DAP 32 46 Green (RoHS &

no Sb/Br)

TLC5922DAPR ACTIVE HTSSOP DAP 32 2000 Green (RoHS &

no Sb/Br)

TLC5922DAPRG4 ACTIVE HTSSOP DAP 32 2000 Green (RoHS &

no Sb/Br)

(1)

The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(2)

Lead/Ball Finish MSL Peak Temp

CU NIPDAU Level-3-260C-168 HR

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 1

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