Very Low Power Consumption ...2 mW
Typ at VDD = 5 V
D
Capable of Operation in Astable Mode
D
CMOS Output Capable of Swinging Rail to
Rail
D
High Output-Current Capability
Sink 100 mA Typ
Source 10 mA Typ
D
Output Fully Compatible With CMOS, TTL,
and MOS
D
Low Supply Current Reduces Spikes
During Output Transitions
D
High-Impedance Inputs ...1012 Ω Typ
D
Single-Supply Operation From 1 V to 18 V
D
Functionally Interchangeable With the
NE556; Has Same Pinout
description
The TLC552 is a dual monolithic timing circuit
fabricated using TI LinCMOS process, which
provides full compatibility with CMOS, TTL, and
MOS logic and operation at frequencies up to
2 MHz. Accurate time delays and oscillations are
possible with smaller, less-expensive timing
capacitors than the NE555 because of the high
input impedance. Power consumption is low
across the full range of power supply voltages.
D OR N PACKAGE
(TOP VIEW)
TIMER
# 1
DSCH
THRES
CONT
RESET
OUT
TRIG
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
DD
DSCH
THRES
CONT
RESET
OUT
TRIG
functional block diagram (each timer)
V
DD
CONT
R
THRES
R
TRIG
R
GND
RESET can override TRIG and THRES.
TRIG can override THRES.
RESET
R1
R1
S
TIMER
# 2
OUT
DSCH
Like the NE556, the TLC552 has a trigger level
approximately one-third of the supply voltage and
a threshold level approximately two-thirds of the
supply voltage. These levels can be altered by use
of the control voltage terminal. When the trigger
input falls below the trigger level, the flip-flop is set
and the output goes high. If the trigger input is
above the trigger level and the threshold input is
SYMBOLIZATION
DEVICE
TLC552CD,N0°C to 70°C3.8 mV
The D packages are available taped and reeled. Add the suffix R
to the device type when ordering (i.e., TLC552CDR).
AVAILABLE OPTIONS
PACKAGE
SUFFIX
OPERATING
TEMPERATURE
RANGE
above the threshold level, the flip-flop is reset and
the output is low. The reset input can override all other inputs and can be used to initiate a new
timing cycle. If the reset input is low, the flip-flop is reset and the output is low. Whenever the output is low, a
low-impedance path is provided between the discharge terminal and ground.
While the CMOS output is capable of sinking over 100 mA and sourcing over 10 mA, the TLC552 exhibits greatly
reduced supply-current spikes during output transitions. This minimizes the need for the large decoupling
capacitors required by the NE556.
LinCMOS is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright 1988, Texas Instruments Incorporated
VT max
at 25°C
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
1
Page 2
TLC552C
DUAL LINCMOS TIMER
SLFS046 – FEBRUARY 1984 – REVISED MAY 1988
description (continued)
These devices have internal electrostatic discharge (ESD) protection circuits that will prevent catastrophic
failures at voltages up to 2000 V as tested under MIL-STD-883C, Method 3105.2. However, care should be
exercised in handling these devices as exposure to ESD may result in a degradation of the device parametric
performance.
All unused inputs should be tied to an appropriate logic level to prevent false triggering.
The TLC552C is characterized for operation from 0°C to 70°C.
Initial error of timing interval
Supply voltage sensitivity of timing interval
Output pulse rise time
Output pulse fall time
Maximum frequency in astable mode
‡
Timing interval error is defined as the difference between the measured value and the nominal value of a random sample.
NOTE 2: RA, RB, and CT are as defined in Figure 1.
‡
V
= 5 V to 15 V,R
CT = 0.1 µF,
= 10 MΩ,
L
RA = 470 Ω,
CT = 200 pF,
= R
See Note 2
RB = 200 Ω,
See Note 2
= 1 kΩ to 100 kΩ,
p
= 10
L
1.22.8MHz
1%3%
0.10.5%/V
2075
1560
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
7
Page 8
TLC552C
DUAL LINCMOS TIMER
SLFS046 – FEBRUARY 1984 – REVISED MAY 1988
APPLICATION INFORMATION
V
DD
R
A
0.1 µF
R
B
C
T
0.1 µF
CONTV
RESET
DISCH
THRES
TRIG
DD
GND
OUT
R
L
Output
C
L
Figure 1. Circuit for Astable Operation
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Page 9
IMPORTANT NOTICE
T exas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICA TIONS USING SEMICONDUCT OR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICA TIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERST OOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
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