Datasheet TLC27L2CP Specification

Page 1
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
500 µV
TLC27L7CD
TLC27L7CP
to
70 C
500 µV
TLC27L7ID
TLC27L7IP
to
85 C
to
µ
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
D
Trimmed Offset Voltage: TLC27L7 . . . 500 µV Max at 25°C, V
= 5 V
DD
D
Input Offset Voltage Drift . . . Typically
0.1 µV/Month, Including the First 30 Days
D
Wide Range of Supply Voltages Over Specified Temperature Range:
0°C to 70°C...3 V to 16 V –40°C to 85°C...4 V to 16 V –55°C to 125°C...4 V to 16 V
D
Single-Supply Operation
D
Common-Mode Input Voltage Range Extends Below the Negative Rail (C-Suffix, I-Suffix Types)
D
Ultra-Low Power ...Typically 95 µW at 25°C, V
D
Output Voltage Range Includes Negative
DD
= 5 V
Rail
D
High Input Impedance ...1012 Typ
D
ESD-Protection Circuitry
D
Small-Outline Package Option Also Available in Tape and Reel
D
Designed-In Latch-Up immunity
description
The TLC27L2 and TLC27L7 dual operational amplifiers combine a wide range of input offset voltage grades with low offset voltage drift, high input impedance, extremely low power, and high gain.
AVAILABLE OPTIONS
PACKAGE
VIOmax
T
A
AT 25°C
0°C
°
–40°C
°
–55°C
125°C
The D package is available taped and reeled. Add R suffix to the device type (e.g., TLC27L7CDR).
2 mV 5 mV TLC27L2ACD
10 mV TLC27L2CD TLC27L2CP
2 mV 5 mV TLC27L2AID
10 mV TLC27L2ID TLC27L2IP
500 µV TLC27L7MD TLC27L7MFK TLC27L7MJG TLC27L7MP
10 mV TLC27L2MD TLC27L2MFK TLC27L2MJG TLC27L2MP
SMALL
OUTLINE
(D)
TLC27L2BCD
TLC27L2BID
CHIP
CARRIER
(FK)
CERAMIC
DIP
(JG)
PLASTIC
DIP
(P)
TLC27L2BCP TLC27L2ACP
TLC27L2BIP TLC27L2AIP
D, JG, OR P PACKAGE
(TOP VIEW)
1OUT
1IN– 1IN+ GND
NC
1IN–
NC
1IN+
NC
NC – No internal connection
1 2 3 4
FK PACKAGE
(TOP VIEW)
NC
1OUT
NCNCNC
3 2 1 20 19
4 5 6 7 8
910111213
NC
NC
GND
8 7 6 5
DD
V
2IN +
DISTRIBUTION OF TLC27L7
INPUT OFFSET VOLTAGE
30
335 Units Tested From 2 Wafer Lots VDD = 5 V
25
TA = 25°C P Package
20
15
10
Percentage of Units – %
5
0
–800
–400 0 400
VIO – Input Offset Voltage – µV
V
DD
2OUT 2IN– 2IN+
18 17 16 15 14
NC 2OUT NC 2IN– NC
800
LinCMOS is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright 2001, Texas Instruments Incorporated
1
Page 2
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
description (continued)
These devices use Texas Instruments silicon-gate LinCMOS technology, which provides offset voltage stability far exceeding the stability available with conventional metal-gate processes.
The extremely high input impedance, low bias currents, and low power consumption make these cost-effective devices ideal for high gain, low frequency, low power applications. Four offset voltage grades are available (C-suffix and I-suffix types), ranging from the low-cost TLC27L2 (10 mV) to the high-precision TLC27L7 (500 µV). These advantages, in combination with good common-mode rejection and supply voltage rejection, make these devices a good choice for new state-of-the-art designs as well as for upgrading existing designs.
In general, many features associated with bipolar technology are available in LinCMOS operational amplifiers, without the power penalties of bipolar technology . General applications such as transducer interfacing, analog calculations, amplifier blocks, active filters, and signal buffering are easily designed with the TLC27L2 and TLC27L7. The devices also exhibit low voltage single-supply operation and ultra-low power consumption, making them ideally suited for remote and inaccessible battery-powered applications. The common-mode input voltage range includes the negative rail.
A wide range of packaging options is available, including small-outline and chip-carrier versions for high-density system applications.
The device inputs and outputs are designed to withstand –100-mA surge currents without sustaining latch-up. The TLC27L2 and TLC27L7 incorporate internal ESD-protection circuits that prevent functional failures at
voltages up to 2000 V as tested under MIL-STD-883C, Method 3015.2; however, care should be exercised in handling these devices as exposure to ESD may result in the degradation of the device parametric performance.
The C-Suffix devices are characterized for operation from 0°C to 70°C. The I-suffix devices are characterized for operation from –40°C to 85°C. The M-suffix devices are characterized for operation over the full military temperature range of –55°C to 125°C.
equivalent schematic (each amplifier)
V
DD
P3 P4
R6
R5
N3
D2R4D1R3
N5
C1
N4
P5 P6
OUT
N7N6
R7
IN–
IN+
R1
P1
N1
R2
P2
N2
GND
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Page 3
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
PACKAGE
A
UNIT
Common-mode input voltage, V
V
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V Differential input voltage (see Note 2) ±V Input voltage range, V Input current, I Output current, I Total current into V
Total current out of GND 45 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Duration of short-circuit current at (or below) 25°C (see Note 3) Unlimited. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature, T
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Case temperature for 60 seconds: FK package 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or P package 260°C. . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: JG package 300°C. . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to network ground.
2. Differential voltages are at IN+ with respect to IN–.
3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum dissipation rating is not exceeded (see application section).
(see Note 1) 18 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(any input) –0.3 V to V
±5 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
I
(each output) ±30 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
O
45 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
: C suffix 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A
I suffix –40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
M suffix –55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DD DD
T
25°C DERATING FACTOR T
POWER RATING ABOVE TA = 25°CAPOWER RATINGAPOWER RATINGAPOWER RATING
D 725 mW 5.8 mW/°C 464 mW 377 mW FK 1375 mW 11.0 mW/°C 880 mW 715 mW 275 mW JG 1050 mW 8.4 mW/°C 672 mW 546 mW 210 mW
P 1000 mW 8.0 mW/°C 640 mW 520 mW
recommended operating conditions
Supply voltage, V
Operating free-air temperature, T
DD
p
VDD = 5 V –0.2 3.5 –0.2 3.5 0 3.5
IC
VDD = 10 V –0.2 8.5 –0.2 8.5 0 8.5
A
DISSIPATION RATING T ABLE
= 70°C T
C SUFFIX I SUFFIX M SUFFIX MIN MAX MIN MAX MIN MAX
= 85°C T
3 16 4 16 4 16 V
0 70 –40 85 –55 125 °C
= 125°C
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
3
Page 4
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
TLC27L2C
O
,
IC
,
mV
TLC27L2AC
O
,
IC
,
VIOInput offset voltage
TLC27L2BC
O
,
IC
,
V
TLC27L7C
O
,
IC
,
g
1.1µV/°C
IIOInput offset current (see Note 4)
V
2.5 V
V
2.5 V
pA
IIBInput bias current (see Note 4)
V
2.5 V
V
2.5 V
pA
0.2to0.3
V
gg
0.2
g
am lification
(VDD/VIO)
V
2.5 V
V
2.5 V
No load
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted)
TLC27L2C TLC27L2AC
PARAMETER TEST CONDITIONS
V
= 1.4 V, V
RS = 50 Ω, V
= 1.4 V, V
p
α
VIO
ICR
V
OH
V
OL
A
VD
CMRR Common-mode rejection ratio VIC = V
k
SVR
I
DD
Full range is 0°C to 70°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically .
Average temperature coefficient of input 25°C to offset voltage 70°C
p
p
Common-mode input voltage range (see Note 5)
High-level output voltage VID = 100 mV, RL = 1 M
Low-level output voltage VID = –100 mV, IOL = 0
Large-signal differential voltage
p
Supply-voltage rejection ratio
Supply current (two amplifiers)
5. This range also applies to each input individually.
RS = 50 Ω, V
= 1.4 V, V
RS = 50 Ω, V
= 1.4 V, V
RS = 50 Ω,
,
=
O
,
=
O
VO = 0.25 V to 2 V, RL = 1 M
min
ICR
VDD = 5 V to 10 V, VO = 1.4 V
,
=
O
= 0,
RL = 1 M
= 0,
RL = 1 M
= 0,
RL = 1 M
= 0,
RL = 1 M
=
IC
=
IC
=
IC
,
T
A
25°C 1.1 10
Full range
25°C 0.9 5
Full range
25°C 204 2000
Full range
25°C 170 500
Full range
25°C 0.1 60 70°C 7 300 25°C 0.6 60 70°C 50 600
25°C
Full range
25°C 3.2 4.1
0°C 70°C 3 4.2 25°C 0 50
0°C 70°C 0 50 25°C 50 700
0°C 70°C 50 380 25°C 65 94
0°C 60 95 70°C 60 95 25°C 70 97
0°C 70°C 60 98 25°C 20 34
0°C 70°C 16 28
TLC27L2BC TLC27L7C
MIN TYP MAX
3000
1500
–0.2 –0.3
to
4 4.2
–0.2
to
3.5
3 4.1
0 50
50 700
60 97
24 42
UNIT
12
6.5
µ
p
p
V
V
V
mV
V/mV
dB
dB
µA
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Page 5
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
TLC27L2C
O
,
IC
,
mV
TLC27L2AC
O
,
IC
,
VIOInput offset voltage
TLC27L2BC
O
,
IC
,
TLC27L7C
O
,
IC
,
IIOInput offset current (see Note 4)
V
5 V
V
5 V
pA
IIBInput bias current (see Note 4)
V
5 V
V
5 V
pA
0.2to0.3
V
gg
0.2
g
am lification
(VDD/VIO)
V
5 V
V
5 V
No load
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
electrical characteristics at specified free-air temperature, VDD = 10 V (unless otherwise noted)
TLC27L2C TLC27L2AC
PARAMETER TEST CONDITIONS
V
= 1.4 V, V
RS = 50 Ω, V
= 1.4 V, V
p
α
VIO
ICR
V
OH
V
OL
A
VD
CMRR Common-mode rejection ratio VIC = V
k
SVR
I
DD
Full range is 0°C to 70°C.
NOTES: 4 The typical values of input bias current and input offset current below 5 pA were determined mathematically .
Average temperature coefficient of input offset voltage
p
p
Common-mode input voltage range (see Note 5)
High-level output voltage VID = 100 mV, RL = 1 M
Low-level output voltage VID = –100 mV, IOL = 0
Large-signal differential voltage
p
Supply-voltage rejection ratio
Supply current (two amplifiers)
5 This range also applies to each input individually.
RS = 50 Ω, V
= 1.4 V, V
RS = 50 Ω, V
= 1.4 V, V
RS = 50 Ω,
,
=
O
,
=
O
VO = 1 V to 6 V, RL = 1 M
min
ICR
VDD = 5 V to 10 V, VO = 1.4 V
,
=
O
= 0,
RL = 1 M
= 0,
RL = 1 M
= 0,
RL = 1 M
= 0,
RL = 1 M
=
IC
=
IC
=
IC
,
T
A
25°C 1.1 10
Full range
25°C 0.9 5
Full range
25°C 235 2000
Full range
25°C 190 800
Full range
25°C to
70°C 25°C 0.1 60 70°C 8 300 25°C 0.7 60 70°C 50 600
25°C
Full range
25°C 8 8.9
0°C 70°C 7.8 8.9 25°C 0 50
0°C 70°C 0 50 25°C 50 860
0°C 70°C 50 660 25°C 65 97
0°C 60 97 70°C 60 97 25°C 70 97
0°C 70°C 60 98 25°C 29 46
0°C 70°C 22 40
TLC27L2BC TLC27L7C
MIN TYP MAX
3000 µV
1900
1 µV/°C
–0.2 –0.3
to
9 9.2
–0.2
to
8.5
7.8 8.9
0 50
50 1025
60 97
36 66
UNIT
12
6.5
p
p
V
V
V
mV
V/mV
dB
dB
µA
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
5
Page 6
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
TLC27L2I
O
,
IC
,
mV
TLC27L2AI
O
,
IC
,
VIOInput offset voltage
TLC27L2BI
O
,
IC
,
V
TLC27L7I
O
,
IC
,
g
1.1µV/°C
IIOInput offset current (see Note 4)
V
2.5 V
V
2.5 V
pA
IIBInput bias current (see Note 4)
V
2.5 V
V
2.5 V
pA
0.2to0.3
V
gg
0.2
g
voltage am lification
(VDD/VIO)
V
2.5 V
V
2.5 V
No load
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted)
TLC27L2I TLC27L2AI
PARAMETER TEST CONDITIONS
V
= 1.4 V, V
RS = 50 Ω, V
= 1.4 V, V
p
α
VIO
ICR
V
OH
V
OL
A
VD
CMRR Common-mode rejection ratio VIC = V
k
SVR
I
DD
Full range is –40°C to 85°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.
Average temperature coefficient of 25°C to input offset voltage 85°C
p
p
Common-mode input voltage range (see Note 5)
High-level output voltage VID = 100 mV, RL = 1 M
Low-level output voltage VID = –100 mV, IOL = 0
Large-signal differential
p
Supply-voltage rejection ratio
Supply current (two amplifiers)
5. This range also applies to each input individually.
RS = 50 Ω, V
= 1.4 V, V
RS = 50 Ω, V
= 1.4 V, V
RS = 50 Ω,
,
=
O
,
=
O
VO = 0.25 V to 2 V, RL = 1 M
min
ICR
VDD = 5 V to 10 V, VO = 1.4 V
,
=
O
= 0,
RL = 1 M
= 0,
RL = 1 M
= 0,
RL = 1 M
= 0,
RL = 1 M
=
IC
=
IC
=
IC
,
T
A
25°C 1.1 10
Full range
25°C 0.9 5
Full range
25°C 240 2000
Full range
25°C 170 500
Full range
25°C 0.1 60 85°C 24 1000 25°C 0.6 60 85°C 200 2000
25°C
Full range
25°C 3.2 4.1
–40°C
85°C 3 4.2 25°C 0 50
–40°C
85°C 0 50 25°C 50 480
–40°C
85°C 50 330 25°C 65 94
–40°C 60 95
85°C 60 95 25°C 70 97
–40°C
85°C 60 98 25°C 20 34
–40°C
85°C 15 26
TLC27L2BI TLC27L7I
MIN TYP MAX
3500
2000
–0.2 –0.3
to
4 4.2
–0.2
to
3.5
3 4.1
0 50
50 900
60 97
31 54
UNIT
13
7
µ
p
p
V
V
V
mV
V/mV
dB
dB
µA
6
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Page 7
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
TLC27L2I
O
,
IC
,
mV
TLC27L2AI
O
,
IC
,
VIOInput offset voltage
TLC27L2BI
O
,
IC
,
V
TLC27L7I
O
,
IC
,
g
1µV/°C
IIOInput offset current (see Note 4)
V
5 V
V
5 V
pA
IIBInput bias current (see Note 4)
V
5 V
V
5 V
pA
0.2to0.3
V
gg
0.2
g
am lification
(VDD/VIO)
V
5 V
V
5 V
No load
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
electrical characteristics at specified free-air temperature, VDD = 10 V (unless otherwise noted)
TLC27L2I TLC27L2AI
PARAMETER TEST CONDITIONS
V
= 1.4 V, V
RS = 50 Ω, V
= 1.4 V, V
p
α
VIO
ICR
V
OH
V
OL
A
VD
CMRR Common-mode rejection ratio VIC = V
k
SVR
I
DD
Full range is –40°C to 85°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.
Average temperature coefficient of input 25°C to offset voltage 85°C
p
p
Common-mode input voltage range (see Note 5)
High-level output voltage VID = 100 mV, RL = 1 M
Low-level output voltage VID = –100 mV, IOL = 0
Large-signal differential voltage
p
Supply-voltage rejection ratio
Supply current (two amplifiers)
5. This range also applies to each input individually.
RS = 50 Ω, V
= 1.4 V, V
RS = 50 Ω, V
= 1.4 V, V
RS = 50 Ω,
,
=
O
,
=
O
VO = 1 V to 6 V, RL = 1 M
min
ICR
VDD = 5 V to 10 V, VO = 1.4 V
,
=
O
= 0,
RL = 1 M
= 0,
RL = 1 M
= 0,
RL = 1 M
= 0,
RL = 1 M
=
IC
=
IC
=
IC
,
T
A
25°C 1.1 10
Full range
25°C 0.9 5
Full range
25°C 235 2000
Full range
25°C 190 800
Full range
25°C 0.1 60 85°C 26 1000 25°C 0.7 60 85°C 220 2000
25°C
Full range
25°C 8 8.9
–40°C
85°C 7.8 8.9 25°C 0 50
–40°C
85°C 0 50 25°C 50 860
–40°C
85°C 50 585 25°C 65 97
–40°C 60 97
85°C 60 98 25°C 70 97
–40°C
85°C 60 98 25°C 29 46
–40°C
85°C 20 36
TLC27L2BI TLC27L7I
MIN TYP MAX
3500
2900
–0.2 –0.3
to
9 9.2
–0.2
to
8.5
7.8 8.9
0 50
50 1550
60 97
49 86
UNIT
13
7
µ
p
p
V
V
V
mV
V/mV
dB
dB
µA
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
7
Page 8
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
A
TLC27L2M
O
IC
mV
VIOInput offset voltage
TLC27L7M
O
IC
V
g
1.4µV/°C
IIOInput offset current (see Note 4)
V
2.5 V
V
2.5 V
IIBInput bias current (see Note 4)
V
2.5 V
V
2.5 V
V
gg
g
L
diff
am lification
S
(VDD/VIO)
V
2.5 V
V
2.5 V
No load
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted)
TLC27L2M
PARAMETER TEST CONDITIONS
VO = 1.4 V, VIC = 0,
p
α
VIO
ICR
V
OH
V
OL
A
VD
CMRR Common-mode rejection ratio VIC = V
k
SVR
I
DD
Full range is –55°C to 125°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.
Average temperature coefficient of 25°C to input offset voltage 125°C
p
p
Common-mode input voltage range (see Note 5)
High-level output voltage VID = 100 mV, RL = 1 M –55°C 3 4.1 V
Low-level output voltage VID = –100 mV, IOL = 0 –55°C 0 50 mV
arge-signal
p
upply-voltage rejection ratio
Supply current (two amplifiers)
5. This range also applies to each input individually.
erential voltage
RS = 50 Ω, VO = 1.4 V, VIC = 0,
RS = 50 Ω,
,
=
O
,
=
O
VO = 0.25 V to 2 V, RL = 1 M –55°C 25 1000 V/mV
min –55°C 60 95 dB
ICR
VDD = 5 V to 10 V, VO = 1.4 V –55°C 60 97 dB
,
=
O
RL = 1 M
RL = 1 M
=
IC
=
IC
=
IC
,
T
25°C 1.1 10
Full range
25°C 170 500
Full range
25°C 0.1 60 pA
125°C 1.4 15 nA
25°C 0.6 60 pA
125°C 9 35 nA
25°C
Full range
25°C 3.2 4.1
125°C 3 4.2
25°C 0 50
125°C 0 50
25°C 50 500
125°C 25 200
25°C 65 94
125°C 60 85
25°C 70 97
125°C 60 98
25°C 20 34
–55°C
125°C 14 24
TLC27L7M
MIN TYP MAX
12
3750
0 –0.3
to to
4 4.2 0
to
3.5
35 60 µA
UNIT
µ
V
V
8
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Page 9
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
A
TLC27L2M
O
IC
mV
VIOInput offset voltage
TLC27L7M
O
IC
V
g
1.4µV/°C
IIOInput offset current (see Note 4)
V
5 V
V
5 V
IIBInput bias current (see Note 4)
V
5 V
V
5 V
V
gg
g
L
diff
am lification
S
(VDD/VIO)
V
5 V
V
5 V
No load
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
electrical characteristics at specified free-air temperature, VDD = 10 V (unless otherwise noted)
TLC27L2M
PARAMETER TEST CONDITIONS
VO = 1.4 V, VIC = 0,
p
α
VIO
ICR
V
OH
V
OL
A
VD
CMRR Common-mode rejection ratio VIC = V
k
SVR
I
DD
Full range is –55 °C to 125°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.
Average temperature coefficient of 25°C to input offset voltage 125°C
p
p
Common-mode input voltage range (see Note 5)
High-level output voltage VID = 100 mV, RL = 1 M –55°C 7.8 8.8 V
Low-level output voltage VID = –100 mV, IOL = 0 –55°C 0 50 mV
arge-signal
p
upply-voltage rejection ratio
Supply current (two amplifiers)
5. This range also applies to each input individually.
erential voltage
RS = 50 Ω, VO = 1.4 V, VIC = 0,
RS = 50 Ω,
,
=
O
,
=
O
VO = 1 V to 6 V, RL = 1 M –55°C 25 1750 V/mV
min –55°C 60 97 dB
ICR
VDD = 5 V to 10 V, VO = 1.4 V –55°C 60 97 dB
,
=
O
RL = 1 M
RL = 1 M
=
IC
=
IC
=
IC
,
T
25°C 1.1 10
Full range
25°C 190 800
Full range
25°C 0.1 60 pA
125°C 1.8 15 nA
25°C 0.7 60 pA
125°C 10 35 nA
25°C
Full range
25°C 8 8.9
125°C 7.8 9
25°C 0 50
125°C 0 50
25°C 50 860
125°C 25 380
25°C 65 97
125°C 60 91
25°C 70 97
125°C 60 98
25°C 29 46
–55°C
125°C 18 30
TLC27L7M
MIN TYP MAX
12
4300
0 –0.3
to to
9 9.2 0
to
8.5
56 96 µA
UNIT
µ
V
V
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
9
Page 10
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
(PP)
()
SR
Slew rate at unity gain
C
20 pF
See
V/µs
See Figure 1
(PP)
()
VnEquivalent input noise voltage
,
S
,
25°C
68
V/H
R
L
See Figure 1
See Figure 3
V
10 mV
f
B
C
L
See Figure 3
(PP)
()
SR
Slew rate at unity gain
C
20 pF
See
V/µs
See Figure 1
(PP)
()
VnEquivalent input noise voltage
,
S
,
25°C
68
V/H
R
L
See Figure 1
See Figure 3
V
10 mV
f
B
C
L
See Figure 3
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
operating characteristics, VDD = 5 V
PARAMETER TEST CONDITIONS T
V
= 1 V
,
,
I
V
= 2.5 V
I
= 20 Ω,
CL = 20 pF,
CL = 20 pF,
=
,
1
p
B
Maximum output-swing bandwidth
OM
B
Unity-gain bandwidth
1
φ
Phase margin
m
RL = 1 MΩ,
=
p
L
Figure 1
f = 1 kHz, R See Figure 2
VO = VOH,
= 1 M,
VI = 10 mV,
=
I
= 20 F,
=
p
TLC27L2C TLC27L2AC
A
25°C 0.03
0°C 0.04 70°C 0.03 25°C 0.03
0°C 0.03 70°C 0.02
25°C 5
0°C 6 70°C 4.5 25°C 85
0°C 70°C 65 25°C 34°
0°C 36° 70°C 30°
TLC27L2BC TLC27L7C
MIN TYP MAX
100
UNIT
n
kHz
kHz
z
operating characteristics, VDD = 10 V
PARAMETER TEST CONDITIONS T
p
B
Maximum output-swing bandwidth
OM
B
Unity-gain bandwidth
1
φ
Phase margin
m
RL = 1 MΩ,
f = 1 kHz, R See Figure 2
VO = VOH,
VI = 10 mV,
=
L
Figure 1
= 1 M,
=
I
= 20 F,
=
p
,
,
p
V
= 1 V
I
V
= 5.5 V
I
= 20 Ω,
CL = 20 pF,
CL = 20 pF,
=
,
1
TLC27L2C TLC27L2AC
A
25°C 0.05
0°C 0.05 70°C 0.04 25°C 0.04
0°C 0.05 70°C 0.04
25°C 1
0°C 1.3 70°C 0.9 25°C 110
0°C 70°C 90 25°C 38°
0°C 40° 70°C 34°
TLC27L2BC TLC27L7C
MIN TYP MAX
125
UNIT
n
kHz
kHz
z
10
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Page 11
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
(PP)
()
SR
Slew rate at unity gain
C
20 pF
See
V/µs
See Figure 1
(PP)
()
VnEquivalent input noise voltage
,
S
,
25°C
68
V/H
R
L
See Figure 1
See Figure 3
V
10 mV
f
B
C
L
See Figure 3
(PP)
()
SR
Slew rate at unity gain
C
20 pF
See
V/µs
See Figure 1
(PP)
()
VnEquivalent input noise voltage
,
S
,
25°C
68
V/H
R
L
See Figure 1
See Figure 3
V
10 mV
f
B
C
L
See Figure 3
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
operating characteristics, V
PARAMETER TEST CONDITIONS T
p
B
Maximum output-swing bandwidth
OM
B
Unity-gain bandwidth
1
φ
Phase margin
m
DD
= 5 V
RL = 1 MΩ,
L
f = 1 kHz, R See Figure 2
VO = VOH,
VI = 10 mV,
=
I
=
p
Figure 1
= 1 M,
= 20 F,
=
p
,
,
V
= 1 V
I
V
= 2.5 V
I
= 20 Ω,
CL = 20 pF,
CL = 20 pF,
=
,
1
TLC27L2I TLC27L2AI
A
25°C 0.03
–40°C 0.04
85°C 0.03 25°C 0.03
–40°C 0.04
85°C 0.02
25°C 5
–40°C 7
85°C 4 25°C 85
–40°C
85°C 55 25°C 34°
–40°C 38°
85°C 29°
TLC27L2BI TLC27L7I
MIN TYP MAX
130
UNIT
n
kHz
kHz
z
operating characteristics, V
PARAMETER TEST CONDITIONS T
p
B
Maximum output-swing bandwidth
OM
B
Unity-gain bandwidth
1
φ
Phase margin
m
DD
= 10 V
RL = 1 MΩ,
f = 1 kHz, R See Figure 2
VO = VOH,
VI = 10 mV,
=
L
Figure 1
= 1 M,
=
I
= 20 F,
=
p
,
,
p
V
= 1 V
I
V
= 5.5 V
I
= 20 Ω,
CL = 20 pF,
CL = 20 pF,
=
,
1
TLC27L2I TLC27L2AI
A
25°C 0.05
–40°C 0.06
85°C 0.03 25°C 0.04
–40°C 0.05
85°C 0.03
25°C 1
–40°C 1.4
85°C 0.8 25°C 110
–40°C
85°C 80 25°C 38°
–40°C 42°
85°C 32°
TLC27L2BI TLC27L7I
MIN TYP MAX
155
UNIT
n
kHz
kHz
z
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
11
Page 12
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
A
(PP)
()
SR
Slew rate at unity gain
C
20 pF
g
V/µs
See Figure 1
(PP)
()
VnEquivalent input noise voltage
,
S
,
25°C
68
V/H
R
L
See Figure 1
See Figure 3
V
10 mV
f
B
C
L
See Figure 3
A
()
SR
Slew rate at unity gain
C
20 pF
g
V/µs
See Figure 1
(PP)
()
VnEquivalent input noise voltage
,
S
,
25°C
68
V/H
R
L
See Figure 1
See Figure 3
V
10 mV
f
B
C
L
See Figure 3
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
operating characteristics, VDD = 5 V
PARAMETER TEST CONDITIONS T
V
= 1 V
,
,
I
V
= 2.5 V
I
= 20 Ω,
CL = 20 pF,
CL = 20 pF,
=
,
1
p
B
Maximum output-swing bandwidth
OM
B
Unity-gain bandwidth
1
φ
Phase margin
m
RL = 1 MΩ,
p
=
L
ure 1
See Fi
f = 1 kHz, R See Figure 2
VO = VOH,
= 1 M,
VI = 10 mV,
=
I
= 20 F,
p
TLC27L2M TLC27L7M
MIN TYP MAX
25°C 0.03
–55°C 0.04
125°C 0.02
25°C 0.03
–55°C 0.04
125°C 0.02
25°C 5
–55°C 8
125°C 3
25°C 85
–55°C
125°C 45
25°C 34°
–55°C 39°
125°C 25°
140
UNIT
n
kHz
kHz
z
operating characteristics, V
PARAMETER TEST CONDITIONS T
p
B
Maximum output-swing bandwidth
OM
B
Unity-gain bandwidth
1
φ
Phase margin
m
DD
= 10 V
RL = 1 MΩ,
,
=
p
L
ure 1
See Fi
f = 1 kHz, R See Figure 2
VO = VOH,
= 1 M,
VI = 10 mV,
p
= 20 F,
,
=
I
V
= 1 V
I(PP)
V
= 5.5 V
I
= 20 Ω,
CL = 20 pF,
CL = 20 pF,
=
,
1
TLC27L2M TLC27L7M
MIN TYP MAX
25°C 0.05
–55°C 0.06
125°C 0.03
25°C 0.04
–55°C 0.06
125°C 0.03
°
25°C 1
–55°C 1.5
125°C 0.7
25°C 110
–55°C
125°C 70
25°C 38°
–55°C 43°
125°C 29°
165
UNIT
n
kHz
kHz
z
12
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Page 13
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
PARAMETER MEASUREMENT INFORMATION
single-supply versus split-supply test circuits
Because the TLC27L2 and TLC27L7 are optimized for single-supply operation, circuit configurations used for the various tests often present some inconvenience since the input signal, in many cases, must be offset from ground. This inconvenience can be avoided by testing the device with split supplies and the output load tied to the negative rail. A comparison of single-supply versus split-supply test circuits is shown below. The use of either circuit gives the same result.
V
I
1/2 V
V
DD
V
+
C
L
(a) SINGLE SUPPLY (b) SPLIT SUPPLY
O
R
L
V
I
V
DD+
+
V
DD–
Figure 1. Unity-Gain Amplifier
2 k
V
20
DD
20
DD
V
+
O
20 20
(b) SPLIT SUPPLY(a) SINGLE SUPPLY
2 k
V
O
C
L
V
DD+
+
V
DD–
R
L
V
O
1/2 V
DD
Figure 2. Noise-Test Circuit
10 k
V
100
V
I
(a) SINGLE SUPPLY (b) SPLIT SUPPLY
DD
V
+
O
C
L
100
V
I
10 k
V
+
V
DD+
DD–
V
O
C
L
Figure 3. Gain-of-100 Inverting Amplifier
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
13
Page 14
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
PARAMETER MEASUREMENT INFORMATION
input bias current
Because of the high input impedance of the TLC27L2 and TLC27L7 operational amplifiers, attempts to measure the input bias current can result in erroneous readings. The bias current at normal room ambient temperature is typically less than 1 pA, a value that is easily exceeded by leakages on the test socket. Two suggestions are offered to avoid erroneous measurements:
1. Isolate the device from other potential leakage sources.Use a grounded shield around and between the device inputs (see Figure 4). Leakages that would otherwise flow to the inputs are shunted away.
2. Compensate for the leakage of the test socket by actually performing an input bias current test (using a picoammeter) with no device in the test socket. The actual input bias current can then be calculated by subtracting the open-socket leakage readings from the readings obtained with a device in the test socket.
One word of caution: many automatic testers as well as some bench-top operational amplifier testers use the servo-loop technique with a resistor in series with the device input to measure the input bias current (the voltage drop across the series resistor is measured and the bias current is calculated). This method requires that a device be inserted into the test socket to obtain a correct reading; therefore, an open-socket reading is not feasible using this method.
85
V = V
IC
14
Figure 4. Isolation Metal Around Device Inputs
(JG and P packages)
low-level output voltage
T o obtain low-supply-voltage operation, some compromise was necessary in the input stage. This compromise results in the device low-level output being dependent on both the common-mode input voltage level as well as the differential input voltage level. When attempting to correlate low-level output readings with those quoted in the electrical specifications, these two conditions should be observed. If conditions other than these are to be used, please refer to Figures 14 through 19 in the Typical Characteristics of this data sheet.
input offset voltage temperature coefficient
Erroneous readings often result from attempts to measure temperature coefficient of input offset voltage. This parameter is actually a calculation using input offset voltage measurements obtained at two different temperatures. When one (or both) of the temperatures is below freezing, moisture can collect on both the device and the test socket. This moisture results in leakage and contact resistance, which can cause erroneous input offset voltage readings. The isolation techniques previously mentioned have no effect on the leakage since the moisture also covers the isolation metal itself, thereby rendering it useless. It is suggested that these measurements be performed at temperatures above freezing to minimize error.
14
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Page 15
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
PARAMETER MEASUREMENT INFORMATION
full-power response
Full-power response, the frequency above which the operational amplifier slew rate limits the output voltage swing, is often specified two ways: full-linear response and full-peak response. The full-linear response is generally measured by monitoring the distortion level of the output while increasing the frequency of a sinusoidal input signal until the maximum frequency is found above which the output contains significant distortion. The full-peak response is defined as the maximum output frequency , without regard to distortion, above which full peak-to-peak output swing cannot be maintained.
Because there is no industry-wide accepted value for significant distortion, the full-peak response is specified in this data sheet and is measured using the circuit of Figure 1. The initial setup involves the use of a sinusoidal input to determine the maximum peak-to-peak output of the device (the amplitude of the sinusoidal wave is increased until clipping occurs). The sinusoidal wave is then replaced with a square wave of the same amplitude. The frequency is then increased until the maximum peak-to-peak output can no longer be maintained (Figure 5). A square wave is used to allow a more accurate determination of the point at which the maximum peak-to-peak output is reached.
(b) BOM > f > 100 kHz(a) f = 100 kHz
(c) f = B
OM
Figure 5. Full-Power-Response Output Signal
test time
Inadequate test time is a frequent problem, especially when testing CMOS high-volume, short-test-time environment. Internal capacitances are inherently higher in CMOS devices and require longer test times than their bipolar and BiFET counterparts. The problem becomes more pronounced with reduced supply levels and lower temperatures.
(d) f > B
OM
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
15
Page 16
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
vs High level out ut current
10, 11
OH
gg
yg
vs Differential in ut voltage
14,16
VOLLow-level output voltage
15,17
vs Su ly voltage
20
VD
gg g
IDDSupply current
yg
SR
Slew rate
yg
B1Unity-gain bandwidth
vs Su ly voltage
34
φ
m
g
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
Table of Graphs
V
IO
α
VIO
V
OH
A
VD
I
IB
I
IO
V
IC
V
O(PP)
φ
m
V
n
Input offset voltage Distribution 6, 7 Temperature coefficient of input offset voltage Distribution 8, 9
High-level output voltage
p
Large-signal differential voltage amplification
Input bias current vs Free-air temperature 22 Input offset current vs Free-air temperature 22 Common-mode input voltage vs Supply voltage 23
pp
Normalized slew rate vs Free-air temperature 28 Maximum peak-to-peak output voltage vs Frequency 29
Phase margin
Equivalent input noise voltage vs Frequency 37 Phase shift vs Frequency 32, 33
vs High-level output current 10, 11 vs Supply voltage vs Free-air temperature 13
vs Free-air temperature vs Low-level output current 18, 19
vs Supply voltage 20 vs Free-air temperature vs Frequency 32, 33
vs Supply voltage 24 vs Free-air temperature 25
vs Supply voltage 26 vs Free-air temperature 27
vs Free-air temperature 30 vs Supply voltage 31
vs Supply voltage 34 vs Free-air temperature vs Capacitive Load 36
FIGURE
12
p
p
21
35
16
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Page 17
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
Percentage of Units – %
DISTRIBUTION OF TLC27L2
INPUT OFFSET VOLTAGE
70
905 Amplifiers Tested From 6 Wafer Lots VDD = 5 V
60
TA = 25°C P Package
50
40
30
20
10
0
–5
VIO – Input Offset Voltage – mV
Figure 6
DISTRIBUTION OF TLC27LC AND TLC27L7
INPUT OFFSET VOLTAGE
TEMPERATURE COEFFICIENT
70
356 Amplifiers Tested From 8 Wafer Lots VDD = 5 V
60
TA = 25°C to 125°C P Package
Outliers:
50
(1) 19.2 µV/°C (1) 12.1 µV/°C
40
DISTRIBUTION OF TLC27L2
INPUT OFFSET VOLTAGE
70
905 Amplifiers Tested From 6 Wafer Lots VDD = 10 V
60
TA = 25°C P Package
50
40
30
20
Percentage of Units – %
10
0
–4 –3 –2 –101234
43210–1–2–3–4
5
–5
VIO – Input Offset Voltage – mV
5
Figure 7
DISTRIBUTION OF TLC27LC AND TLC27L7
INPUT OFFSET VOLTAGE
TEMPERATURE COEFFICIENT
70
356 Amplifiers Tested From 8 Wafer Lots VDD = 10 V
60
TA = 25°C to 125°C P Package
Outliers:
50
(1) 18.7 µV/°C (1) 11.6 µV/°C
40
Percentage of Units – %
30
20
10
0
8 6 4 202468
10
α
– Temperature Coefficient – µV/°C
VIO
Figure 8
30
20
Percentage of Units – %
10
0
10
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
10
α
– Temperature Coefficient – µV/°C
VIO
Figure 9
86420–2–4–6–8
10
17
Page 18
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
0
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
VOH – High-Level Output Voltage – V
V
OH
5
4
3
2
1
0
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
VDD = 4 V
VDD = 3 V
0
IOH – High-Level Output Current – mA
TYPICAL CHARACTERISTICS
16
VID = 100 mV TA = 25°C
VDD = 5 V
8642
10
14
12
10
8
6
4
OH
V
VOH – High-Level Output Voltage – V
2
0
0
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
VID = 100 mV
VDD = 16 V
VDD = 10 V
– 5 – 15 – 25 – 35
IOH – High-Level Output Current – mA
TA = 25°C
302010
4
Figure 10
HIGH-LEVEL OUTPUT VOLTAGE
vs
SUPPLY VOLTAGE
16
VID = 100 mV
14
RL = 10 k TA = 25°C
12
10
8
6
4
OH
V
VOH – High-Level Output Voltage – V
2
0
0
VDD – Supply Voltage – V
1412108642 16
VDD –1.6
1.7
1.8
1.9
2
2.1
2.2
OH
V
VOH – High-Level Output Voltage – V
2.3
2.4
75
50 25 0 20 50 75 100
Figure 11
HIGH-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
IOH = –5 mA
VDD = 5 V
VDD = 10 V
TA – Free-Air Temperature – °C
VID = 100 mA
125
Figure 12
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
18
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Figure 13
Page 19
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
OL
V
VOL – Low-Level Output Voltage – mV
700
600
500
400
300
LOW-LEVEL OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
VID = –100 mV
VID = –1 V
0
0.5 1.5 2.5 3.3 VIC – Common-Mode Input Voltage – V
TYPICAL CHARACTERISTICS
500
VDD = 5 V IOL = 5 mA TA = 25°C
321
4
OL
V
VOL – Low-Level Output Voltage – mV
450
400
350
300
250
0
13 579
LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
VDD = 10 V IOL = 5 mA TA = 25°C
VID = –100 mV VID = –1 V
VID = – 2.5 V
108642
VIC – Common-Mode Input Voltage – V
OL
V
VOL – Low-Level Output Voltage – mV
800
700
600
500
400
300
200
100
Figure 14
LOW-LEVEL OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
IOL = 5 mA VIC = |V TA = 25°C
VDD = 5 V
VDD = 10 V
0
0
–1 –3 –5 –7 –9
VID – Differential Input Voltage – V
ID/
2|
–8–6–4–2 –10
OL
V
VOL – Low-Level Output Voltage – mV
900
800
700
600
500
400
300
200
100
0
–75
Figure 15
LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
IOL = 5 mA VID = –1 V VIC = 0.5 V
VDD = 5 V
VDD = 10 V
TA – Free-Air Temperature – °C
125
1007550250–25–50
Figure 16
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Figure 17
19
Page 20
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
1
0
0
VID = –1 V VIC = 0.5 V TA = 25°C
VDD = 5 V
VDD = 4 V
VDD = 3 V
IOL – Low-Level Output Current – mA
7654321
8
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
OL
V
VOL – Low-Level Output Voltage – V
0.1
3
2.5
2
1.5
1
OL
0.5
V
VOL – Low-Level Output Voltage – V
0
0
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
VID = –1 V VIC = 0.5 V TA = 25°C
VDD = 10 V
IOL – Low-Level Output Current – mA
VDD = 16 V
252015105
30
DIFFERENTIAL VOLTAGE AMPLIFICATION
2000
800
600
400
200
0
0
RL = 1 M
2 4 6 8 10 12 14
1800
1600
1400
1200
1000
Voltage Amplification – V/mV
VD
A
AVD – Large-Signal Differential
Figure 18
LARGE-SIGNAL
vs
SUPPLY VOLTAGE
TA = –55°C
VDD – Supply Voltage – V
–40°C
TA = 0°C
25°C 70°C
85°C
125°C
DIFFERENTIAL VOLTAGE AMPLIFICATION
2000
1800
1600
1400
1200
1000
800
600
Voltage Amplification – V/mV
VD
A
AVD – Large-Signal Differential
400
200
16
0
–75
Figure 19
LARGE-SIGNAL
vs
FREE-AIR TEMPERATURE
RL = 1 M
VDD = 10 V
VDD = 5 V
TA – Free-Air Temperature – °C
1007550250–25–50
125
Figure 20
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
20
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Figure 21
Page 21
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
T
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
INPUT BIAS CURRENT AND INPUT OFFSET CURREN
vs
FREE-AIR TEMPERATURE
10000
VDD = 10 V VIC = 5 V
10
1
25
See Note A
I
IB
45 65 85 105
TA – Free-Air Temperature – °C
Figure 22
I
IO
125
1000
100
IO
I
IB
IIB and IIO – Input Bias and Offset Currents – pA
I
0.1
NOTE A: The typical values of input bias current and input offset current below 5 pA were determined mathematically.
COMMON-MODE
INPUT VOLTAGE POSITIVE LIMIT
vs
SUPPLY VOLTAGE
16
TA = 25°C
14
12
10
8
6
4
VI – Common-Mode Input Voltage – V
IC
2
V
0
0
246 8 10 12 14
VDD – Supply Voltage – V
16
Figure 23
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
Aµ
DD
IDD – Supply Current – mA
I
90
80
70
60
50
40
30
20
10
0
VO = VDD/2 No Load
0
VDD – Supply Voltage – V
TA = –55°C
–40°C
25°C
125°C
1412108642
0°C
70°C
16
Aµ
DD
I
IDD – Supply Current – mA
60
50
40
30
20
10
0
–75
Figure 24
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
VO = VDD/2 No Load
VDD = 10 V
VDD = 5 V
TA – Free-Air Temperature – °C
Figure 25
1007550250–25–50
125
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
21
Page 22
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
sµ
SR – Slew Rate – V/s
0.07
0.06
0.05
0.04
0.03
0.02
0.01
0.00
SLEW RATE
vs
SUPPLY VOLTAGE
AV = 1 V
= 1 V
I(PP)
RL =1 M CL = 20 pF TA = 25°C See Figure 1
0
2 4 6 8 10 12 14
VDD – Supply Voltage – V
TYPICAL CHARACTERISTICS
0.07
0.06
sµ
0.05
0.04
0.03
VDD = 5 V V
I(PP)
50 25 0 25 50 75 100
75
16
SR – Slew Rate – V/s
0.02
0.01
0.00
SLEW RATE
vs
FREE-AIR TEMPERATURE
VDD = 10 V V
= 5.5 V
I(PP)
= 1 V
V
TA – Free-Air Temperature – °C
RL =1 M CL = 20 pF AV = 1 See Figure 1
VDD = 5 V
= 2.5 V
I(PP)
VDD = 10 V V
= 1 V
I(PP)
125
NORMALIZED SLEW RATE
FREE-AIR TEMPERATURE
1.4
1.3
1.2
1.1
1
0.9
0.8
Normalized Slew Rate
0.7
0.6
0.5 –75
VDD = 5 V
TA – Free-Air Temperature – °C
Figure 26
vs
VDD = 10 V
Figure 28
AV = 1 V
= 1 V
IPP
RL =1 M CL = 20 pF
1007550250–25–50 125
Figure 27
MAXIMUM-PEAK-TO-PEAK OUTPUT VOLTAGE
vs
FREQUENCY
10
9
– Maximum Peak-to-Peak Output Voltage – V
O(PP)
V
8
7
6
5
4
3
2
1
0
VDD = 10 V
VDD = 5 V
RL = 1 M See Figure 1
0.1 f – Frequency – kHz
TA = 125°C TA = 25°C TA = –55°C
101
Figure 29
100
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
22
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Page 23
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
150
130
110
1
B
B1 – Unity-Gain Bandwidth – kHz
90
70
50
30
UNITY-GAIN BANDWIDTH
vs
FREE-AIR TEMPERATURE
75
50 25 0 25 50 75 100
TA – Free-Air Temperature – °C
TYPICAL CHARACTERISTICS
140
VDD = 5 V VI = 10 mV CL = 20 pF
See Figure 3
125
1
B
B1 – Unity-Gain Bandwidth – kHz
130
120
110
100
90
80
70
60
50
VI = 10 mV
CL = 20 pF TA = 25°C See Figure 3
0
UNITY-GAIN BANDWIDTH
vs
SUPPLY VOLTAGE
2 4 6 8 10 12 14
VDD – Supply Voltage – V
16
Figure 30
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE SHIFT
7
10
6
10
5
10
4
10
3
10
2
10
Voltage Amplification
1
10
VD
AVD – Large-Signal Differential
A
1
0.1 1
FREQUENCY
A
VD
Phase Shift
f – Frequency – Hz
vs
VDD = 10 V RL = 1 M TA = 25°C
Figure 31
0°
30°
60°
90°
120°
150°
180°
1 M10 100 1 k 10 k 100 k
Phase Shift
Figure 32
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
23
Page 24
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE SHIFT
7
10
6
10
5
10
4
10
3
10
2
10
Voltage Amplification
1
VD
10
A
AVD – Large-Signal Differential
1
0.1 1
Phase Shift
vs
FREQUENCY
A
VD
f – Frequency – Hz
VDD = 10 V RL = 1 M TA = 25°C
100 k10 k1 k10010 1 M
0°
30°
60°
90°
120°
150°
180°
Phase Shift
42°
VI = 10 mV CL = 20 pF
40°
TA = 25°C See Figure 3
38°
36°
m
m – Phase Margin
34°
φ
32°
30°
0
PHASE MARGIN
vs
SUPPLY VOLTAGE
2 4 6 8 10 12 14
VDD – Supply Voltage – V
Figure 33
16
40°
36°
32°
28°
m
m – Phase Margin
φ
24°
20°
75
50 25 0 25 50 75 100
PHASE MARGIN
vs
FREE-AIR TEMPERATURE
VDD = 5 mV VI = 10 mV
CL = 20 pF See Figure 3
125
TA – Free-Air Temperature – °C
Figure 34
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
24
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Figure 35
Page 25
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
0
ÁÁ
ÁÁ
ÁÁ
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
37°
35°
33°
31°
m
m – Phase Margin
29°
φ
27°
25°
10 30 50 70 90
0
PHASE MARGIN
vs
CAPACITIVE LOAD
VDD = 5 mV VI = 10 mV TA = 25°C
See Figure 3
20 40 60 80
CL – Capacitive Load – pF
Figure 36
100
200
175
nV/ Hz
150
125
100
n
V
VN – Equivalent Input Noise Voltage – nV/Hz
0
75
50
25
EQUIVALENT INPUT NOISE VOLTAGE
vs
FREQUENCY
VDD = 5 V RS = 20
TA = 25°C
See Figure 2
1
10 100
f – Frequency – Hz
Figure 37
100
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
25
Page 26
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
APPLICATION INFORMATION
single-supply operation
While the TLC27L2 and TLC27L7 perform well using dual power supplies (also called balanced or split supplies), the design is optimized for single-supply operation. This design includes an input common-mode voltage range that encompasses ground as well as an output voltage range that pulls down to ground. The supply voltage range extends down to 3 V (C-suffix types), thus allowing operation with supply levels commonly available for TTL and HCMOS; however, for maximum dynamic range, 16-V single-supply operation is recommended.
Many single-supply applications require that a voltage be applied to one input to establish a reference level that is above ground. A resistive voltage divider is usually sufficient to establish this reference level (see Figure 38). The low input bias current of the TLC27L2 and TLC27L7 permits the use of very large resistive values to implement the voltage divider, thus minimizing power consumption.
The TLC27L2 and TLC27L7 work well in conjunction with digital logic; however, when powering both linear devices and digital logic from the same power supply, the following precautions are recommended:
1. Power the linear devices from separate bypassed supply lines (see Figure 39); otherwise, the linear device supply rails can fluctuate due to voltage drops caused by high switching currents in the digital logic.
2. Use proper bypass techniques to reduce the probability of noise-induced errors. Single capacitive decoupling is often adequate; however, high-frequency applications may require RC decoupling.
V
DD
R4
V
O
V
+
+
REF
VO+ǒV
V
DD
R1)R3
–V
REF
R3
I
R4
Ǔ
)
V
R2
REF
V
V
REF
R1
R3
R2
C
0.01 µF
I
Figure 38. Inverting Amplifier With Voltage Reference
V
O
V
O
+
(a) COMMON SUPPLY RAILS
+
Logic Logic Logic
LogicLogicLogic
Power Supply
Power Supply
26
(b) SEPARATE BYPASSED SUPPLY RAILS (preferred)
Figure 39. Common Versus Separate Supply Rails
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Page 27
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
APPLICATION INFORMATION
input characteristics
The TLC27L2 and TLC27L7 are specified with a minimum and a maximum input voltage that, if exceeded at either input, could cause the device to malfunction. Exceeding this specified range is a common problem, especially in single-supply operation. Note that the lower range limit includes the negative rail, while the upper range limit is specified at V
–1 V at T
DD
The use of the polysilicon-gate process and the careful input circuit design gives the TLC27L2 and TLC27L7 very good input offset voltage drift characteristics relative to conventional metal-gate processes. Offset voltage drift in CMOS devices is highly influenced by threshold voltage shifts caused by polarization of the phosphorus dopant implanted in the oxide. Placing the phosphorus dopant in a conductor (such as a polysilicon gate) alleviates the polarization problem, thus reducing threshold voltage shifts by more than an order of magnitude. The offset voltage drift with time has been calculated to be typically 0.1 µV/month, including the first month of operation.
Because of the extremely high input impedance and resulting low bias current requirements, the TLC27L2 and TLC27L7 are well suited for low-level signal processing; however, leakage currents on printed circuit boards and sockets can easily exceed bias current requirements and cause a degradation in device performance. It is good practice to include guard rings around inputs (similar to those of Figure 4 in the Parameter Measurement Information section). These guards should be driven from a low-impedance source at the same voltage level as the common-mode input (see Figure 40).
= 25°C and at VDD –1.5 V at all other temperatures.
A
Unused amplifiers should be connected as grounded unity-gain followers to avoid possible oscillation.
noise performance
The noise specifications in operational amplifier circuits are greatly dependent on the current in the first-stage differential amplifier . The low input bias current requirements of the TLC27L2 and TLC27L7 result in a very low noise current, which is insignificant in most applications. This feature makes the devices especially favorable over bipolar devices when using values of circuit impedance greater than 50 k, since bipolar devices exhibit greater noise currents.
V
V
I
+
O
V
I
(b) INVERTING AMPLIFIER
V
+
O
V
I
(c) UNITY-GAIN AMPLIFIER(a) NONINVERTING AMPLIFIER
+
Figure 40. Guard-Ring Schemes
output characteristics
The output stage of the TLC27L2 and TLC27L7 is designed to sink and source relatively high amounts of current (see typical characteristics). If the output is subjected to a short-circuit condition, this high current capability can cause device damage under certain conditions. Output current capability increases with supply voltage.
V
O
All operating characteristics of the TLC27L2 and TLC27L7 were measured using a 20-pF load. The devices drive higher capacitive loads; however, as output load capacitance increases, the resulting response pole occurs at lower frequencies, thereby causing ringing, peaking, or even oscillation (see Figure 41). In many cases, adding a small amount of resistance in series with the load capacitance alleviates the problem.
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27
Page 28
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
APPLICATION INFORMATION
output characteristics (continued)
V
I
+
(b) CL = 260 pF, RL = NO LOAD(a) CL = 20 pF, RL = NO LOAD
2.5 V
TA = 25°C f = 1 kHz
V
O
V
= 1 V
I(PP)
C
L
–2.5 V
(c) CL = 310 pF, RL = NO LOAD
(d) TEST CIRCUIT
Figure 41. Effect of Capacitive Loads and Test Circuit
Although the TLC27L2 and TLC27L7 possess excellent high-level output voltage and current capability, methods for boosting this capability are available, if needed. The simplest method involves the use of a pullup resistor (R
) connected from the output to the positive supply rail (see Figure 42). There are two disadvantages
P
to the use of this circuit. First, the NMOS pulldown transistor N4 (see equivalent schematic) must sink a comparatively large amount of current. In this circuit, N4 behaves like a linear resistor with an on-resistance between approximately 60 Ω and 180 Ω, depending on how hard the operational amplifier input is driven. With very low values of R
, a voltage offset from 0 V at the output occurs. Second, pullup resistor RP acts as a
P
drain load to N4 and the gain of the operational amplifier is reduced at output voltage levels where N5 is not supplying the output current.
28
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Page 29
output characteristics (continued)
V
DD
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
APPLICATION INFORMATION
V
+
I
IF)
R2
VDD–V
IL)
O
R1
RP+
IP = Pullup current required by the operational amplifier (typically 500 µA)
R
I
I
I
L
P
P
V
O
F
R
L
I
P
C
V
+
O
Figure 43. Compensation for
Figure 42. Resistive Pullup to Increase V
OH
Input Capacitance
feedback
Operational amplifier circuits nearly always employ feedback, and since feedback is the first prerequisite for oscillation, some caution is appropriate. Most oscillation problems result from driving capacitive loads (discussed previously) and ignoring stray input capacitance. A small-value capacitor connected in parallel with the feedback resistor is an effective remedy (see Figure 43). The value of this capacitor is optimized empirically .
electrostatic discharge protection
The TLC27L2 and TLC27L7 incorporate an internal electrostatic discharge (ESD) protection circuit that prevents functional failures at voltages up to 2000 V as tested under MIL-STD-883C, Method 3015.2. Care should be exercised, however, when handling these devices, as exposure to ESD may result in the degradation of the device parametric performance. The protection circuit also causes the input bias currents to be temperature dependent and have the characteristics of a reverse-biased diode.
latch-up
Because CMOS devices are susceptible to latch-up due to their inherent parasitic thyristors, the TLC27L2 and TLC27L7 inputs and outputs were designed to withstand –100-mA surge currents without sustaining latch-up; however, techniques should be used to reduce the chance of latch-up whenever possible. Internal protection diodes should not, by design, be forward biased. Applied input and output voltage should not exceed the supply voltage by more than 300 mV . Care should be exercised when using capacitive coupling on pulse generators. Supply transients should be shunted by the use of decoupling capacitors (0.1 µF typical) located across the supply rails as close to the device as possible.
The current path established if latch-up occurs is usually between the positive supply rail and ground and can be triggered by surges on the supply lines and/or voltages on either the output or inputs that exceed the supply voltage. Once latch-up occurs, the current flow is limited only by the impedance of the power supply and the forward resistance of the parasitic thyristor and usually results in the destruction of the device. The chance of latch-up occurring increases with increasing temperature and supply voltages.
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29
Page 30
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
APPLICATION INFORMATION
1/2
TLC27L2
+
500 k
5 V
500 k
+
1/2
TLC27L2
0.1 µF
500 k
500 k
V
O1
V
O2
Figure 44. Multivibrator
100 k
Set
Reset
100 k
NOTE: VDD = 5 V to 16 V
Figure 45. Set/Reset Flip-Flop
+
33 k
100 k
V
DD
TLC27L2
1/2
30
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Page 31
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
APPLICATION INFORMATION
V
DD
1/2
V
I
+
TLC27L7
V
O
SELECT:
A
V
NOTE: VDD = 5 V to 12 V
S1S
10 100
2
Figure 46. Amplifier With Digital Gain Selection
V
I
20 k
V
DD
C
+
A C
A
10 k
V
DD
TLC27L2
X1
1 X2
2
1/2
TLC4066
Analog Switch
1
2
S
1
S
2
90 k
B
9 k
B
1 k
V
O
100 k
NOTE: VDD = 5 V to 16 V
Figure 47. Full-Wave Rectifier
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
31
Page 32
TLC27L2, TLC27L2A, TLC27L2B, TLC27L7
LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
SLOS052C – OCTOBER 1987 – REVISED MARCH 2001
APPLICATION INFORMATION
0.016 µF
5 V
V
NOTE: Normalized to fc = 1 kHz and RL = 10 k
10 k
I
10 k
0.016 µF
Figure 48. Two-Pole Low-Pass Butterworth Filter
R1
V
IA
V
IB
10 k
R1
10 k
+
+
R2
100 k
V
DD
TLC27L7
1/2
1/2
TLC27L2
V
O
V
O
NOTE: VDD = 5 V to 16 V
VO+
R2 R1
ǒ
VIB– V
R2 100 k
Ǔ
IA
Figure 49. Difference Amplifier
32
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Page 33
PACKAGE OPTION ADDENDUM
www.ti.com
PACKAGING INFORMATION
Orderable Device Status
5962-89494032A OBSOLETE LCCC FK 20 None Call TI Call TI 5962-8949403PA OBSOLETE CDIP JG 8 None Call TI Call TI 5962-89494042A OBSOLETE LCCC FK 20 None Call TI Call TI 5962-8949404PA OBSOLETE CDIP JG 8 None Call TI Call TI
TLC27L2ACD ACTIVE SOIC D 8 75 Pb-Free
TLC27L2ACDR ACTIVE SOIC D 8 2500 Pb-Free
TLC27L2ACP ACTIVE PDIP P 8 50 Pb-Free
TLC27L2ACPSLE OBSOLETE SO PS 8 None Call TI Call TI
TLC27L2ACPSR ACTIVE SO PS 8 2000 None CU NIPDAU Level-1-220C-UNLIM
TLC27L2AID ACTIVE SOIC D 8 75 Pb-Free
TLC27L2AIDR ACTIVE SOIC D 8 2500 Pb-Free
TLC27L2AIP ACTIVE PDIP P 8 50 Pb-Free
TLC27L2AMFKB OBSOLETE LCCC FK 20 None Call TI Call TI
TLC27L2AMJG OBSOLETE CDIP JG 8 None Call TI Call TI
TLC27L2AMJGB OBSOLETE CDIP JG 8 None Call TI Call TI
TLC27L2BCD ACTIVE SOIC D 8 75 Pb-Free
TLC27L2BCDR ACTIVE SOIC D 8 2500 Pb-Free
TLC27L2BCP ACTIVE PDIP P 8 50 Pb-Free
TLC27L2BID ACTIVE SOIC D 8 75 Pb-Free
TLC27L2BIDR ACTIVE SOIC D 8 2500 Pb-Free
TLC27L2BIP ACTIVE PDIP P 8 50 Pb-Free
TLC27L2CD ACTIVE SOIC D 8 75 Pb-Free
TLC27L2CDR ACTIVE SOIC D 8 2500 Pb-Free
TLC27L2CP ACTIVE PDIP P 8 50 Pb-Free
TLC27L2CPSR ACTIVE SO PS 8 2000 None CU NIPDAU Level-1-220C-UNLIM
TLC27L2CPW ACTIVE TSSOP PW 8 150 None CU NIPDAU Level-1-220C-UNLIM
TLC27L2CPWLE OBSOLETE TSSOP PW 8 None Call TI Call TI
TLC27L2CPWR ACTIVE TSSOP PW 8 2000 None CU NIPDAU Level-1-220C-UNLIM
TLC27L2ID ACTIVE SOIC D 8 75 Pb-Free
TLC27L2IDR ACTIVE SOIC D 8 2500 Pb-Free
(1)
Package
Type
Package Drawing
Pins Package
Qty
Eco Plan
(RoHS)
(RoHS)
(RoHS)
(RoHS)
(RoHS)
(RoHS)
(RoHS)
(RoHS)
(RoHS)
(RoHS)
(RoHS)
(RoHS)
(RoHS)
(RoHS)
(RoHS)
(RoHS)
(RoHS)
(2)
Lead/Ball Finish MSL Peak Temp
CU NIPDAU Level-2-260C-1YEAR/
CU NIPDAU Level-2-260C-1YEAR/
CU NIPDAU Level-NC-NC-NC
CU NIPDAU Level-2-260C-1YEAR/
CU NIPDAU Level-2-260C-1YEAR/
CU NIPDAU Level-NC-NC-NC
CU NIPDAU Level-2-260C-1YEAR/
CU NIPDAU Level-2-260C-1YEAR/
CU NIPDAU Level-NC-NC-NC
CU NIPDAU Level-2-260C-1YEAR/
CU NIPDAU Level-2-260C-1YEAR/
CU NIPDAU Level-NC-NC-NC
CU NIPDAU Level-2-260C-1YEAR/
CU NIPDAU Level-2-260C-1YEAR/
CU NIPDAU Level-NC-NC-NC
CU NIPDAU Level-2-260C-1YEAR/
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
Level-1-220C-UNLIM
Level-1-220C-UNLIM
Level-1-220C-UNLIM
Level-1-220C-UNLIM
Level-1-220C-UNLIM
Level-1-220C-UNLIM
Level-1-220C-UNLIM
Level-1-220C-UNLIM
Level-1-220C-UNLIM
Level-1-220C-UNLIM
Level-1-220C-UNLIM
22-Feb-2005
(3)
Addendum-Page 1
Page 34
PACKAGE OPTION ADDENDUM
www.ti.com
Orderable Device Status
(1)
Package
Type
Package Drawing
Pins Package
Qty
Eco Plan
TLC27L2IP ACTIVE PDIP P 8 50 Pb-Free
(2)
Lead/Ball Finish MSL Peak Temp
CU NIPDAU Level-NC-NC-NC
22-Feb-2005
(3)
(RoHS)
TLC27L2IPW ACTIVE TSSOP PW 8 150 None CU NIPDAU Level-1-220C-UNLIM
TLC27L2IPWLE OBSOLETE TSSOP PW 8 None Call TI Call TI
TLC27L2IPWR ACTIVE TSSOP PW 8 2000 None CU NIPDAU Level-1-220C-UNLIM
TLC27L2MD ACTIVE SOIC D 8 75 None CU NIPDAU Level-1-220C-UNLIM
TLC27L2MDR ACTIVE SOIC D 8 2500 None CU NIPDAU Level-1-220C-UNLIM
TLC27L2MFKB OBSOLETE LCCC FK 20 None Call TI Call TI
TLC27L2MJG OBSOLETE CDIP JG 8 None Call TI Call TI
TLC27L2MJGB OBSOLETE CDIP JG 8 None Call TI Call TI
TLC27L7CD ACTIVE SOIC D 8 75 Pb-Free
(RoHS)
TLC27L7CDR ACTIVE SOIC D 8 2500 Pb-Free
(RoHS)
TLC27L7CP ACTIVE PDIP P 8 50 Pb-Free
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
CU NIPDAU Level-NC-NC-NC
(RoHS)
TLC27L7CPSR ACTIVE SO PS 8 2000 Pb-Free
(RoHS)
TLC27L7ID ACTIVE SOIC D 8 75 Pb-Free
(RoHS)
TLC27L7IDR ACTIVE SOIC D 8 2500 Pb-Free
(RoHS)
TLC27L7IP ACTIVE PDIP P 8 50 Pb-Free
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
CU NIPDAU Level-NC-NC-NC
(RoHS)
TLC27L7MFKB OBSOLETE LCCC FK 20 None Call TI Call TI
TLC27L7MJG OBSOLETE CDIP JG 8 None Call TI Call TI
TLC27L7MJGB OBSOLETE CDIP JG 8 None Call TI Call TI
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional
product content details.
None: Not yet available Lead (Pb-Free). Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens, including bromine (Br) or antimony (Sb) above 0.1% of total product weight.
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
Addendum-Page 2
Page 35
PACKAGE OPTION ADDENDUM
www.ti.com
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
22-Feb-2005
Addendum-Page 3
Page 36
IMPORTANT NOTICE
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TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty . Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed.
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