Datasheet THS6002IDWPR, THS6002IDWP, THS6002EVM, THS6002CDWPR, THS6002CDWP Datasheet (Texas Instruments)
Page 1
THS6002
DUAL DIFFERENTIAL LINE DRIVERS AND RECEIVERS
SLOS202D– JANUARY 1998– REVISED JUL Y 1999
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
ADSL Differential Line Driver and Receiver
D
Driver Features
– 140 MHz Bandwidth (–3dB) With
25-Ω Load
– 315 MHz Bandwidth (–3dB) With
100-Ω Load
– 1000 V/µs Slew Rate, G = 2
– 400 mA Output Current Minimum Into
25-Ω Load
– –72 dB 3rd Order Harmonic Distortion at
f = 1 MHz, 25-Ω Load, and 20 V
O(PP)
D
Receiver Features
– 330 MHz Bandwidth (–3dB)
– 900 V/µs Slew Rate at G = 2
– –76 dB 3rd Order Harmonic Distortion at
f = 1 MHz, 150-Ω Load, and 20 V
O(PP)
D
Wide Supply Range ±4.5 V to ±16 V
D
Available in the PowerPAD Package
D
Improved Replacement for AD816 or
EL1501
D
Evaluation Module Available
description
The THS6002 contains two high-current, high-speed drivers and two high-speed receivers. These drivers and
receivers can be configured differentially for driving and receiving signals over low-impedance lines. The
THS6002 is ideally suited for asymmetrical digital subscriber line (ADSL) applications where it supports the
high-peak voltage and current requirements of that application. Both the drivers and the receivers are current
feedback amplifiers designed for the high slew rates necessary to support low total harmonic distortion (THD)
in ADSL applications. Separate power supply connections for each driver are provided to minimize crosstalk.
HIGH-SPEED xDSL LINE DRIVER/RECEIVER FAMILY
DEVICE
DRIVER RECEIVER 5 V ±5 V ±15 V
BW
(MHz)SR(V/µs)
THD
f = 1 MHz
(dB)
I
O
(mA)
V
n
(nV/√Hz
)
THS6002
•
• • • 140 1000 –62 500 1.7
THS6012 • • • 140 1300 –65 500 1.7
THS6022 • • • 210 1900 –66 250 1.7
THS6062 • • • • 100 100 –72 90 1.6
THS7002 • • • 70 100 –84 25 2.0
Copyright 1999, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments Incorporated.
VCC–
D1 OUT
V
CC
+
D1 IN+
D1 IN–
R1 IN–
R1 IN+
V
CC
+
R1 OUT
V
CC
–
V
CC
–
D2 OUT
V
CC
+
D2 IN+
D2 IN–
R2 IN–
R2 IN+
V
CC
+
R2 OUT
V
CC
–
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
DWP PACKAGE
(TOP VIEW)
Cross Section View Showing PowerPAD
CAUTION: The THS6002 provides ESD protection circuitry. However , permanent damage can still occur if this device is subjected
to high-energy electrostatic discharges. Proper ESD precautions are recommended to avoid any performance degradation or loss
of functionality.
Page 2
THS6002
DUAL DIFFERENTIAL LINE DRIVERS AND RECEIVERS
SLOS202D– JANUARY 1998– REVISED JUL Y 1999
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
description (continued)
The THS6002 is packaged in the patented PowerPAD package. This package provides outstanding thermal
characteristics in a small footprint package, which is fully compatible with automated surface mount assembly
procedures. The exposed thermal pad on the underside of the package is in direct contact with the die. By simply
soldering the pad to the PWB copper and using other thermal outlets, the heat is conducted away from the
junction.
AVAILABLE OPTIONS
PACKAGED DEVICE
T
A
PowerPAD PLASTIC
SMALL OUTLINE
†
(DWP)
EVALUATION
MODULE
0°C to 70°C THS6002CDWP THS6002EVM
–40°C to 85°C THS6002IDWP
†
The DWP packages are available taped and reeled. Add an R suffix to the
device type (i.e., THS6002CDWPR)
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
†
Supply voltage, V
CC+
to V
CC–
33 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage, VI (driver and receiver) ±V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output current, I
O
(driver) (see Note 1) 800 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output current, IO (receiver) (see Note 1) 150 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Differential input voltage, VID (driver and receiver) 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total power dissipation at (or below) TA = 25°C (see Note 1) 5.8 W. . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free air temperature, T
A
–40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature, T
stg
–65°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature, 1,6 mm (1/16 inch) from case for 10 seconds 300°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The THS6002 incorporates a PowerPad on the underside of the chip. This acts as a heatsink and must be connected to a thermal
dissipation plane for proper power dissipation. Failure to do so can result in exceeding the maximum junction temperature, which could
permanently damage the device. See the
Thermal Information
section of this document for more information about PowerPad
technology.
recommended operating conditions
MIN TYP MAX UNIT
pp
Split supply ±4.5 ±16
Suppl
y v
oltage, V
CC+
and V
CC–
Single supply 9 32
V
p
p
C suffix 0 70
°
O erating free-air tem erature, T
A
I suffix –40 85
°C
Page 3
THS6002
DUAL DIFFERENTIAL LINE DRIVERS AND RECEIVERS
SLOS202D– JANUARY 1998– REVISED JUL Y 1999
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
functional block diagram
_
+
Driver 1
Driver 2
Receiver 1
Receiver 2
_
+
_
+
_
+
3
4
5
17
16
8
9
10
13
12
11
2
1
18
19
20
7
6
14
15
VCC–
VCC–
VCC+
VCC+
VCC+
VCC+
VCC–
VCC–
D1 OUT
D2 OUT
R1 IN+
R2 IN+
R1 IN–
R2 IN–
D1 IN+
D1 IN–
D2 IN+
D2 IN–
R1 OUT
R2 OUT
Page 4
THS6002
DUAL DIFFERENTIAL LINE DRIVERS AND RECEIVERS
SLOS202D– JANUARY 1998– REVISED JUL Y 1999
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DRIVER
electrical characteristics, V
CC
= ±15 V, RL = 25 Ω, RF = 1 kΩ, TA = 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS
†
MIN TYP MAX UNIT
pp
p
Split supply ±4.5 ±16.5
VCCPower supply operating range
Single supply 9 33
V
VCC = ±5 V
3
to
–2.8
3.2
to
–3
p
Single ended
R
L
= 25
Ω
VCC = ±15 V
11.8
to
–11.5
12.5
to
–12.2
V
VOOutput voltage swing
VCC = ±5 V
6
to
–5.6
6.4
to
–6
Differential
R
L
=
50 Ω
VCC = ±15 V
23.6
to
–23
25
to
–24.4
V
p
VCC = ±5 V ±3.6 ±3.7
V
ICR
Common-mode input voltage range
VCC = ±15 V ±13.4 ±13.5
V
p
TA = 25°C 2 5
VIOInput offset voltage
V
CC
= ±5 V or
±15 V
TA = full range 7
mV
Input offset voltage drift VCC = ±5 V or ±15 V, TA = full range 20 µV/°C
p
TA = 25°C 1.5 4
Differential input offset voltage
V
CC
=
±5 V or ±15 V
TA = full range 5
mV
Differential input offset voltage drift VCC = ±5 V or ±15 V, TA = full range 10 µV/°C
TA = 25°C 3 9
Negative
TA = full range 12
µA
p
TA = 25°C 4 10
IIBIn ut bias current
Positive
V
CC
= ±5 V or
±15 V
TA = full range 12
µA
TA = 25°C 1.5 8
Differential
TA = full range 11
µA
p
VCC = ±5 V, RL = 5 Ω 500
IOOutput current (see Note 2)
VCC = ±15 V , RL = 25 Ω 400 500
mA
I
OS
Short-circuit output current (see Note 2) 800 mA
p
p
VCC = ±5 V 1.5
Oen loo transresistance
VCC = ±15 V 5
MΩ
Common-mode rejection ratio
62 70
CMRR
Differential common-mode rejection ratio
V
CC
= ±5 V or
±15 V
,
T
A
=
full range
100
dB
Crosstalk Driver to driver VI = 200 mV, f = 1 MHz –62 dB
†
Full range is 0°C to 70°C for the THS6002C and –40°C to 85°C for the THS6002I.
NOTE 2: A heat sink is required to keep the junction temperature below absolute maximum when an output is heavily loaded or shorted. See
absolute maximum ratings and Thermal Information section.
Page 5
THS6002
DUAL DIFFERENTIAL LINE DRIVERS AND RECEIVERS
SLOS202D– JANUARY 1998– REVISED JUL Y 1999
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DRIVER
electrical characteristics, V
CC
= ±15 V, RL = 25 Ω, RF = 1 kΩ, TA = 25°C (unless otherwise noted)
(continued)
PARAMETER TEST CONDITIONS
†
MIN TYP MAX UNIT
TA = 25°C –68 –74
pp
V
CC
= ±5
V
TA = full range –65
dB
PSRR
Power su ly rejection ratio
TA = 25°C –64 –72
V
CC
=
±15 V
TA = full range –62
dB
C
I
Differential input capacitance 1.4 pF
R
I
Input resistance 300 kΩ
R
O
Output resistance Open loop 13 Ω
TA = 25°C 8.5 10
V
CC
= ±5
V
TA = full range 12
ICCQuiescent current
TA = 25°C 11.5 13
mA
V
CC
=
±15 V
TA = full range 15
†
Full range is 0°C to 70°C for the THS6002C and –40°C to 85°C for the THS6002I.
operating characteristics, VCC = ±15 V, RL = 25 Ω, RF = 1 kΩ, TA = 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SR Dif ferential slew rate VO = 20 V
(PP)
, G = 2 1000 V/µs
t
s
Settling time to 0.1% 0 V to 10 V Step, G = 2 70 ns
THD Total harmonic distortion
V
O(PP)
= 20 V,RF = 4 kΩ,
G = 5, f = 1 MHz
–62 dBc
V
n
Input voltage noise
VCC = ±5 V or ±15 V, f = 10 kHz,
G = 2, Single-ended
1.7 nV/√Hz
p
Positive (IN+)
V
= ±5 V or ±15 V, f = 10 kHz,
11.5
InInput noise current
Negative (IN–)
CC
,
G = 2
,
16
p
A/√H
z
V
= 200 mV , G = 1,
VCC = ±5 V 90 110 MHz
I
,,
RF = 680 Ω
VCC = ±15 V 110 140 MHz
VI = 200 mV , G = 2,
RF = 620 Ω
VCC = ±15 V 120 MHz
BW
Small-signal bandwidth (–3 dB)
VI = 200 mV , G = 1,
RF = 820 Ω,RL = 100 Ω
VCC = ±15 V 315 MHz
VI = 200 mV , G = 2,
RF = 560 Ω,RL = 100 Ω
VCC = ±15 V 265 MHz
V
= 200 mV , G = 1,
VCC = ±5 V 30
Bandwidth for 0.1 dB flatness
I
,,
RF = 680 Ω
VCC = ±15 V 40
MH
z
Full power bandwidth (see Note 3) VO = 20 V
(PP)
16 MHz
G = 2, NTSC,
VCC = ±5 V 0.04%
ADDifferential gain error
,,
RL = 150 Ω, 40 IRE
VCC = ±15 V 0.05%
p
G = 2, NTSC,
VCC = ±5 V 0.07°
φDDifferential phase error
RL = 150 Ω, 40 IRE
VCC = ±15 V 0.08°
NOTE 3: Full power bandwidth = slew rate/2πV
peak
Page 6
THS6002
DUAL DIFFERENTIAL LINE DRIVERS AND RECEIVERS
SLOS202D– JANUARY 1998– REVISED JUL Y 1999
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
RECEIVER
electrical characteristics, V
CC
= ±15 V, RL = 150 Ω, RF = 1 kΩ, TA = 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS
†
MIN TYP MAX UNIT
pp
p
Split supply ±4.5 ±16.5
VCCPower supply operating range
Single supply 9 33
V
p
VCC = ±5 V ±3 ±3.3
VOOutput voltage swing
Single ended
VCC = ±15 V ±12.4 ±12.8
V
p
VCC = ±5 V ±3.6 ±3.7
V
ICR
Common-mode input voltage range
VCC = ±15 V ±13.4 ±13.5
V
TA = 25°C 1 4
p
Single ended
TA = full range 6
VIOInput offset voltage
V
CC
=
±5 V or ±15 V
TA = 25°C 1.5 4
mV
Differential
TA = full range 5
p
Single ended
20
°
Input offset voltage drift
Differential
V
CC
= ±5 V or
±15 V
10
µ
V/°C
TA = 25°C 2 8
Negative
V
CC
= ±5 V or
±15
,
TA = full range 10
p
TA = 25°C 3.5 9
IIBIn ut bias current
Positive
V
CC
= ±5 V or
±15 V
TA = full range 11
µA
TA = 25°C 1.5 8
Differential
V
CC
= ±5 V or
±15 V
TA = full range 10
p
VCC = ±5 V RL = 25 Ω 95
IOOutput current (see Note 2)
VCC = ±15 V RL = 150 Ω 80 85
mA
I
OS
Short-circuit output current (see Note 2) RL = 25 Ω 110 mA
p
p
VCC = ±5 V 1.5
Oen loo transresistance
VCC = ±15 V 5
MΩ
Single ended
60 70
CMRR
Common-mode rejection ratio
Differential
V
CC
= ±5 V or
±15 V
,
T
A
=
full range
100
dB
Crosstalk (receiver to receiver) VI = 200 mV , f = 1 MHz –67 dB
TA = 25°C –66 –74
pp
V
CC
= ±5
V
TA = full range –63
PSRR
Power supply rejection ratio
TA = 25°C –65 –72
dB
V
CC
=
±15 V
TA = full range –62
R
I
Input resistance 300 kΩ
C
I
Differential input capacitance 1.4 pF
R
O
Output resistance Open loop 10 Ω
†
Full range is 0°C to 70°C for the THS6002C and –40°C to 85°C for the THS6002I.
NOTE 2: A heat sink is required to keep junction temperature below absolute maximum when an output is heavily loaded or shorted. See absolute
maximum ratings and Thermal Information section.
Page 7
THS6002
DUAL DIFFERENTIAL LINE DRIVERS AND RECEIVERS
SLOS202D– JANUARY 1998– REVISED JUL Y 1999
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
RECEIVER
electrical characteristics, V
CC
= ±15 V, RL = 150 Ω, RF = 1 kΩ, TA = 25°C (unless otherwise noted)
(continued)
PARAMETER TEST CONDITIONS
†
MIN TYP MAX UNIT
TA = 25°C 4.2 5.5
V
CC
= ±5
V
TA = full range 7.5
ICCQuiescent current
TA = 25°C 5 7
mA
V
CC
=
±15 V
TA = full range 9
†
Full range is 0°C to 70°C for the THS6002C and –40°C to 85°C for the THS6002I.
operating characteristics, VCC = ±15 V, RL = 150 Ω, RF = 1 kΩ, TA = 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SR Differential slew rate VO = 10 V
(PP)
, G = 2 900 V/µs
t
s
Settling time to 0.1% 10 V Step, G = 2 50 ns
THD T otal harmonic distortion
V
O(PP)
= 20 V,
G = 5,
RF = 510 Ω,
f =1 MHz
–68 dBc
V
n
Input voltage noise
VCC = ±5 V or ±15 V
G = 2
f = 10 kHz,
1.7 nV/√Hz
p
Positive (IN+)
V
= ±5 V or ±15 V, f = 10 kHz,
11.5
InInput current noise
Negative (IN–)
CC
,
G = 2
,
16
p
A/√H
z
V
= 200 mV , G = 1,
VCC = ±5 V 270 300
I
,,
RF = 560 Ω
VCC = ±15 V 300 330
MH
z
BW
Small-signal bandwidth (–3 dB)
VI = 200 mV , G = 2,
RF = 430 Ω
VCC = ±15 V 285 MHz
V
= 200 mV , G = 1,
VCC = ±5 V 20
Bandwidth for 0.1 dB flatness
I
,,
RF = 560 Ω
VCC = ±15 V 25
MH
z
Full power bandwidth (see Note 3) VO = 20 V
(PP)
14 MHz
40 IRE, G = 2,
VCC = ±5 V 0.09%
ADDifferential gain error
,,
RL = 150 Ω, NTSC
VCC = ±15 V 0.1%
p
40 IRE, G = 2,
VCC = ±5 V 0.13°
φDDifferential phase error
,,
RL = 150 Ω, NTSC
VCC = ±15 V 0.16°
NOTE 3: Full power bandwidth = slew rate/2πV
peak
Page 8
THS6002
DUAL DIFFERENTIAL LINE DRIVERS AND RECEIVERS
SLOS202D– JANUARY 1998– REVISED JUL Y 1999
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
+
–
1 kΩ
V
I
V
O
25 Ω
50 Ω
1 kΩ
Driver 1
+
–
1 kΩ
V
I
V
O
25 Ω
50 Ω
1 kΩ
Driver 2
Figure 1. Driver Input-to-Output Crosstalk Test Circuit
+
–
1 kΩ
V
I
V
O
150 Ω
50 Ω
1 kΩ
Receiver 1
+
–
1 kΩ
V
I
V
O
150 Ω
50 Ω
1 kΩ
Receiver 2
Figure 2. Receiver Input-to-Output Crosstalk Test Circuit
V
I
V
O
+
–
R
G
R
F
R
L
25 Ω
50 Ω
–15 V
15 V
Driver
Figure 3. Driver Test Circuit, Gain = 1 + (RF/RG)
V
I
V
O
+
–
R
G
R
F
R
L
150 Ω
50 Ω
–15 V
15 V
Receiver
Figure 4. Receiver Test Circuit, Gain = 1 + (RF/RG)
Page 9
THS6002
DUAL DIFFERENTIAL LINE DRIVERS AND RECEIVERS
SLOS202D– JANUARY 1998– REVISED JUL Y 1999
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
Supply current Driver and Receiver vs Supply voltage 5
Input voltage noise Driver and Receiver vs Frequency 6
Input current noise Driver and Receiver vs Frequency 6
Closed-loop output impedance Driver and Receiver vs Frequency 7
p
p
Driver vs Supply voltage 8
Peak-to-peak output voltage swing
Receiver vs Supply voltage 31
p
p
Driver vs Load resistance 9
Peak-to-peak output voltage
Receiver vs Load resistance 32
p
Driver vs Free-air temperature 10
VIOInput offset voltage
Receiver vs Free-air temperature 33
p
Driver vs Free-air temperature 11
IIBInput bias current
Receiver vs Free-air temperature 34
Driver vs Free-air temperature 12
CMMR
Common-mode rejection ratio
Receiver vs Free-air temperature 35
p
p
Driver vs Frequency 13
Input-to-output crosstalk
Receiver vs Frequency 36
Driver-to-receiver crosstalk vs Frequency 14
Receiver-to-driver crosstalk vs Frequency 37
pp
Driver vs Free-air temperature 15
PSSR
Power supply rejection ratio
Receiver vs Free-air temperature 38
pp
Driver vs Free-air temperature 16
ICCSupply current
Receiver vs Free-air temperature 39
p
Driver vs Frequency 17, 18
Normalized frequency response
Receiver vs Frequency 40, 41
Normalized output response Driver vs Frequency 19 – 22
Single-ended output distortion Driver vs Output voltage 23
Output distortion Receiver vs Output voltage 42
Small and large signal frequency response Receiver 43, 44
DC input offset voltage 24, 25
Driver
Number of 150-Ω loads 26, 27
Differential gain
DC input offset voltage 45, 46
Receiver
Number of 150-Ω loads 47, 48
DC input offset voltage 24, 25
p
Driver
Number of 150-Ω loads 26, 27
Differential phase
DC input offset voltage 45, 46
Receiver
Number of 150-Ω loads 47, 48
p
p
p
Driver 28 – 30
Output step response
Receiver 49 – 51
Page 10
THS6002
DUAL DIFFERENTIAL LINE DRIVERS AND RECEIVERS
SLOS202D– JANUARY 1998– REVISED JUL Y 1999
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 5
±VCC – Supply Voltage – V
5678 1112109
6
4
2
0
5
3
1
10
8
9
7
I
CC
– Supply Current – mA
TA = 25°C
RF = 1 kΩ
Gain = +1
14 1513
12
11
Driver
Receiver
DRIVER AND RECEIVER
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
Figure 6
10
1
100
VCC = ±15 V
TA = 25°C
In+ Noise
f – Frequency – Hz
10 100 1k 10k 100k
nV/ Hz
Hz
– Voltage Noise –V
n
– Current Noise – pA/I
n
10
1
100
In– Noise
Vn Noise
DRIVER AND RECEIVER
INPUT VOLTAGE AND CURRENT NOISE
vs
FREQUENCY
1
0.1
0.01
0.001
1M
f – Frequency – Hz
100k 10M 100M
10
100
Closed-Loop Output Impedance –
200
VCC = ±15 V
RF = 1 kΩ
Gain = 2
TA = 25°C
V
I(PP)
= 1 V
500M
Ω
Receiver
Driver
V
O
+
–
50 Ω
1 kΩ
1 kΩ
V
I
THS6002
1 kΩ
(
V
I
V
O
=
1000
Z
o
)
– 1
DRIVER AND RECEIVER
CLOSED-LOOP OUTPUT IMPEDANCE
vs
FREQUENCY
Figure 7
Page 11
THS6002
DUAL DIFFERENTIAL LINE DRIVERS AND RECEIVERS
SLOS202D– JANUARY 1998– REVISED JUL Y 1999
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 8
VCC – Supply Voltage – V
DRIVER
PEAK-TO-PEAK OUTPUT VOLTAGE SWING
vs
SUPPLY VOLTAGE
5678 1112109
0
–5
–10
–15
10
5
TA = 25°C
RF = 1 kΩ
RL = 25 Ω
Gain = 1
14 1513
15
V
O(PP)
– Peak-to-Peak Output Voltage Swing – V
Figure 9
10 100 1000
RL – Load Resistance – Ω
15
5
–5
–15
10
0
–10
VCC = ±15 V
VCC = ±5 V
DRIVER
PEAK-TO-PEAK OUTPUT VOLTAGE
vs
LOAD RESISTANCE
TA = 25°C
RF = 1 kΩ
Gain = 1
VCC = ±5 V
VCC = ±15 V
V
O(PP)
– Peak-to-Peak Output Voltage – V
Figure 10
TA – Free-Air Temperature – °C
–40 –20 0 20 80 1006040
VCC = ±5 V
DRIVER
INPUT OFFSET VOLTAGE
vs
FREE-AIR TEMPERATURE
VCC = ±15 V
V
IO
– Input Offset Voltage – mV
1
–1
–3
–5
0
–2
–4
2
G = 1
RF = 1 kΩ
Figure 11
TA – Free-Air Temperature – °C
–40 –20 0 20 80 1006040
DRIVER
INPUT BIAS CURRENT
vs
FREE-AIR TEMPERATURE
5
3
1
0
4
2
VCC = ±15 V
I
IB+
VCC = ±5 V
I
IB+
VCC = ±15 V
I
IB–
VCC = ±5 V
I
IB–
I
IB
– Input Bias Current – Aµ
G = 1
RF = 1 kΩ
See Figure 2
Page 12
THS6002
DUAL DIFFERENTIAL LINE DRIVERS AND RECEIVERS
SLOS202D– JANUARY 1998– REVISED JUL Y 1999
12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 12
TA – Free-Air Temperature – °C
CMRR – Common-Mode Rejection Ratio – dB
–40 –20 0 20 806040
75
65
60
80
70
VCC = ±5 V
DRIVER
COMMON-MODE REJECTION RATIO
vs
FREE-AIR TEMPERATURE
VCC = ±15 V
1 kΩ
1 kΩ
V
I
+
–
V
O
1 kΩ
1 kΩ
Figure 13
DRIVER
INPUT-TO-OUTPUT CROSSTALK
vs
FREQUENCY
1M
f – Frequency – Hz
100k 10M 100M
Input-to-Output Crosstalk – dB
VCC = ±15 V
RF = 1 kΩ
RL = 25 Ω
Gain = 2
VI = 200 mV
See Figure 1
500M
–30
–50
–70
–90
–40
–60
–80
–10
0
–20
Driver 1 = Input
Driver 2 = Output
Driver 1 = Output
Driver 2 = Input
Figure 14
DRIVER-TO-RECEIVER CROSSTALK
vs
FREQUENCY
1M
f – Frequency – Hz
100k 10M 100M
Driver-to-Receiver Crosstalk – dB
VCC = ±15 V
RF = 1 kΩ
Gain = 2
VI = 200 mV
See Figures 1 and 2
500M
–30
–50
–70
–90
–40
–60
–80
–10
0
–20
Receiver 2 = Output
Driver 2 = Input
Receiver 1 = Output
Driver 1 = Input
Receiver 2 = Output
Driver 1 = Input
Receiver 1 = Output
Driver 2 = Input
Figure 15
TA – Free-Air Temperature – °C
PSRR – Power Supply Rejection Ratio – dB
–40 –20 0 20 80 1006040
DRIVER
POWER SUPPLY REJECTION RATIO
vs
FREE-AIR TEMPERATURE
90
80
70
65
85
75
95
VCC = 15 V
VCC = 5 V
VCC =–5 V
VCC = –15 V
G = 1
RF = 1 kΩ
Page 13
THS6002
DUAL DIFFERENTIAL LINE DRIVERS AND RECEIVERS
SLOS202D– JANUARY 1998– REVISED JUL Y 1999
13
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 16
TA – Free-Air Temperature – °C
–40 –20 0 20 80 1006040
DRIVER
SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
10
6
2
0
8
4
12
VCC = ±15 V
VCC = ±5 V
I
CC
– Supply Current – mA
13
Figure 17
f – Frequency – Hz
Normalized Frequency Response – dB
100 1M 10M 100M
–2
–4
–6
–8
–3
–5
–7
2
0
1
–1
DRIVER
NORMALIZED FREQUENCY RESPONSE
vs
FREQUENCY
VCC = ±15 V
VI = 200 mV
RL = 25 Ω
Gain = 1
TA = 25°C
RF = 510 Ω
RF = 300 Ω
RF = 750 Ω
RF = 1 kΩ
500M
Figure 18
DRIVER
NORMALIZED FREQUENCY RESPONSE
vs
FREQUENCY
f – Frequency – Hz
Normalized Frequency Response – dB
100K 1M 10M 100M
–1
–3
–5
–7
–2
–4
–6
1
2
0
VCC = ±15 V
Vin = 200 mV
RL = 25 Ω
Gain = 2
TA = 25°C
–8
–10
–9
500M
RF = 470 Ω
RF = 360 Ω
RF = 620 Ω
RF = 1 kΩ
Figure 19
DRIVER
NORMALIZED OUTPUT RESPONSE
vs
FREQUENCY
1M
f – Frequency – Hz
100k 10M 100M
Normalized Output Response – dB
500M
–3
–5
–7
–9
–4
–6
–8
–1
0
–2
1
RL = 200 Ω
RL = 100 Ω
RL = 25 Ω
VCC = ±15 V
RF = 1 kΩ
Gain = 1
VI = 200 mV
RL = 50 Ω
Page 14
THS6002
DUAL DIFFERENTIAL LINE DRIVERS AND RECEIVERS
SLOS202D– JANUARY 1998– REVISED JUL Y 1999
14
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 20
DRIVER
NORMALIZED OUTPUT RESPONSE
vs
FREQUENCY
1M
f – Frequency – Hz
100k 10M 100M
Normalized Output Response – dB
VCC = ±15 V
RF = 1 kΩ
Gain = 2
VI = 200 mV
500M
–3
–5
–7
–9
–4
–6
–8
–1
0
–2
1
RL = 200 Ω
RL = 100 Ω
RL = 50 Ω
RL = 25 Ω
Figure 21
DRIVER
NORMALIZED OUTPUT RESPONSE
vs
FREQUENCY
1M
f – Frequency – Hz
100k 10M 100M
Normalized Output Response – dB
VCC = ±15 V
RL = 100 Ω
Gain = 1
VI = 200 mV
500M
–1
–3
–5
–7
–2
–4
–6
1
2
0
3
RF = 620 Ω
RF = 820 Ω
RF = 1 kΩ
Figure 22
DRIVER
NORMALIZED OUTPUT RESPONSE
vs
FREQUENCY
1M
f – Frequency – Hz
100k 10M 100M
Normalized Output Response – dB
VCC = ±15 V
RL = 100 Ω
Gain = 2
VI = 200 mV
500M
–1
–3
–5
–2
–4
–6
1
2
0
3
RF = 430 Ω
RF = 1 kΩ
RF = 620 Ω
Figure 23
DRIVER
SINGLE-ENDED OUTPUT DISTORTION
vs
OUTPUT VOLTAGE
5
V
O(PP)
– Output Voltage – V
01015
Single-Ended Output Distortion – dB
VCC = ±15 V
RF = 4 kΩ
RL = 25 Ω
f = 1 MHz
Gain = 5
20
–30
–50
–70
–90
–40
–60
–80
–10
0
–20
2nd Harmonic
3rd Harmonic
Page 15
THS6002
DUAL DIFFERENTIAL LINE DRIVERS AND RECEIVERS
SLOS202D– JANUARY 1998– REVISED JUL Y 1999
15
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
DC Input Offset Voltage – V
DRIVER
DIFFERENTIAL GAIN AND PHASE
vs
DC INPUT OFFSET VOLTAGE
0.03
0.02
0.01
0
–0.5 –0.1–0.3 0.1 0.7
0.05
–0.7
0.3 0.5
0.04
VCC = ±15 V
RL = 150 Ω
RF = 1 kΩ
f = 3.58 MHz
Gain = 2
40 IRE Modulation
0.02
0
0.04
Differential Phase –
°
0.06
0.08
0.10
Phase
Differential Gain – %
Gain
Figure 24
DC Input Offset Voltage – V
DRIVER
DIFFERENTIAL GAIN AND PHASE
vs
DC INPUT OFFSET VOLTAGE
0.03
0.02
0.01
0
–0.5 –0.1–0.3 0.1 0.7
0.05
–0.7
0.3 0.5
0.04
VCC = ±5 V
RL = 150 Ω
RF = 1 kΩ
f = 3.58 MHz
Gain = 2
40 IRE Modulation
0.02
0
0.04
Differential Phase –
°
0.06
0.08
0.10
Gain
Differential Gain – %
Phase
Figure 25
Page 16
THS6002
DUAL DIFFERENTIAL LINE DRIVERS AND RECEIVERS
SLOS202D– JANUARY 1998– REVISED JUL Y 1999
16
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Number of 150-Ω Loads
DRIVER
DIFFERENTIAL GAIN AND PHASE
vs
NUMBER OF 150-Ω LOADS
0.09
0.06
0.03
0
28
0.15
1
4
Differential Gain – %
0.12
VCC = ±15 V
RF = 1 kΩ
Gain = 2
f = 3.58 MHz
40 IRE Modulation
100 IRE Ramp
0.05
0
0.10
Differential Phase –
°
0.15
0.20
0.25
Gain
Phase
3567
Figure 26
Number of 150-Ω Loads
DRIVER
DIFFERENTIAL GAIN AND PHASE
vs
NUMBER OF 150-Ω LOADS
0.09
0.06
0.03
0
0.15
Differential Gain – %
0.12
0.05
0
0.10
Differential Phase –
°
0.15
0.20
0.25
VCC = ±5 V
RF = 1 kΩ
Gain = 2
f = 3.58 MHz
40 IRE Modulation
100 IRE Ramp
Gain
Phase
28143567
Figure 27
Page 17
THS6002
DUAL DIFFERENTIAL LINE DRIVERS AND RECEIVERS
SLOS202D– JANUARY 1998– REVISED JUL Y 1999
17
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 28
t – Time – ns
VCC = ±15 V
Gain = 2
RL = 25 Ω
RF = 1 kΩ
tr/tf= 300 ps
See Figure 3
DRIVER OUTPUT
400 mV STEP RESPONSE
100
–100
0
–200
V
O
– Output Voltage – mV
300
200
0 15010050 200 250 350300 400 450 500
400
–300
–400
Figure 29
t – Time – ns
DRIVER OUTPUT
10 V STEP RESPONSE
2
–2
0
–4
V
O
– Output Voltage – V
6
4
0 15010050 200 250 350300 400 450 500
8
–6
–8
VCC = ±15 V
Gain = 2
RL = 25 Ω
RF = 1 kΩ
tr/tf= 5 ns
See Figure 3
t – Time – ns
VCC = ±15 V
Gain = 5
RL = 25 Ω
RF = 2 kΩ
tr/tf= 5 ns
See Figure 3
DRIVER OUTPUT
20 V STEP RESPONSE
4
–4
0
–8
V
O
– Output Voltage – V
12
8
0 15010050 200 250 350300 400 450 500
16
–12
–16
Figure 30
Page 18
THS6002
DUAL DIFFERENTIAL LINE DRIVERS AND RECEIVERS
SLOS202D– JANUARY 1998– REVISED JUL Y 1999
18
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 31
VCC – Supply Voltage – V
RECEIVER
PEAK-TO-PEAK OUTPUT VOLTAGE SWING
vs
SUPPLY VOLTAGE
5678 1112109
0
–5
–10
–15
10
5
TA = 25°C
RF = 1 kΩ
RL = 150 Ω
Gain = 1
14 1513
15
V
O(PP)
– Peak-to-Peak Output Voltage Swing – V
Figure 32
10 100 1000
RL – Load Resistance – Ω
15
5
–5
–15
10
0
–10
VCC = ±15 V
VCC = ±5 V
RECEIVER
PEAK-TO-PEAK OUTPUT VOLTAGE
vs
LOAD RESISTANCE
TA = 25°C
RF = 1 kΩ
Gain = 1
VCC = ±5 V
VCC = ±15 V
V
O(PP)
– Peak-to-Peak Output Voltage – V
Figure 33
TA – Free-Air Temperature – °C
–40 –20 0 20 80 1006040
VCC = ±5 V
RECEIVER
INPUT OFFSET VOLTAGE
vs
FREE-AIR TEMPERATURE
VCC = ±15 V
V
IO
– Input Offset Voltage – mV
0
–1
–2
–0.5
–1.5
0.5
G = 1
RF = 1 kΩ
Figure 34
TA – Free-Air Temperature – °C
–40 –20 0 20 80 1006040
RECEIVER
INPUT BIAS CURRENT
vs
FREE-AIR TEMPERATURE
5
3
1
0
4
2
VCC = ±15 V
I
IB+
VCC = ±5 V
I
IB+
VCC = ±15 V
I
IB–
VCC = ±5 V
I
IB–
I
IB
– Input Bias Current – Aµ
G = 1
RF = 1 kΩ
Page 19
THS6002
DUAL DIFFERENTIAL LINE DRIVERS AND RECEIVERS
SLOS202D– JANUARY 1998– REVISED JUL Y 1999
19
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 35
TA – Free-Air Temperature – °C
CMRR – Common-Mode Rejection Ratio – dB
–40 –20 0 20 80 1006040
VCC = ±5 V
RECEIVER
COMMON-MODE REJECTION RATIO
vs
FREE-AIR TEMPERATURE
VCC = ±15 V
80
70
60
55
75
65
85
1 kΩ
1 kΩ
V
I
+
–
V
O
1 kΩ
1 kΩ
Figure 36
RECEIVER
INPUT-TO-OUTPUT CROSSTALK
vs
FREQUENCY
1M
f – Frequency – Hz
100k 10M 100M
Input-to-Output Crosstalk – dB
VCC = ±15 V
RF = 1 kΩ
RL = 150 Ω
Gain = 2
VI = 200 mV
See Figure 2
500M
–30
–50
–70
–90
–40
–60
–80
–10
0
–20
Receiver 1 = Input
Receiver 2 = Output
Receiver 1 = Output
Receiver 2 = Input
Figure 37
RECEIVER-TO-DRIVER CROSSTALK
vs
FREQUENCY
1M
f – Frequency – Hz
100k 10M 100M
Receiver-to-Driver Crosstalk – dB
VCC = ±15 V
RF = 1 kΩ
Gain = 2
500M
–30
–50
–70
–90
–40
–60
–80
–10
0
–20
Receiver 2 = Input
Driver 2 = Output
Receiver 1 = Input
Driver 1 = Output
Receiver 2 = Input
Driver 1 = Output
Receiver 1 = Input
Driver 2 = Output
Figure 38
TA – Free-Air Temperature – °C
PSRR – Power Supply Rejection Ratio – dB
–40 –20 0 20 80 1006040
RECEIVER
POWER SUPPLY REJECTION RATIO
vs
FREE-AIR TEMPERATURE
90
80
70
65
85
75
95
VCC = 15 V
VCC = 5 V
VCC = –15 V
VCC =–5 V
G = 1
RF = 1 kΩ
Page 20
THS6002
DUAL DIFFERENTIAL LINE DRIVERS AND RECEIVERS
SLOS202D– JANUARY 1998– REVISED JUL Y 1999
20
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 39
TA – Free-Air Temperature – °C
–40 –20 0 20 80 1006040
RECEIVER
SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
5
3
1
0
4
2
6
VCC = ±15 V
VCC = ±5 V
I
CC
– Supply Current – mA
7
Figure 40
RECEIVER
NORMALIZED OUTPUT RESPONSE
vs
FREQUENCY
1M
f – Frequency – Hz
100k 10M 100M
Normalized Output Response – dB
VCC = ±15 V
RL = 150 Ω
Gain = 1
VI = 200 mV
500M
–1
–3
–5
–7
–2
–4
–6
1
2
0
3
RF = 360 Ω
RF = 510 Ω
RF = 1 kΩ
RF = 750 Ω
Figure 41
RECEIVER
NORMALIZED OUTPUT RESPONSE
vs
FREQUENCY
1M
f – Frequency – Hz
100k 10M 100M
Normalized Output Response – dB
VCC = ±15 V
RL = 150 Ω
Gain = 2
VI = 200 mV
500M
–3
–5
–7
–9
–4
–6
–8
–1
0
–2
1
RF = 360 Ω
RF = 510 Ω
RF = 1 kΩ
RF = 620 Ω
Figure 42
RECEIVER
OUTPUT DISTORTION
vs
OUTPUT VOLTAGE
5
V
O(PP)
– Output Voltage – V
01015
Output Distortion – dB
VCC = ±15 V
RF = 510 Ω
RL = 150 Ω
f = 1 MHz
Gain = 5
20
–30
–50
–70
–90
–40
–60
–80
–10
0
–20
2nd Harmonic
3rd Harmonic
–100
Page 21
THS6002
DUAL DIFFERENTIAL LINE DRIVERS AND RECEIVERS
SLOS202D– JANUARY 1998– REVISED JUL Y 1999
21
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 43
1M
f – Frequency – Hz
100k 10M 100M
VCC = ±15 V
RF = 510 Ω
RL = 150 Ω
Gain = 1
500M
–15
–21
–27
–18
–24
–30
–9
–6
–12
–3
VI = 250 mV
VI = 500 mV
VI = 125 mV
VI = 62.5 mV
RECEIVER
SMALL AND LARGE SIGNAL
FREQUENCY RESPONSE
Output Level – dBV
Figure 44
1M
f – Frequency – Hz
100k 10M 100M
Output Level – dBV
VCC = ±15 V
RF = 390 Ω
RL = 150 Ω
Gain = 2
500M
–9
–15
–21
–12
–18
–24
–3
0
–6
3
VI = 250 mV
VI = 500 mV
VI = 125 mV
VI = 62.5 mV
RECEIVER
SMALL AND LARGE SIGNAL
FREQUENCY RESPONSE
DC Input Offset Voltage – V
RECEIVER
DIFFERENTIAL GAIN AND PHASE
vs
DC INPUT OFFSET VOLTAGE
0.05
0.03
0.01
0
–0.5 –0.1–0.3 0.1 0.7
0.09
–0.7
0.3 0.5
0.07
VCC = ±15 V
RL = 150 Ω
RF = 1 kΩ
f = 3.58 MHz
Gain = 2
40 IRE Modulation
0.04
0
0.08
Differential Phase –
°
0.12
0.16
0.20
Gain
Differential Gain – %
0.06
0.04
0.02
0.10
0.08
0.02
0.06
0.10
0.14
0.18
Phase
Figure 45
Page 22
THS6002
DUAL DIFFERENTIAL LINE DRIVERS AND RECEIVERS
SLOS202D– JANUARY 1998– REVISED JUL Y 1999
22
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
DC Input Offset Voltage – V
RECEIVER
DIFFERENTIAL GAIN AND PHASE
vs
DC INPUT OFFSET VOLTAGE
0.05
0.03
0.01
0
–0.5 –0.1–0.3 0.1 0.7
0.09
–0.7 0.3 0.5
0.07
0.04
0
0.08
Differential Phase –
°
0.12
0.16
0.20
Phase
Differential Gain – %
0.06
0.04
0.02
0.10
0.08
0.02
0.06
0.10
0.14
0.18
VCC = ±5 V
RL = 150 Ω
RF = 1 kΩ
f = 3.58 MHz
Gain = 2
40 IRE Modulation
Gain
Figure 46
Number of 150-Ω Loads
RECEIVER
DIFFERENTIAL GAIN AND PHASE
vs
NUMBER OF 150-Ω LOADS
0.25
0.15
0.05
0
0.45
Differential Gain – %
0.35
0.05
0
0.10
Differential Phase –
°
0.15
0.20
0.25
0.30
0.20
0.10
0.40
VCC = ±15 V
RF = 1 kΩ
Gain = 2
f = 3.58 MHz
40 IRE Modulation
100 IRE Ramp
Phase
Gain
28143567
Figure 47
Page 23
THS6002
DUAL DIFFERENTIAL LINE DRIVERS AND RECEIVERS
SLOS202D– JANUARY 1998– REVISED JUL Y 1999
23
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Number of 150-Ω Loads
RECEIVER
DIFFERENTIAL GAIN AND PHASE
vs
NUMBER OF 150-Ω LOADS
0.25
0.15
0.05
0
0.45
Differential Gain – %
0.35
0.05
0
0.10
Differential Phase –
°
0.15
0.20
0.25
0.30
0.20
0.10
0.40
Gain
Phase
VCC = ±5 V
RF = 1 kΩ
Gain = 2
f = 3.58 MHz
40 IRE Modulation
100 IRE Ramp
28143567
Figure 48
Figure 49
t – Time – ns
Gain = +2
RL = 150 Ω
RF = 1 kΩ
tr/tf= 300 ps
See Figure 4
RECEIVER OUTPUT
400-mV STEP RESPONSE
100
–100
0
–200
V
O
– Output Voltage – mV
300
200
0 15010050 200 250 350300 400 450 500
400
–300
–400
Figure 50
t – Time – ns
Gain = +2
RL = 150 Ω
RF = 1 kΩ
tr/tf= 5 ns
See Figure 4
RECEIVER OUTPUT
10-V STEP RESPONSE
3
–1
1
–3
V
O
– Output Voltage – V
7
5
0 15010050 200 250 350300 400 450 500
9
–5
–7
Page 24
THS6002
DUAL DIFFERENTIAL LINE DRIVERS AND RECEIVERS
SLOS202D– JANUARY 1998– REVISED JUL Y 1999
24
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
t – Time – ns
VCC = ±15 V
Gain = 5
RL = 150 Ω
RF = 2 kΩ
tr/tf= 5 ns
See Figure 4
RECEIVER OUTPUT
20 V STEP RESPONSE
4
–4
0
–8
V
O
– Output Voltage – V
12
8
0 15010050 200 250 350300 400 450 500
16
–12
–16
Figure 51
APPLICATION INFORMATION
The THS6002 contains four independent operational amplifiers. Two are designated as drivers because of their
high output current capability , and two are designated as receivers. The receiver amplifiers are current feedback
topology amplifiers made for high-speed operation and are capable of driving output loads of at least 80 mA.
The drivers are also current feedback topology amplifiers. However, the drivers have been specifically designed
to deliver the full power requirements of ADSL and therefore can deliver output currents of at least 400 mA at
full output voltage.
The THS6002 is fabricated using Texas Instruments 30-V complementary bipolar process, HVBiCOM. This
process provides excellent isolation and high slew rates that result in the device’s excellent crosstalk and
extremely low distortion.
independent power supplies
Each amplifier of the THS6002 has its own power supply pins. This was specifically done to solve a problem
that often occurs when multiple devices in the same package share common power pins. This problem is
crosstalk between the individual devices caused by currents flowing in common connections. Whenever the
current required by one device flows through a common connection shared with another device, this current,
in conjunction with the impedance in the shared line, produces an unwanted voltage on the power supply . Proper
power supply decoupling and good device power supply rejection helps to reduce this unwanted signal. What
is left is crosstalk.
However, with independent power supply pins for each device, the effects of crosstalk through common
impedance in the power supplies is more easily managed. This is because it is much easier to achieve low
common impedance on the PCB with copper etch than it is to achieve low impedance within the package with
either bond wires or metal traces on silicon.
Page 25
THS6002
DUAL DIFFERENTIAL LINE DRIVERS AND RECEIVERS
SLOS202D– JANUARY 1998– REVISED JUL Y 1999
25
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
power supply restrictions
Although the THS6002 is specified for operation from power supplies of ±5 V to ±15 V (or singled-ended power
supply operation from 10 V to 30 V), and each amplifier has its own power supply pins, several precautions must
be taken to assure proper operation.
1. The power supplies for each amplifier must be the same value. For example, if the drivers use ±15 volts,
then the receivers must also use ±15 volts. Using ±15 volts for one amplifier and ±5 volts for another
amplifier is not allowed.
2. To save power by powering down some of the amplifiers in the package, the following rules must be
followed.
• The amplifier designated Receiver 1 must always receive power whenever any other amplifier(s) within
the package is used. This is because the internal startup circuitry uses the power from the Receiver 1
device.
• The –V
CC
pins from all four devices must always be at the same potential.
• Individual amplifiers are powered down by simply opening the +V
CC
connection.
As an example, if only the two drivers within the THS6002 are used, then the package power is reduced by
removing the +VCC connection to Receiver 2. This reduces the power consumption by an amount equal to the
quiescent power of a single receiver amplifier. The +VCC connections to Receiver 1 and both drivers are
required. Also, all four amplifiers must be connected to –VCC, including Receiver 2.
The THS6002 incorporates a standard Class A-B output stage. This means that some of the quiescent current
is directed to the load as the load current increases. So under heavy load conditions, accurate power dissipation
calculations are best achieved through actual measurements. For small loads, however, internal power
dissipation for each amplifier in the THS6002 can be approximated by the following formula:
PD≅
ǒ
2VCCI
CC
Ǔ)ǒ
VCC_V
O
Ǔ
ǒ
V
O
R
L
Ǔ
Where:
PD= power dissipation for one amplifier
VCC= split supply voltage
I
CC
= supply current for that particular amplifier
VO= output voltage of amplifier
RL= load resistance
To find the total THS6002 power dissipation, we simply sum up all four amplifier power dissipation results.
Generally , the worst case power dissipation occurs when the output voltage is one-half the VCC voltage. One
last note, which is often overlooked: the feedback resistor (R
F
) is also a load to the output of the amplifier and
should be taken into account for low value feedback resistors.
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device protection features
The THS6002 has two built-in protection features that protect the device against improper operation. The first
protection mechanism is output current limiting. Should the output become shorted to ground the output current
is automatically limited to the value given in the data sheet. While this protects the output against excessive
current, the device internal power dissipation increases due to the high current and large voltage drop across
the output transistors. Continuous output shorts are not recommended and could damage the device.
Additionally , connection of the amplifier output to one of the supply rails (±V
CC
) can cause failure of the device
and is not recommended.
The second built-in protection feature is thermal shutdown. Should the internal junction temperature rise above
approximately 180_C, the device automatically shuts down. Such a condition could exist with improper heat
sinking or if the output is shorted to ground. When the abnormal condition is fixed, the internal thermal shutdown
circuit automatically turns the device back on.
thermal information
The THS6002 is packaged in a thermally-enhanced DWP package, which is a member of the PowerP AD family
of packages. This package is constructed using a downset leadframe upon which the die is mounted
[see Figure 52(a) and Figure 52(b)]. This arrangement results in the lead frame being exposed as a thermal pad
on the underside of the package [see Figure 52(c)]. Because this thermal pad has direct thermal contact with
the die, excellent thermal performance can be achieved by providing a good thermal path away from the thermal
pad.
The PowerP AD package allows for both assembly and thermal management in one manufacturing operation.
During the surface-mount solder operation (when the leads are being soldered), the thermal pad can also be
soldered to a copper area underneath the package. Through the use of thermal paths within this copper area,
heat can be conducted away from the package into either a ground plane or other heat dissipating device. This
is discussed in more detail in the
PCB design considerations
section of this document.
The PowerPAD package represents a breakthrough in combining the small area and ease of assembly of
surface mount with the, heretofore, awkward mechanical methods of heatsinking.
DIE
Side View (a)
End View (b)
Bottom View (c)
DIE
Thermal
Pad
NOTE A: The thermal pad is electrically isolated from all terminals in the package.
Figure 52. Views of Thermally Enhanced DWP Package
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APPLICATION INFORMATION
recommended feedback and gain resistor values
As with all current feedback amplifiers, the bandwidth of the THS6002 is an inversely proportional function of
the value of the feedback resistor. This can be seen from Figures 17 and 18. For the driver, the recommended
resistors for the optimum frequency response for a 25-Ω load system are 680-Ω for a gain = 1 and 620-Ω for
a gain = 2 or –1. For the receivers, the recommended resistors for the optimum frequency response are
560 Ω for a gain = 1 and 390 Ω for a gain = 2 or –1. These should be used as a starting point and once optimum
values are found, 1% tolerance resistors should be used to maintain frequency response characteristics.
Because there is a finite amount of output resistance of the operational amplifier, load resistance can play a
major part in frequency response. This is especially true with the drivers, which tend to drive low-impedance
loads. This can be seen in Figure 7, Figure 19, and Figure 20. As the load resistance increases, the output
resistance of the amplifier becomes less dominant at high frequencies. To compensate for this, the feedback
resistor should change. For 100-Ω loads, it is recommended that the feedback resistor be changed to 820 Ω
for a gain of 1 and 560 Ω for a gain of 2 or –1. Although, for most applications, a feedback resistor value of
1 kΩ is recommended, which is a good compromise between bandwidth and phase margin that yields a very
stable amplifier.
Consistent with current feedback amplifiers, increasing the gain is best accomplished by changing the gain
resistor, not the feedback resistor . This is because the bandwidth of the amplifier is dominated by the feedback
resistor value and internal dominant-pole capacitor. The ability to control the amplifier gain independently of the
bandwidth constitutes a major advantage of current feedback amplifiers over conventional voltage feedback
amplifiers. Therefore, once a frequency response is found suitable to a particular application, adjust the value
of the gain resistor to increase or decrease the overall amplifier gain.
Finally, it is important to realize the effects of the feedback resistance on distortion. Increasing the resistance
decreases the loop gain and increases the distortion. It is also important to know that decreasing load
impedance increases total harmonic distortion (THD). Typically, the third order harmonic distortion increases
more than the second order harmonic distortion.
offset voltage
The output offset voltage, (VOO) is the sum of the input offset voltage (VIO) and both input bias currents (IIB) times
the corresponding gains. The following schematic and formula can be used to calculate the output offset
voltage:
VOO+
V
IO
ǒ
1
) ǒ
R
F
R
G
Ǔ
Ǔ
"
I
IB
)
R
S
ǒ
1
) ǒ
R
F
R
G
Ǔ
Ǔ
"
I
IB–RF
+
–
V
I
+
R
G
R
S
R
F
I
IB–
V
O
I
IB+
Figure 53. Output Offset Voltage Model
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APPLICATION INFORMATION
noise calculations and noise figure
Noise can cause errors on very small signals. This is especially true for the receiver amplifiers which are
generally used for amplifying small signals coming over a transmission line. The noise model for current
feedback amplifiers (CFB) is the same as voltage feedback amplifiers (VFB). The only difference between the
two is that the CFB amplifiers generally specify different current noise parameters for each input while VFB
amplifiers usually only specify one noise current parameter. The noise model is shown in Figure 54. This model
includes all of the noise sources as follows:
• e
n
= amplifier internal voltage noise (nV/√Hz)
• IN+ = noninverting current noise (pA/√Hz)
• IN– = inverting current noise (pA/√Hz)
• e
Rx
= thermal voltage noise associated with each resistor (eRx = 4 kTRx)
_
+
R
F
R
S
R
G
e
Rg
e
Rf
e
Rs
e
n
IN+
Noiseless
IN–
e
ni
e
no
Figure 54. Noise Model
The total equivalent input noise density (eni) is calculated by using the following equation:
eni+
ǒ
e
n
Ǔ
2
)ǒIN
)
R
S
Ǔ
2
)ǒIN–
ǒRFø
R
G
Ǔ
Ǔ
2
)
4kTRs)
4kTǒRFø
R
G
Ǔ
Ǹ
Where:
k = Boltzmann’s constant = 1.380658 × 10
–23
T = temperature in degrees Kelvin (273 +°C)
RF || RG = parallel resistance of RF and R
G
To get the equivalent output noise of the amplifier, just multiply the equivalent input noise density (eni) by the
overall amplifier gain (AV).
eno+
eniAV+
e
ni
ǒ
1
)
R
F
R
G
Ǔ
(Noninverting Case)
Page 29
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APPLICATION INFORMATION
noise calculations and noise figure (continued)
As the previous equations show, to keep noise at a minimum, small value resistors should be used. As the
closed-loop gain is increased (by reducing RG), the input noise is reduced considerably because of the parallel
resistance term. This leads to the general conclusion that the most dominant noise sources are the source
resistor (RS) and the internal amplifier noise voltage (en). Because noise is summed in a root-mean-squares
method, noise sources smaller than 25% of the largest noise source can be effectively ignored. This can greatly
simplify the formula and make noise calculations much easier to calculate.
This brings up another noise measurement usually preferred in RF applications, the noise figure (NF). Noise
figure is a measure of noise degradation caused by the amplifier. The value of the source resistance must be
defined and is typically 50 Ω in RF applications.
NF+10log
ȧ
ȱ
Ȳ
e
2
ni
e
Rs
ȧ
ȳ
ȴ
Because the dominant noise components are generally the source resistance and the internal amplifier noise
voltage, we can approximate noise figure as:
NF+10log
ȧ
ȧ
ȧ
ȧ
ȧ
ȱ
Ȳ
1
)
ȧ
ȡ
Ȣ
ǒ
e
n
Ǔ
2
)ǒIN
)
R
S
Ǔ
2
ȧ
ȣ
Ȥ
4kTR
S
ȧ
ȧ
ȧ
ȧ
ȧ
ȳ
ȴ
The Figure 55 shows the noise figure graph for the THS6002.
NOISE FIGURE
vs
SOURCE RESISTANCE
18
14
0
20
16
12
Noise Figure – dB
Rs – Source Resistance – Ω
10 100 1k 10k
TA = 25°C
8
4
10
6
2
Figure 55. Noise Figure vs. Source Resistance
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APPLICATION INFORMATION
PCB design considerations
Proper PCB design techniques in two areas are important to assure proper operation of the THS6002. These
areas are high-speed layout techniques and thermal-management techniques. Because the THS6002 is a
high-speed part, the following guidelines are recommended.
D
Ground plane – It is essential that a ground plane be used on the board to provide all components with a
low inductive ground connection. Although a ground connection directly to a terminal of the THS6002 is not
necessarily required, it is recommended that the thermal pad of the package be tied to ground. This serves
two functions. It provides a low inductive ground to the device substrate to minimize internal crosstalk and
it provides the path for heat removal.
D
Input stray capacitance – To minimize potential problems with amplifier oscillation, the capacitance at the
inverting input of the amplifiers must be kept to a minimum. T o do this, PCB trace runs to the inverting input
must be as short as possible, the ground plane must be removed under any etch runs connected to the
inverting input, and external components should be placed as close as possible to the inverting input. This
is especially true in the noninverting configuration. An example of this can be seen in Figure 56, which shows
what happens when 1.8 pF is added to the inverting input terminal in the noninverting configuration. The
bandwidth increases dramatically at the expense of peaking. This is because some of the error current is
flowing through the stray capacitor instead of the inverting node of the amplifier. Although, in the inverting
mode, stray capacitance at the inverting input has little effect. This is because the inverting node is at a
virtual ground
and the voltage does not fluctuate nearly as much as in the noninverting configuration.
f – Frequency – Hz
Normalized Frequency Response – dB
100 1M 10M 100M 500M
–1
–3
–5
–7
–2
–4
–6
3
1
2
0
DRIVER
NORMALIZED FREQUENCY RESPONSE
vs
FREQUENCY
VCC = ±15 V
VI = 200 mV
RL = 25 Ω
RF = 1 kΩ
Gain = 1
CI = 0 pF
(Stray C Only)
CI = 1.8 pF
+
–
1 kΩ
50 Ω
RL =
25 Ω
C
in
V
in
V
out
Figure 56. Driver Normalized Frequency Response vs. Frequency
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APPLICATION INFORMATION
PCB design considerations (continued)
D
Proper power supply decoupling – Use a minimum of a 6.8-µF tantalum capacitor in parallel with a 0.1-µF
ceramic capacitor on each supply terminal. It may be possible to share the tantalum among several
amplifiers depending on the application, but a 0.1-µF ceramic capacitor should always be used on the
supply terminal of every amplifier. In addition, the 0.1-µF capacitor should be placed as close as possible
to the supply terminal. As this distance increases, the inductance in the connecting etch makes the capacitor
less effective. The designer should strive for distances of less than 0.1 inches between the device power
terminal and the ceramic capacitors.
Because of its power dissipation, proper thermal management of the THS6002 is required. Although there are
many ways to properly heatsink this device, the following steps illustrate one recommended approach for a
multilayer PCB with an internal ground plane.
1. Prepare the PCB with a top side etch pattern as shown in Figure 57. There should be etch for the leads as
well as etch for the thermal pad.
2. Place five holes in the area of the thermal pad. These holes should be 13 mils in diameter. They are kept
small so that solder wicking through the holes is not a problem during reflow.
3. Place four more holes under the package, but outside the thermal pad area. These holes are 25 mils in
diameter. They may be larger because they are not in the area to be soldered so that wicking is not a
problem.
4. Connect all nine holes, the five within the thermal pad area and the four outside the pad area, to the internal
ground plane.
5. When connecting these holes to the ground plane, do not use the typical web or spoke via connection
methodology . Web connections have a high thermal resistance connection that is useful for slowing the heat
transfer during soldering operations. This makes the soldering of vias that have plane connections easier.
However, in this application, low thermal resistance is desired for the most ef ficient heat transfer. Therefore,
the holes under the THS6002 package should make their connection to the internal ground plane with a
complete connection around the entire circumference of the plated through hole.
6. The top-side solder mask should leave exposed the terminals of the package and the thermal pad area with
its five holes. The four larger holes outside the thermal pad area, but still under the package, should be
covered with solder mask.
7. Apply solder paste to the exposed thermal pad area and all of the operational amplifier terminals.
8. With these preparatory steps in place, the THS6002 is simply placed in position and run through the solder
reflow operation as any standard surface mount component. This results in a part that is properly installed.
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PCB design considerations (continued)
Additional 4 vias outside of thermal pad area
but under the package
(Via diameter = 25 mils)
Thermal pad area (0.15 x 0.17) with 5 vias
(Via diameter = 13 mils)
Figure 57. PowerPad PCB Etch and Via Pattern
The actual thermal performance achieved with the THS6002 in its PowerPAD package depends on the
application. In the previous example, if the size of the internal ground plane is approximately 3 inches × 3 inches,
then the expected thermal coefficient, θJA, is about 21.5_C/W. For a given θJA, the maximum power dissipation
is shown in Figure 58 and is calculated by the following formula:
PD+
ǒ
T
MAX–TA
q
JA
Ǔ
Where:
PD= Maximum power dissipation of THS6002 (watts)
T
MAX
= Absolute maximum junction temperature (150°C)
T
A
= Free-ambient air temperature (°C)
θ
JA
= θJC + θ
CA
θJC = Thermal coefficient from junction to case (0.37°C/W)
θCA = Thermal coefficient from case to ambient
More complete details of the PowerP AD installation process and thermal management techniques can be found
in the Texas Instruments Technical Brief,
PowerPAD Thermally Enhanced Package.
This document can be
found at the TI web site (www.ti.com) by searching on the key word PowerPAD. The document can also be
ordered through your local TI sales office. Refer to literature number SLMA002 when ordering.
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APPLICATION INFORMATION
PCB design considerations (continued)
TA – Free-Air Temperature – °C
–40 –20 0 20 80 1006040
MAXIMUM POWER DISSIPATION
vs
FREE-AIR TEMPERATURE
5
3
1
0
4
2
6
7
Maximum Power Dissipation – W
8
9
Tj = 150°C
PCB Size = 3” x 3”
No Air Flow
θJA = 21.5°C/W
2 oz Trace and
Copper Pad
with Solder
θJA = 43.9°C/W
2 oz Trace and Copper Pad
without Solder
Figure 58. Maximum Power Dissipation vs Free-Air Temperature
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THS6002
DUAL DIFFERENTIAL LINE DRIVERS AND RECEIVERS
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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
ADSL
The THS6002 was primarily designed as a line driver and line receiver for ADSL (asymmetrical digital subscriber
line). The driver output stage has been sized to provide full ADSL power levels of 20 dBm onto the telephone
lines. Although actual driver output peak voltages and currents vary with each particular ADSL application, the
THS6002 is specified for a minimum full output current of 400 mA at its full output voltage of approximately 12
V . This performance meets the demanding needs of ADSL at the central office end of the telephone line. A typical
ADSL schematic is shown in Figure 59.
_
+
6.8 µF0.1 µF
–15 V
6.8 µF0.1 µF
15 V
1 kΩ
1 kΩ
+
+
V
I+
_
+
6.8 µF0.1 µF
–15 V
6.8 µF0.1 µF
15 V
1 kΩ
1 kΩ
+
+
V
I–
+
–
1 kΩ
0.1 µF
1 kΩ
2 kΩ
12.5 Ω
+
–
1 kΩ
0.1 µF
1 kΩ
2 kΩ
1:2
To Telephone Line
12.5 Ω
–15 V
15 V
15 V
–15 V
0.01 µF
THS6002
Receiver 1
THS6002
Receiver 2
V
O+
V
O–
THS6002
Driver 1
THS6002
Driver 2
100 Ω
Figure 59. THS6002 ADSL Application
Page 35
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APPLICATION INFORMATION
ADSL (continued)
The ADSL transmit band consists of 255 separate carrier frequencies each with its own modulation and
amplitude level. With such an implementation, it is imperative that signals put onto the telephone line have as
low a distortion as possible. This is because any distortion either interferes directly with other ADSL carrier
frequencies or it creates intermodulation products that interfere with ADSL carrier frequencies.
The THS6002 has been specifically designed for ultra low distortion by careful circuit implementation and by
taking advantage of the superb characteristics of the complementary bipolar process. Driver single-ended
distortion measurements are shown in Figure 23. It is commonly known that in the differential driver
configuration, the second order harmonics tend to cancel out. Thus, the dominant total harmonic distortion
(THD) will be primarily due to the third order harmonics. For this test, the load was 25 Ω and the output signal
produced a 20 V
O(PP)
signal. Thus, the test was run at full signal and full load conditions. Because the feedback
resistor used for the test was 4 kΩ, the distortion numbers are actually in a worst-case scenario. Distortion
should be reduced as the feedback resistance drops. This is because the bandwidth of the amplifier increases
dramatically, which allows the amplifier to react faster to any nonlinearities in the closed-loop system.
Another significant point is the fact that distortion decreases as the impedance load increases. This is because
the output resistance of the amplifier becomes less significant as compared to the output load resistance.
Page 36
THS6002
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APPLICATION INFORMATION
HDSL
Shown in Figure 60 is an example of the THS6002 being used for HDSL-2 applications. The receiver amplifiers
within the THS6002 have been configured as predrivers for the driver amplifiers. This dual composite amplifier
setup has the effect of raising the open loop gain for the combination of both amplifiers, thereby giving improved
distortion performance.
+
–
12 V
–12 V
11 kΩ
7.5 kΩ
1 kΩ
THS6002
Receiver 1
9
6
7
+
–
12 V
–12 V
Driver 1
2
4
5
30 Ω
1 kΩ
511 Ω
135 Ω
Output
27.4 V
O(PP)
1:1.5
+
–
12 V
–12 V
11 kΩ
7.5 kΩ
1 kΩ
Receiver 2
12
15
14
12 V
–12 V
Driver 2
19
17
16
30 Ω
1 kΩ
511 Ω
+
–
12 V
–12 V
THS4001
U2
6
2
1
1 kΩ1 kΩ
Input
3 V
(PP)
+
–
Figure 60. HDSL-2 Line Driver
general configurations
A common error for the first-time CFB user is to create a unity gain buffer amplifier by shorting the output directly
to the inverting input. A CFB amplifier in this configuration is now commonly referred to as an oscillator. The
THS6002, like all CFB amplifiers, must have a feedback resistor for stable operation. Additionally, placing
capacitors directly from the output to the inverting input is not recommended. This is because, at high
frequencies, a capacitor has a very low impedance. This results in an unstable amplifier and should not be
considered when using a current-feedback amplifier. Because of this, integrators and simple low-pass filters,
which are easily implemented on a VFB amplifier, have to be designed slightly dif ferently . If filtering is required,
simply place an RC-filter at the noninverting terminal of the operational-amplifier (see Figure 61).
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general configurations (continued)
V
I
V
O
C1
+
–
R
G
R
F
R1
f
–3dB
+
1
2pR1C1
V
O
V
I
+ ǒ
1
)
R
F
R
G
Ǔ
ǒ
1
1)sR1C1
Ǔ
Figure 61. Single-Pole Low-Pass Filter
If a multiple pole filter is required, the use of a Sallen-Key filter can work very well with CFB amplifiers. This is
because the filtering elements are not in the negative feedback loop and stability is not compromised. Because
of their high slew-rates and high bandwidths, CFB amplifiers can create very accurate signals and help minimize
distortion. An example is shown in Figure 62.
V
I
C2
R2R1
C1
R
F
R
G
R1 = R2 = R
C1 = C2 = C
Q = Peaking Factor
(Butterworth Q = 0.707)
(
=
1
Q
2 –
)
R
G
R
F
_
+
f
–3dB
+
1
2pRC
Figure 62. 2-Pole Low-Pass Sallen-Key Filter
There are two simple ways to create an integrator with a CFB amplifier. The first one shown in Figure 63 adds
a resistor in series with the capacitor. This is acceptable because at high frequencies, the resistor is dominant
and the feedback impedance never drops below the resistor value. The second one shown in Figure 64 uses
positive feedback to create the integration. Caution is advised because oscillations can occur because of the
positive feedback.
+
–
C1
R
F
R
G
V
O
V
I
THS6002
V
O
V
I
+ ǒ
R
F
R
G
Ǔ
ȧ
ȡ
Ȣ
S
)
1
RFC1
S
ȧ
ȣ
Ȥ
Figure 63. Inverting CFB Integrator
Page 38
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general configurations (continued)
+
–
R
F
V
O
R
G
R2R1
C1
R
A
V
I
THS6002
For Stable Operation:
R2
R1 || R
A
≥
R
F
R
G
sR1C1
(
)
R
F
R
G
1 +
VO
≅ V
I
Figure 64. Non-Inverting CFB Integrator
Another good use for the THS6002 driver amplifiers are as very good video distribution amplifiers. One
characteristic of distribution amplifiers is the fact that the differential phase (DP) and the differential gain (DG)
are compromised as the number of lines increases and the closed-loop gain increases. Be sure to use
termination resistors throughout the distribution system to minimize reflections and capacitive loading.
+
–
620 Ω620 Ω
75 Ω
75 Ω
75 Ω
75 Ω
75 Ω
N Lines
V
O1
V
ON
THS6002
75 Ω Transmission Line
V
I
Figure 65. Video Distribution Amplifier Application
evaluation board
An evaluation board is available for the THS6002 (literature number SLOP1 17). This board has been configured
for proper thermal management of the THS6002. The circuitry has been designed for a typical ADSL application
as shown previously in this document. For more detailed information, refer to the
THS6002EVM User’s Manual
(literature number SLOU018). To order the evaluation board contact your local TI sales office or distributor.
Page 39
THS6002
DUAL DIFFERENTIAL LINE DRIVERS AND RECEIVERS
SLOS202D– JANUARY 1998– REVISED JUL Y 1999
39
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL INFORMATION
DWP (R-PDSO-G20) PowerPAD PLASTIC SMALL-OUTLINE PACKAGE
Gage Plane
0.411 (10,44)
0.430 (10,92)
0.010 (0,25) NOM
0.010 (0,25)
Seating Plane
0.050 (1,27)
0.016 (0,40)
4073226/B 01/96
11
10
0.500 (12,70)
0.510 (12,95)
20
1
0.004 (0,10)
0.000 (0,00)
0.096 (2,43) MAX
0.020 (0,51)
0.014 (0,35)
0.293 (7,45)
0.299 (7,59)
0.050 (1,27)
M
0.010 (0,25)
0.004 (0,10)
+2°–8°
Thermal Pad 0.150 (3,81) 0.170 (4,31) NOM
(see Note C)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. The thermal performance may be enhanced by bonding the thermal pad to an external thermal plane.
PowerPAD is a trademark of Texas Instruments Incorporated.
Page 40
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TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. T esting and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
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DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
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In order to minimize risks associated with the customer’s applications, adequate design and operating
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Copyright 1999, Texas Instruments Incorporated
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