Datasheet tea6310t DATASHEETS (Philips)

INTEGRATED CIRCUITS

DATA SH EET

TEA6310T

Sound fader control circuit

Product specification
File under Integrated Circuits, IC01

May 1992

Philips Semiconductors Product specification

Sound fader control circuit TEA6310T

FEATURES

• Volume and balance control; control range of 86 dB in
steps of 2 dB

• Bass and treble control from +15 dB (treble 12 dB)
to −12 dB in steps of 3 dB

• Fader control form 0 dB to −30 dB in steps of 2 dB

• Fast muting

• Low noise suitable for Dolby* B and C N R (noise

reduction)

• Signal handling suitable for compact disc

• I2C-bus control for all functions

• ESD protected.

QUICK REFERENCE DATA

PARAMETER SYMBOL MIN. TYP. MAX. UNIT

Supply voltage V
Input sensitivity for full power

at the output state V
Input signal handling V
Frequency response f
Channel separation

f = 250 Hz to 10 kHz α
Total harmonic distortion THD − 0,05 − %
Signal plus noise-to-noise ratio (S+N)/N − 80 − dB
Operating ambient temperature range T

GENERAL DESCRIPTION

The Sound Fader Control circuit (SOFAC) is an I2C-bus
controlled tone and volume control circuit for car radios.

CC

i(rms)
i(rms)

r

CS

amb

7,0 8,5 13,2 V

− 50 − mV

− 1,65 − V

35 − 20000 Hz

70 96 − dB

−40 −+85 °C

* Dolby is a registered trademark of Dolby Laboratories Licensing Corporation, San Francisco, California (U.S.A.).

PACKAGE OUTLINE

28-lead mini-pack; plastic (SO28; SOT136A); SOT136-1; 1996 August 08.

May 1992 2

Philips Semiconductors Product specification

Sound fader control circuit TEA6310T

May 1992 3

Fig.1 Block diagram.

Philips Semiconductors Product specification

Sound fader control circuit TEA6310T

PINNING

2

2

C-bus)

C-bus)

Fig.2 Pinning diagram.

1 SDA serial data input/output (l

2

2 GNDB ground for l

C-bus terminals
3 QLR output left rear
4 QLF output left front
5 TL treble control capacitor; left channel
6 BL1 bass control capacitor; left channel
7 BL0 bass control capacitor; left channel
8 i.c. internally connected

FAF fader off control input

9

10 i.c. internally connected
11 ELFI electronic filtering for supply
12 i.c. internally connected
13 i.c. internally connected
14 INL input left control part
15 INR input right control part
16 i.c. internally connected
17 i.c. internally connected
18 GND ground
19 i.c. internally connected
20 V

ref

reference voltage (1/2 VCC)
21 i.c. internally connected
22 BR0 bass control capacitor; right channel
23 BR1 bass control capacitor; right channel
24 TR treble control capacitor; right channel
25 QRF output right front
26 QRR output right rear
27 V

CC

supply voltage
28 SCL serial clock input (l

May 1992 4

Philips Semiconductors Product specification

Sound fader control circuit TEA6310T

FUNCTIONAL DESCRIPTION

The AC signal setting is performed by resistor chains in combination with multi-input operational amplifiers.
The advantage of this principle is the combination of low noise, low distortion and a high dynamic range for the circuit.

The separate volume controls of the left and the right channel facilitate correct balance control. The range and balance
control is software programmable.

Because the TEA6310T has four outputs a low level fader is included. The fader control is independent of the volume
control and an extra mute position is built in for the front, the rear or for all channels. The last function may be used for
muting during preset selection. The Fader function can be disabled by an input signal at FAF (pin 9).

An extra pop suppression circuit is built in for pop-free switching on and off. As all switching and control functions are
controllable via the two-wire I2C-bus, no external interface between the micro-computer and the TEA6310T is required.

The on-chip power-on-reset sets the TEA6310T to the general mute mode.

RATINGS

Limiting values in accordance with the Absolute Maximum System (IEC 134)

PARAMETER SYMBOL MIN. MAX. UNIT

Supply voltage (pin 27-18) V
Maximum power dissipation P
Storage temperature range T
Operating ambient temperature range T

CC
tot
stg
amb

− 16 V

− 1W

−55 +150 °C

−40 + 85 °C

May 1992 5

Philips Semiconductors Product specification

Sound fader control circuit TEA6310T

CHARACTERISTICS

= 8,5 V; RS = 600 Ω; RL = 10 kΩ; f = 1 kHz; T

V

CC

PARAMETER SYMBOL MIN. TYP. MAX. UNIT

Supply voltage V
Supply current I
Supply current at 8,5 V I
Supply current at 13,2 V I
DC voltage inputs, outputs and reference V
Internal reference voltage (pin 20); V

= 0,5 V

ref

Maximum voltage gain, bass and treble linear, fader off G
Output voltage level

for P

at the output stage V

max

for start of clipping V

Input sensitivity at V

= 500 mV V

o

Frequency response bass and treble linear; roll-off
frequency −1 dB

Channel separation

= 0 dB; bass and treble linear;

G

v

frequency range 250 Hz to 10 kHz α

Total harmonic distortion

frequency range 20 Hz to 12,5 kHz

= 50 mV; Gv = 20 dB THD − 0,1 0,3 %

V

i

= 500 mV; Gv = 0 dB THD − 0,05 0,2 %

V

i

= 1,6 V; Gv = −10 dB THD − 0,2 0,5 %

V

i

Ripple rejection

< 200 mV; Gv = 0 dB;

V

r(rms)

bass and treble linear;
at f = 100 Hz RR
at f = 40 Hz to 12,5 kHz RR

Signal-to-noise ratio;

bass and treble linear; notes 1 and 2;
CCIR 468-2 weighted; quasi peak;

= 50 mV; Vo= 46 mV; Po= 50 mW S/(S + N) − 65 − dB

V

i

= 500 mV; Vo= 45 mV; Po= 50 mW S/(S + N) − 67 − dB

V

i

= 50 mV; Vo= 200 mV; Po= 1 W S/(S + N) 65 72 − dB

V

i

V

= 500 mV; Vo= 200 mV; Po= 1 W S/(S + N) 65 78 − dB

i

= 50 mV, Vo= 500 mV; Po= 6 W S/(S + N) − 72 − dB

V

i

= 500 mV; Vo= 500 mV; Po= 6 W S/(S + N) − 86 − dB

V

i

Noise output power

mute position, only contribution of
TEA310T, power amplifier for 25 W P

= 25 °C; test circuit Fig.10; unless otherwise specified

amb

7,0 8,5 13,2 V

− 26 − mA

−−30 mA

−−44 mA

0,45 0,5 0,55 V

− 4,25 − V
19 20 21 dB

− 500 − mV

− 1000 − mV

− 50 − mV

35 − 20000 Hz

70 96 − dB

− 70 − dB

− 60 − dB

−−10 nW

CC

CC
CC
CC
CC

DC

V

REF

v

o(rms)

o(rms)

i(rms)

f

r

CS

no

100
range

CC

May 1992 6

Philips Semiconductors Product specification

Sound fader control circuit TEA6310T

PARAMETER SYMBOL MIN. TYP. MAX. UNIT

Crosstalk (20 log V

bus(p-p)/Vo(rms)

between bus inputs and signal outputs

= 0 dB; bass and treble linear; α

G

v

Control part

Input impedance Z
Output impedance Z
Output load resistance R
Output load capacity C
Maximum input voltage;

THD < 0,5%; G

= −10 dB;

v

bass and treble linear V

Noise output voltage;

weighted acc CClR 468-2, quasi peak,
bass and treble linear, fader off;

= 20 dB V

G

v

= 0 dB V

G

v

= −66 dB V

G

v

mute position V

Volume control

Continuous control range G
Step resolution − 2 − dB
Attenuator set error;

= + 20 to −50 dB) ∆G

(G

v

Attenuator set error;

= + 20 to −66 dB) ∆G

(G

v

Gain tracking error; balance in mid position, bass and
treble linear

Mute attenuation α
DC step offset
Between any adjoining step and any step to mute

= 0 to −66 dB − 0,2 10 mV

G

v

= 20 to 0 dB − 215mV

G

v

In any treble and fader position

= 0 to −66 dB −−10 mV

G

v

In any bass position

= 0 to −66 dB −−20 mV

G

v

)

− 110 − dB

35 50 65 kΩ

− 100 150 Ω
5 −−kΩ
0 − 2500 pF

− 2,0 − V

− 110 220 µV

− 25 50 µV

− 19 38 µV

− 11 22 µV

− 86 − dB

−−2dB

−−3dB

−−2dB

76 90 − dB

∆G

B

i

o

L

L

i(rms)

no

no

no

no

c

a

a
t

m

May 1992 7

Philips Semiconductors Product specification

Sound fader control circuit TEA6310T

PARAMETER SYMBOL MIN. TYP. MAX. UNIT

Bass control

Bass control range;

f = 40 Hz; maximum boost G
f = 40 Hz; maximum attenuation G

b
b

Step resolution − 3 − dB
Step error −−0,5 dB

Treble control

Treble control range

f = 15 kHz; maximum boost G
f = 15 kHz; maximum attenuation G
f > 15 kHz; maximum boost G

t
t
t

Step resolution − 3 − dB
Step error −−0,5 dB

14 15 16 dB
11 12 13 dB

11 12 13 dB
11 12 13 dB

−−15 dB

Fader control

Continuous attenuation fader control range G

f

− 30 − dB
Step resolution − 2 − dB
Attenuator set error −−1,5 dB
Mute attenuation α

m

74 84 − dB
Fader enable/disable control (pin 9)
Fader enabled
Input voltage HIGH V

9-18

3 − 12 V
Fader disabled
Input voltage LOW V

9-18

−0,3 − 1,5 V

Input current

HIGH I
LOW I

9
9

−10 −+10 µA

−10 −+10 µA

Digital part

Bus terminals

Input voltage

HIGH V
LOW V

IH
IL

3 − 12 V

−0,3 − 1,5 V

Input current

HIGH I
LOW I

IH
IL

−10 −+10 µA

−10 −+10 µA

Output voltage LOW

= 3 mA V

I

L

OL

−−0,4 V

May 1992 8

Philips Semiconductors Product specification

Sound fader control circuit TEA6310T

PARAMETER SYMBOL MIN. TYP. MAX. UNIT

AC characteristics

in accordance with the I2C-bus specification

Power-on-Reset

When RESET is active the GMU (general mute) bit is set
and the I2C-bus receiver is in RESET position

Increasing supply voltage

start of reset V
end of reset V

CC
CC

Decreasing supply voltage

start of reset V

CC

Notes to the characteristics

1. The indicated values for output power assume a 6 W power amplifier with 20 dB gain, connected to the output of the
circuit. Signal-to-noise ratios exclude noise contribution of the power amplifier.

2. Signal-to-noise ratios on a CCIR 468-2 average meter reading are 4,5 dB better than on CCIR 468-2 quasi peak.

−−2,5 V
5,2 6,0 6,8 V

4,2 5,0 5,8 V

2

I

C-BUS FORMAT

S SLAVE ADDRESS A SUBADDRESS A DATA A P

S = start condition
SLAVE ADDRESS = 10000 0000
A = acknowledge, generated by the slave
SUBADDRESS = see Table 1
DATA = see Table 1
P = STOP condition

If more than 1 byte DATA are transmitted, then auto-increment of the subaddress is performed.

May 1992 9

Philips Semiconductors Product specification

Sound fader control circuit TEA6310T

Table 1 I2C-bus; subaddress/data

FUNCTION SUBADDRESS

D7 D6 D5 D4 D3 D2 D1 D0

volume left 0 0 0 0 0 0 0 0 X X VL5 VL4 VL3 VL2 VL1 VL0
volume right 0 0 0 0 0 0 0 1 X X VR5 VR4 VR3 VR2 VR1 VR0
bass 0 0 0 0 0 0 1 0 X X X X BA3 BA2 BA1 BA0
treble 0 0 0 0 0 0 1 1 X X X X TR3 TR2 TR1 TR0
fader 0 0 0 0 0 1 0 0 X X MFN FCH FA3 FA2 FA1 FA0
switch 0 0 0 0 0 1 0 1 GMU X XXXXXX

Function of the bits:

VL0 to VL5 volume control left
VR0 to VR5 volume control right
BA0 to BA3 bass control
TR0 to TR3 treble control
FA0 to FA3 fader control
FCH select fader channel (front or rear)
MFN mute control of the selected fader channel (front or rear)
GMU mute control (general mute)

for the outputs QLF, QLR, QRF and QRR

X don't care bits (logic 1 during testing)

DATA

Table 2 Bass setting

G

V

DB BA3 BA2 BA1 BA0

+151111
+151110
+151101
+151100
+121011

+91 0 1 0
+61 0 0 1
+31 0 0 0

00 1 1 1

−30 1 1 0

−60 1 0 1

−90 1 0 0

−120011

−120010

−120001

−120000

DATA

Table 3 Treble setting

G

V

DB TR3 TR2 TR1 TR0

+12 1 1 1 1
+12 1 1 1 0
+12 1 1 0 1
+12 1 1 0 0
+12 1 0 1 1

+91 0 1 0
+61 0 0 1
+31 0 0 0

00 1 1 1

−30 1 1 0

−60 1 0 1

−90 1 0 0

−12 0 0 1 1

−12 0 0 1 0

−12 0 0 0 1

−12 0 0 0 0

DATA

May 1992 10

Philips Semiconductors Product specification

Sound fader control circuit TEA6310T

Table 4 Volume setting LEFT

G

V

DB VL5 VL4 VL3 VL2 VL1 VL0

20111111
18111110
16111101
14111100
12111011
10111010

8111001
6111000
4110111
2110110
0110101

−21 10100

−41 10011

−61 10010

−81 10001

−10110000

−12101111

−14101110

−16101101

−18101100

−20101011

−22101010

−24101001

−26101000

−28100111

−30100110

−32100101

DATA

G

V

DB VL5 VL4 VL3 VL2 VL1 VL0

−34100100

−36100011

−38100010

−40100001

−42100000

−44011111

−46011110

−48011101

−50011100

−52011011

−54011010

−56011001

−58011000

−60010111

−62010110

−64010101

−66010100

mute

left

mute

left

..
..
..

mute

left

010011

010010

000000

DATA

May 1992 11

Philips Semiconductors Product specification

Sound fader control circuit TEA6310T

Table 5 Volume setting RIGHT

G

V

DB VR5 VR4 VR3 VR2 VR1 VR0

20111111
18111110
16111101
14111100
12111011
10111010

8111001
6111000
4110111
2110110
0110101

−2110100

−4110011

−6110010

−8110001

−10110000

−12101111

−14101110

−16101101

−18101100

−20101011

−22101010

−24101001

−26101000

−28100111

−30100110

−32100101

DATA

G

V

DB VR5 VR4 VR3 VR2 VR1 VR0

−34100100

−36100011

−38100010

−40100001

−42100000

−44011111

−46011110

−48011101

−50011100

−52011011

−54011010

−56011001

−58011000

−60010111

−62010110

−64010101

−66010100

mute

right

mute

right

..
..
..

mute

right

010011

010010

000000

DATA

May 1992 12

Philips Semiconductors Product specification

Sound fader control circuit TEA6310T

Table 6 Fader function

SETTING DATA

FRONT REAR

DB DB MFN FCH FA3 FA2 FA1 FA0

fader off
00111111
00011111

fader front

−20111110

−40111101

−60111100

−80111011

−100111010

−120111001

−140111000

−160110111

−180110110

−200110101

−220110100

−240110011

−260110010

−280110001

−300110000

mute front

−800011110
.. .
.. .
.. .

−800010000

SETTING DATA

FRONT REAR

DB DB MFN FCH FA3 FA2 FA1 FA0

fader off
00101111
00001111

fader rear
0 −2101110
0−4101101
0−6101100
0−8101011
0−10101010
0−12101001
0−14101000
0−16100111
0−18100110
0−20100101
0−22100100
0−24100011
0−26100010
0−28100001
0−30100000

mute rear
0 −80001110

.. .
.. .
.. .

0−80000000

May 1992 13

Table 7 Mute control

MUTE

CONTROL

DATA

GMU

REMARKS

active 1 outputs QLF, QLR

QRF and QRR are
muted

passive 0 no general mute

Philips Semiconductors Product specification

Sound fader control circuit TEA6310T

Fig.3 Bass control without T-pass filter.

Pin numbers in parentheses refer to the bass control, right channel.

May 1992 14

Fig.4 Bass control with T-pass filter.

Fig.5 T-pass filer.

Philips Semiconductors Product specification

Sound fader control circuit TEA6310T

Fig.6 Treble control.

May 1992 15

Fig.7 Output noise voltage (CClR 468-2 weighted: quasi peak).

Philips Semiconductors Product specification

Sound fader control circuit TEA6310T

Fig.8 Signal-to-noise ratio (CClT 468-2 weighted; quasi peak) with a 6 W power amplifier

(gain 20 dB) without noise contribution of the power amplifier (see Fig.9).

May 1992 16

Fig.9 Recommended level diagram; V

= 50 mV, Vo = 500 mV for P

i min

max

.

Philips Semiconductors Product specification

Sound fader control circuit TEA6310T

APPLICATION INFORMATION

May 1992 17

Fig.10 Test and application circuit.

Philips Semiconductors Product specification

Sound fader control circuit TEA6310T

Fig.11 Automatic FADER control; Po = 24 W, V

= 0 V (FADER disabled).

9-18

Fig.12 Automatic FADER control; Po = 2 × 6 W, V

May 1992 18

= 7 V (FADER enabled).

9-18

Philips Semiconductors Product specification

Sound fader control circuit TEA6310T

PACKAGE OUTLINE

SO28: plastic small outline package; 28 leads; body width 7.5 mm

D

c

y

Z

28

pin 1 index

1

e

15

14

w M

b

p

SOT136-1

E

H

E

Q

A

2

A

1

L

p

L

detail X

(A )

A

X

v M

A

A

3

θ

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

mm

OUTLINE
VERSION

SOT136-1

A

max.

2.65

0.10

A

0.30

0.10

0.012

0.004

1

UNIT

inches

Note

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

May 1992 19

0 5 10 mm

A2A

2.45

2.25

0.096

0.089

IEC JEDEC EIAJ

075E06 MS-013AE

0.25

0.01

b

3

p

0.49

0.32

0.36

0.23

0.019

0.013

0.014

0.009

(1)E(1) (1)

cD

18.1

17.7

0.71

0.30

0.69

0.29

REFERENCES

scale

eHELLpQ

7.6

7.4

1.27

0.050

10.65

10.00

0.42

0.39

1.4

0.055

1.1

0.4

0.043

0.016

1.1

1.0

0.043

0.039

0.25

0.25 0.1

0.01

0.01

EUROPEAN

PROJECTION

ywv θ

Z

0.9

0.4

0.035

0.004

0.016

ISSUE DATE

91-08-13

95-01-24

o

8

o

0

Philips Semiconductors Product specification

Sound fader control circuit TEA6310T

SOLDERING
Introduction

There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.

This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in

“IC Package Databook”

our

Reflow soldering

Reflow soldering techniques are suitable for all SO
packages.

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.

Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.

(order code 9398 652 90011).

During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.

A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

Repairing soldered joints

Fix the component by first soldering two diagonally­opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.

Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.

Wave soldering

Wave soldering techniques can be used for all SO
packages if the following conditions are observed:

• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.

• The longitudinal axis of the package footprint must be
parallel to the solder flow.

• The package footprint must incorporate solder thieves at
the downstream end.

May 1992 20

Philips Semiconductors Product specification

Sound fader control circuit TEA6310T

DEFINITIONS

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

2

PURCHASE OF PHILIPS I

C COMPONENTS

2

Purchase of Philips I
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.

C components conveys a license under the Philips’ I2C patent to use the

May 1992 21