Datasheet TEA1067-C2 Datasheet (Philips)

DATA SH EET

Product specification
File under Integrated Circuits, IC03A

June 1990

INTEGRATED CIRCUITS

TEA1067

Low voltage versatile telephone
transmission circuit with dialler
interface

June 1990 2

Philips Semiconductors Product specification

Low voltage versatile telephone
transmission circuit with dialler interface

TEA1067

GENERAL DESCRIPTION

The TEA1067 is a bipolar integrated circuit performing all
speech and line interface functions required in fully
electronic telephone sets. It performs electronic switching
between dialling and speech. The circuit is able to operate
down to a DC line voltage of 1.6 V (with reduced
performance) to facilitate the use of more telephone sets
in parallel.

Features

• Low DC line voltage; operates down to 1.6 V (excluding
polarity guard)

• Voltage regulator with adjustable static resistance

• Provides supply with limited current for external circuitry

• Symmetrical high-impedance inputs (64 kΩ) for

dynamic, magnetic or piezoelectric microphones

• Asymmetrical high-impedance input (32 kΩ) for electret
microphone

• DTMF signal input with confidence tone

• Mute input for pulse or DTMF dialling

• Power down input for pulse dial or register recall

• Receiving amplifier for magnetic, dynamic or

piezoelectric earpieces

• Large gain setting range on microphone and earpiece
amplifiers

• Line current dependent line loss compensation facility
for microphone and earpiece amplifiers

• Gain control adaptable to exchange supply

• DC line voltage adjustment capability

QUICK REFERENCE DATA

PACKAGE OUTLINES

PARAMETER CONDITIONS SYMBOL MIN. TYP. MAX. UNIT

Line voltage I

line

= 15 mA V

LN

3.65 3.9 4.15 V

Line current operating range normal operation

TEA1067 I

line

11 − 140 mA

TEA1067T I

line

11 − 140 mA

with reduced performance I

line

1 − 11 mA

Internal supply current power down

input LOW I

CC

− 1 1.35 mA

input HIGH I

CC

− 55 82 µA

Supply voltage for peripherals I

line

= 15 mA; Ip= 1.4 mA;

mute input HIGH V

CC

2.2 2.4 − V

I

line

= 15 mA; Ip= 0.9 mA;

mute input HIGH V

CC

2.5 −− V

Voltage gain range

microphone amplifier G

v

44 − 52 dB

receiving amplifier G

v

20 − 45 dB

Line loss compensation

gain control range ∆G

v

5.5 5.9 6.3 dB

Exchange supply voltage range V

exch

36 − 60 V

Exchange feeding bridge

resistance range R

exch

0.4 − 1kΩ

TEA1067: 18-lead DIL; plastic (SOT102). SOT102-1; 1998 Jun 18.
TEA1067T: 20-lead mini-pack; plastic (SO20; SOT163A). SOT163-1; 1998 Jun 18.

June 1990 3

Philips Semiconductors Product specification

Low voltage versatile telephone
transmission circuit with dialler interface

TEA1067

Fig.1 Block diagram.

Figures in parenthesis refer to TEA1067T.

handbook, full pagewidth

+

MGR082

CURRENT

REFERENCE

LOW

VOLTAGE

CIRCUIT

AGC

CIRCUIT

SUPPLY AND
REFERENCE

16 (18)10 (11)

V

EE

REG AGC STAB SLPE

GAS2

GAS1

QR−

QR+

GAR

LN

V

CC

12 (14)

14 (16)

13 (15)

dB

dB

(1)

7 (7)

8 (9)

+

−

+

−

17 (19) 9 (10) (20)18

11 (12)

IR

MIC+
MIC−

DTMF

MUTE

PD

+

−

+−+

−

+

−

−

(1)1

15 (17)

TEA1067
TEA1067T

(6) 6

(5) 5
(4) 4

(2) 2

(3) 3

June 1990 4

Philips Semiconductors Product specification

Low voltage versatile telephone
transmission circuit with dialler interface

TEA1067

PINNING

Fig.2 Pinning diagram for TEA1067 18-lead DIL

version.

handbook, halfpage

LN
GAS1
GAS2

QR−
QR+

GAR
MIC−
MIC+

STAB

SLPE
AGC
REG

V

CC

DTMF
PD

MUTE

IR
V

EE

1
2
3
4
5
6
7
8
9

10

11

12

18
17
16
15
14
13

TEA1067

MGR084

1 LN positive line terminal
2 GAS1 gain adjustment; transmitting amplifier
3 GAS2 gain adjustment; transmitting amplifier
4QR− inverting output; receiving amplifier
5QR+ non-inverting output receiving amplifier
6 GAR gain adjustment; receiving amplifier
7 MIC− inverting microphone input
8 MIC+ non-inverting microphone input
9 STAB current stabilizer

10 V

EE

negative line terminal
11 IR receiving amplifier input
12 PD power-down input
13 DTMF dual-tone multi-frequency input
14 MUTE mute input
15 V

CC

positive supply decoupling
16 REG voltage regulator decoupling
17 AGC automatic gain control input
18 SLPE slope (DC resistance) adjustment

Fig.3 Pinning diagram for TEA1067T 20-lead

mini-pack version.

handbook, halfpage

1
2
3
4
5
6
7
8
9

10

11

12

20
19
18
17
16
15
14
13

TEA1067T

MGR083

LN
GAS1
GAS2

QR−
QR+

GAR

MIC−

MIC+

STAB

SLPE
AGC
REG

V

CC

DTMF

n.c. n.c.

PD

MUTE

IR
V

EE

1 LN positive line terminal
2 GAS1 gain adjustment; transmitting amplifier
3 GAS2 gain adjustment; transmitting amplifier
4QR− inverting output; receiving amplifier
5QR+ non-inverting output receiving amplifier
6 GAR gain adjustment, receiving amplifier
7 MIC− inverting microphone input
8 n.c. not connected

9 MIC+ non-inverting microphone input
10 STAB current stabilizer
11 V

EE

negative line terminal
12 IR receiving amplifier input
13 n.c. not connected
14 PD power-down input
15 DTMF dual-tone multi-frequency input
16 MUTE mute input
17 V

CC

positive supply decoupling
18 REG voltage regulator decoupling
19 AGC automatic gain control input
20 SLPE slope (DC resistance) adjustment

June 1990 5

Philips Semiconductors Product specification

Low voltage versatile telephone
transmission circuit with dialler interface

TEA1067

FUNCTIONAL DESCRIPTION
Supply: V

CC

, LN, SLPE, REG and STAB

Power for the TEA1067 and its peripheral circuits is usually
obtained from the telephone line. The IC develops its own
supply at V

CC

and regulates its voltage drop. The supply
voltage VCCmay also be used to supply external circuits
e.g. dialling and control circuits.

Decoupling of the supply voltage is performed by a
capacitor between VCCand VEEwhile the internal voltage
regulator is decoupled by a capacitor between REG and
VEE.

The DC current drawn by the device will vary in
accordance with varying values of the exchange voltage
(V

exch

), the feeding bridge resistance (R

exch

), and the DC

resistance of the telephone line (R

line

).

The TEA1067 has an internal current stabilizer working at
a level determined by a 3.6 kΩ resistor connected
between STAB and VEE(see Fig.7). When the line current
(I

line

) is more than 0.5 mA greater than the sum of the IC
supply current (ICC) and the current drawn by the
peripheral circuitry connected to VCC(Ip) the excess
current is shunted to VEEvia LN.
The regulated voltage on the line terminal (VLN) can be
calculated as:

VLN=V

ref

+ I

SLPE

× R9; or

VLN= V

ref

+ [(I

line

− ICC− 0.5 × 10−3A) − Ip] × R9

Where V

ref

is an internally generated temperature
compensated reference voltage of 3.6 V and R9 is an
external resistor connected between SLPE and VEE.

In normal use the value of R9 would be 20Ω. Changing the
value of R9 will also affect microphone gain, DTMF gain,
gain control characteristics, side-tone level and maximum
output swing on LN, and the DC characteristics (especially
at the lower voltages).

Under normal conditions, when I

SLPE

>> ICC+ 0.5 mA + Ip,
the static behaviour of the circuit is that of a 3.6 V regulator
diode with an internal resistance equal to that of R9. In the
audio frequency range the dynamic impedance is largely
determined by R1. Fig.4 shows the equivalent impedance
of the circuit.

At line currents below 9 mA the internal reference voltage
is automatically adjusted to a lower value (typically 1.6 V
at 1 mA). This means that the operation of more sets in
parallel is possible with DC line voltages (excluding the
polarity guard) down to an absolute minimum voltage of

1.6 V. With line currents below 9 mA the circuit has limited
sending and receiving levels. The internal reference
voltage can be adjusted by means of an external resistor
(RVA). This resistor connected between LN and REG will
decrease the internal reference voltage, connected
between REG and SLPE it will increase the internal
reference voltage.

Current (Ip) available from VCCfor peripheral circuits
depends on the external components used. Fig.10 shows
this current for VCC> 2.2 V. If MUTE is LOW when the
receiving amplifier is driven the available current is further
reduced. Current availability can be increased by
connecting the supply IC (TEA1081) in parallel with R1, as
shown in Fig.17 (c), or by increasing the DC line voltage by
means of an external resistor (RVA) connected between
REG and SLPE.

June 1990 6

Philips Semiconductors Product specification

Low voltage versatile telephone
transmission circuit with dialler interface

TEA1067

Microphone inputs (MIC+ and MIC−) and gain
adjustment pins (GAS1 and GAS2)

The TEA1067 has symmetrical microphone inputs. Its
input impedance is 64 kΩ (2 × 32 kΩ) and its voltage gain
is typically 52 dB (when R7 = 68 kΩ, see Fig.14). Dynamic,
magnetic, piezoelectric or electret (with built-in FET source
followers) microphones can be used. Microphone
arrangements are shown in Fig.11.

The gain of the microphone amplifier can be adjusted
between 44 dB and 52 dB to suit the sensitivity of the
transducer in use. The gain is proportional to the value of
R7 which is connected between GAS1 and GAS2. Stability
is ensured by the external capacitor C6 which is connected
between GAS1 and SLPE. The value of C6 is 100 pF but
this may be increased to obtain a first-order low-pass filter.
The cut-off frequency corresponds to the time constant
R7 × C6.

Mute input (MUTE)

When MUTE is HIGH the DTMF input is enabled and the
microphone and receiving amplifier inputs are inhibited.
The reverse is true when MUTE is LOW or open-circuit.
MUTE switching causes only negligible clicking on the
earpiece outputs and line. If the number of parallel sets in
use causes a drop in line current to below 6 mA the speech
amplifiers remain active independent to the DC level
applied to the MUTE input.

Fig.4 Equivalent impedance circuit.

Rp= 16.2 kΩ
L

eq

= C3 × R9 × R

p

handbook, halfpage

MBA454

R9
20 Ω

REG

LN

C3

4.7 µF

R

p

V

ref

L

eq

V

CC

V

EE

C1
100 µF

R1

Dual-tone multi-frequency input (DTMF)

When the DTMF input is enabled dialling tones may be
sent onto the line. The voltage gain from DTMF to LN is
typically 25.5 dB (when R7 = 68 kΩ) and varies with R7 in
the same way as the microphone gain. The signalling
tones can be heard in the earpiece at a low level
(confidence tone).

Receiving Amplifier (IR, QR+, QR− and GAR)

The receiving amplifier has one input (IR), one
non-inverting complementary output (QR+) and an
inverting complementary output (QR−). These outputs
may be used for single-ended or differential drive
depending on the sensitivity and type of earpiece used
(see Fig.12). IR to QR + gain is typically 31 dB (when
R4 = 100 kΩ), this is sufficient for low-impedance
magnetic or dynamic microphones which are suited for
single-ended drive. Using both outputs for differential drive
gives an additional gain of 6 dB. This feature can be used
when the earpiece impedance exceeds 450 Ω
(high-impedance dynamic or piezoelectric types).

The receiving amplifier gain can be adjusted between 20
and 39 dB with single-ended drive and between 26 and
45 dB with differential drive, to match the sensitivity of the
transducer in use. The gain is set with the value of R4
which is connected between GAR and QR+. Overall
receive gain between LN and QR+ is calculated by
substracting the anti-sidetone network attenuation (32 dB)
from the amplifier gain. Two external capacitors C4 and
C7, ensure stability. C4 is normally 100 pF and C7 is
10 × the value of C4. The value of C4 may be increased to
obtain a first-order low-pass filter. The cut-off frequency
will depend on the time constant R4 × C4.
The output voltage of the receiving amplifier is specified for
continuous-wave drive. The maximum output voltage will
be higher under speech conditions where the peak to RMS
ratio is higher.

June 1990 7

Philips Semiconductors Product specification

Low voltage versatile telephone
transmission circuit with dialler interface

TEA1067

Automatic gain control input (AGC)

Automatic line loss compensation is achieved by
connecting a resistor (R6) between AGC and VEE. The
automatic gain control varies the gain of the microphone
amplifier and the receiving amplifier in accordance with the
DC line current. The control range is 5.9 dB. This
corresponds to a line length of 5 km for a 0.5 mm diameter
copper twisted-pair cable with a DC resistance of
176 Ω/km and an average attenuation 1.2 dB/km. Resistor
R6 should be chosen in accordance with the exchange
supply voltage and its feeding bridge resistance (see
Fig.13 and Table 1). The ratio of start and stop currents of
the AGC curve is independent of the value of R6. If no
automatic line loss compensation is required the AGC may
be left open-circuit. The amplifiers, in this condition, will
give their maximum specified gain.

Power-down input (PD)

During pulse dialling or register recall (timed loop break)
the telephone line is interrupted. During these interruptions
the telephone line provides no power for the transmission
circuit or circuits supplied by V

CC

. The charge held on C1
will bridge these gaps. This bridging is made easier by a
HIGH level on the PD input which reduces the typical
supply current from 1 mA to 55 µA and switches off the
voltage regulator preventing discharge through LN. When
PD is HIGH the capacitor at REG is disconnected with the
effect that the voltage stabilizer will have no switch-on
delay after line interruptions. This minimizes the
contribution of the IC to the current waveform during pulse
dialling or register recall. When this facility is not required
PD may be left open-circuit.

Side-tone suppression

The anti-sidetone network, R1//Z

line

, R2, R3, R9 and Z

bal

,
(see Fig.5) suppresses transmitted signal in the earpiece.
Compensation is maximum when the following conditions
are fulfilled:

(a) R9 × R2 = R1 (R3 + [R8//Z

bal

]);

(b) (Z

bal

/ [Z

bal

+ R8]) = (Z

line

/ [Z

line

+ R1])

If fixed values are chosen for R1, R2, R3, and R9 then
condition (a) will always be fulfilled whenR8//Z

bal

 << R3.
To obtain optimum side-tone suppression condition (b)
has to be fulfilled resulting in:

Z

bal

= (R8/R1) Z

line

= k.Z

line

where k is a scale factor;

k = (R8/R1)
The scale factor (k), dependent on the value of R8, is

chosen to meet the following criteria:
(a) Compatibility with a standard capacitor from the E6 or

E12 range for Z

bal

(b)  Z

bal

//R8 << R3 to fulfil condition (a) and thus

ensuring correct anti-sidetone bridge operation
(c)  Z

bal

+ R8 >> R9 to avoid influencing the transmitter

gain
In practice Z

line

varies considerably with the line type and

length. The value chosen for Z

bal

should therefore be for
an average line length thus giving optimum setting for
short or long lines.

June 1990 8

Philips Semiconductors Product specification

Low voltage versatile telephone
transmission circuit with dialler interface

TEA1067

Example

The line balance impedance (Z

bal

) at which the optimum
suppression is present can be calculated by:
suppose Z

line

= 210 Ω+ (1265 Ω//140 nF), representing a
5 km line of 0.5 mm diameter, copper, twisted-pair cable
matched to 600 Ω (176 Ω/km; 38 nF/km).
When k = 0.64 then R8 = 390 Ω;
Z

bal

= 130 Ω+ (820 Ω//220 nF).

The anti-sidetone network for the TEA1060 family shown
in Fig.5 attenuates the signal received from the line by 32
dB before it enters the receiving amplifier. The attenuation
is almost constant over the whole audio frequency range.
Fig.6 shows a conventional Wheatstone bridge
anti-sidetone circuit that can be used as an alternative.
Both bridge types can be used with either resistive or
complex set impedances.

More information can be found in the designer guide; 9398 341 10011

Fig.5 Equivalent circuit of TEA1060 anti-sidetone bridge.

handbook, full pagewidth

MSA500

R1

R2

R9

R3

IR

R8

V

EE

SLPE

LN

Z

line

R

t

i

m

Z

bal

Fig.6 Equivalent circuit of an anti-sidetone network in a Wheatstone bridge configuration.

handbook, full pagewidth

MSA501

R1

R9

IR

R8

V

EE

SLPE

LN

Z

line

R

t

i

m

R

A

Z

bal

June 1990 9

Philips Semiconductors Product specification

Low voltage versatile telephone
transmission circuit with dialler interface

TEA1067

RATINGS

Limiting values in accordance with the Absolute Maximum System (IEC 134)

Notes

1. Mostly dependent on the maximum required T

amb

and on the voltage between LN and SLPE.
See Figs 7 and 8 to determine the current as a function of the required voltage and the
temperature.

2. Calculated for the maximum ambient temperature specified T

amb

= 75 °C and a maximum

junction temperature of 125 °C.

THERMAL RESISTANCE

PARAMETER CONDITIONS SYMBOL MIN. MAX. UNIT

Positive continuous line voltage V

LN

− 12 V

Repetitive line voltage during

switch-on line interruption V

LN

− 13.2 V

Repetitive peak line voltage for a

1 ms pulse per 5 s R9 = 20 Ω;

R10 = 13 Ω
(Fig.16) V

LN

− 28 V

Line current TEA1067 (note 1) R9 = 20 Ω I

line

− 140 mA

Line current TEA1067T (note 1) R9 = 20 Ω I

line

− 140 mA

Voltage on all other pins V

i

− VCC+ 0.7 V

−V

i

− 0.7 V

Total power dissipation (note 2) R9 = 20 Ω

TEA1067 P

tot

− 769 mW

TEA1067T P

tot

− 550 mW

Storage temperature range T

stg

−40 + 125 °C

Operating ambient temperature range T

amb

−25 + 75 °C

Junction temperature T

j

−+ 125 °C

From junction to ambient in free air

TEA1067 R

th j-a

typ. 65 K/W

TEA1067T mounted on glass epoxy board 41 × 19 × 1.5 mm R

th j-a

typ. 90 K/W

June 1990 10

Philips Semiconductors Product specification

Low voltage versatile telephone
transmission circuit with dialler interface

TEA1067

Fig.7 TEA1067 safe operating area.

T

amb

P

tot

(1) 45 °C 1231 mW
(2) 55 °C 1077 mW
(3) 65 °C 923 mW
(4) 75 °C 769 mW

handbook, halfpage

212

160

40

80

120

60

100

140

MBH133

46810

VLN-V

SLPE

(V)

I

LN

(mA)

(1)

(2)

(3)

(4)

Fig.8 TEA1067T safe operating area.

T

amb

P

tot

(1) 45 °C 888 mW
(2) 55 °C 777 mW
(3) 65 °C 666 mW
(4) 75 °C 555 mW

handbook, halfpage

212

150

30

70

110

50

90

130

MSA546

46810

VLN-V

SLPE

(V)

(2)

(3)

(4)

(1)

I

LN

(mA)

June 1990 11

Philips Semiconductors Product specification

Low voltage versatile telephone
transmission circuit with dialler interface

TEA1067

CHARACTERISTICS

I

line

= 11 to 140 mA; VEE= 0 V; f = 800 Hz; T

amb

=25°C; unless otherwise specified

PARAMETER CONDITION SYMBOL MIN. TYP. MAX. UNIT

Supply; LN and V

CC

Voltage drop over circuit,

between LN and V

EE

microphone inputs open
I

line

= 1 mA V

LN

− 1.6 − V

I

line

= 4 mA V

LN

1.75 2.0 2.25 V

I

line

= 7 mA V

LN

2.25 2.8 3.35 V

I

line

= 11 mA V

LN

3.55 3.8 4.05 V

I

line

= 15 mA V

LN

3.65 3.9 4.15 V

I

line

= 100 mA V

LN

4.9 5.6 6.5 V

I

line

= 140 mA V

LN

−−7.5 V

Variation with temperature I

line

= 15 mA ∆VLN/∆T −3 −1 1 mV/K

Voltage drop over circuit,

between LN and V

EE

with

external resistor R

VA

I

line

= 15 mA;

R

VA

(LN to REG)
= 68 kΩ 3.1 3.4 3.7 V
I

line

= 15 mA;
R

VA

(REG to SLPE)
= 39 kΩ 4.2 4.5 4.8 V

Supply current PD = LOW;

V

CC

= 2.8 V I

CC

− 1.0 1.35 mA

Supply current PD = HIGH;

V

CC

= 2.8 V I

CC

− 55 82 µA

Supply voltage available for

peripheral circuitry I

line

= 15 mA;
MUTE = HIGH
I

p

= 1.4 mA V

CC

2.2 2.4 − V

I

p

= 0 mA V

CC

2.95 3.2 − V

Microphone inputs
MIC+ and MIC−

Input impedance (differential)

between MIC− and MIC+ Z

i

 51 64 77 kΩ

Input impedance (single-ended)

MIC− or MIC+ to V

EE

 Zi 25.5 32 38.5 kΩ

Common mode rejection ratio k

CMR

− 82 − dB

Voltage gain

MIC+/MIC− to LN I

line

= 15 mA;
R7 = 68 kΩ G

v

51 52 53 dB

June 1990 12

Philips Semiconductors Product specification

Low voltage versatile telephone
transmission circuit with dialler interface

TEA1067

Gain variation with frequency

at f = 300 Hz
and f = 3400 Hz w.r.t 800 Hz ∆G

vf

−0.5 ± 0.2 +0.5 dB

Gain variation with temperature

at −25 °C
and + 75 °C w.r.t. 25 °C

without R6;
I

line

= 50 mA ∆G

vT

−±0.2 − dB

Dual-tone multi-frequency
input DTMF

Input impedance  Z

i

 16.8 20.7 24.6 kΩ

Voltage gain from DTMF to LN I

line

= 15 mA;
R7 = 68 kΩ G

v

24.5 25.5 26.5 dB

Gain variation with frequency

at f = 300 Hz and f = 3400 Hz w.r.t. 800 Hz ∆G

vf

−0.5 ±0.2 +0.5 dB

Gain variation with temperature

at −25 °C and +75 °C w.r.t. 25 °C

I

line

= 50 mA ∆G

vT

−±0.2 − dB

Gain adjustment
GAS1 and GAS2

Gain variation of the

transmitting amplifier by
varying R7 between GAS1
and GAS2 ∆G

v

−8 − 0dB

Sending amplifier output LN

Output voltage I

line

= 15 mA
THD = 2% V

LN(rms)

− 1.9 − V

THD = 10% V

LN(rms)

1.9 2.2 − V

I

line

= 4 mA;
THD = 10% V

LN(rms)

− 0.8 − V

I

line

= 7 mA;
THD = 10% V

LN(rms)

− 1.4 − V

Noise output voltage I

line

= 15 mA;
R7 = 68 kΩ;
200 Ω between
MIC− and MIC+;
psophometrically
weighted (P53 curve) V

no(rms)

−−72 − dBmp

Receiving amplifier input IR

Input impedance  Zi 17 21 25 kΩ

PARAMETER CONDITION SYMBOL MIN. TYP. MAX. UNIT

June 1990 13

Philips Semiconductors Product specification

Low voltage versatile telephone
transmission circuit with dialler interface

TEA1067

Receiving amplifier outputs
QR+ and QR−

Output impedance

(single-ended)  Z

o

−4−Ω

Voltage gain from IR to

QR+ or QR− I

line

= 15 mA
R4 = 100 kΩ

single-ended RL(from QR+ or

QR−) = 300 Ω G

v

30 31 32 dB

differential R

L

(from QR+ or

QR−) = 600 Ω G

v

36 37 38 dB

Gain variation with frequency

at f = 300 Hz
and f = 3400 Hz w.r.t. 800 Hz ∆G

vf

−0.5 −0.2 0 dB

Gain variation with temperature

at −25 °C and +75 °C w.r.t. 25 °C

without R6;
I

line

= 50 mA ∆G

vT

−±0.2 − dB

Output voltage sinewave drive

I

line

= 15 mA;
I

p

= 0 mA; THD = 2%

R4 = 100 kΩ

single-ended RL = 150 Ω V

o(rms)

0.25 0.29 − V

RL = 450 Ω V

o(rms)

0.45 0.55 − V

differential f = 3400 Hz;

series R = 100 Ω;
C

L

= 47 nF V

o(rms)

0.65 0.80 − V

Output voltage THD = 10%;

RL = 150 Ω
R4 = 100 kΩ
I

line

= 4 mA V

o(rms)

− 15 − mV

I

line

= 7 mA V

o(rms)

− 130 − mV

Noise output voltage I

line

= 15 mA;
R4 = 100 kΩ;
IR open-circuit
psophometrically
weighted; (P53 curve)

single-ended RL = 300 Ω V

no(rms)

− 50 −µV

differential RL = 600 Ω V

no(rms)

− 100 −µV

PARAMETER CONDITION SYMBOL MIN. TYP. MAX. UNIT

June 1990 14

Philips Semiconductors Product specification

Low voltage versatile telephone
transmission circuit with dialler interface

TEA1067

Gain adjustment GAR

Gain variation of receiving

amplifier achievable by
varying R4 between
GAR and QR ∆G

v

−11 −+8dB

Mute input

Input voltage HIGH V

IH

1.5 − V

CC

V

Input voltage LOW V

IL

−−0.3 V

Input current I

MUTE

− 815µA

Gain reduction

MIC+ or MIC− to LN MUTE = HIGH ∆G

v

− 70 − dB

Voltage gain from DTMF

to QR+ or QR− MUTE = HIGH;

R4 = 100 kΩ;
single-ended;
R

L

= 300 Ω G

v

−21 −19 −17 dB

Power-down input PD

Input voltage HIGH V

IH

1.5 − V

CC

V

Input voltage LOW V

IL

−−0.3 V

Input current I

PD

− 510µA

Automatic gain control
input AGC

Controlling the gain
from IR to QR+/QR− and
the gain from MIC+/MIC−
to LN; R6 between AGC
and V

EE

R6 = 110 kΩ

Gain control range I

line

= 70 mA ∆G

v

−5.5 −5.9 −6.3 dB

Highest line current for

maximum gain I

line

− 23 − mA

Minimum line current for

minimum gain I

line

− 61 − mA

Reduction of gain between

I

line

= 15 mA and

I

line

= 35 mA ∆G

v

−1.0 −1.5 −2.0 dB

PARAMETER CONDITION SYMBOL MIN. TYP. MAX. UNIT

June 1990 15

Philips Semiconductors Product specification

Low voltage versatile telephone
transmission circuit with dialler interface

TEA1067

Fig.9 Supply arrangement.

handbook, full pagewidth

MBH123

R

exch

R

line

I

line

V

exch

DC
AC

REG

C3 R5

R9

STAB SLPE

LN V

CC

V

EE

0.5 mA

R1

I

SLPE

I

SLPE

+ 0.5 mA

I

CC

C1

peripheral

circuits

I

p

TEA1067

Fig.10 Typical current Ipavailable from VCCfor peripheral circuitry with VCC≥ 2.2 V.

Curve (a) is valid when the receiving amplifier is not driven or when MUTE = HIGH,
curve (b) is valid when MUTE = LOW and the receiving amplifier is driven;
V

o(rms)

= 150 mV, RL= 150 Ω asymmetrical. The supply possibilities can be increased

simply by setting the voltage drop over the circuit V

LN

to a higher value by means of

resistor R

VA

connected between REG and SLPE.

(a) Ip= 1.8 mA
(b) Ip= 1.35 mA
I

line

= 15 mA at VLN= 3.9 V

R1 = 620 Ω and R9 = 20 Ω.

handbook, halfpage

012 4

0

2

MGR085

3

1

VCC (V)

I

P

(mA)

a

b

June 1990 16

Philips Semiconductors Product specification

Low voltage versatile telephone
transmission circuit with dialler interface

TEA1067

Fig.11 Alternative microphone arrangements.

(a) Magnetic or dynamic microphone. The resistor marked (1) may be connected to decrease
the terminating impedance.

(b) Electret microphone.
(c) Piezoelectric microphone.

handbook, full pagewidth

MGR086

V

EE

V

CC

(1)

(a) (b)

(c)

MIC+

MIC−

MIC−

MIC+

MIC−

MIC+

Fig.12 Alternative receiver arrangements.

(a) Dynamic earpiece with less than 450 Ω impedance.
(b) Dynamic earpiece with more than 450 Ω impedance.
(c) Magnetic earpiece with more than 450 Ω impedance. The resistor marked (1) may be connected

to prevent distortion (inductive load).
(d) Piezoelectric earpiece. The resistor marked (2) is required to increase the phase margin

(capacitive load).

handbook, full pagewidth

MGR087

(1) (2)

QR−

QR+

V

EE

QR−

QR+

QR−

QR+

QR−

QR+

(a) (b) (c) (d)

June 1990 17

Philips Semiconductors Product specification

Low voltage versatile telephone
transmission circuit with dialler interface

TEA1067

Fig.13 Variation of gain with line current, with R6 as a parameter.

handbook, full pagewidth

MSA507

−6

−4

−2

0

∆G

v

(dB)

140120100806040200

78.7 kΩ

110 kΩ 140 kΩ

R9 = 20 Ω

R6 =

∞

I

line

(mA)

Table 1 Values of resistor R6 for optimum line loss

compensation, for various usual values of
exchange supply voltage (V

exch

) and exchange

feeding bridge resistance (R

exch

); R9 = 20 Ω.

R

exch

(Ω)

400 600 800 1000

R6 (kΩ)

V

exch

36 100 78.7 X X

(V) 48 140 110 93.1 82

60 X X 120 102

June 1990 18

Philips Semiconductors Product specification

Low voltage versatile telephone
transmission circuit with dialler interface

TEA1067

handbook, full pagewidth

MGR088

V

CC

LN

PD

MUTE

DTMF

MIC−

MIC+

IR

620 Ω

TEA1067

R4

100

kΩ

R

L

600 Ω

I

line

C4
100 pF

C7 1 nF

1 to

140 mA

100 µF

C1

100 µF

R7
68
kΩ

C6
100 pF

R1

QR−

QR+

GAR

GAS1

GAS2

V

o

V

EE

REG AGC STAB

R9
20 Ω

R5

3.6
kΩ

R6

C3

4.7
µF

SLPE

10 µF

V

i

V

i

Fig.14 Test circuit for defining voltage gain of MIC+, MIC− and DTMF inputs.

Voltage gain is defined as: Gv= 20 log  Vo/Vi. For measuring the gain from
MIC+ and MIC− the MUTE input should be LOW or open, for measuring the
DTMF input MUTE should be HIGH. Inputs not under test should be open.

Fig.15 Test circuit for defining voltage gain of the receiving amplifier.

handbook, full pagewidth

MGR089

V

CC

LN

PD

MUTE

DTMF

MIC−

MIC+

IR

620 Ω

TEA1067

R4

100

kΩ

600 Ω

I

line

C4
100 pF

C7 1 nF

1 to

140 mA

100 µF

C1

100 µF

R7

C6
100 pF

10 µF

10 µF

R1

Z

L

QR−

QR+

GAR

GAS1

GAS2

V

i

V

o

V

EE

REG AGC STAB

R9
20 Ω

R5

3.6
kΩ

R6

C3

4.7
µF

SLPE

Voltage gain is defined as: Gv= 20 log  Vo/Vi.

June 1990 19

Philips Semiconductors Product specification

Low voltage versatile telephone
transmission circuit with dialler interface

TEA1067

APPLICATION INFORMATION

Fig.16 Typical application of the TEA1067, shown here with a piezoelectric earpiece and DTMF dialling.

The bridge to the left, the zener diode and R10 limit the current into the circuit
and the voltage across the circuit during line transients. Pulse dialling or
register recall require a different protection arrangement.
The DC line voltage can be set to a higher value by the resistor R

VA

(REG to

SLPE).

handbook, full pagewidth

MGR090

620 Ω

R1

MIC−

MIC+

GAR

QR−

IR

QR+

SLPE

MUTE

PD

GAS1

LN V

CC

GAS2 REG AGC STAB

V

EE

DTMF

390 Ω

R8

R6

+

−

C3

4.7
µF

R9

20 Ω

R5

3.6
kΩ

R7

C5

100 nF

Z

bal

100 pF

C6

R3

3.92
kΩ

R2
130 kΩ

BZX79-

C12

BAS11

(2×)

BZW14

(2×)

telephone

line

R10
13 Ω

R

VA

C1
100
µF

TEA1067

R4

R11

C4

100

pF

C7

1 nF

from dial

and

control circuits

June 1990 20

Philips Semiconductors Product specification

Low voltage versatile telephone
transmission circuit with dialler interface

TEA1067

Fig.17 Typical applications of the TEA1067 (simplified).

(a) DTMF-Pulse set with CMOS dialling circuit PCD3310.
The dashed lines show an optional flash (register recall by timed loop break).

(b) Pulse dial set with one of the PCD3320 family of CMOS interrupted current-loop dialling circuits.
(c) Dual-standard (pulse and DTMF) feature phone with the PCD3343 CMOS controller and the

PCD3312 CMOS DTMF generator with I

2

C-bus. Supply is provided by the TEA1081 supply circuit.

handbook, full pagewidth

MGR091

TEA1067

TEA1081

telephone

line

cradle

contact

BST76

V

EE

LN V

CC

DTMF
MUTE

PD

PCD3343

V

SS

V

DD

M
DP/FL

DTMF

I2C-bus

TEA1067

telephone

line

cradle

contact

BST76

V

EE

LN V

CC

DTMF
MUTE

PD

PCD3310

V

SS

V

DD

M

DTMF

FL

(a)

(b)

(c)

TEA1067

telephone

line

cradle

contact

BST76

V

EE

LN V

CC

DTMF
MUTE

PD

PCD3320

FAMILY

V

SS

V

DD

M
DP

PCD3312

June 1990 21

Philips Semiconductors Product specification

Low voltage versatile telephone
transmission circuit with dialler interface

TEA1067

PACKAGE OUTLINES

REFERENCES

OUTLINE

VERSION

EUROPEAN

PROJECTION

ISSUE DATE

IEC JEDEC EIAJ

SOT102-1

93-10-14
95-01-23

UNIT

A

max.

12

b

1

(1) (1)

(1)

b

2

cD E e M

Z

H

L

mm

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

A

min.

A

max.

b

max.

w

M

E

e

1

1.40

1.14

0.53

0.38

0.32

0.23

21.8

21.4

6.48

6.20

3.9

3.4

0.2542.54 7.62

8.25

7.80

9.5

8.3

0.854.7 0.51 3.7

inches

0.055

0.044

0.021

0.015

0.013

0.009

1.40

1.14

0.055

0.044

0.86

0.84

0.26

0.24

0.15

0.13

0.010.10 0.30

0.32

0.31

0.37

0.33

0.0330.19 0.020 0.15

M

H

c

(e )

1

M

E

A

L

seating plane

A

1

w M

b

1

b

2

e

D

A

2

Z

18

1

10

9

b

E

pin 1 index

0 5 10 mm

scale

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

DIP18: plastic dual in-line package; 18 leads (300 mil)

SOT102-1

June 1990 22

Philips Semiconductors Product specification

Low voltage versatile telephone
transmission circuit with dialler interface

TEA1067

UNIT

A

max.

A

1

A2A

3

b

p

cD

(1)E(1) (1)

eHELLpQ

Z

ywv θ

REFERENCES

OUTLINE
VERSION

EUROPEAN

PROJECTION

ISSUE DATE

IEC JEDEC EIAJ

mm

inches

2.65

0.30

0.10

2.45

2.25

0.49

0.36

0.32

0.23

13.0

12.6

7.6

7.4

1.27

10.65

10.00

1.1

1.0

0.9

0.4

8
0

o
o

0.25 0.1

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

Note

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

1.1

0.4

SOT163-1

10

20

w M

b

p

detail X

Z

e

11

1

D

y

0.25

075E04 MS-013AC

pin 1 index

0.10

0.012

0.004

0.096

0.089

0.019

0.014

0.013

0.009

0.51

0.49

0.30

0.29

0.050

1.4

0.055

0.419

0.394

0.043

0.039

0.035

0.016

0.01

0.25

0.01

0.004

0.043

0.016

0.01

0 5 10 mm

scale

X

θ

A

A

1

A

2

H

E

L

p

Q

E

c

L

v M

A

(A )

3

A

SO20: plastic small outline package; 20 leads; body width 7.5 mm

SOT163-1

95-01-24
97-05-22

June 1990 23

Philips Semiconductors Product specification

Low voltage versatile telephone
transmission circuit with dialler interface

TEA1067

SOLDERING
Introduction

There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.

This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our

“Data Handbook IC26; Integrated Circuit Packages”

(order code 9398 652 90011).

DIP

S

OLDERING BY DIPPING OR BY WAVE

The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joint for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.

The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (T

stg max

). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.

R

EPAIRING SOLDERED JOINTS

Apply a low voltage soldering iron (less than 24 V) to the
lead(s) of the package, below the seating plane or not
more than 2 mm above it. If the temperature of the
soldering iron bit is less than 300 °C it may remain in
contact for up to 10 seconds. If the bit temperature is
between 300 and 400 °C, contact may be up to 5 seconds.

SO

REFLOW SOLDERING
Reflow soldering techniques are suitable for all SO

packages.
Reflow soldering requires solder paste (a suspension of

fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.

Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.

Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.

W

AVE SOLDERING

Wave soldering techniques can be used for all SO
packages if the following conditions are observed:

• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.

• The longitudinal axis of the package footprint must be
parallel to the solder flow.

• The package footprint must incorporate solder thieves at
the downstream end.

During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.

A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

R

EPAIRING SOLDERED JOINTS

Fix the component by first soldering two diagonally­opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.

June 1990 24

Philips Semiconductors Product specification

Low voltage versatile telephone
transmission circuit with dialler interface

TEA1067

DEFINITIONS

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

June 1990 25

Philips Semiconductors Product specification

Low voltage versatile telephone
transmission circuit with dialler interface

TEA1067

NOTES

June 1990 26

Philips Semiconductors Product specification

Low voltage versatile telephone
transmission circuit with dialler interface

TEA1067

NOTES

June 1990 27

Philips Semiconductors Product specification

Low voltage versatile telephone
transmission circuit with dialler interface

TEA1067

NOTES

Internet: http://www.semiconductors.philips.com

Philips Semiconductors – a worldwide company

© Philips Electronics N.V. 1998 SCA60
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.

Middle East: see Italy
Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,

Tel. [phone], Fax. [phone]
New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,

Tel. [phone], Fax. [phone]
Norway: Box 1, Manglerud 0612, OSLO,

Tel. [phone], Fax. [phone]

Pakistan: see Singapore
Philippines: Philips Semiconductors Philippines Inc.,

106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. [phone], Fax. [phone]

Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA,
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Romania: see Italy
Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,

Tel. [phone], Fax. [phone]
Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762,

Tel. [phone], Fax. [phone]

Slovakia: see Austria
Slovenia: see Italy
South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,

2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000,
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South America: Al. Vicente Pinzon, 173, 6th floor,
04547-130 SÃO PAULO, SP, Brazil,
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Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. [phone] Fax. [phone]

Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,
TAIPEI, Taiwan Tel. [phone], Fax. [phone]

Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
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Tel. [phone], Fax. [phone]

Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,
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Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
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United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. [phone], Fax. [phone]

United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. [phone]

Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,

Tel. [phone], Fax.[phone]

For all other countries apply to: Philips Semiconductors,
International Marketing & Sales Communications, Building BE-p, P.O. Box 218,
5600 MD EINDHOVEN, The Netherlands, Fax. [phone]

Argentina: see South America
Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,

Tel. [phone], Fax. [phone]
Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. [phone],

Fax. [phone]
Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6,

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Belgium: see The Netherlands
Brazil: seeSouth America
Bulgaria: Philips Bulgaria Ltd., Energoproject, 15thfloor,

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Canada: PHILIPS SEMICONDUCTORS/COMPONENTS,
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Colombia: see South America
Czech Republic: see Austria
Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S,

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Tel. [phone], Fax. [phone]
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Tel. [phone], Fax. [phone]
Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS,

Tel. [phone], Fax. [phone]

Hungary: seeAustria
India: Philips INDIA Ltd, Band Box Building, 2nd floor,

254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025,
Tel. [phone], Fax. [phone]

Indonesia: PT Philips Development Corporation, Semiconductors Division,
Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510,
Tel. [phone] ext. 2501, Fax. [phone]

Ireland: Newstead, Clonskeagh, DUBLIN 14,
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Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053,
TEL AVIV 61180, Tel. [phone], Fax. [phone]

Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3,
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Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku,
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Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,
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Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,
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Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,
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Printed in The Netherlands 415102/00/02/pp28 Date of release: June 1990 Document order number: 9397 750 nnnnn