Datasheet TEA0678 Datasheet (Philips)

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INTEGRATED CIRCUITS

DATA SH EET

TEA0678

Dual Dolby* B-type noise reduction
circuit, automatic music search,
with differential outputs and mute

Preliminary specification
Supersedes data of August 1993
File under Integrated Circuits, IC01

1996 Jun 06

Philips Semiconductors Preliminary specification

Dual Dolby* B-type noise reduction circuit, automatic
music search, with differential outputs and mute

FEATURES

• Dual noise reduction (NR) channels

• Head pre-amplifiers

• Reverse head switching

• Automatic Music Search (AMS)

• Mute position

• Equalization with electronically switched time constants

• Dolby reference level = 387.5 mV

• 32 pins

• Switch inputs TTL compatible

• Differential output stage has:

– Capability to drive 1.2 nF capacitive load
– Capability to drive 1 kΩ load
– Short-circuit proof
– Short-circuit proof to 16 V via coupling capacitor.

• Improved EMC behaviour.

GENERAL DESCRIPTION

The TEA0678 is a bipolar integrated circuit that provides
two channels of Dolby B noise reduction for playback
applications in car radios. It includes head and
equalization amplifiers with electronically switchable time
constants. Furthermore it includes electronically
switchable inputs for tape drivers with reverse heads.
This device also detects pauses of music in Automatic
Music Search (AMS) mode, with a delay time fixed
externally by a resistor. The short-circuit proof output
stage of the TEA0678 is differential and provides muting.
The device will operate with power supplies in the range of

7.6 to 12 V, output overload level increasing with increase
in supply voltage. Current drain varies with supply voltage,
noise reduction on/off and AMS on/off so it is advisable to
use a regulated power supply or a supply with a long time
constant.
.Current drain varies with these variables:

Supply voltage
Noise reduction on/off
AMS on/off.

TEA0678

Because of this current drain variation it is advisable to use
a regulated power supply or a supply with a long time
constant.

QUICK REFERENCE DATA

SYMBOL PARAMETER MIN. TYP. MAX. UNIT

V

CC

I

CC

SN+

-------------­N

ORDERING INFORMATION

TYPE

NUMBER

TEA0678 SDIP32
TEA0678T SO32 plastic small outline package; 32 leads; body width 7.5 mm SOT287-1

Remark Dolby*: Available only to licensees of Dolby Laboratories Licensing Corporation, San Francisco, CA94111,
USA, from whom licensing and application information must be obtained. Dolby is a registered trade-mark of Dolby
Laboratories Licensing Corporation.

supply voltage 7.6 10 12 V
supply current − 25 28 mA
signal plus noise-to-noise ratio 78 84 − dB

PACKAGE

NAME DESCRIPTION VERSION

plastic shrink dual in-line package; 32 leads (400 mil)

SOT232-1

1996 Jun 06 2

Philips Semiconductors Preliminary specification

Dual Dolby* B-type noise reduction circuit, automatic
music search, with differential outputs and mute

BLOCK DIAGRAM

pF

input

head switch

LOW: INPUT 1

10 µF

180 Ω

470

from

HIGH: INPUT 2

microprocessor

pF

470

1 kΩ

10

kΩ

330

nF

17

18

TEA0678

19

PRE

AMP.

20

21

kΩ

8.2
EQ

22

AMP.

GND

ref

V

POWER

SUPPLY

CC

V

PRE

TEA0678

MED769

pF

470

100

µF

15 16

14

pF

470

AMP.

10 µF

13

CC

V

12

10

kΩ

EQ

AMP.

8.2

11

180 Ω

1 kΩ

nF

kΩ

330

EQ switch from

microprocessor

handbook, full pagewidth

24

ref

V

from

microprocessor

LOW: MUTE ON

HIGH: MUTE OFF

18

kΩ

15 nF

23

24

AMS

25

LEVEL

PROCESSOR

DELAY

DETECTOR

TIME

910

15 nF

8

out

LOW: 120 µs

OPEN: 70 µs

AMS

kΩ

4.7 nF

AMS

t

R

4.7 nF

delay

time

24 

kΩ

ref

V

Fig.1 Block and application diagram.

180 kΩ

26

nF

100

270 kΩ

27

nF

330

1 µF

10

µF

27

kΩ

output 

B+

L

R

L

C

L

R

B−

output

28

29

30

4.7 µF
31

32

4.7 µF

DOLBY B NR CIRCUIT

AMS

15

LOGIC

kΩ

DOLBY B NR CIRCUIT

7

NR

EQ

MUTE

15

HEAD-

SWITCH

kΩ

6

5

4

23

1

180 kΩ

nF

100

270 kΩ

nF

330

1 µF

from

LOW: NR ON

OPEN: OFF

HIGH: AMS ON

microprocessor

4.7 µF

output 

A+

L

R

L

C

L

R

A−

output 

4.7 µF

1996 Jun 06 3

Philips Semiconductors Preliminary specification

Dual Dolby* B-type noise reduction circuit, automatic
music search, with differential outputs and mute

PINNING

SYMBOL PIN DESCRIPTION

OUTA− 1 negative output channel A
OUTA+ 2 positive output channel A
NR/AMS 3 noise reduction/music search switch
INCA 4 input mute/output stage channel A
OUTCA 5 output Dolby B processor channel A
INTA 6 integrating filter channel A
CONTRA 7 control voltage channel A
HPA 8 high-pass filter channel A
SCA 9 side chain channel A
TD 10 delay time constant
EQA 11 equalizing output channel A
EQFA 12 equalizing feedback channel A
V

CC

13 supply voltage
INA1 14 input channel A1 (forward or reverse)
V

ref

15 reference voltage
INA2 16 input channel A2 (reverse or forward)
INB2 17 input channel B2 (reverse or forward)
HS 18 head switch input
INB1 19 input channel B1 (forward or reverse)
GND 20 ground
EQFB 21 equalizing feedback channel B
EQB 22 equalizing output channel B
AMSEQ 23 AMS output and EQ switch input
SCB 24 side chain channel B
HPB 25 high-pass filter channel B
CONTRB 26 control voltage channel B
INTB 27 integrating filter channel B
OUTCB 28 output Dolby B processor channel B
INCB 29 input mute/output stage channel B
MUTE 30 mute switch
OUTB+ 31 positive output channel B
OUTB− 32 negative output channel B

handbook, halfpage

OUTA−
OUTA+

NR/AMS

OUTCA

CONTRA

1
2
3

INCA

4
5

INTA

6
7

HPA

8

9
10
11
12
13
14
15
16

TEA0678

MED770

SCA

TD

EQA

EQFA

V

CC

INA1

V

ref

INA2

Fig.2 Pin configuration.

TEA0678

OUTB−

32

OUTB+

31

MUTE

30

INCB

29

OUTCB

28

INTB

27

CONTRB

26

HPB

25

SCB

24

AMSEQ

23

EQB

22

EQFB

21

GND

20

INB1

19

HS

18

INB2

17

1996 Jun 06 4

Philips Semiconductors Preliminary specification

Dual Dolby* B-type noise reduction circuit, automatic
music search, with differential outputs and mute

FUNCTIONAL DESCRIPTION
Noise Reduction (NR) is enabled when pin NR/AMS is

connected to ground and disabled when open-circuit (left
floating from a 3-state output).

Dolby noise reduction only operates correctly if 0 dB Dolby
level is adjusted at 387.5 mV.

Automatic Music Search (AMS) is enabled when pin
NR/AMS is connected to HIGH (5 V) and disabled when
open-circuit (left floating from a 3-state output). In AMS
mode the signal of both channels are rectified and then
added. This means, even if one channel signal appears
inverted to the other channel, with the TEA0678 the normal
AMS function is ensured (see Figs 4, 5 and 6).

Equalization time constant switching (70 µs or 120 µs)
is achieved when pin AMSEQ is connected to GND via an
18 kΩ resistor (120 µs), or left open-circuit (70 µs).
This does not affect the AMS output signal during AMS
mode (see Fig.1).

Head switching is achieved when pin HS is connected to
GND (input IN1 active) or connected to HIGH (5 V) level
(input IN2 active). If left open-circuit IN1 is active.

Mute is enabled when pin MUTE is connected to ground
and off when connected to HIGH (5 V) level. For smooth
switching a time constant is recommended. If left
open-circuit MUTE is active.

The differential output stage of each channel is
connected via a provision to the Dolby and pre-amplifier
part. This provision may be used for any processing of the
tape signal or to add another signal. Each output drives a
resistive load of nominal 10 kΩ and is capable of driving
1kΩ, also a capacitive load of 1.2 nF to ground and
between differential outputs. Each output can be
short-circuited to a battery (16 V) via a coupling capacitor
(4.7 µF).

TEA0678

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134); note1.

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

CC

V

i

supply voltage 0 16 V
input voltage (pins 1 to 32) except pin 15 (V

(NR/AMS), pin 18 (HS) and pin 30 (MUTE) to V
input voltage at pin 3 (NR/AMS), pin 18 (HS) and

); pin 3

ref

−0.3 +V

CC

note 2 −0.3 +6.5 V

CC

V

pin 30 (MUTE)

t

short

T

stg

T

amb

V

es

pin 15 (V
storage temperature −55 +150 °C
operating ambient temperature −40 +85 °C
electrostatic handling voltage for all pins note 3 −2+2kV

) to VCC short-circuiting duration − 5s

ref

note 4 −500 +500 V

Notes

1. The device may not operate correctly when subjected to these ratings when the ratings exceed the electrical
characteristics of the device as specified in Chapter “Characteristics”. The device will recover automatically when the
environment is reduced to the requirements of the characteristics.

2. The TEA0678 allows a HIGH-level at switching pins without supply voltage (V

= 0; stand-by mode). This means a

CC

maximum input voltage of 6.5 V for the switching input pins.

3. Human body model (1.5 kΩ, 100 pF).

4. Machine model (0 Ω, 200 pF).

1996 Jun 06 5

Philips Semiconductors Preliminary specification

Dual Dolby* B-type noise reduction circuit, automatic

TEA0678

music search, with differential outputs and mute

CHARACTERISTICS

VCC= 10 V; f = 20 Hz to 20 kHz; T
differential outputs (Vo=Vo+− Vo−), this corresponds to Dolby level 387.5 mV (RMS) (0 dB) at test point (OUTC);
see Fig.1; NR on/AMS off; EQ switch in the 70 µs position; unless otherwise specified.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

CC

I

CC

α

m

G

v

G

mm

supply voltage 7.6 10 12 V
supply current pins 14, 16, 17 and 19 connected to

channel matching f = 1 kHz; Vo= 0 dB; NR off;

voltage gain (output stage) between OUT and OUTC; f = 1 kHz;

voltage gain mismatch
(output stage)

THD total harmonic distortion (2nd

and 3rd harmonic)

H

R

SN+

-------------­N

V

no(rms)

headroom at output VCC= 9 V; THD = 1%; f = 1 kHz 13 −−dB
signal plus noise-to-noise

ratio

equivalent input noise voltage
in decode mode (RMS value)

PSRR power supply ripple rejection V

f

o

frequency response
measured in encode mode;
referenced to TP

α

cs

α

cc

channel separation Vo= +10 dB; f = 1 kHz; see Fig.8 61 67 − dB
crosstalk between active and

inactive input

R

L

load resistance at each output
OUTA+, OUTA−, OUTB+ and
OUTB− (corresponds to 2 kΩ
at differential output)

C

L

capacitive load at each output
(between OUT+ and OUT−)
and ground

G

v

voltage gain of pre-amplifier from pin INA1 or INA2 to pin EQFA

=25°C; nominal load 10 kΩ; all levels are referenced to 775 mV (RMS) (0 dB) at

amb

− 25 28 mA

V

ref

f = 1 kHz; V

= 0 dB at each output − 26 37 mA

o

−0.5 − +0.5 dB

OUTA/OUTB

5.5 6 6.5 dB

NR off
mismatch between OUT+ and

−0.5 − +0.5 dB

OUT−; f = 1 kHz; NR off
f = 1 kHz; V
f = 10 kHz; V

internal gain 40 dB; linear;

=0dB − 0.08 0.15 %

o

=6dB − 0.15 0.3 %

o

78 84 − dB
CCIR/ARM weighted; decode mode;
see Fig.10

NR off; unweighted;
f = 20 Hz to 20 kHz; R

= 0.25 V; f = 1 kHz; see Fig.7

i(rms)

source

=0Ω

−− 1.4 µV

52 57 − dB
for unsymmetrical signal at OUTC

at differential OUT; note 1 49 52 − dB
see Fig.10

= −25 dB; f = 0.2 kHz −22.9 −24.4 −25.9 dB

V

o

= 0 dB; f=1kHz −1.5 0 +1.5 dB

V

o

V

= −25 dB; f=1kHz −17.8 −19.3 −20.8 dB

o

= −25 dB; f=5kHz −18.1 −19.6 −21.1 dB

V

o

= −35 dB; f = 10 kHz −24.4 −25.9 −27.4 dB

V

o

NR off; f = 1 kHz; Vo= +10 dB;

70 77 − dB
see Fig.8

AC-coupled f = 1 kHz; Vo= 12 dB;

10 −−kΩ
THD=1%

THD = 1%; note 2 1 −−kΩ

C

at each output to ground

Lmin

0.3 − 1.3 nF

(pins 1, 2, 31 and 32)

29 30 31 dB
and from pin INB1 or INB2 to
pin EQFB; f = 1 kHz

1996 Jun 06 6

Philips Semiconductors Preliminary specification

Dual Dolby* B-type noise reduction circuit, automatic

TEA0678

music search, with differential outputs and mute

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

I(offset)(DC)

I

i(bias)

R

EQ

R

I

A

v

V

O(offset)(DC)

V

mute(offset)

V

− V

ref

I

O

R

i

Z

o

d

mute

AMSL AMS threshold level at

AMSH AMS threshold level at

t

d

t

r

EMC DC offset voltage at

DC input offset voltage − 2 − mV
input bias current −− 0.4 µA
equalization resistor 4.7 5.8 6.9 kΩ
input resistance head inputs 60 100 − kΩ
open-loop amplification pin INA1 or INA2 to pin EQA and

pin INB1 or INB2 to pin EQB

f = 10 kHz 80 86 − dB
f = 400 Hz 104 110 − dB

DC offset voltage at pins
OUT+ to OUT−

MUTE offset voltage at pins
OUT+ to OUT−

DC output offset voltage at

OUTC

pins OUTCA and OUTCB

pins INA1, INA2, INB1 and INB2
connected to V

ref

pins INA1, INA2, INB1 and INB2
connected to V

ref

NR off; pins INA1, INA2, INB1 and
INB2 connected to V

ref

−10 − +10 mV

−10 − +10 mV

−0.15 − +0.15 V

DC output current pins INA1, INA2, INB1 and INB2

connected to V

ref

pin OUTC to ground −2 −−mA
pin OUTC to V

CC

0.3 −−mA

pin OUT± to ground −2.5 −−mA

input resistance output stage

pin OUT± to V

CC

2.5 −−mA

10 16 − kΩ

at pins INCA and INCB
output impedance at each

− 90 110 Ω
output OUTA+, OUTA−,
OUTB+ and OUTB−

mute depth at differential
output

NR off

f = 1 kHz −80 −−dB
f = 10 kHz −80 −−dB

NR off;f=10kHz; see Fig.9 −25 −22 −19 dB

music to pause

note 3 −24 −21 −18 dB

pause to music
AMS delay time range f = 10 kHz; 0 dB burst; see Table 1 − 23 to 160 − ms
AMS rise/delay time f = 10 kHz; 0 dB burst 2 − 10 ms

pins OUTA−, OUTA+,

f = 900 MHz; V

=3V

i

see Figs 11, 12 and13

(RMS)

;

− 100 − mV

OUTB+ and OUTB−

1996 Jun 06 7

Philips Semiconductors Preliminary specification

Dual Dolby* B-type noise reduction circuit, automatic

TEA0678

music search, with differential outputs and mute

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Switching thresholds

NR/AMS SWITCH (PIN 3)
V

IL

I

IL

I

i(float)

V

float

V

IH

I

IH

EQUALIZATION (PIN 23)
I

EQ70

V

EQ70

I

EQ120

AMS OUTPUT (PIN 23)
V

OH

I

OH

I

OH

V

OL

I

OL

MUTE SWITCH (PIN 30)
V

IL

I

IL

V

IH

I

IH

HEAD SWITCH (PIN 18)
V

IL

I

IL

V

IH

I

IH

LOW level input voltage NR on −0.3 − +0.8 V
LOW level input current NR on −10 −20 −40 µA
allowed floating input current pin left open-circuit; NR/AMS off −10 0 +10 µA
floating voltage pin left open-circuit; NR/AMS off − 2.4 5 V
HIGH level input voltage AMS on 4 − 5.5 V
HIGH level input current AMS on 10 20 40 µA

floating leakage current time constant 70 µs active +0.002 −−0.15 mA
floating voltage time constant 70 µs active − 4.6 5 V
input current time constant 120 µs active −0.25 −−1mA

HIGH level output voltage music present 4 4.6 5 V
HIGH level output current current capability +0.01 −−1mA
HIGH level output current current capability; note 4 +0.01 −−0.15 mA
LOW level output voltage music not present −− 0.8 V
LOW level output current current capability −0.01 − +1 mA

LOW level input voltage MUTE on −0.3 − +0.8 V
LOW level input current MUTE on −−4 −100 µA
HIGH level input voltage MUTE off 4 − 5.5 V
HIGH level input current MUTE off; smooth switching with a

− 10 100 µA

time constant is recommended

LOW level input voltage INPUT 1 on −0.3 − +0.8 V
LOW level input current INPUT 1 on −− −100 µA
HIGH level input voltage INPUT 2 on 4 − 5.5 V
HIGH level input current INPUT 2 on − 30 100 µA

1996 Jun 06 8

Philips Semiconductors Preliminary specification

Dual Dolby* B-type noise reduction circuit, automatic

TEA0678

music search, with differential outputs and mute

Notes to the characteristics

1. For the signal to be doubled (+6 dB) at differential output as a function of OUTC, the signal-to-ripple ratio is improved
at differential output for approximately 3 dB.

2. By using the small load, the output voltage may be divided by −0.8 dB.

3. The high speed of the tape (FF, REW) at the tape head during AMS mode causes a transformation of level and
frequency of the originally recorded signal. It means a boost of signal level of approximately 10 dB and more for
recorded frequencies from 500 Hz up to 4 kHz. So the threshold level of −22 dB corresponds to signal levels in
PB mode of approximately −32 dB. The AMS inputs for each channel are pin SCA and pin SCB. As the frequency
spectrum is transformed by a factor of approximately 10 to 30 due to the higher tape speed in FF, REW, the
high-pass filter (4.7 nF/24 kΩ) removes the effect of offset voltages but does not affect the music search function.
In the application circuit (Fig.1) the frequency response of the system between tape heads input, e.g. pins INA2/INB2,
to the AMS input pins SCA and SCB is constant over the whole frequency range (see Fig.3). The frequency
dependence of threshold level is shown in Fig.3.

4. In AMS OFF mode, pin AMSEQ is HIGH level, the equalization time constant will be switched by pulling
approximately 200 µA out of pin AMSEQ. This means for the device connected to pin AMSEQ, a restriction of input
current at HIGH level less than 200 µA during AMS off; otherwise the switching of the time constants is disabled but
fixed at 120 µs. If the following devices, input consumes more than 200 µA, this input has to be disconnected in AMS
off mode. (To ensure switching the currents for the different switched modes are specified with a tolerance of±50 µA
in Chapter “Characteristics”.) For an application with a fixed EQ time constant of 120 µs the equalizing network may
be applied completely external. Change 8.2 kΩ resistor to 14 kΩ the internal resistor REQ= 5.8 kΩ is short-circuited
by fixing the EQ switch input at the 70 µs position (I

EQ70

).

Table 1 Blank delay time set by resistor R

RESISTOR VALUE R

(kΩ)

68 23 20
150 42 15
180 48 15
220 56 15
270 65 10
330 76 10
470 98 10
560 112 10
680 126 10
820 142 10

1000 160 10

t

at pin TD

t

DELAY TIME t

TYP. (ms)

d

TOLERANCE

(%)

1996 Jun 06 9

Philips Semiconductors Preliminary specification

Dual Dolby* B-type noise reduction circuit, automatic

TEA0678

music search, with differential outputs and mute

General note

It is recommended to switch off VCC with a gradient of 400 V/s at maximum to avoid plops on tape in the event of contact
between tape and tape head while switching off.

−20

handbook, full pagewidth

(dB)

−30

−40

−50

(1)

(2)

MED623

−60

2

10

(1) AMS threshold level for application circuit (Fig.1).
(2) AMS threshold level for test circuit (Fig.9).

3

10

Fig.3 AMS threshold level.

General note on AMS

The speed of tape at the tape head during FF, REW
depends on the diameter of the tape on the spindle.
Depending on this speed, the recorded signal occurs
transformed in frequency and magnitude as a function of
the original signal in playback mode speed. For example:
A recorded pause of 3 s passes the tape head at its
highest speed in 111 ms, e.g. during FF mode near tape
end. This time constant of 111 ms corresponds to a pause
of 1.3 s at the beginning of the tape in playback mode.

4

10

(Hz)

5

10

Thus a pause T is uniquely defined outside the interval

1.3 s < T < 3 s. Inside this interval T will be recognized as
a pause or not dependent on the local point of tape,
respectively the speed of tape. Times of pauses described
investigated for this document are valid for tape devices

with a speed of its spindle (FF, REW):

ωr51

1

=

-- ­s

respectively 12 to 27 times of the playback speed.

1996 Jun 06 10

Philips Semiconductors Preliminary specification

Dual Dolby* B-type noise reduction circuit, automatic
music search, with differential outputs and mute

Short description ‘music search’

A system for ‘music search’ mainly consists of a level and
a time detection (see Fig.4). For adapting and decoupling
the input signal will be amplified (A), then rectified (B) and
smoothed with a time constant (C). So the voltage at (C)
corresponds to the signal level and will be compared to the
predefined pause level at the first comparator (D), the level
detector. If the signal level becomes smaller than the
pause level, the level detector(D) changes its output
signal. Due to the output level of the level detector the

handbook, full pagewidth

(A)

(B)

capacitor of the second time constant (E) will be charged,
respectively discharged. If the pause level of the input
signal remains for a certain time, the voltage at the
capacitor reaches a certain value, which corresponds to
an equivalent time value due to the charging. The voltage
at the capacitor will be compared to a predefined
time-equivalent voltage by the second comparator (F), the
time detector. If the pause level of the input signal remains
for this predefined time, the time detector (F) changes its
output level for ‘pause found’ status.

TEA0678

INA

INB

AMPLIFIER

RECTIFIER

(C)

V

I

t

1

(D)

COMPARATOR 1 COMPARATOR 2

LEVEL DETECTOR TIME DETECTOR

(E) (F)

V

t

t

2

OUT

MED772

Fig.4 Integrated ‘music search’ function.

In this IC the signals of both channels are first rectified and then added. The signal behind the adder is described by
V

add

V
V

= V

chanA
chanB

chanA

 + V

chanB

, where:

: absolute value channel A
: absolute value channel B

This means, even if one channel signal appears phase shifted to the other channel (at worst cases inverted), the
TEA0678 will ensure the normal AMS function.

1996 Jun 06 11

Philips Semiconductors Preliminary specification

Dual Dolby* B-type noise reduction circuit, automatic

TEA0678

music search, with differential outputs and mute

Description of the principle timing diagram for AMS-scan mode without initial input signal (see Fig.5)

tr: rise time

handbook, full pagewidth

td: delay time
tb: burst time
tp: pause time
tf: fall time

level threshold

upper threshold

(hysteresis)

time threshold

AMS on

V

in

V

l

V

REF

V

t

t

r

t

d

t

f

tb<t

r

tp<t

d

Vl: voltage at
level detector
input
pin 7 (CONTRA)

Vt: voltage at
time detector
input
pin 26 (CONTRB)

t

t

V

AMSEQ

4.5 V

output signal

to microprocessor

t

0

t3t

4t5t6

t

Fig.5 AMS-scan mode without initial input signal.

By activating AMS-scan mode, the AMS output level
directly indicates whether the input level corresponds to a
pause level (V

= LOW) or not (V

AMSEQ

AMSEQ

= HIGH).
At t0 the AMS-scan mode is activated. Without a signal at
Vin, the following initial procedure runs until the AMS
output changes to LOW level: due to no signal at Vin the
voltage at the level detector input VI (pin 7, CONTRA)
remains below the level threshold and the second time
constant will be discharged (time detector input Vt).
When Vt passes the time threshold level, the time detector
output changes to LOW level. Now the initial procedure is
completed.

If a signal burst appears at t3, the level detector input
voltage rises immediately and causes its output to charge
the second time constant, which supplies the input voltage
Vt for the time detector. When Vt passes the upper

t

t

t8t9t

7

10

t11t12t13t

14t15

MED773

threshold level after the rise time tr (at t4), the AMS output
changes to HIGH. If the signal burst ends at t5 the level
detector input VI falls to its LOW level. When passing the
level threshold at t6, the discharging of the second time
constant begins. Now the circuit measures the delay time
td, which is externally fixed by a resistor and defines the
length of a pause to be detected. If no signal appears at V
within the time interval td, the time detector output switches
the AMS output to LOW level at t7.

If a plop noise pulse appears at Vin (t8) with a pulse width
less than the rise time tr>tb, the plop noise will not be
detected as music. The AMS output remains LOW.

Similarly the system handles ‘no music pulses’ tp: when
music appears at t11 with a small interruption at t13, this
interruption will not affect the AMS output for tp<td.

in

1996 Jun 06 12

Philips Semiconductors Preliminary specification

Dual Dolby* B-type noise reduction circuit, automatic

TEA0678

music search, with differential outputs and mute

Description of the principle timing diagram for AMS-scan mode with initial input signal (see Fig.6)

tr: rise time

handbook, full pagewidth

td: delay time
tb: burst time
tp: pause time
tf: fall time

level threshold

upper threshold

(hysteresis)

V

V

REF

in

V

V

l

t

AMS on

t

d

t

f

tb<t

r

tp<t

r

Vl: voltage at
level detector
input
pin 7 (CONTRA)

Vt: voltage at
time detector
input
pin 26 (CONTRB)

t

t

time threshold

V

AMSEQ

4.5 V

output signal

to microprocessor

t0t

t5t

1

t

6

7

t8t9t

10

Fig.6 AMS-scan mode with initial input signal.

At t0 the AMS-scan mode is activated. With an input signal
at Vin, the following initial procedure runs until the circuit
gets a steady state status.

Due to the signal at Vin the voltage at the level detector
input VI (pin 7, CONTRA) slides to a value which is defined
by a limiter. This voltage causes the level detector output
charging the second time constant (time detector input Vt)
to its maximum voltage level at t1. Now the initial
procedure is completed.

t

t

t11t12t13t

t

15

14

MED774

The following behaviour does not differ from the
description in Section “Description of the principle timing
diagram for AMS-scan mode without initial input signal
(see Fig.5)”.

1996 Jun 06 13

Philips Semiconductors Preliminary specification

Dual Dolby* B-type noise reduction circuit, automatic
music search, with differential outputs and mute

TEST AND APPLICATION INFORMATION

17

from

LOW: INPUT 1

HIGH: INPUT 2

microprocessor

10 µF

out

AMS

10 kΩ

18

TEA0678

1920

PRE

AMP.

21

EQ

20 kΩ

22
23

AMP.

GND

ref

V

POWER

SUPPLY

PRE

CC

V

EQ

TEA0678

MED775

100

µF

15 16

14

AMP.

= 10 V

CC

V

13

12

AMP.

11

µF

10 kΩ

1000

1 kHz

0.25 V RMS

nF

100

10 kΩ

AMS

delay

10 µF

time

20 kΩ

t

R

andbook, full pagewidth

V

HIGH: MUTE OFF

24 kΩ

ref

from

microprocessor

L

R

L

R

EQ 

4.7 nF

10 µF

27

kΩ

18 kΩ

70 µs

180 kΩ

nF

100

nF

330

1 µF

output 

B+

L

C

B−

output 

4.7 µF

4.7 µF

15 nF

270 kΩ

24

AMS

25

DOLBY B NR CIRCUIT

26

27

28

29

30

31

32

LEVEL

PROCESSOR

DELAY

EQ

AMS

LOGIC

15

kΩ

DETECTOR

TIME

NR

MUTE

15

HEAD-

SWITCH

kΩ

910

15 nF

8

DOLBY B NR CIRCUIT

7

270 kΩ

6

5

4

4.7 µF

23

1

4.7 µF

100

330

1 µF

output

output 

180 kΩ

nF

nF

A+

L

C

A−

ON

4.7 nF

NR

L

R

L

R

24 

kΩ

ref

V

LOW: NR ON

Fig.7 Test circuit for power supply ripple rejection.

1996 Jun 06 14

Philips Semiconductors Preliminary specification

Dual Dolby* B-type noise reduction circuit, automatic
music search, with differential outputs and mute

17

from

LOW: INPUT 1

microprocessor

HIGH: INPUT 2

10 µF

out

AMS

10 kΩ

18

TEA0678

19

PRE

AMP.

20

21

EQ

20 kΩ

22

23

AMP.

GND

ref

V

POWER

SUPPLY

CC

V

PRE

EQ

AMP.

AMP.

TEA0678

MED776

100

µF

15 16

Ω

= 10 V

CC

V

20 kΩ

200

pF

470

10 V

10

µF

nF

100

10 kΩ

10 µF

AMS

delay

time

t

R

14

13

12

11

ndbook, full pagewidth

HIGH: MUTE OFF

24 kΩ

ref

V

from

microprocessor

L

R

L

R

27 

EQ 

10 µF

70 µs

4.7 nF

kΩ

180 kΩ

100

330

1 µF

output 

L

C

output 

18 kΩ

24

AMS

15 nF

25

DOLBY B NR CIRCUIT

26

nF

270 kΩ

27

nF

B+

B−

28

29

30

4.7 µF

31

32

4.7 µF

LEVEL

PROCESSOR

DELAY

EQ

AMS

LOGIC

15

kΩ

DETECTOR

TIME

NR

MUTE

15

HEAD-

SWITCH

kΩ

910

15 nF

8

DOLBY B NR CIRCUIT

7

270 kΩ

6

5

4

4.7 µF

23

1

4.7 µF

100

330

output 

output 

24 

kΩ

4.7 nF

ref

V

180 kΩ

nF

nF

1 µF

LOW: NR ON

ON

NR

L

A+

R

L

C

L

A−

R

Fig.8 Test circuit for channel separation.

1996 Jun 06 15

Philips Semiconductors Preliminary specification

Dual Dolby* B-type noise reduction circuit, automatic
music search, with differential outputs and mute

input

voltage

17

from

LOW: INPUT 1

microprocessor

HIGH: INPUT 2

10 µF

out

AMS

10 kΩ

18

TEA0678

19

PRE

AMP.

20

21

EQ

20 kΩ

22
23

AMP.

GND

ref

V

POWER

SUPPLY

CC

V

PRE

EQ

AMP.

AMP.

TEA0678

MED777

100

µF

15 16

14

= 10 V

CC

V

nF

100

13

12

10 kΩ

AMS

delay

10 µF

time

20 kΩ

11

t

R

handbook, full pagewidth

HIGH: MUTE OFF

24 kΩ

ref

V

from

microprocessor

L

R

L

R

27

EQ 

10 µF

70 µs

4.7 nF

kΩ

180 kΩ

100

330

1 µF

output 

L

C

output 

18 kΩ

24

LEVEL

PROCESSOR

DELAY

DETECTOR

TIME

15 nF

AMS

25

910

15 nF

8

4.7 nF

24 

kΩ

ref

V

Fig.9 Test circuit for AMS threshold level.

DOLBY B NR CIRCUIT

26

nF

270 kΩ

27

nF

B+

B−

28

29

30

4.7 µF

31

32

4.7 µF

AMS

15

LOGIC

kΩ

NR

EQ

MUTE

15

HEAD-

SWITCH

kΩ

DOLBY B NR CIRCUIT

7

6

5

4

23

1

180 kΩ

nF

100

270 kΩ

nF

330

1 µF

HIGH: AMS ON

5 V

4.7 µF

output 

output 

4.7 µF

L

A+

R

L

C

L

A−

R

1996 Jun 06 16

Philips Semiconductors Preliminary specification

Dual Dolby* B-type noise reduction circuit, automatic
music search, with differential outputs and mute

17

18

TEA0678

1920

PRE

AMP.

25 kΩ

10 kΩ

21

EQ

20 kΩ

22
23

nF

24

24 kΩ

15 nF

25

AMP.

AMS

ref

V

POWER

GND

LEVEL

PROCESSOR

DELAY

SUPPLY

CC

V

DETECTOR

TIME

handbook, full pagewidth

LOW: INPUT 1

25 kΩ

CC

V

out

AMS

ref

V

from

HIGH: INPUT 2

microprocessor

i

V

10 µF

10 µF

EQ 

70 µs

18 kΩ

TP

4.7

PRE

EQ

AMP.

AMP.

100

15 16

200

14

470

10

= 10 V

CC

V

13

12

20 kΩ

11

R

24 

910

4.7 nF

15 nF

8

TEA0678

MED778

µF

Ω

pF

µF

i

V

100

nF

10 V

10 kΩ

10 µF

AMS

delay

time

t

kΩ

TP

ref

V

from

microprocessor

HIGH: MUTE OFF

180 kΩ

26

nF

100

270 kΩ

27

nF

330

1 µF

10 µF

27

kΩ

L

R

output 

B+

L

C

L

B−

R

output 

28

29

30

4.7 µF

31

32

4.7 µF

DOLBY B NR CIRCUIT

AMS

15

LOGIC

kΩ

1996 Jun 06 17

DOLBY B NR CIRCUIT

7

NR

EQ

MUTE

HEAD

15

HEAD-

SWITCH

kΩ

6

5

4

23

1

180 kΩ

nF

100

270 kΩ

nF

330

1 µF

LOW: NR ON

ON

NR

output 

4.7 µF

output 

4.7 µF

L

A+

R

L

C

L

A−

R

Fig.10 Test circuit for frequency response (channel B, encode mode).

Philips Semiconductors Preliminary specification

Dual Dolby* B-type noise reduction circuit, automatic
music search, with differential outputs and mute

pF

470

17

Ω

200

18

pF

470

19

Ω

200

PRE

AMP.

20

10 kΩ

21

EQ

20 kΩ

22

23

24

AMP.

TEA0678

GND

ref

V

POWER

SUPPLY

CC

V

PRE

EQ

AMP.

AMP.

100

µF

15 16

14

= 10 V

CC

V

13

12

20 kΩ

11

AMS

910

100

68 kΩ

delay

10 kΩ

time

470

470

nF

200

200

TEA0678

pF

40 Ω

Ω

pF

Ω

10 Ω

MBH478

24 

kΩ

ndbook, full pagewidth

CC

V

5 kΩ

24 kΩ

4.7 nF

PROCESSOR

EQ

AMS

LOGIC

15

kΩ

LEVEL

DETECTOR

TIME

DELAY

NR

MUTE

HEAD-

15

SWITCH

kΩ

15 nF

8

DOLBY B NR CIRCUIT

7

270 kΩ

6

5

4

23

1

ref

V

15 nF

25

180 kΩ

26

nF

100

270 kΩ

27

nF

330

10 µF

27 

kΩ

5 kΩ

28

29

30

4.7

µF

31

32

µF

4.7

DOLBY B NR CIRCUIT

AMS

4.7 nF

Fig.11 EMC test circuit.

180 kΩ

nF

100

nF

330

4.7

µF

µF

4.7

1996 Jun 06 18

Philips Semiconductors Preliminary specification

Dual Dolby* B-type noise reduction circuit, automatic
music search, with differential outputs and mute

LAYOUT OF PRINTED-CIRCUIT BOARD FOR EMC TEST CIRCUIT (FOR TEA0678T)

pagewidth

72

68

TEA0678

0 Ω

20
kΩ

270
kΩ

0 Ω

TEA0678T

27 kΩ
5 kΩ5 kΩ

Dimensions in mm.

470 pF

200 Ω

470 pF

200 Ω
10 kΩ

Fig.12 Top side with components.

1996 Jun 06 19

40 Ω
10 Ω

0 Ω
0 Ω

100 nF

270
kΩ

20
kΩ

470 pF
200 Ω
470 pF
200 Ω
10 kΩ

4.7 nF4.7 nF

68 kΩ
15 nF15 nF

100 nF100 nF

MBH462


Philips Semiconductors Preliminary specification

Dual Dolby* B-type noise reduction circuit, automatic
music search, with differential outputs and mute

pagewidth

68

72

TEA0678

Dimensions in mm.

X5

X3

4.7 µF

MP

MP

X1 S1

100 µF

MP

MP

4.7 µF 4.7 µF

X2

X4

Fig.13 Bottom side with components.

4.7 µF

330 nF

330 nF

MP

MP

100 µF

180 kΩ

24 kΩ

24 kΩ

180 kΩ

MP

X5

MBH461


1996 Jun 06 20

Philips Semiconductors Preliminary specification

Dual Dolby* B-type noise reduction circuit, automatic
music search, with differential outputs and mute

PACKAGE OUTLINES

SDIP32: plastic shrink dual in-line package; 32 leads (400 mil)

D

seating plane

L

Z

32

e

b

b

17

TEA0678

SOT232-1

M

E

A

2

A

A

1

w M

1

c

(e )

M

1

H

pin 1 index

1

0 5 10 mm

scale

DIMENSIONS (mm are the original dimensions)

A

A

A

UNIT b

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

mm

OUTLINE

VERSION

SOT232-1

max.

4.7 0.51 3.8

12

min.

max.

IEC JEDEC EIAJ

1.3

0.8

b

1

0.53

0.40

REFERENCES

0.32

0.23

cEe M

(1) (1)

D

29.4

28.5

9.1

8.7

E

16

(1)

Z

L

3.2

2.8

EUROPEAN

PROJECTION

M

10.7

10.2

E

12.2

10.5

e

1

w

H

0.181.778 10.16

ISSUE DATE

92-11-17
95-02-04

max.

1.6

1996 Jun 06 21

Philips Semiconductors Preliminary specification

Dual Dolby* B-type noise reduction circuit, automatic
music search, with differential outputs and mute

SO32: plastic small outline package; 32 leads; body width 7.5 mm

D

c

y

Z

32

17

TEA0678

SOT287-1

E

H

E

A

X

v M

A

pin 1 index

1

e

0 5 10 mm

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

UNIT

mm

inches

Note

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

A

max.

2.65

0.10

A

0.3

0.1

0.012

0.004

A

A3b

0.49

0.36

0.02

0.01

p

0.27

0.18

0.011

0.007

1

2

2.45

0.25

2.25

0.096

0.01

0.086

(1)E(1)

cD

20.7

20.3

0.81

0.80

7.6

7.4

0.30

0.29

16

b

p

scale

eHELLpQZywv θ

1.27

0.050

10.65

10.00

0.42

0.39

w M

1.4

0.055

A

2

1.1

0.4

0.043

0.016

Q

A

1

detail X

1.2

0.25

1.0

0.047

0.039

(A )

L

p

L

0.25 0.1

0.004

0.010.01

A

3

θ

(1)

0.95

0.55

0.037

0.022

o

8

o

0

OUTLINE

VERSION

SOT287-1

IEC JEDEC EIAJ

REFERENCES

1996 Jun 06 22

EUROPEAN

PROJECTION

ISSUE DATE

92-11-17
95-01-25

Philips Semiconductors Preliminary specification

Dual Dolby* B-type noise reduction circuit, automatic
music search, with differential outputs and mute

SOLDERING
Introduction

There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.

This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in

“IC Package Databook”

our

SDIP

OLDERING BY DIPPING OR BY WA VE

S
The maximum permissible temperature of the solder is

260 °C; solder at this temperature must not be in contact
with the joint for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.

The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (T
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.

R

EPAIRING SOLDERED JOINTS

Apply a low voltage soldering iron (less than 24 V) to the
lead(s) of the package, below the seating plane or not
more than 2 mm above it. If the temperature of the
soldering iron bit is less than 300 °C it may remain in
contact for up to 10 seconds. If the bit temperature is
between 300 and 400 °C, contact may be up to 5 seconds.

SO

REFLOW SOLDERING
Reflow soldering techniques are suitable for all SO

packages.

(order code 9398 652 90011).

). If the

stg max

Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.

Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.

AVE SOLDERING

W
Wave soldering techniques can be used for all SO

packages if the following conditions are observed:

• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.

• The longitudinal axis of the package footprint must be
parallel to the solder flow.

• The package footprint must incorporate solder thieves at
the downstream end.

During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.

A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

EPAIRING SOLDERED JOINTS

R
Fix the component by first soldering two diagonally-

opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.

TEA0678

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.

1996 Jun 06 23

Philips Semiconductors Preliminary specification

Dual Dolby* B-type noise reduction circuit, automatic

TEA0678

music search, with differential outputs and mute

DEFINITIONS

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

1996 Jun 06 24

Philips Semiconductors Preliminary specification

Dual Dolby* B-type noise reduction circuit,
automatic music search, with differential

NOTES

TEA0678

1996 Jun 06 25

Philips Semiconductors Preliminary specification

Dual Dolby* B-type noise reduction circuit,
automatic music search, with differential

NOTES

TEA0678

1996 Jun 06 26

Philips Semiconductors Preliminary specification

Dual Dolby* B-type noise reduction circuit,
automatic music search, with differential

NOTES

TEA0678

1996 Jun 06 27

Philips Semiconductors – a worldwide company

Argentina: see South America
Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,

Tel. [phone], Fax. [phone]
Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213,

Tel. [phone], Fax. [phone]
Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6,

220050 MINSK, Tel. [phone], Fax. [phone]

Belgium: see The Netherlands
Brazil: see South America
Bulgaria: Philips Bulgaria Ltd., Energoproject, 15thfloor,

51 James Bourchier Blvd., 1407 SOFIA,
Tel. [phone], Fax. [phone]

Canada: PHILIPS SEMICONDUCTORS/COMPONENTS,
Tel. [phone], Fax. [phone]

China/Hong Kong: 501 Hong Kong Industrial Technology Centre,
72 Tat Chee Avenue, Kowloon Tong, HONG KONG,
Tel. [phone], Fax. [phone]

Colombia: see South America
Czech Republic: see Austria
Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S,

Tel. [phone], Fax. [phone]
Finland: Sinikalliontie 3, FIN-02630 ESPOO,

Tel. [phone], Fax. [phone]
France: 4 Rue du Port-aux-Vins, BP317, 92156 SURESNES Cedex,

Tel. [phone], Fax. [phone]
Germany: Hammerbrookstraße 69, D-20097 HAMBURG,

Tel. [phone], Fax. [phone]
Greece: No. 15, 25th March Street, GR 17778 TAVROS,

Tel. [phone], Fax. [phone]

Hungary: see Austria
India: Philips INDIA Ltd, Shivsagar Estate, A Block, Dr. Annie Besant Rd.

Worli, MUMBAI 400 018, Tel. [phone], Fax. [phone]

Indonesia: see Singapore
Ireland: Newstead, Clonskeagh, DUBLIN 14,

Tel. [phone], Fax. [phone]
Israel: RAPAC Electronics, 7 Kehilat Saloniki St, TEL AVIV 61180,

Tel. [phone], Fax. [phone]
Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3,

20124 MILANO, Tel. [phone], Fax. [phone]
Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108,

Tel. [phone], Fax. [phone]
Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,

Tel. [phone], Fax. [phone]
Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,

Tel. [phone], Fax. [phone]
Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,

Tel. [phone], Fax. [phone]

Middle East: see Italy

Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,

Tel. [phone], Fax. [phone]
New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,

Tel. [phone], Fax. [phone]
Norway: Box 1, Manglerud 0612, OSLO,

Tel. [phone], Fax. [phone]
Philippines: Philips Semiconductors Philippines Inc.,

106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. [phone], Fax. [phone]

Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA,
Tel. [phone], Fax. [phone]

Portugal: see Spain
Romania: see Italy
Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,

Tel. [phone], Fax. [phone]
Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231,

Tel. [phone], Fax. [phone]

Slovakia: see Austria
Slovenia: see Italy
South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,

2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000,
Tel. [phone], Fax. [phone]

South America: Rua do Rocio 220 - 5th floor, Suite 51,
CEP: 04552-903-SÃO PAULO-SP, Brazil, P.O. Box 7383 (01064-970),
Tel. [phone], Fax. [phone]

Spain: Balmes 22, 08007 BARCELONA,
Tel. [phone], Fax. [phone]

Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,
Tel. [phone], Fax. [phone]

Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. [phone], Fax. [phone]

Taiwan: PHILIPS TAIWAN Ltd., 23-30F, 66,
Chung Hsiao West Road, Sec. 1, P.O. Box 22978,
TAIPEI 100, Tel. [phone], Fax. [phone]

Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,
Tel. [phone], Fax. [phone]

Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,
Tel. [phone], Fax. [phone]

Ukraine: PHILIPS UKRAINE, 2A Akademika Koroleva str., Office 165,
252148 KIEV, Tel. [phone]/1642, Fax. [phone]

United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. [phone], Fax. [phone]

United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. [phone], Fax. [phone]

Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,

Tel. [phone], Fax.[phone]

For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications,
Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. [phone]

© Philips Electronics N.V. 1996 SCA49
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.

Printed in The Netherlands 517021/1200/02/pp28 Date of release: 1996 Jun 06 Document order number: 9397 750 00896

Internet: http://www.semiconductors.philips.com/ps/
(1) ADDRESS CONTENT SOURCE July 29, 1996