Datasheet TDA9873HS-V1, TDA9873H-V1 Datasheet (Philips)

DATA SH EET

Product specification
Supersedes data of 1999 Dec 03
File under Integrated Circuits, IC02

2000 Apr 04

INTEGRATED CIRCUITS

TDA9873H

Multistandard dual carrier stereo
sound decoder

2000 Apr 04 2

Philips Semiconductors Product specification

Multistandard dual carrier stereo sound decoder TDA9873H

FEATURES

• Low power consumption

• Alignment-free multistandard FM sound demodulation

• No externalintercarrier sound band-pass filters required

• Auto mute switchable via I2C-bus

• Multistandard A2 stereo sound decoder

• No adjustment for reduced channel separation

requirement

• De-emphasis time constant related to standard

• Very reliable digital identification of sound transmission

mode via I2C-bus, alignment-free

• No external filter for pilot input required

• I2C-bus transceiver with MAD (Module ADdress)

• I2C-bus control for all functions

• Stabilizer circuit for ripple rejection and constant output

level

• Additional mono output

• Pin aligned with TDA9874AH

• ESD protection on all pins.

GENERAL DESCRIPTION

The TDA9873H is an economic multistandard dual
FM demodulator and analog carrier stereo decoder with
I2C-bus control.

ORDERING INFORMATION

TYPE NUMBER

PACKAGE

NAME DESCRIPTION VERSION

TDA9873H QFP44 plastic quad flat package; 44 leads (lead length 2.35 mm);

body 14 × 14 × 2.2 mm

SOT205-1

TDA9873HS QFP44 plastic quad flat package; 44 leads (lead length 1.3 mm);

body 10 × 10 × 1.75 mm

SOT307-2

2000 Apr 04 3

Philips Semiconductors Product specification

Multistandard dual carrier stereo sound decoder TDA9873H

QUICK REFERENCE DATA

VCC=5V; T

amb

=25°C; B/G standard (f

SC1

= 5.5 MHz, f

SC2

= 5.742 MHz, SC1/SC2=7dB,∆fAF= 27 kHz,

f

mod

= 1 kHz, L = R, stereo mode); input level for first sound carrier V

i(FM)(rms)

=50mV; f

ref

= 4.000 MHz; measured in

application circuits of Figs 7 and 8; unless otherwise specified.

Notes

1. Condition for B/G, I and D/K standard: V

CC

= 5 V and ∆f = 27 kHz (m = 54%). Condition for M standard: VCC=5V

and ∆f = 13.5 kHz; 6 dB gain added internally to compensate smaller deviation.

2. The maximum total system identification time ‘on’ for a channel change is equal to maximum value of t

ident(on)

plus

t

I2C(read-out)

. The maximum total system identification time ‘off’ for a channel change is equal to maximum value of

t

ident(off)

plus t

I2C(read-out)

. The fast mode is proposed mainly during search tuning, program or channel select. If the
channel is selected, the identification response should be switched to normal mode for improved reliability. However
due to the transition from fast to normal mode, the identification bits are not valid for one integrator period. Therefore
the transmitter mode detected during the fast mode has to be stored before changing to normal mode. The storage
has to be kept for two seconds (maximum value of t

ident(on)

in the normal mode) from the moment of transition.

The identification can now operate in the normal mode until the next tuning action.

3. R modulated and L monitored.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

CC

supply voltage 4.5 5 6.6 V

I

CC

supply current 40 60 75 mA

V

o(rms)

AF output level (RMS value) 54% modulation; note 1 400 500 600 mV

V

o(cl)(rms)

AF output clipping level
(RMS value)

THD < 1.5% 1400 −−mV

f

i(FM)

FM-PLL operating frequencies
(switchable)

first sound carrier

M standard − 4.5 − MHz
B/G standard − 5.5 − MHz
I standard − 6.0 − MHz
D/K standard − 6.5 − MHz

second sound carrier

M standard − 4.72 − MHz
B/G standard − 5.74 − MHz
D/K (1) standard − 6.26 − MHz
D/K (2) standard − 6.74 − MHz
D/K (3) standard − 5.74 − MHz

S/N

W

weighted signal-to-noise ratio
(complete signal path)

CCIR 468-4 weighted; quasi
peak; dual mode;
B/G standard; note 1

52 56 − dB

t

ident(on)

total identification time on for
identification mode change

normal mode; note 2 0.35 − 2s
fast mode; note 2 0.1 − 0.5 s

V

i(FM)(rms)

FM-PLL input voltage (RMS value) sensitivity for pull-in

first sound carrier −−6mV
second sound carrier −−1mV

α

cs(AF)(stereo)

AF channel separation (stereo
mode; complete signal path)

B/G standard; note 3

without alignment 25 30 − dB
I2C-bus alignment 40 45 − dB

α

ct(AF)(dual)

AF crosstalk attenuation (dual
mode; complete signal path)

65 70 − dB

2000 Apr 04 4

Philips Semiconductors Product specification

Multistandard dual carrier stereo sound decoder TDA9873H

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BLOCK DIAGRAM

n

dbook, full pagewidth

MHB429

FM DEMODULATOR
NARROW-BAND PLL

SC2

FM DEMODULATOR
NARROW-BAND PLL

SC1

AF

AMPLIFIER

2

AF

AMPLIFIER

1

LF2

18

4, 5, 9, 11, 12,
16, 17, 19, 20,
22, 23, 36, 44

LPF31CID35CTRIG

34

25

AFR13CAF2

26

DIGITAL

ACQUISITION
OSCILLATOR

CLOCK

STEREO DECODER

STEREO ADJUST

B/G, D/K, I, M (Korea)

STANDARD

AF SWITCH

DIGITAL

IDENTIFICATION

PILOT

NARROW-BAND PLL

SDA30SCL29P137P2

42

I

2

C-BUS

TRANSCEIVER

XTAL

4 MHz

15

CAF1

24

TDA9873H

loop filter

14

LF1

3

CDE16CDE2

38

EXTM

M

39

EXTR

R

mono stereo

40

EXTL

L

8

AF1IAF2I

321033

AF1O AF2O

loop filter

IFINT

n.c.

DGND27
MAD21

POWER
SUPPLY

AGND

OUTM

7

V

CC

V

ref

28

41

43

IF

intercarrier

input

4.5, 5.5, 6.0, 6.5

4.72, 5.74, 6.26,

6.74 MHz

pilot
loop

external AF

OUTR

2

OUTL

1

Fig.1 Block diagram.

2000 Apr 04 5

Philips Semiconductors Product specification

Multistandard dual carrier stereo sound decoder TDA9873H

PINNING

SYMBOL PIN DESCRIPTION

OUTL 1 left audio output
OUTR 2 right audio output
CDE1 3 de-emphasis 1 capacitor
n.c. 4 not connected
n.c. 5 not connected
CDE2 6 de-emphasis 2 capacitor
AGND 7 analog ground
AF1I 8 audio 1 input
n.c. 9 not connected
AF1O 10 audio 1 output
n.c. 11 not connected
n.c. 12 not connected
AFR 13 AF1 and AF2 signal return
LF1 14 loop filter 1
XTAL 15 4 MHz reference input
n.c. 16 not connected
n.c. 17 not connected
LF2 18 loop filter 2
n.c. 19 not connected
n.c. 20 not connected
MAD 21 programmable address bit

(module address)

n.c. 22 not connected
n.c. 23 not connected
CAF1 24 audio 1 (AF1) capacitor
IFINT 25 IF intercarrier input
CAF2 26 audio 2 (AF2) capacitor
DGND 27 digital ground
V

CC

28 supply voltage (+5 V)

SCL 29 serial clock input (I

2

C-bus)

SDA 30 serial data input/output (I

2

C-bus)
LPF 31 pilot loop filter
AF2O 32 audio 2 output
AF2I 33 audio 2 input
CTRIG 34 trigger capacitor
CID 35 identification capacitor
n.c. 36 not connected
P1 37 output port 1
EXTM 38 external audio input mono
EXTR 39 external audio input right
EXTL 40 external audio input left
V

ref

41 reference voltage (1⁄2VCC)
P2 42 output port 2
OUTM 43 mono output
n.c. 44 not connected

SYMBOL PIN DESCRIPTION

2000 Apr 04 6

Philips Semiconductors Product specification

Multistandard dual carrier stereo sound decoder TDA9873H

Fig.2 Pin configuration.

handbook, full pagewidth

1
2
3
4
5
6
7
8

9
10
11

33
32
31
30
29
28
27
26
25
24
23

12

13

14

15

16

17

18

19

20

21

22

44

43

42

41

40

39

38

37

36

35

34

TDA9873H

MHB430

AF2I
AF2O
LPF
SDA

V

CC

DGND
CAF2
IFINT
CAF1
n.c.

OUTL

OUTR

CDE1

n.c.
n.c.

CDE2

AF1I

n.c.

n.c.

SCL

OUTM

P2

V

ref

EXTL

EXTR

EXTM

n.c.

CID

CTRIG

n.c.

P1

AFR

LF1

XTALI

n.c.

n.c.

LF2

n.c.

MAD

n.c.

n.c.

n.c.

AGND

AF1O

2000 Apr 04 7

Philips Semiconductors Product specification

Multistandard dual carrier stereo sound decoder TDA9873H

FUNCTIONAL DESCRIPTION
FM demodulators

The FM demodulators are Narrow-Band Phase-Locked
Loops (NBPLLs) with external loop filters, to provide the
required selectivity. To achieve good selectivity, linear
Phase Detectors (PDs) and constant input levels are
required. The intercarrier signal from the input terminal is
fed via high-pass filters and gain controlled amplifiers to
the phase detectors. A carrier cancellation circuit placed
before the amplifier for the second PLL is used to reduce
the first sound carrier. The PD output signals control the
integrated relaxation oscillators via the loop filters.
The frequency range is approximately 4 to 7 MHz. As a
result of locking, the oscillator frequency tracks with the
modulation of the input signal and the oscillator control
voltages are superimposed by the AF voltages. Using this
method, the FM-PLLs operate as FM demodulators.
The AF voltages are present at the loop filters and fed via
buffers with 0 dB gain to the audio amplifiers.
The supported standards and their characteristics are
given in Table 1.

Digital acquisition help

A narrow-band PLL requires a measure to lock to the
wanted input signal. Each relaxation oscillator of the three
integrated PLLs (first and second sound carriers and pilot
carrier) has a wide frequency range. To guarantee correct
locking of the PLL with respect to the catching range, the
digital acquisition help provides individual control until the
VCO frequency is within the standard and PLL dependent
lock-inwindow, related tothestandard dependent carriers.
It ensures that the oscillator frequency of the FM-PLL is
within ±225 kHz of the sound carrier to be demodulated.
The pilot carrier frequency window is ±150 Hz.

The working principal of the digital acquisition help is as
follows. The VCOs are connected, one at a time, to a
down-counter. The counter start value is standard
dependent and predefined for each of the three PLLs.
After a given counting time the stop value of the
down-counter is probed.

If the stop value is lower (higher) than the expected value
range,the VCO frequency is higher (lower)thanthelock-in
window. A negative (positive) control current is injected
into the loop filter for a short time, thereby decreasing
(increasing) the VCO frequency by a proportional value.

Ifthe stop value meets the expected value range, the VCO
frequency is within the defined lock-in window and no
control current is injected into the loop filter.

In an endless circle the VCO of the next PLL will be
connected to the down-counter and the described
procedure starts again.

The whole tracing as well as the counting time itself is
derived from the external frequency reference. The cycle
time is 256 µs.

Auto mute

If a sound carrier is missed, acquisition pulses are
generated when the NBPLL frequency leaves the window
edges. To avoid noise at the audio output, an I2C-bus
switchable mute-enable stage is built in. If auto mute is
enabled via the I2C-bus, the circuit mutes immediately
after the first acquisition pulse. If a sound carrier occurs
(no further acquisition pulses), the mute stage
automatically returns to active mode after 40 ms.

If the first sound carrier is not present, the second audio
channel will also be muted.

Audio preamplifier

The AF preamplifiers are operational amplifiers with
internal feedback, high gain and high common mode
rejection. The AF voltages from the PLL demodulators
(small output signals) are amplified by approximately
34 dB. Using a DC operating point control circuit, the
AF amplifiers are decoupled from the PLL DC voltage.
The amplified AF signals are available at the output
terminals and fed via external decoupling capacitors to the
stereo decoder input terminals.

Stereo decoder

The input circuit incorporates a soft-mute stage which is
controlled by the FM-PLL acquisition circuit. The auto
mute function can be disabled via the I2C-bus.

The AF output voltage is 500 mV (RMS) for 54%
modulation, clipping therefore may occur at high
over-modulation. If more headroom is required the input
signal can be attenuated by 6 dB via the I2C-bus.

A stereo adjustment (see Fig.6) is incorporated to correct
theFM demodulator outputvoltage spread(see Table 19).
If no I2C-bus adjustment is required (potentiometer
adjustment or no adjustment) the default value should be
0 dB for B/G, M and D/K (2) standard. For the standards
D/K (1) and D/K (3) the second sound carrier frequency is
below the first sound carrier which results in a lower
AF output level for the second sound carrier. In this state,
a gain of +0.1 dB for D/K (1) and +0.2 dB for D/K (3) is
preferred.

2000 Apr 04 8

Philips Semiconductors Product specification

Multistandard dual carrier stereo sound decoder TDA9873H

In the following dematrix, the modes stereo, mono and
dual are processed for the different standards. The 6 dB
level difference between B/G and M standard is
automatically compensated in the dematrix, therefore no
further level adaption is needed.

De-emphasis is performed by two RC low-pass filter
networks with internal resistors and external capacitors.
The time constant is automatically switched to 50 µs or
75 µs according to the chosen standard.

Due to some frequency response peaking of the
FM demodulation, compensation is necessary. This is
done by having a slightly larger time constant for the
de-emphasis.

All other settings such as AF switch, stereo channel
adjustment values or default corrections have to be
controlled via the I2C-bus depending on the identification
or user definition.

AF switch

The circuit incorporates a single stereo and mono
AF output. Using rail-to-rail operational amplifiers, the
clipping level is set to 1.4 V (RMS) for VCC=5V.

As well as the internal stereo decoder output signal, one
externalstereo and one mono input can be switched to the
AF outputs. Both the mono and stereo outputs can be
switched independent of the internal or external sources
(see Tables 13 and 25). Fig.6 shows the switch
configurations.

A nominal gain of 0 dB for the signals from the external
inputs to the outputs is built-in.

Stereo/dual sound identification

The pilot signal is fed to the input of a NBPLL. The PLL
circuitgenerates the synchronizedpilotcarrier. This carrier
is used for the synchronous AM demodulation to get the
low-pass filtered identification signal.

A Schmitt trigger circuit performs pulse shaping of the
identificationsignalwhenthesignallevel is higher than the
Schmitt trigger threshold. For smaller signal levels there is
no AC output signal, thus protecting against
mis-identification caused by spurious signal components.

The identification stages consist of two digital PLL circuits
anddigitalintegratorstogeneratethestereo or dual sound
identification bits, which can be read out via the I2C-bus.

A 4 MHz crystal oscillator provides the reference clock
frequency. The corresponding detection bandwidth is
larger than ±50 Hz for the pilot carrier signal, so that
f

pilot

variations from the transmitter can be tracked in the
event of missing synchronization with the horizontal
frequency fH. However, the detection bandwidth for the
identification signal is limited to approximately ±1 Hz for
high identification reliability.

I

2

C-bus transceiver

The TDA9873H is microcontroller controlled via a 2-wire
I2C-bus.

Two wires, serial data (SDA) and serial clock (SCL) carry
information between the devices connected to the bus.

The TDA9873H has an I2C-bus slave transceiver with
auto-increment.

To avoid conflicts in applications with other ICs providing
similar or complementary functions, two slave addresses
are available, selected on the pin MAD. A slave address is
sent from the master to the slave receiver.

In the TV sound processor family several devices are
available. To identify the TDA9873H device, the master
sends a slave address with R/W bit = 0. The slave then
generates an acknowledge and the master sends the data
subaddress 254 to the slave, followed by an acknowledge
from the slave to the master. The master then sends the
slave address with R/W bit = 1. The slave then transmits
the device identification code 80H to the master, followed
by an acknowledge NOT and a STOP condition generated
by the master.

Control ports

Two digital open-collector output ports P1 and P2 provide
external switching functions in the receiver front-end or
IF demodulators. The ports are controlled by the I2C-bus
(see Tables 22 and 23) and are freely programmable.

2000 Apr 04 9

Philips Semiconductors Product specification

Multistandard dual carrier stereo sound decoder TDA9873H

Power supply

The different supply voltages and currents required for the
analog and digital circuits are derived from two internal
band gap reference circuits. One of the band gap circuits
internally generates a voltage of approximately 2.4 V,
independent of the supply voltage and temperature.
A voltage regulator circuit, connected to this voltage,
produces a constant voltage of 3.55 V which is used as an
internalreference voltage. The AF referencevoltageV

ref

is

1

⁄2VCC. Good ripple rejection is achieved with the external

capacitor C

ref

=47µF (16 V) in combination with an

internal resistor at pin 6. No additional DC load for1⁄2V

CC

is allowed.

Analog ground (AGND, pin 7) and digital ground
(DGND, pin 27) should be connected directly to the IC.

Pin 13 is internal analog ground.

Power-on reset
When a Power-on reset is activated by switching on the

supply voltage or because of a supply voltage breakdown,
the 117/274 Hz DPLL, 117/274 Hz integrator and the
registers will be reset. Both AF channels (main and mono)
are muted. The ports are in position HIGH. Gain stereo
adjustment is 0 dB. Auto mute is active. For detailed
information see Table 12.

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 60134).

Notes

1. I

CC

= 60 mA; T

amb

=70°C.

2. Machine model class B: C = 200 pF; L = 0.75 µH; R = 0 Ω.

3. Human body model class B: C = 100 pF; R = 1.5 kΩ.

THERMAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

CC

supply voltage (pin 28) maximum chip

temperature of 125 °C;
note 1

0 6.8 V

V

i

input voltage at:

pins 1 to 6, 8 to 12, 14 to 26 and 31 to 44 0 V

CC

V

pins 29 to 30 −0.3 V

CC

V

T

stg

storage temperature −25 +150 °C

T

amb

ambient temperature −20 +70 °C

V

es

electrostatic handling voltage note 2 −150 +150 V

note 3 −2500 +2500 V

SYMBOL PARAMETER CONDITIONS VALUE UNIT

R

th(j-a)

thermal resistance from junction to ambient in free air

TDA9873H 70 K/W
TDA9873HS 65 K/W

2000 Apr 04 10

Philips Semiconductors Product specification

Multistandard dual carrier stereo sound decoder TDA9873H

CHARACTERISTICS

VCC=5V; T

amb

=25°C; B/G standard (f

SC1

= 5.5 MHz, f

SC2

= 5.742 MHz, SC1/SC2=7dB,∆fAF= 27 kHz,

f

mod

= 1 kHz, L = R, stereo mode); input level for first sound carrier V

i(FM)(rms)

=50mV; f

ref

= 4.000 MHz; measured in

application circuits of Figs 7 and 8; unless otherwise specified.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Supply (pin 28)

V

CC

supply voltage 4.5 5 6.6 V

I

CC

supply current 40 60 75 mA
FM-PLL demodulator (pin 25); note 1
V

i(FM)(rms)

FM-PLL input voltage

(RMS value)

sensitivity for pull-in

first sound carrier −−6mV
second sound carrier −−1mV

level for gain controlled
operation; note 2

first sound carrier 6 − 150 mV
second sound carrier 1 − 100 mV

V

i(vid)(p-p)

allowable interference video

level (peak-to-peak value)

see Fig.3

V

i(FM1)(rms)

=6mV −−160 mV

V

i(FM1)(rms)

= 150 mV −−2V

R

i

input resistance 4 5 6 kΩ
f

i(FM)

FM-PLLoperatingfrequencies

(switchable)

first sound carrier

M standard − 4.5 − MHz
B/G standard − 5.5 − MHz
I standard − 6.0 − MHz
D/K standard − 6.5 − MHz

second sound carrier

M standard − 4.72 − MHz
B/G standard − 5.74 − MHz
D/K (1) standard − 6.26 − MHz
D/K (2) standard − 6.74 − MHz
D/K (3) standard − 5.74 − MHz

∆f

FM

frequency windows of digital

acquisition help

narrow; note 3 −±225 − kHz
wide; note 3 −±450 − kHz

∆f

AF

frequency deviation THD < 1.5%; normal gain −−±62 kHz

THD < 1.5%; reduced gain −−±124 kHz

∆f

AF(ident)

frequency deviation for safe

identification

VCC= 5 V; stereo: 1 kHz L,
400 Hz R

−−±125 kHz

α

AM

AM suppression AM: f

mod

= 1 kHz; m = 0.3
referenced to 27 kHz
FM deviation

40 46 − dB

K

O(FM)

VCO steepness ∆fFM/∆V

LF1,2

note 4 − 3.3 − MHz/V

K

D(FM)

phase detector steepness
∆I

LF1,2

/∆ϕ(VFM)

note 4 − 4 −µA/rad

2000 Apr 04 11

Philips Semiconductors Product specification

Multistandard dual carrier stereo sound decoder TDA9873H

V

CAF

DC voltage at CAF1 and
CAF2

dependent on intercarrier
frequency f

FM

0.6 − 2.6 V

B

AF(−3dB)

−3 dB audio frequency
bandwidth

measured at AF1O and
AF2O; see Figs 7 and 8

upper limit dependent on
loop filter; note 4

65 80 − kHz

lower limit dependent on
CAF;CAF= 470 nF; note 5

−−20 Hz

V

o(FM)(rms)

output level (RMS value) measured at

AF1O and AF2O

− 250 − mV

Audio processing (pins 1, 2, 8 and 33)

V

o(rms)

AF output level (RMS value) f

mod

= 300 Hz;
54% modulation;
switchable by I2C-bus;
note 6

normal gain 400 500 600 mV
reduced gain 200 250 300 mV

V

o(cl)(rms)

AF output clipping level
(RMS value)

VCC= 5 V; THD = 1.5% 1400 −− mV

R

L

allowable load resistance AC coupled 10 −− kΩ

C

L

allowable load capacitance −−1.5 nF

R

L(DC)

allowable DC load resistance 100 −− kΩ

R

o

output resistance 70 150 300 Ω

THD total harmonic distortion V

o(rms)

= 0.5 V; fAF= 1 kHz − 0.2 0.5 %

α

cs(AF)(stereo)

AF channelseparation (stereo
mode; complete signal path)

without alignment; note 7

B/G or M (Korea)
standard

25 30 − dB

D/K standard 23 27 − dB

potentiometer alignment;
B/G, M and D/K standard;
notes 7 and 8

35 40 − dB

I2C-bus alignment;
notes 7 and 9

B/G and D/K standard 40 45 − dB
M standard 35 40 − dB

α

ct(AF)(dual)

AF crosstalk attenuation (dual
mode)

fi= 1 kHz for signal A;
fi= 400 Hz for signal B;
∆f=±50 kHz

complete signal path 65 70 − dB
stereo decoder only 70 75 − dB

α

mute(AF)

mute attenuation of AF signal 75 80 − dB

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

2000 Apr 04 12

Philips Semiconductors Product specification

Multistandard dual carrier stereo sound decoder TDA9873H

S/N

W

weighted signal-to-noise ratio
(complete signal path)

CCIR 468-4 weighted;
quasi peak; dual mode;
note 6

50 µs de-emphasis;
B/G, I and D/K standard

52 56 − dB

75 µs de-emphasis;
M standard

48 52 − dB

S/N

W(d)

signal-to-noise ratio at
external AF with stereo
decoder only

CCIR 468-4 weighted;
quasi peak;
V

o(rms)

= 500 mV

70 75 − dB

t

DEP(B/G)

de-emphasis time constant for
B/G, D/K and I standard

note 10; see Fig.4 − 50 −µs

t

DEP(M)

de-emphasis time constant for
M standard

note 10; see Fig.4 − 75 −µs

f

ro

roll-off frequency 470 nF at AF1I and AF2I;

without de-emphasis

low frequency (−3 dB) −−20 Hz
high frequency (−0.5 dB) 20 −− kHz

PSRR power supply ripple rejection

at OUTL and OUTR (overall
performance)

f

ripple

= 70 Hz;

V

ripple(p-p)

= 100 mV;

dual mode; see Fig.5

20 26 − dB

R

i(AF1)

AF1I input resistance 32 40 48 kΩ

R

i(AF2)

AF2I input resistance 32 40 48 kΩ

External additional inputs (pins 38 to 40)

V

i(nom)(rms)

nominal input signal voltage
(RMS value)

− 0.5 − V

V

i(cl)(rms)

clipping voltage level
(RMS value)

THD ≤ 1.5%; VCC= 5 V 1.4 −− V

G

v

AF signal voltage gain G = Vo/V

i

−1 0 +1 dB

R

i

input resistance 40 50 60 kΩ

f

ro

roll-off frequency low frequency (−3 dB) −−20 Hz

high frequency (−0.5 dB) 20 −− kHz

α

ct(ext)

AF crosstalk attenuation
(external input)

f

i(EXTL)

= 1 kHz;

f

i(EXTR)

= 400 Hz

70 75 − dB

Mono output OUTM (pin 43)

R

o

output resistance 70 200 350 Ω

R

L

load resistance AC coupled 10 −− kΩ

R

L(DC)

allowable DC load resistance 100 −− kΩ

C

L

load capacitance −−1.5 nF

α

mute

mute attenuation 60 −− dB

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

2000 Apr 04 13

Philips Semiconductors Product specification

Multistandard dual carrier stereo sound decoder TDA9873H

Pilot processing (pin 31)

f

pilot

pilot operating frequency
(3.5fH)

fH1= 15625 Hz − 54688 − Hz
f

H2

= 15734 Hz − 55070 − Hz

K

O(pilot)

VCO steepness ∆f

pilot

/∆V

LPF

note 11 − 26 − kHz/V

K

D(pilot)

phase detector steepness
∆I

LPF

/∆ϕ(pilot)

∆f

pilot

window ±150 Hz;

note 11

− 2 −µA/rad

∆f

SC2(pilot)

second sound carrier pilot
frequency deviation

unmodulated pilot 1.5 2.5 3.5 kHz

m

AM(pilot)

pilot AM modulation depth 25 50 75 %

Identification (pins 34 and 35)

f

LP(CID)

low-pass frequency response
at pin CID

−3 dB point 450 600 750 Hz

f

stereo

identification operating stereo
frequency

B/G and D/K standard;

1

⁄

133fH1

− 117.48 − Hz

f

stereo(h)

identification operating
stereo (h) frequency

M standard;1⁄

105fH2

− 149.85 − Hz

f

dual

identification operating dual
frequency

B/G and D/K standard;

1

⁄57f

H1

− 274.12 − Hz

f

dual(h)

identification operating
dual (h) frequency

M standard;1⁄57f

H2

− 276.04 − Hz

t

ident(on)

total identification time on for
identification mode change

normal mode; note 12 0.35 − 2s
fast mode; note 12 0.1 − 0.5 s

t

ident(off)

total identification time off for
identification mode change

normal mode; note 12 0.6 − 1.6 s
fast mode; note 12 0.15 − 0.4 s

∆f

ident

identification window width normal mode; note 13 − 2 − Hz

fast mode; note 13 − 8 − Hz

C/N

pilot

pilot sideband carrier-to-noise
ratio for start of identification

− 33 − dBc/Hz

f

det

pull-in frequency range of
identification PLL (referred to
f

stereo

= 117.48 Hz and

f

dual

= 274.12 Hz)

normal mode lower side −0.63 −−0.63 Hz
normal mode upper side 0.63 − 0.63 Hz
fast mode lower side −2.05 −−2.05 Hz
fast mode upper side 2.05 − 2.05 Hz

Reference input (operation as crystal oscillator; pin 15)

f

sr(xtal)

series resonant frequency of
crystal

fundamental mode;
CL= 20 to 30 pF during
crystal production

− 4.0 − MHz

∆f

w(max)

allowed maximum spread of
oscillator working frequency

over operating temperature
range including ageing and
influence of drive circuit;
note 3

−−±300 × 10

−6

∆f

R

cutting frequency tolerance −−±50 × 10

−6

∆f

d

frequency drift −−±50 × 10

−6

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

2000 Apr 04 14

Philips Semiconductors Product specification

Multistandard dual carrier stereo sound decoder TDA9873H

Notes

1. Input level for IF intercarrier from an external generator with 50 Ω source impedance, f

mod

= 400 Hz, 27 kHz
deviation of audio references: level for SC1 is 50 mV (RMS), SC1/SC2 = 7 dB. S/N and THD measurements are
taken at 50 µs de-emphasis.

2. For higher input voltages a series resistor connected to pin 25 is recommended.

3. The tolerance of the reference frequency determines the accuracy of the FM demodulator centre frequencies,
maximum FM deviation, pilot window width and pilot window mid-frequency error.

R

s(eq)

equivalent crystal series
resistance

− 60 200 Ω

R

s(um)

crystal series resistance of
unwanted mode

2 × R

s(eq)

−− Ω

Reference input (operation as input terminal; pin 15)

f

ω

working frequency − 4 − MHz

V

I

DC input voltage 2.3 2.6 2.9 V

R

i

input resistance 2.5 3.0 3.5 kΩ

∆f

ref

tolerance of reference
frequency

notes 3 and 14 −−±300 × 10

−6

V

ref(rms)

amplitude of reference source
(RMS value)

operation as input terminal 80 − 400 mV

V

o(ref)

output resistance of reference
source

−−4.7 kΩ

C

K

decoupling capacitance to
external reference source

operation as input terminal 22 100 − pF

I

2

C-bus transceiver (pins 29 and 30); note 15

f

clk

clock frequency 0 − 100 kHz

V

IH

HIGH-level input voltage 3 − V

CC

V

V

IL

LOW-level input voltage −0.3 − +1.5 V

I

IH

HIGH-level input current −10 − +10 µA

I

IL

LOW-level input current −10 − +10 µA

V

OL

LOW-level output voltage IOL=3mA −−0.4 V

I

o(sink)

output sink current VCC=0V −−10 µA

I

o(source)

output source current VCC=0V −−10 µA

Port outputs P1 and P2 (open-collector outputs; pins 37 and 42)

V

OL

LOW-level output voltage Io= 1 mA (sink) −−0.3 V

I

o(sink)(port)

port output sink current port at LOW level −−1mA

Power-on reset

V

CC(sr)

supply voltage for start of
reset

decreasing supply voltage 2.5 3 3.5 V

V

CC(er)

supply voltage for end of reset increasing supply voltage;

I2C-bus transmission
enabled

−−4.5 V

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

2000 Apr 04 15

Philips Semiconductors Product specification

Multistandard dual carrier stereo sound decoder TDA9873H

4. Approximate calculation of the FM-PLL loop filter can be done using the following formula:

with K

O

= VCO steepness or

KD= phase detector steepness
R = loop resistor.

C

S

= series capacitor.

C

P

= parallel capacitor.

B

L(−3dB)

= loop bandwidth for −3 dB.

Example for B

L(−3dB)

= 80 kHz: CS= 3.3 nF; CP= 680 pF; R = 5.6 kΩ.

5. Thelower limit of audio bandwidth depends on the value of the capacitors at pins 24 and 26. A value ofC

AF

= 470 nF

leads to B

AF(−3dB)

< 20 Hz and a value of CAF= 220 nF leads to B

AF(−3dB)

< 40 Hz.

6. S/N decreases by 4 dB if no second sound carrier is present; auto mute enabled.
Condition for B/G, I and D/K standard: VCC= 5 V and ∆f = 27 kHz (m = 54%).
Condition for M standard: VCC= 5 V and ∆f = 13.5 kHz; 6 dB gain added internally to compensate for smaller
deviation.

7. R modulated and L monitored. The I2C-bus stereo adjustment has to be set to a default value. For B/G, D/K (2) and
M standard the default value is 0 dB, for D/K (1) standard the default value is 0.1 dB and for D/K (3) standard the
default value is 0.2 dB.

8. Using potentiometer adjustment, the AF output voltage is reduced by 1.3 dB because of the series resistor
(see Fig.8).

9. Separate alignment for each standard necessary. Minimum value for D/K (3) standard is 37 dB.

10. Because the loop transfer function is not flat, the de-emphasis is superimposed by an amplitude response correction
that compensates for an influence from the FM demodulators.

11. Approximate calculation of the pilot PLL loop filter can be done using the following formulae:
B

L(−3dB)

≈ 1.89f

n

with fn= natural frequency of PLL.
K

O

= VCO steepness or

KD= phase detector steepness
R = loop resistor.

C = loop capacitor.
B

L(−3dB)

= loop bandwidth for −3 dB.
ϑ = damping factor.
The formulae are only valid under the condition: 0.5 ≤ϑ≤0.8
Example for B

L(−3dB)

= 544 Hz: C = 100 nF; R = 7.5 kΩ; ϑ = 0.67; fn= 288 Hz.

B

L 3dB–()

1

2π

------ -

K

OKD

×

C

P

--------------------- 1.55

1

4R

2

KOKD× CP××

----------------------------------------------------

–





=

rad

V

---------





2π

Hz

V

-------





µA

rad

---------





f

n

1

2π

------ -

K

OKD

×

C

---------------------=

ϑ

R

2

--- -

CK

O

× K

D

×=

rad

V

---------





2π

Hz

V

-------





µA

rad

---------





2000 Apr 04 16

Philips Semiconductors Product specification

Multistandard dual carrier stereo sound decoder TDA9873H

12. The maximum total system identification time ‘on’ for a channel change is equal to the maximum value of t

ident(on)

plus t

I2C(read-out)

. The maximum total system identification time ‘off’ for a channel change is equal to the maximum

value of t

ident(off)

plus t

I2C(read-out)

. The fast mode is mainly for use during search tuning, program or channel select.
If the channel is selected, the identification response should be switched to normal mode for improved reliability.
However due to the transition from fast to normal mode, the identification bits are not valid for one integrator period.
Therefore the transmitter mode detected during the fast mode must be stored before changing to the normal mode.
The storage must be kept for two seconds (maximum value of t

ident(on)

in the normal mode) from the moment of

transition. The identification can now operate in the normal mode until the next tuning action.

13. Identification window is defined as total pull-in frequency range (lower plus upper side) of identification PLL (steady
detection) plus window increase due to integrator (fluctuating detection).

14. Window width dependent on fω.

15. The AC characteristics are in accordance with the I2C-bus specification. The maximum clock frequency is 100 kHz.
Information about the I2C-bus can be found in the brochure

“The I2C-bus and how to use it”

(order number 9398 393 40011).

Table 1 TV standard settings

STANDARD

f

SC1

(MHz)

f

SC2

(MHz)

PILOT

FREQUENCY

f

pilot

(kHz)

STEREO

IDENTIFICATION

FREQUENCY

f

stereo

(Hz)

DUAL

IDENTIFICATION

FREQUENCY

f

dual

(Hz)

DE-EMPHASIS

t

DEP

(µs)

M 4.5 4.724 55.0699 149.85 276.04 75
B/G 5.5 5.742 54.6875 117.48 274.12 50
I6−−−−50
D/K (1) 6.5 6.268 54.6875 117.48 274.12 50
D/K (2) 6.5 6.742 54.6875 117.48 274.12 50
D/K (3) 6.5 5.742 54.6875 117.48 274.12 50

Fig.3 Allowable interference video level.

video: colour-bar

SC1
SC2

-----------

7 dB=

handbook, full pagewidth

1

0.5

0.16
0 6 12 25 150

SC1

50

2

MHB433

V

i(FM)(rms)

(mV)

V

i(vid)(p-p)

(V)

2000 Apr 04 17

Philips Semiconductors Product specification

Multistandard dual carrier stereo sound decoder TDA9873H

Fig.4 Tolerance scheme of AF frequency response; de-emphasis with C

DE1=CDE2

=10nF±5%.

handbook, full pagewidth

−2

+3

MHB431

−1

0

+1

+2

10 10

2

10

3

10

5

10

4

V

o(AF)

(dB)

f

o(AF)

(Hz)

R: −15%
C: −5%

R: +15%
C: +5%

Fig.5 Ripple rejection condition.

PSRR 20 log

V

ripple

at OUTR

V

ripple

at V

CC

---------------------------------------- -

=

handbook, full pagewidth

TDA9873H

VCC = 5 V

t

100 mV (f

ripple

= 70 Hz)

MHB432

VCC = 5 V

2000 Apr 04 18

Philips Semiconductors Product specification

Multistandard dual carrier stereo sound decoder TDA9873H

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MHB434

full pagewidth

+

OUTM

(E3, E4, E5)

EXTM

SWITCH

1

2

3

4

5

6

6

5

4

3

2

1

(mute)

d

EXTL

d

EXTR

OUTR

d

1

2

3

4

5

6

6

5

4

3

2

1

6 dB

d = 6 dB attenuation

OUTL

6 dB

S

S

1

2

0/6 dB

0/−6 dB

+ MUTE

0/6 dB

S is open

for

standard M

6 dB

for

standard M

B5, B7

+

acquisition

stereo

separation

adjust

−0.6 to +0.7 dB

B4 = 0

B4 = 0

B4 = 1

B4 = 1

(L)

(R)

STANDARD

DEPENDENT

DE-MATRIXING

CDE1

CDE2

DE-EMPHASISDE-MATRIXLEVEL + STEREO ADJUST

0/−6 dB
+ MUTE

AF1I

AF2I

L + R

2

, M, A

L − R

2

, BR,

Fig.6 Audio part.

Example: For stereo mode (B4 = 1), OUTL is switched to position 4 and OUTR switched to position 5. For mono mode (B4 = 0), OUTL and OUTR are both switched to position 4.
This means: For mono/stereo switching, not only B4 but also the switch (stereo and mono output) must be set (see Tables 13 and 25).
Stereo output: internal/external source: B0 and B1; output switching: B2 and B3.

2000 Apr 04 19

Philips Semiconductors Product specification

Multistandard dual carrier stereo sound decoder TDA9873H

I2C-BUS PROTOCOL
I

2

C-bus format to read (device identification code)

Table 2 Explanation of I

2

C-bus format to read (device identification code)

Note

1. This data word H80 (device identification code) is read from the subaddress 254 which is set in the last write transfer.

I

2

C-bus format to read (slave transmits data)

Table 3 Explanation of I

2

C-bus format to read (slave transmits data)

Table 4 Definition of the transmitted byte after read condition

S SLAVE ADDRESS R/

W = 0 A SUBADDRESS A S SLAVE ADDRESS R/W = 1 A DATA AN P

NAME DESCRIPTION

S START condition; generated by the master
SLAVE ADDRESS 101 101 1; pin MAD not connected (standard)

101 101 0; pin MAD connected to ground (pin programmable)

R/

W logic 0 (write); generated by the master

logic 1 (read); generated by the master
A acknowledge; generated by the slave
SUBADDRESS 111 111 10 (254)
DATA slave transmits the device identification code 80H; note 1
AN acknowledge not; generated by the master
P STOP condition; generated by the master

S SLAVE ADDRESS R/

W = 1 A DATA AN P

NAME DESCRIPTION

S START condition; generated by the master
SLAVE ADDRESS 101 101 1; pin MAD not connected (standard)

101 101 0; pin MAD connected to ground (pin programmable)
R/

W logic 1 (read); generated by the master
A acknowledge; generated by the slave
DATA slave transmits an 8-bit data word
AN acknowledge not; generated by the master
P STOP condition; generated by the master

MSB LSB

D7 D6 D5 D4 D3 D2 D1 D0

1 0 0 Y Y DS ST PONR

2000 Apr 04 20

Philips Semiconductors Product specification

Multistandard dual carrier stereo sound decoder TDA9873H

Table 5 Bit functions of Table 4

Table 6 Interpretation of identification bits

Table 7 Power-on reset

If the master generates an acknowledge not and a STOP condition when it has receivedthe data word READ, the master
terminates the bus transfer. On the other hand, if the master generates an acknowledge then the slave started a second
transfer with the READ byte and so on until the master generates an acknowledge not and STOP condition.

I

2

C-bus format to write (slave receives data)

Table 8 Explanation of I

2

C-bus format to write (slave receives data)

Note

1. If more than 1 byte of DATA is transmitted, auto-increment is performed, starting from the transmitted subaddress
and auto-increment of the subaddress is performed in accordance with the order of Table 9.

BIT FUNCTION

PONR Power-on reset; if PONR= 1, then Power-on reset is detected

ST stereo sound; if ST = 1, then stereo sound is identified

DS dual sound; if DS = 1, then dual sound is identified

Y indefinite

ST DS FUNCTION

0 0 mono
0 1 dual sound
1 0 stereo sound
1 1 incorrect identification

PONR FUNCTION

0 after successful reading of the status register
1 after Power-on reset or after supply breakdown

S SLAVE ADDRESS R/

W = 0 A SUBADDRESS A DATA A P

NAME DESCRIPTION

S START condition
SLAVE ADDRESS 101 101 1; pin MAD not connected (standard)

101 101 0; pin MAD connected to ground (pin programmable)

R/

W logic 0 (write)
A acknowledge; generated by slave
SUBADDRESS see Table 9
DATA note 1; see Table 10
P STOP condition

2000 Apr 04 21

Philips Semiconductors Product specification

Multistandard dual carrier stereo sound decoder TDA9873H

Table 9 Subaddress definition (second byte after slave address)

Note

1. Significant subaddress bits.

Table 10 Data definition (third byte after slave address)

Table 11 Bit functions of Table 10

Table 12 Data setting of third byte after Power-on reset; see note 1

Note

1. X = don’t care.

FUNCTION

MSB LSB

D7 D6 D5 D4 D3 D2 D1

(1)

D0

(1)

Switching 00000000
Adjust/standard 00000001
Port 00000010

FUNCTION

MSB LSB

D7 D6 D5 D4 D3 D2 D1 D0

Switching data B7 B6 B5 B4 B3 B2 B1 B0
Adjust/standard data C7 C6 C5 C4 C3 C2 C1 C0
Port data 0 0 E5 E4 E3 E2 E1 E0

BITS FUNCTION

B0 and B1 signal source select; see Table 14
B2 and B3 output signal select; see Table 13
B4 stereo setting bit; see Table 13
B5 output level switching; see Table 16
B6 mute bit; see Table 17
B7 auto mute enable; see Table 18
C0 to C3 stereo adjust; see Table 19
C4 to C6 standard switching; see Table 20
C7 identification response time; see Table 21
E0 port 1; see Table 22
E1 port 2; see Table 23
E2 test mode; see Table 24 (not for customer)
E3 to E5 mono output setting; see Table 25

FUNCTION

MSB LSB

D7 D6 D5 D4 D3 D2 D1 D0

Switching data 1 1 XXXXXX
Adjust/standard data 00000110
Port data 00111011

2000 Apr 04 22

Philips Semiconductors Product specification

Multistandard dual carrier stereo sound decoder TDA9873H

SWITCHING DATA BITS

Table 13 Mode and output switching; data byte to select AF inputs and AF outputs

TRANSMISSION MODE SELECTED MODE OUTL OUTR B4 B3 B2

Mono M M M 0 0 1
Stereo forced mono M M 0 0 1

ST LR100

RL111

Dual AB A B 0 0 0

AA AA001
BB BB010

BA BA011
External mono EXTM EXTM EXTM 0 0 0
External stereo EXTL, EXTR EXTL EXTR 0 0 0

EXTL, EXTL EXTL EXTL 0 0 1

EXTR, EXTR EXTR EXTR 0 1 0

EXTR, EXTL EXTR EXTL 0 1 1

Table 14 Source switching

Table 15 Stereo decoder outputs (CDE1 and CDE2)

Table 16 Output level switching

Table 17 Mute switching of AF outputs

Table 18 Auto mute activating

SIGNAL SOURCE B1 B0

Internal 0 0
External stereo 1 0
External mono 1 1

TRANSMISSION MODE OUTPUTS B4

Stereo stereo 1
Stereo mono 0
Mono mono 0
Dual dual 0

OUTPUT LEVEL B5

Normal gain 1
Reduced gain 0

OUTL AND OUTR B6

Not muted 0
Muted 1

AUTO MUTE B7

Disabled 0
Active 1

2000 Apr 04 23

Philips Semiconductors Product specification

Multistandard dual carrier stereo sound decoder TDA9873H

ADJUST AND STANDARD DATA BITS

Table 19 Stereo adjustment, gain adjust in R channel

Table 20 Standard switching

Table 21 Identification response time

PORT DATA BITS

Table 22 Port 1 output

Table 23 Port 2 output

Table 24 Test mode; note 1

Note

1. Not for customer; for Philips Semiconductors only.

GAIN STEREO

ADJUSTMENT (dB)

C3 C2 C1 C0

−0.6 0000

−0.5 0001

−0.4 0010

−0.3 0011

−0.2 0100

−0.1 0101

0.0 0110
+0.1 0111
+0.2 1000
+0.3 1001
+0.4 1010
+0.5 1011
+0.6 1100
+0.7 1101

STANDARD C6 C5 C4

B/G 0 0 0
M 001
D/K (1) 0 1 0
D/K (2) 0 1 1
D/K (3) 1 0 0
I 101

RESPONSE TIME C7

Normal 0
Fast 1

PORT 1 E0

LOW level 0
HIGH level 1

PORT 2 E1

LOW level 0
HIGH level 1

TEST MODE E2

Off 0
On 1

2000 Apr 04 24

Philips Semiconductors Product specification

Multistandard dual carrier stereo sound decoder TDA9873H

Table 25 Mono output

TRANSMISSION MODE STEREO DECODER OUTM E5 E4 E3 B4

Mono mono mono 0 0 0 0
Stereo forced mono mono 0 0 0 0
Dual dual dual A 0 0 0 0
Dual dual dual B 0 0 1 0
Stereo stereo mono 0 1 0 1

−−EXTM 0 1 1 −

−−EXTL 1 0 0 −

−−EXTR 1 0 1 −

−−EXTL/R;

1

⁄2(L + R) 1 1 0 −

−−mute 1 1 1 −

2000 Apr 04 25

Philips Semiconductors Product specification

Multistandard dual carrier stereo sound decoder TDA9873H

APPLICATION INFORMATION

handbook, full pagewidth

MHB435

7.5 kΩ

4.7
kΩ

4.7
kΩ

2.2 µF

470 nF

10 nF

470

nF

100 nF

TDA9873H

V

CC

V

CC

V

CC

28

470 nF

SCL

SCL

29

SDA

SDA

30

LPF

31

5.6 kΩ

3.3 nF

680 pF

5.6 kΩ

3.3 nF

680 pF

LF2

18

n.c.19n.c.

20

n.c.

16

n.c.

12

n.c.

17

LF1

14

AFR

13

XTAL

15

n.c.

22

MAD

21

38 37

36

40

n.c. OUTM P2Vref EXTL EXTR EXTM P1 CID CTRIG

n.c.

44 394243 41 3435

DGND

AGND

CDE2

10 nF

CDE1

OUTR

AF1I

AF1O

27

CAF2

26

47 pF

IFINT

2.2 µF

2.2
µF

47
µF

470
nF

OUTL

4.7
nF

470
nF

470
nF

470
nF

25

470 nF

CAF1

24

n.c.

n.c.

n.c.

n.c.

n.c.

23

AF2O

32

470 nF

AF2I

33

6

5

4

3

7

8

9

10

11

2

1

IF

intercarrier

P2

V

CC

P1

external inputs

Fig.7 Application circuit without potentiometer alignment.

2000 Apr 04 26

Philips Semiconductors Product specification

Multistandard dual carrier stereo sound decoder TDA9873H

handbook, full pagewidth

MHB436

10 kΩ

4.7
kΩ

7.5 kΩ

4.7
kΩ

4.7
kΩ

2.2 µF

470 nF

10 nF

470

nF

100 nF

TDA9873H

V

CC

V

CC

V

CC

28

470 nF

SCL

SCL

29

SDA

SDA

30

LPF

31

5.6 kΩ

3.3 nF

680 pF

5.6 kΩ

3.3 nF

680 pF

LF2

18

n.c.19n.c.

20

n.c.

16

n.c.

12

n.c.

17

LF1

14

AFR

13

XTAL

15

n.c.

22

MAD

21

38 37

36

40

n.c. OUTM P2Vref EXTL EXTR EXTM P1 CID CTRIG

n.c.

44 394243 41 3435

DGND

AGND

CDE2

10 nF

CDE1

OUTR

AF1I

AF1O

27

CAF2

26

47 pF

IFINT

2.2 µF

2.2
µF

47
µF

470
nF

OUTL

4.7
nF

470
nF

470
nF

470
nF

25

470 nF

CAF1

24

n.c.

n.c.

n.c.

n.c.

n.c.

23

AF2O

32

470 nF

AF2I

33

6

5

4

3

7

8

9

10

11

2

1

IF

intercarrier

P2

V

CC

P1

external inputs

Fig.8 Application circuit with potentiometer alignment.

2000 Apr 04 27

Philips Semiconductors Product specification

Multistandard dual carrier stereo sound decoder TDA9873H

INTERNAL PIN CONFIGURATION

Fig.9 Pin 1; OUTL and pin 2; OUTR.

handbook, halfpage

+

MHB437

8 kΩ

2.5 V

10 kΩ

10 kΩ

1, 2

Fig.10 Pin 3; CDE1 and pin 6; CDE2.

handbook, halfpage

+

MHB438

2.5 V

7.5 kΩ

15 kΩ

3, 6

Fig.11 Pin 8; AF1I and pin 33; AF2I.

handbook, halfpage

+

MHB439

2.5 V

50 kΩ

8, 33

Fig.12 Pin 10; AF1O and pin 32; AF2O.

handbook, halfpage

+

5 kΩ

MHB440

34 kΩ

240 µA

10, 32

2000 Apr 04 28

Philips Semiconductors Product specification

Multistandard dual carrier stereo sound decoder TDA9873H

handbook, halfpage

FM DEMODULATOR
NARROW-BAND PLL

SC1

AF

AMPLIFIER

1

AFR CAF1

470 nF 470 nF

CAF2 AGND

MGU118

FM DEMODULATOR
NARROW-BAND PLL

SC2

+

AF

AMPLIFIER

2

+

+

24 26 713

Fig.13 Pin 13; AFR (internal analog ground). Fig.14 Pin 14; LF1 and pin 18; LF2.

handbook, halfpage

MHB442

14, 18

2 kΩ

2 kΩ

23 kΩ

1.5 V

+

Fig.15 Pin 15; XTAL.

handbook, halfpage

MHB443

+

15

1.5 kΩ

100 µA

Fig.16 Pin 21; MAD.

handbook, halfpage

MHB444

+

21

2000 Apr 04 29

Philips Semiconductors Product specification

Multistandard dual carrier stereo sound decoder TDA9873H

Fig.17 Pin 24; CAF1 and pin 26; CAF2.

handbook, halfpage

MHB445

24, 26

80
µA

2.5 V

+

Fig.18 Pin 25; IFINT.

handbook, halfpage

MHB446

+

+

25

3 V

5 kΩ

5 kΩ

2 kΩ

3.3 kΩ30 kΩ

3.05 kΩ

500 µA

4.8 pF

4.8 pF

Fig.19 Pin 28; VCC.

handbook, halfpage

MHB447

28

5 V

+

Fig.20 Pin 29; SCL.

handbook, halfpage

MHB448

29

1.8 kΩ

2.5 V

2000 Apr 04 30

Philips Semiconductors Product specification

Multistandard dual carrier stereo sound decoder TDA9873H

Fig.21 Pin 30; SDA.

handbook, halfpage

MHB449

30

1.8 kΩ

2.5 V

Fig.22 Pin 31; LPF and pin 35; CID.

handbook, halfpage

31, 35

4

kΩ

4

kΩ

2

kΩ

80
µA

2.5 V

+

+

56

kΩ

MHB450

Fig.23 Pin 34; CTRIG.

handbook, halfpage

MHB451

3.33 kΩ

2.5 V

+

56 kΩ

34

Fig.24 Pin 37; P1 and pin 42; P2.

handbook, halfpage

MHB452

+

37, 42

2000 Apr 04 31

Philips Semiconductors Product specification

Multistandard dual carrier stereo sound decoder TDA9873H

Fig.25 Pin 38; EXTM; pin 39; EXTR and pin 40;

EXTL.

handbook, halfpage

MHB453

+

38, 39, 40

25 kΩ

25 kΩ

1

2

3

4

Fig.26 Pin 41; V

ref

.

handbook, halfpage

MHB454

+

41

5.9 kΩ

100 Ω

6.8 kΩ

Fig.27 Pin 43; OUTM.

handbook, halfpage

MHB455

8 kΩ

10 kΩ

10 kΩ

2.5 V

+

43

2000 Apr 04 32

Philips Semiconductors Product specification

Multistandard dual carrier stereo sound decoder TDA9873H

PACKAGE OUTLINES

UNIT A1A2A3bpcE

(1)

eH

E

LL

p

Zywv θ

REFERENCES

OUTLINE

VERSION

EUROPEAN

PROJECTION

ISSUE DATE

IEC JEDEC EIAJ

mm

0.25

0.05

2.3

2.1

0.25

0.50

0.35

0.25

0.14

14.1

13.9

1

19.2

18.2

2.4

1.8

7
0

o
o

0.152.35 0.10.3

DIMENSIONS (mm are the original dimensions)

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

2.0

1.2

SOT205-1

97-08-01
99-12-27

D

(1) (1)(1)

14.1

13.9

H

D

19.2

18.2

E

Z

2.4

1.8

D

b

p

e

θ

E

A

1

A

L

p

detail X

L

(A )

3

B

11

y

c

D

H

b

p

E

H

A

2

v M

B

D

Z

D

A

Z

E

e

v M

A

X

1

44

34

33 23

22

12

133E01

pin 1 index

w M

w M

0 5 10 mm

scale

QFP44: plastic quad flat package; 44 leads (lead length 2.35 mm); body 14 x 14 x 2.2 mm

SOT205-1

A

max.

2.60

2000 Apr 04 33

Philips Semiconductors Product specification

Multistandard dual carrier stereo sound decoder TDA9873H

UNIT A1A2A3bpcE

(1)

eH

E

LL

p

Zywv θ

REFERENCES

OUTLINE
VERSION

EUROPEAN

PROJECTION

ISSUE DATE

IEC JEDEC EIAJ

mm

0.25

0.05

1.85

1.65

0.25

0.40

0.20

0.25

0.14

10.1

9.9

0.8 1.3

12.9

12.3

1.2

0.8

10

0

o

o

0.15 0.10.15

DIMENSIONS (mm are the original dimensions)

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

0.95

0.55

SOT307-2

95-02-04
97-08-01

D

(1) (1)(1)

10.1

9.9

H

D

12.9

12.3

E

Z

1.2

0.8

D

e

E

B

11

c

E

H

D

Z

D

A

Z

E

e

v M

A

X

1

44

34

33 23

22

12

y

θ

A

1

A

L

p

detail X

L

(A )

3

A

2

pin 1 index

D

H

v M

B

b

p

b

p

w M

w M

0 2.5 5 mm

scale

QFP44: plastic quad flat package; 44 leads (lead length 1.3 mm); body 10 x 10 x 1.75 mm

SOT307-2

A

max.

2.10

2000 Apr 04 34

Philips Semiconductors Product specification

Multistandard dual carrier stereo sound decoder TDA9873H

SOLDERING
Introduction to soldering surface mount packages

Thistext gives a very brief insight to a complextechnology.
A more in-depth account of soldering ICs can be found in
our

“Data Handbook IC26; Integrated Circuit Packages”

(document order number 9398 652 90011).
There is no soldering method that is ideal for all surface

mount IC packages. Wave soldering is not always suitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.

Reflow soldering

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
totheprinted-circuitboardbyscreenprinting,stencillingor
pressure-syringe dispensing before package placement.

Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.

Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.

Wave soldering

Conventional single wave soldering is not recommended
forsurface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.

To overcome these problems the double-wave soldering
method was specifically developed.

If wave soldering is used the following conditions must be
observed for optimal results:

• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.

• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint

longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;

– smaller than 1.27 mm, the footprint longitudinal axis

must be parallel to the transport direction of the
printed-circuit board.

The footprint must incorporate solder thieves at the
downstream end.

• Forpackages with leads on four sides,thefootprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.

During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

Manual soldering

Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.

When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.

2000 Apr 04 35

Philips Semiconductors Product specification

Multistandard dual carrier stereo sound decoder TDA9873H

Suitability of surface mount IC packages for wave and reflow soldering methods

Notes

1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the

“Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”

.

2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).

3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.

4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.

5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.

PACKAGE

SOLDERING METHOD

WAVE REFLOW

(1)

BGA, SQFP not suitable suitable
HLQFP, HSQFP, HSOP, HTSSOP, SMS not suitable

(2)

suitable

PLCC

(3)

, SO, SOJ suitable suitable

LQFP, QFP, TQFP not recommended

(3)(4)

suitable

SSOP, TSSOP, VSO not recommended

(5)

suitable

2000 Apr 04 36

Philips Semiconductors Product specification

Multistandard dual carrier stereo sound
decoder

TDA9873H

DATA SHEET STATUS

Note

1. Please consult the most recently issued data sheet before initiating or completing a design.

DATA SHEET STATUS

PRODUCT

STATUS

DEFINITIONS

(1)

Objective specification Development This data sheet contains the design target or goal specifications for

product development. Specification may change in any manner without
notice.

Preliminary specification Qualification Thisdata sheet contains preliminarydata, and supplementary data will be

published at a later date. Philips Semiconductors reserves the right to
make changes at any time without notice in order to improve design and
supply the best possible product.

Product specification Production This data sheet contains final specifications. Philips Semiconductors

reserves the right to make changes at any time without notice in order to
improve design and supply the best possible product.

DEFINITIONS
Short-form specification  The data in a short-form

specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.

Limiting values definition  Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
atthese or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.

Application information  Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
norepresentation or warranty that suchapplications will be
suitable for the specified use without further testing or
modification.

DISCLAIMERS
Life support applications  These products are not

designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductorscustomers using or sellingtheseproducts
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.

Right to make changes  Philips Semiconductors
reserves the right to make changes, without notice, in the
products, including circuits, standard cells, and/or
software, described or contained herein in order to
improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for
theuse of any of these products,conveysnolicence or title
under any patent, copyright, or mask work right to these
products,and makes no representations or warranties that
these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified.

PURCHASE OF PHILIPS I

2

C COMPONENTS

Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.

2000 Apr 04 37

Philips Semiconductors Product specification

Multistandard dual carrier stereo sound decoder TDA9873H

NOTES

2000 Apr 04 38

Philips Semiconductors Product specification

Multistandard dual carrier stereo sound decoder TDA9873H

NOTES

2000 Apr 04 39

Philips Semiconductors Product specification

Multistandard dual carrier stereo sound decoder TDA9873H

NOTES

© Philips Electronics N.V. SCA
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.

Internet: http://www.semiconductors.philips.com

2000

69

Philips Semiconductors – a w orldwide compan y

For all other countries apply to: Philips Semiconductors,

International Marketing & Sales Communications, Building BE-p, P.O. Box 218,
5600 MD EINDHOVEN, The Netherlands, Fax. [phone]

Argentina: see South America
Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140,

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Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213,

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Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6,

220050 MINSK, Tel. [phone], Fax. [phone]

Belgium: see The Netherlands
Brazil: see South America
Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor,

51 James Bourchier Blvd., 1407 SOFIA,
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Canada: PHILIPS SEMICONDUCTORS/COMPONENTS,
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Hungary: see Austria
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Tel. [phone], Fax. [phone]

Indonesia: PT Philips Development Corporation, Semiconductors Division,
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Ireland: Newstead, Clonskeagh, DUBLIN 14,
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Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053,
TEL AVIV 61180, Tel. [phone], Fax. [phone]

Italy: PHILIPS SEMICONDUCTORS, Via Casati, 23 - 20052 MONZA (MI),
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Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku,
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Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,
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Middle East: see Italy

Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,

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Pakistan: see Singapore
Philippines: Philips Semiconductors Philippines Inc.,

106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. [phone], Fax. [phone]

Poland: Al.Jerozolimskie 195 B, 02-222 WARSAW,
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Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
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Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,
TAIPEI, Taiwan Tel. [phone], Fax. [phone]

Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,
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Turkey: Yukari Dudullu, Org. San. Blg., 2.Cad. Nr. 28 81260 Umraniye,
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Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. [phone], Fax. [phone]

United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
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United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. [phone], Fax. [phone]

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Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,

Tel. [phone], Fax.[phone]

Printed in The Netherlands 753504/03/pp40 Date of release: 2000 Apr 04 Document order number: 9397 750 06932