Datasheet TDA9859 Datasheet (Philips)

INTEGRATED CIRCUITS

DATA SH EET

TDA9859

Universal hi-fi audio processor for
TV

Preliminary specification
File under Integrated Circuits, IC02

1997 Sep 01

Philips Semiconductors Preliminary specification

Universal hi-fi audio processor for TV TDA9859

FEATURES

• Multi-source selector switches six AF inputs
(three stereo sources or six mono sources)

• Each of the input signals can be switched to each of the
outputs (crossbar switch)

• Outputs for loudspeaker channel and peri-TV connector
(SCART)

• Switchable spatial stereo and pseudo stereo effects

• Audio surround decoder can be added externally

• Two general purpose logic output ports

2

C-bus control of all functions.

• I

QUICK REFERENCE DATA

SYMBOL PARAMETER MIN. TYP. MAX. UNIT

V

P

I

P

V

i(rms)

V

o(rms)

G

v

positive supply voltage (pin 6) 7.2 8.0 8.8 V
supply current − 25 − mA
input signal levels for 0 dB gain (RMS value) 2 −−V
output signal levels for 0 dB gain (RMS value) 2 −−V
voltage gain in main channel

volume control (1 dB steps, balance included) −63 − +15 dB
mute −80 −−dB
bass control (1.5 dB steps) −12 − +15 dB

treble control (3 dB steps) −12 − +12 dB
THD total harmonic distortion − 0.1 − %
S/N signal-to-noise ratio − 85 − dB
T

amb

operating ambient temperature 0 − 70 °C

GENERAL DESCRIPTION

The TDA9859 provides control facilities for the main and
the SCART channel of a TV set. Due to extended
switching possibilities, signals from three stereo sources
can be handled.

ORDERING INFORMATION

TYPE

NUMBER

NAME DESCRIPTION VERSION

PACKAGE

TDA9859 SDIP32 plastic shrink dual in-line package; 32 leads (400 mil) SOT232-1

1997 Sep 01 2

Philips Semiconductors Preliminary specification

Universal hi-fi audio processor for TV TDA9859

BLOCK DIAGRAM

outputs

channel

loudspeaker

C-bus

2

I

MAD SDA SCL

33 nF

5.6 nF

(1)

C

C

C

TL

BL2

BL1

P1

P2

2

31

C-BUS

2

I

INTERFACE

19 25 17 16

22 21

L

L

LOUT

18

STEREO

SPATIAL

MUTE

PSEUDO

STEREO

R

R

LOUT

15

STEREO

VOLUME

BALANCE

TREBLE

CONTROL

BASS

CONTROL

MONO

FORCED

14

11 12

29 27

MHA778

BR2

C

(1)

BR1

C

5.6 nF

TR

(1)

C

33 nF

PS2

extended bass control

C

PS1

C

11 (22) 12 (21)

0.15 µF

13 kΩ

68 nF

width

R

SCOUT

L

output

SCART

LR

SCOUT

VOLUME

CONTROL

R

23 10

24 9

48

VOLTAGE

LIN

L

LIN

R

MOUT

L

MOUT

LR

GND

100

C

SMO

LINE output or optional

µF

connection

surround sound decoder

should be replaced by the extended bass control network.

BR/L2

Fig.1 Block diagram and application circuit.

and C

BR/L1

(1) For extended bass control, the capacitor between C

TDA9859

26 7

28

L

AIN

L

30

R

AIN

470 nF

AUX

SOURCE

MULTIPLE

AND MODE

1
L

SCIN

470 nF

L

R

SELECTOR

470 nF

SCART

audio

32

R

SCIN

R

inputs

SWITCH)

(CROSSBAR

3
L

MIN

470 nF

470 nF

L

5
R

MIN

MAIN

R

470 nF

REFERENCE

6
P

V

+8 V

1997 Sep 01 3

Philips Semiconductors Preliminary specification

Universal hi-fi audio processor for TV TDA9859

PINNING

SYMBOL PIN DESCRIPTION

SCIN

L

P1 2 port 1 output
MIN

L

C

SMO

MIN

R

V

P

SCOUT
GND 8 ground
MOUT
LIN

R

C

BR1

C

BR2

n.c. 13 not connected
C

TR

LOUT

R

SCL 16 serial clock input; I
SDA 17 serial data input/output; I
LOUT

L

C

TL

n.c. 20 not connected
C

BL2

C

BL1

LIN

L

MOUT
MAD 25 module address select input
SCOUT
C

PS2

AIN

L

C

PS1

AIN

R

P2 31 port 2 output
SCIN

R

1 SCART input; left channel

3 MAIN input; left channel

smoothing capacitor of reference

4

voltage
5 MAIN input; right channel
6 supply voltage
7 SCART output; right channel

R

9 MAIN output; right channel

R

10 input to right loudspeaker channel

bass capacitor connection 1;

11

right channel

bass capacitor connection 2;

12

right channel

treble capacitor connection;

14

right channel

15 loudspeaker output; right channel

2

18 loudspeaker output; left channel

treble capacitor connection;

19

left channel

bass capacitor connection 2;

21

left channel

bass capacitor connection 1;

22

left channel

23 input to left loudspeaker channel
24 MAIN output; left channel

L

26 SCART output; left channel

L

27 pseudo stereo capacitor 2
28 AUX input; left channel
29 pseudo stereo capacitor 1
30 AUX input; right channel

32 SCART input signal RIGHT

C-bus

2

C-bus

handbook, halfpage

SCOUT

SCIN

1

L

P1

2

MIN

3

L

C

4

SMO

MIN

5

R

V

6

P

7

R

GND

8

MOUT

LIN
C
C

C

LOUT

BR1
BR2

n.c.

TR

SCL

TDA9859

9

R

10

R

11
12
13
14
15

R

16

MHA779

Fig.2 Pin configuration.

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

SCIN
P2
AIN

R

C

PS1

AIN

L

C

PS2

SCOUT

MAD
MOUT

LIN

L

C

BL1

C

BL2

n.c.
C

TL

LOUT

SDA

R

L

L

L

1997 Sep 01 4

Philips Semiconductors Preliminary specification

Universal hi-fi audio processor for TV TDA9859

FUNCTIONAL DESCRIPTION

The TDA9859 consists of the following functions:

• Source select switching block

• Loudspeaker channel with effect controls

• Two port outputs for general purpose

• I2C-bus control.

Source select switching block

simultaneously; the left/right part (−23 to 0 dB) controls the
volume of left and right channels independently. Treble
control provides a control range from −12 to +12 dB and
bass control from −12 to +15 dB. Extended bass control
can be provided by an external T-network (see Fig.1) from

−15 to +19 dB (2 dB steps).

Effect controls

‘Linear stereo’, ‘stereo with spatial effect (30% or 52%
anti-phase crosstalk)’ and ‘forced mono with or without

The TDA9859 selects and switches the input signals from
three stereo or six mono sources MAIN, AUX and SCART

pseudo-stereo effect’ are controlled by three bits. A muting
of 85 dB is provided.

(see Fig.1) to the outputs SCART and loudspeaker
(crossbar-switching; Table 4). The main channel (LINE
outputs) is looped outside the circuit (from pins 9 and 24 to
pins 10 and 23), so signals can be used as LINE output or
a surround sound decoder can be inserted.

2

I

C-bus control

All settings of control are stored in subaddress registers.
Data transmission is simplified by auto-incrementing the
subaddresses. The on-chip Power-on reset sets the mute

Loudspeaker channel

Volume control is divided into volume control common and
volume control left/right. The common part
(−40 to +15 dB) controls the left and right channels

bit to active, so both the SCART and the loudspeaker
outputs are muted.

The muting can be switched off by writing a ‘0’ (non-muted)
into the mute control bits.

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

SYMBOL PARAMETER MIN. MAX. UNIT

V

P

V

n

I

O

supply voltage (pin 6) 0 10 V
voltage on all pins, ground excluded 0 V

P

output current

V

at LOUT and SCOUT pins − 2.5 mA
at port output pins − 1.5 mA

P

tot

T

amb

T

stg

V

es

total power dissipation − 850 mW
operating ambient temperature 0 70 °C
storage temperature −25 +150 °C
electrostatic handling for all pins; note 1 −±300 V
electrostatic handling for all pins; note 2 −±2000 V

Notes

1. Equivalent to discharging a 200 pF capacitor through a 0 Ω series resistor (Machine Model).

2. Equivalent to discharging a 100 pF capacitor through a 1.5 kΩ series resistor (Human Body Model).

THERMAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS VALUE UNIT

R

th(j-a)

thermal resistance from junction to ambient in free air 60 K/W

1997 Sep 01 5

Philips Semiconductors Preliminary specification

Universal hi-fi audio processor for TV TDA9859

CHARACTERISTICS

VP=8V; T
pseudo-stereo function and forced-mono function in off position and measurements taken in Fig.1; unless otherwise
specified.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

P

I

P

V

ref

V

4

DC voltage on pins

V

I

V

O

V

C

Audio select switch; line and SCART outputs (controlled via I

V

i(rms)

R

i

B

−0.5 dB

V

o(rms)

R

L

G

v

α

cr

=25°C; treble and bass in linear positions (0 dB); volume control left/right 0 dB; spatial function,

amb

supply voltage (pin 6) 7.2 8.0 8.8 V
supply current (pin 6) − 25 − mA
internal reference voltage − 0.5V

P

− V

voltage at pin 4 − VP− 0.1 − V

DC input voltage at pins 1, 3, 5, 10, 23,

− 0.5V

P

− V
28, 30 and 32 (inputs SCIN, MIN, LIN
and AIN)

DC output voltage at pins 7, 9, 15, 18,

− 0.5V

P

− V
24, 26 (outputs SCOUT, MOUT
and LOUT)

DC voltage on capacitors (pins 11, 12,

− 0.5V

P

− V
14, 19, 21, 22, 27 and 29)

2

C-bus); see Table 4

maximum AF input signal on
pins SCIN, MIN and AIN (RMS value)

input resistance (pins SCIN, MIN and

THD ≤ 0.5% on output
pins

2 −−V

20 30 40 kΩ

AIN)

−0.5 dB bandwidth for pins SCOUT,

20 − 20 000 Hz

MOUT and LOUT.
maximum AF output signal on

THD ≤ 0.5% 2 −−V

pins SCOUT and MOUT (RMS value)
allowed external load resistance

on output (pins MOUT) 10 −−kΩ
on output (pins SCOUT) 5 −−kΩ

voltage gain from any input to SCART

− 0 − dB

and MAIN outputs
switch crosstalk on outputs between

AF inputs at f = 10 kHz

unused inputs connected
to ground

− 90 − dB

Volume control common (f = 1 kHz, 55 steps)

V

i(rms)

R

i

G

v

maximum input signal (RMS value;
pins LIN)

Gv= 0; THD ≤ 0.5% on

output pins 15 and 18
input resistance (pins LIN) 7.5 10 − kΩ
volume control common voltage gain

nominal −40 − +15 dB
minimum −38 − +14 dB

1997 Sep 01 6

2 −−V

Philips Semiconductors Preliminary specification

Universal hi-fi audio processor for TV TDA9859

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

∆G

v

Volume control left/right (f = 1 kHz, 24 steps)

G

v

∆G

v

volume control common voltage gain
step width

volume control common voltage gain
set error

Gv= −32 to +15 dB 0.5 1.0 1.5 dB

G

= −40 to −33 dB 0.25 1.0 1.75 dB

v

G

= −32 to +15 dB −− 1dB

v

G

=−40 to −33 dB −− 2dB

v

volume control left/right voltage gain

nominal −24 − 0dB
minimum −23 −−1dB
mute position −80 −85 − dB

volume control left/right voltage gain

0.5 1.0 1.5 dB

step width
volume control left/right voltage gain

−− 2dB

tracking error

Bass control

G

v

bass control voltage gain CB=33nF

maximum boost f = 40 Hz 14 15 16 dB
maximum attenuation f = 40 Hz 11 12 13 dB

∆G

v

G

v(extended)

bass control voltage gain step width 1 1.5 2 dB
extended bass control voltage gain see Fig.1

maximum boost f = 60 Hz 18 19 20 dB
maximum attenuation f = 60 Hz 14 15 16 dB

∆G

v(extended)

extended bass control voltage gain step

123dB

width

Treble control

G

v

treble control voltage gain

maximum boost f = 15 kHz 11 12 13 dB
maximum attenuation f = 15 kHz 11 12 13 dB

∆G

v

treble control voltage gain step width 2.5 3 3.5 dB

Effect controls

α

ct(spat1)

α

ct(spat2)

anti-phase crosstalk by spatial effect 1 − 52 − %
anti-phase crosstalk by spatial effect 2 − 30 − %

ϕ phase shift by pseudo-stereo see Fig.3

Loudspeaker channel outputs (pins 15 and 18)

V

o(max)(rms)

maximum output signal (RMS value) THD ≤ 0.5%; RL>10kΩ;

2 −−V

CL< 1.5 nF

1997 Sep 01 7

Philips Semiconductors Preliminary specification

Universal hi-fi audio processor for TV TDA9859

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

∆V

15,18

R

o

R

o(L)

C

o(L)

V

no(W)

B

−1dB

THD total harmonic distortion f = 20 to 12500 Hz

α

cs(l-r)

α

ct(bus) crosstalk from I

PSRR

100

SCART output (pins 7 and 26)

V

o(max)(rms)

R

o(L)

Power-on reset

V

PONR

V

PONR

2

C-bus, SCL and SDA (pins 16 and 17)

I

V

IH

maximum DC offset voltage between
adjoining step and any step to mute

for volume control G

for bass control G

for treble control G

= 0 to +15 dB/mute − 215mV

v

G

=−64 to 0 dB/mute − 0.5 10 mV

v

= 0 to +15 dB/mute − 215mV

v

G

=−12 to 0 dB/mute − 0.5 10 mV

v

= −12 to +12 dB/mute − 0.5 10 mV

v

output resistance −− 100 Ω
allowed output load resistor 10 −−kΩ
allowed output load capacitor −− 1.5 nF
weighted noise voltage at output

(quasi-peak level)

−1 dB bandwidth for loudspeaker

CCIR 468-3 weighted

G

= +15 dB − 102 −µV

v

=0dB − 32 −µV

G

v

G

=−40 dB − 27 −µV

v

G

=−80 dB (mute) − 20 −µV

v

20 − 20000 Hz

channel

for V
for V
for V

stereo channel separation f = 10 kHz; Gv= 0 dB;

= 0.2 V Gv= −30 to +15 dB − 0.1 0.3 %

i(rms)

=1V Gv=−30 to 0 dB − 0.1 0.3 %

i(rms)

=2V Gv=−30 to −6dB − 0.1 0.3 %

i(rms)

− 75 − dB
opposite input grounded
by 1 kΩ resistor

2

C-bus to AF outputs

V

=

α

I

20 log

bus

2

C-bus signal voltage on AF output).

bus(p-p)

-------------------- ­V

o(rms)

(V

bus

= spurious

power supply ripple rejection with
100 Hz ripple

G

=0dB − 100 − dB

v

Gv= 0 dB;
V

R(rms)

< 200 mV

− 55 − dB

maximum output signal (RMS value) THD ≤ 0.5%; RL>5kΩ 2 −−V
output load resistor 5 −−kΩ

increasing supply voltage

start of reset −− 2.5 V
end of reset 5.2 6.0 6.8 V

decreasing supply voltage start of reset 4.4 5.2 6.0 V

HIGH-level input voltage 3 − V

P

V

1997 Sep 01 8

Philips Semiconductors Preliminary specification

Universal hi-fi audio processor for TV TDA9859

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

IL

I

I

V

ACK

Module address (pin 25)

V

IL

V

IH

Port outputs P1 and P2 (open-collector outputs pins 2 and 31)

V

OL

I

O(sink)

LOW-level input voltage 0 − 1.5 V
input current −− ±10 µA
output voltage at acknowledge (pin 17) I17= −3mA −− 0.4 V

LOW-level input voltage 0 − 1.5 V
HIGH-level input voltage 3 − V

LOW-level output voltage I

=1mA −− 0.3 V

O(sink)

P

V

port output sink current −− 1mA

1997 Sep 01 9

Philips Semiconductors Preliminary specification

Universal hi-fi audio processor for TV TDA9859

I2C-BUS PROTOCOL

This circuit operates as a slave receiver only. For more information about the I2C-bus, see

it”

, order number 9398 393 40011.

2

C-bus format

I

S SLAVE ADDRESS

W A SUBADDRESS A DATA

“The I2C-bus and how to use

(1)

(1)

A

Note

1. Multiple DATA-A (acknowledge) sequences may occur.

2

Table 1 Explanation of I

C-bus format

NAME DESCRIPTION

S START condition (SCL HIGH, SDA HIGH-to-LOW)
SLAVE ADDRESS 100 0000 (V

= LOW) or 100 0001 (V25= HIGH)

25

W0
A acknowledge (SDA = LOW); generated by the device
SUBADDRESS subaddress (byte); see Table 2

(1)

DATA

data byte; see Table 2

P STOP condition (SCL = HIGH, SDA = LOW-to-HIGH)

Note

1. If more than 1 byte of DATA is transmitted, then auto-increment of the subaddress is performed by the device.

P

Table 2 I

2

C-bus transmission

SUBADDRESS DATA BITS

FUNCTION

BINARY HEX D7 D6 D5 D4 D3 D2 D1 D0

Loudspeaker channel

Volume control common 0000 0000 00 0 0 V05 V04 V03 V02 V01 V00
Volume control left 0000 0001 01 0 0 0 VL4 VL3 VL2 VL1 VL0
Volume control right 0000 0010 02 0 0 0 VR4 VR3 VR2 VR1 VR0
Bass control 0000 0011 03 0 0 0 BA4 BA3 BA2 BA1 BA0
Treble control 0000 0100 04 0 0 0 0 TR3 TR2 TR1 TR0

Switching control byte

SCART output

(1)

0000 1000 08 0 MU1 P1 P2 I13 I12 I11 I10

Loudspeaker output 0000 1001 09 EF2 MU2 EF1 ST I23 I22 I21 I20

Note

1. If auto-increment of the subaddress is used, it is necessary to insert three dummy data words between the treble
control byte and the switching control bytes.

1997 Sep 01 10

Philips Semiconductors Preliminary specification

Universal hi-fi audio processor for TV TDA9859

Table 3 Function of the bits in Table 2

BITS FUNCTION

V00 to V05 volume control common for loudspeaker channel; see Table 9
VL0 to VL4 volume control for left loudspeaker channel; see Table 6
VR0 to VR4 volume control for right loudspeaker channel; see Table 6
BA0 to BA4 bass control for left and right loudspeaker channels; see Table 7
TR0 to TR3 treble control for left and right loudspeaker channels; see Table 8
I10 to I13 input selection for SCART channels; see Table 4
I20 to I23 input selection for loudspeaker channels; see Table 4
MU1 and MU2 mute control bits (MU1 for SCART channel, MU2 for loudspeaker channel)

0 = channel not muted

1 = channel muted
EF1, EF2 and ST effect control bits for loudspeaker channel; see Table 5
P1 and P2 control bits for ports P1 (pin 2) and P2 (pin 31)

control bit = 0: ports P1 = LOW

control bit = 1: ports P1 = HIGH

Table 4 Input selection

BITS OF DATA BYTE 8 AND 9

INPUT

HEX D7 D6 D5 D4 D3 D2 D1 D0

AUX LEFT XB
AUX RIGHT X9
AUX STEREO X7
SCART LEFT XA
SCART RIGHT X5
SCART STEREO X6
MAIN LEFT XC
MAIN RIGHT XD
MAIN STEREO X8

(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)

MU
MU
MU
MU
MU
MU
MU
MU
MU

(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)
(1) (1)

1011
1001
0111
1010
0101
0110
1100
1101
1000

Note

1. Byte 8 (SCART channels): The value of X depends on MU1 and control bits P1 and P2.
Byte 9 (loudspeaker channels): see Table 5 for the programming of these bits. The value of X depends on the
selected effects and MU2.

1997 Sep 01 11

Philips Semiconductors Preliminary specification

Universal hi-fi audio processor for TV TDA9859

Table 5 Effect controls

SETTING SPECIAL EFFECTS

DATA BYTE TO SUBADDRESS 09

HEX EF2 MU2 EF1 ST I23 I22 I21 I20

Stereo with spatial effect 1 (52%) BX
Stereo with spatial effect 2 (30%) 3X
Stereo without spatial effect 1X
Forced mono with pseudo stereo 2X
Forced mono without pseudo stereo 0X

(1)
(1)
(1)
(1)
(1)

1011
0011
0001
0010
0000

Note

1. See Table 4. The value of X depends on the selected input.

Table 6 Volume control left/right

Table 7 Bass control

DATA BITS

G

(dB)

v

HEX

VL4 VL3 VL2 VL1 VL0
VR4 VR3 VR2 VR1 VR0

01F11111

−11E11110

−21D11101

−31C11100

−41B11011

−51A11010

−61911001

−71811000

−81710111

−91610110

−101510101

−111410100

−121310011

−131210010

−141110001

−151010000

−160F01111

−170E01110

−180D01101

−190C01100

−200B01011

−210A01010

−220901001

−230801000

Mute 07 0 0 1 1 1

(1) (1) (1) (1)
(1) (1) (1) (1)
(1) (1) (1) (1)
(1) (1) (1) (1)
(1) (1) (1) (1)

G

(dB)

v

HEX BA4 BA3 BA2 BA1 BA0

DATA BITS

[phone]

+13.5 18 1 1 0 0 0

[phone]

+10.5 16 1 0 1 1 0

[phone]

+7.5 14 1 0 1 0 0

[phone]

+4.5 12 1 0 0 1 0

[phone]

+1.5 10 1 0 0 0 0

00F0 1 1 1 1
00E01110

−1.5 0D 0 1 1 0 1

−30C01100

−4.5 0B 0 1 0 1 1

−60A01010

−7.5 09 0 1 0 0 1

−90801000

−10.5 07 0 0 1 1 1

−12 06 0 0 1 1 0

1997 Sep 01 12

Philips Semiconductors Preliminary specification

Universal hi-fi audio processor for TV TDA9859

Table 8 Treble control

G

(dB)

v

HEX 0 TR3 TR2 TR1 TR0

DATA BITS

+12 0A 0 1 0 1 0

[phone]
[phone]
[phone]

00600110

−30500101

−60400100

−90300011

−120200010

Table 9 Volume control common

G

v

(dB)

HEX V05 V04 V03 V02 V01 V00

DATA BITS

+153F111111
+143E111110
+133D111101
+123C111100
+113B111011
+103A111010

[phone]
[phone]
[phone]
[phone]
[phone]
[phone]
[phone]
[phone]
[phone]

030110000

−12F101111

−22E101110

−32D101101

−42C101100

−52B101011

−62A101010

G

v

(dB)

HEX V05 V04 V03 V02 V01 V00

DATA BITS

−729101001

−828101000

−927100111

−1026100110

−1125100101

−1224100100

−1323100011

−1422100010

−1521100001

−1620100000

−171F011111

−181E011110

−191D011101

−201C011100

−211B011011

−221A011010

−2319011001

−2418011000

−2517010111

−2616010110

−2715010101

−2814010100

−2913010011

−3012010010

−3111010001

−3210010000

−330F001111

−340E001110

−350D001101

−360C001100

−370B001011

−380A001010

−3909001001

−4008001000

1997 Sep 01 13

Philips Semiconductors Preliminary specification

Universal hi-fi audio processor for TV TDA9859

phase

(degree)

0

handbook, full pagewidth

−100

−200

−300

−400

10

(1) Normal effect; C
(2) Intensified effect; C
(3) More intensified effect; C

PS1=CPS2

= 47nF; C

PS1

=15nF.

= 68nF; C

PS1

10

PS2

(1)

(2)

(3)

2

= 5.6nF.

= 5.6nF.

PS2

MHA311

3

10

4

10

f (Hz)

5

10

Fig.3 Pseudo stereo effect (phase) as a function of frequency.

1997 Sep 01 14

Philips Semiconductors Preliminary specification

Universal hi-fi audio processor for TV TDA9859

PACKAGE OUTLINE

SDIP32: plastic shrink dual in-line package; 32 leads (400 mil)

D

seating plane

L

Z

32

pin 1 index

e

b

SOT232-1

M

E

A

2

A

A

1

w M

b

1

17

E

c

(e )

M

1

H

1

0 5 10 mm

scale

DIMENSIONS (mm are the original dimensions)

A

A

A

UNIT b

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

mm

OUTLINE
VERSION

SOT232-1

max.

4.7 0.51 3.8

12

min.

max.

IEC JEDEC EIAJ

1.3

0.8

b

1

0.53

0.40

REFERENCES

0.32

0.23

cEe M

(1) (1)

D

29.4

28.5

1997 Sep 01 15

9.1

8.7

16

(1)

Z

L

3.2

2.8

EUROPEAN

PROJECTION

M

10.7

10.2

E

12.2

10.5

e

1

w

H

0.181.778 10.16

ISSUE DATE

92-11-17
95-02-04

max.

1.6

Philips Semiconductors Preliminary specification

Universal hi-fi audio processor for TV TDA9859

SOLDERING
Introduction

There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.

This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our

“IC Package Databook”

(order code 9398 652 90011).

Soldering by dipping or by wave

The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact

with the joint for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.

The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (T

stg max

). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.

Repairing soldered joints

Apply a low voltage soldering iron (less than 24 V) to the
lead(s) of the package, below the seating plane or not
more than 2 mm above it. If the temperature of the
soldering iron bit is less than 300 °C it may remain in
contact for up to 10 seconds. If the bit temperature is
between 300 and 400 °C, contact may be up to 5 seconds.

DEFINITIONS

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

PURCHASE OF PHILIPS I

2

C COMPONENTS

Purchase of Philips I

2

C components conveys a license under the Philips’ I2C patent to use the
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.

1997 Sep 01 16

Philips Semiconductors Preliminary specification

Universal hi-fi audio processor for TV TDA9859

NOTES

1997 Sep 01 17

Philips Semiconductors Preliminary specification

Universal hi-fi audio processor for TV TDA9859

NOTES

1997 Sep 01 18

Philips Semiconductors Preliminary specification

Universal hi-fi audio processor for TV TDA9859

NOTES

1997 Sep 01 19

Philips Semiconductors – a worldwide company

Argentina: see South America
Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,

Tel. [phone], Fax. [phone]
Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. [phone],

Fax. [phone]
Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6,

220050 MINSK, Tel. [phone], Fax. [phone]

Belgium: see The Netherlands
Brazil: see South America
Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor,

51 James Bourchier Blvd., 1407 SOFIA,
Tel. [phone], Fax. [phone]

Canada: PHILIPS SEMICONDUCTORS/COMPONENTS,
Tel. [phone]

China/Hong Kong: 501 Hong Kong Industrial Technology Centre,
72 Tat Chee Avenue, Kowloon Tong, HONG KONG,
Tel. [phone], Fax. [phone]

Colombia: see South America
Czech Republic: see Austria
Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S,

Tel. [phone], Fax. [phone]
Finland: Sinikalliontie 3, FIN-02630 ESPOO,

Tel. [phone], Fax. [phone]
France: 4 Rue du Port-aux-Vins, BP317, 92156 SURESNES Cedex,

Tel. [phone], Fax. [phone]
Germany: Hammerbrookstraße 69, D-20097 HAMBURG,

Tel. [phone], Fax. [phone]
Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS,

Tel. [phone], Fax. [phone]

Hungary: see Austria
India: Philips INDIA Ltd, Band Box Building, 2nd floor,

254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025,
Tel. [phone], Fax. [phone]

Indonesia: see Singapore
Ireland: Newstead, Clonskeagh, DUBLIN 14,

Tel. [phone], Fax. [phone]
Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053,

TEL AVIV 61180, Tel. [phone], Fax. [phone]
Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3,

20124 MILANO, Tel. [phone], Fax. [phone]
Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108,

Tel. [phone], Fax. [phone]
Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,

Tel. [phone], Fax. [phone]
Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,

Tel. [phone], Fax. [phone]
Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,

Tel. [phone]

Middle East: see Italy

Netherlands: Postbus 90050, 5600PB EINDHOVEN, Bldg. VB,

Tel. [phone], Fax. [phone]
New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,

Tel. [phone], Fax. [phone]
Norway: Box 1, Manglerud 0612, OSLO,

Tel. [phone], Fax. [phone]
Philippines: Philips Semiconductors Philippines Inc.,

106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. [phone], Fax. [phone]

Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA,
Tel. [phone], Fax. [phone]

Portugal: see Spain
Romania: see Italy
Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,

Tel. [phone], Fax. [phone]
Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231,

Tel. [phone], Fax. [phone]

Slovakia: see Austria
Slovenia: see Italy
South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,

2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000,
Tel. [phone], Fax. [phone]

South America: Rua do Rocio 220, 5th floor, Suite 51,
04552-903 São Paulo, SÃO PAULO - SP, Brazil,
Tel. [phone], Fax. [phone]

Spain: Balmes 22, 08007 BARCELONA,
Tel. [phone], Fax. [phone]

Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,
Tel. [phone], Fax. [phone]

Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. [phone], Fax. [phone]

Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,
TAIPEI, Taiwan Tel. [phone], Fax. [phone]

Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,
Tel. [phone], Fax. [phone]

Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,
Tel. [phone], Fax. [phone]

Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. [phone], Fax. [phone]

United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. [phone], Fax. [phone]

United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. [phone]

Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,

Tel. [phone], Fax.[phone]

For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications,
Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. [phone]

© Philips Electronics N.V. 1997 SCA55
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.

Internet: http://www.semiconductors.philips.com

Printed in The Netherlands 547047/1200/01/pp20 Date of release: 1997 Sep 01 Document order number: 9397 750 02004