Datasheet TDA9819 Datasheet (Philips)

INTEGRATED CIRCUITS

DATA SH EET

TDA9819

Multistandard vision and sound-IF
PLL with DVB-IF processing

Preliminary specification
File under Integrated Circuits, IC02

1996 Aug 02

Philips Semiconductors Preliminary specification

Multistandard vision and sound-IF PLL with
DVB-IF processing

FEATURES

• 5 V supply voltage

• Applicable for IF frequencies of 38.9 MHz and

45.75 MHz

• Two switched VIF inputs, gain controlled wide band
VIF-amplifier (AC-coupled)

• True synchronous demodulation with active carrier
regeneration (very linear demodulation, good
intermodulation figures, reduced harmonics and
excellent pulse response)

• VCO frequency switchable between TV (M or BG/L)
IF-picture carrier and Digital Video Broadcast (DVB)
frequency

• Separate video amplifier for sound trap buffering with
high video bandwidth

• VIF AGC detector for gain control, operating as peak
sync detector for M and B/G and peak white detector for
L; controlled reaction time for L

• Tuner AGC with adjustable takeover point (TOP)

• AFC detector without extra reference circuit

• SIF input for single reference QSS mode

(PLL controlled); SIF AGC detector for gain controlled
SIF amplifier; single reference QSS mixer able to
operate in high performance single reference QSS
mode

• AC-coupled limiter amplifier for sound intercarrier signal

• Alignment-free FM-PLL demodulator with high linearity

• AM demodulator without extra reference circuit

• Stabilizer circuit for ripple rejection and to achieve

constant output signals.

DVB functions

• Gain controlled IF-amplifier

• Mixer for DVB-IF

• VCO for QAM carrier recovery

• External VCO control for DVB

• Internal and external AGC for DVB

• DVB output level adjust via AGC adjust

• High level DVB operational output amplifier.

GENERAL DESCRIPTION

The TDA9819 is an integrated circuit for multistandard
vision and sound-IF signal processing with single
reference PLL demodulator combined with the signal
stages for DVB-IF processing.

TDA9819

ORDERING INFORMATION

TYPE NUMBER

NAME DESCRIPTION VERSION

TDA9819 SDIP32 plastic shrink dual in-line package; 32 leads (400 mil) SOT232-1

1996 Aug 02 2

PACKAGE

Philips Semiconductors Preliminary specification

Multistandard vision and sound-IF PLL with

TDA9819

DVB-IF processing

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

P

I

P

V

i VIF(rms)

V

o CVBS(p-p)

B (M,
BG/L)

S/N (W) weighted signal-to-noise ratio for

α

1.1

α

3.3

α

H

V

i SIF(rms)

V

o(rms)

THD total harmonic distortion

S/N (W) weighted signal-to-noise ratio

supply voltage 4.5 5.0 5.5 V
supply current 81 100 121 mA
vision IF input signal voltage

−1 dB video at output − 60 100 µV

sensitivity (RMS value)
CVBS output signal voltage

1.7 2.0 2.3 V

(peak-to-peak value)

−3 dB video bandwidth on pin 10 M, B/G and L standard;
< 20 pF; RL> 1kΩ;

C

L

78−MHz

AC load

56 60 − dB

video
intermodulation attenuation at ‘blue’ f = 1.1 MHz 58 64 − dB
intermodulation attenuation at ‘blue’ f = 3.3 MHz 58 64 − dB
suppression of harmonics in video

35 40 − dB

signal
sound-IF input signal voltage

−3 dB at intercarrier output − 70 100 µV

sensitivity (RMS value)
audio output signal voltage for FM

(RMS value)
audio output signal voltage for AM

(RMS value)

M and B/G standard;
25 kHz frequency deviation

L standard;
54% modulation

− 0.5 − V

− 0.5 − V

FM 25 kHz frequency deviation − 0.15 0.5 %
AM 54% modulation − 0.5 1.0 %

FM 25 kHz frequency deviation − 60 − dB
AM 54% modulation 47 53 − dB

1996 Aug 02 3

Philips Semiconductors Preliminary specification

Multistandard vision and sound-IF PLL with
DVB-IF processing

BLOCK DIAGRAM

video

1 V (p-p)

21

VCO

adjust

24 1116

VCO

PC

2f

DVB

VCO

control

external

TWD

DVB

2 V (p-p)

18

CVBS

10

SIF

video

2 V (p-p)

22

MIXER

TDA9819

AF

buffer

12

(PLL)

FM DETECTOR

MBH352

AF

C

1417

AF

mute

loop

filter

AFC

DVB

AGC

external

DVB

AGC

adjust

BL

C

VAGC

C

tuner

TOP

handbook, full pagewidth

3 15 13 23 7 25

19 28

AGC

6

AFC

DETECTOR

DVB

AGC

VIF-AGC

AGC

TUNER

VIF

FPLL

TDA9819

(1)

switch

input/DVB

DVB MIXER

DEMODULA T OR/

1302

A

VIF

VIF

SWITCH
4

5

B

DVB

LOGIC

31

AM

32

SIF

DEMODULA T OR

SIF-AGC

VOLT AGE

INTERNAL

IF-filter

STABILIZER

4.5/5.5

20

QSS

output

intercarrier

(1)

Fig.1 Block diagram.

switch

standard

SAGC

8262729 9

C

P

1/2 V

P

V

(+5 V)

1996 Aug 02 4

(1) See switch logic Table 2.

Philips Semiconductors Preliminary specification

Multistandard vision and sound-IF PLL with
DVB-IF processing

PINNING

SYMBOL PIN DESCRIPTION

V

i VIF1

V

i VIF2

C

BL

V

i VIF3

V

i VIF4

TADJ 6 tuner AGC takeover adjust (TOP)
T

PLL

C

SAGC

STD 9 standard switch input
V

o CVBS

VCOADJ 11 VCO adjust BG/L/M
V

oAF

V

AGC(ext)

C

AF

AGCADJ 15 AGC adjust (DVB)
V

VCO(ext)

V

iFM

DVB 18 DVB output
TAGC 19 tuner AGC output
V

o QSS

V

o(vid)

V

i(vid)

AFC 23 AFC output
VCO1 24 VCO1 reference circuit for 2f
VCO2 25 VCO2 reference circuit for 2f
C

ref

GND 27 ground
C

VAGC

V

P

INSWI 30 VIF input switch
V

i SIF1

V

i SIF2

1 VIF differential input signal voltage 1
2 VIF differential input signal voltage 2
3 black level detector
4 VIF differential input signal voltage 3
5 VIF differential input signal voltage 4

7 PLL loop filter
8 SIF AGC capacitor

10 2 V CVBS output signal voltage

12 audio voltage frequency output
13 external AGC voltage (DVB)
14 AF decoupling capacitor

16 external VCO control voltage (DVB)
17 sound intercarrier input

20 single reference QSS output voltage
21 composite video output voltage
22 video buffer input voltage

PC
PC

261⁄2VP reference capacitor

28 VIF AGC capacitor
29 supply voltage (+5 V)

31 SIF differential input signal voltage 1
32 SIF differential input signal voltage 2

handbook, halfpage

V

V

V

1

i VIF1

V

2

i VIF2

C

3

BL

V

4

i VIF3

V

5

i VIF4

TADJ

6

T

7

PLL

C

V

o CVBS

VCOADJ

AGC(ext)

AGCADJ

VCO(ext)

SAGC

STD

V

o AF

C

AF

8

9
10
11
12
13
14
15
16

TDA9819

Fig.2 Pin configuration.

MBH354

TDA9819

V

32

i SIF2

V

31

i SIF1

INSWI

30

V

29

P

C

28

VAGC

27

GND
C

26

ref

25

VCO2

24

VCO1

23

AFC
V

22

i(vid)

V

21

o(vid)

V

20

o QSS

19

TAGC
DVB

18

V

17

i FM

1996 Aug 02 5

Philips Semiconductors Preliminary specification

Multistandard vision and sound-IF PLL with
DVB-IF processing

FUNCTIONAL DESCRIPTION
Vision IF amplifier and input switch

The vision IF amplifier consists of three AC-coupled
differential amplifier stages. Each differential stage
comprises a feedback network controlled by emitter
degeneration to control the IF gain. The first differential
stage is extended by two pairs of emitter followers to
provide two IF input channels. The VIF input can be
selected by pin 30.

Tuner and VIF AGC

The AGC capacitor voltage is transferred to an internal IF
control signal, and is fed to the tuner AGC to generate the
tuner AGC output current (open-collector output).
The tuner AGC takeover point can be adjusted.
This allows the tuner and the SWIF filter to be matched to
achieve the optimum IF input level.

The AGC detector charges/discharges the AGC capacitor
to the required voltage for setting of VIF and tuner gain in
order to keep the video signal at a constant level.
Therefore for negative video modulation the sync level and
for positive video modulation the peak white level of the
video signal is detected. In order to reduce the reaction
time for positive modulation, where a very large time
constant is needed, an additional level detector increases
the discharging current of the AGC capacitor (fast mode)
in the event of a decreasing VIF amplitude step.
The additional level information is given by the black-level
detector voltage.

Frequency Phase Locked Loop detector (FPLL)

The VIF-amplifier output signal is fed into a frequency
detector and into a phase detector via a limiting amplifier.
During acquisition the frequency detector produces a DC
current proportional to the frequency difference between
the input and the VCO signal. After frequency lock-in the
phase detector produces a DC current proportional to the
phase difference between the VCO and the input signal.
The DC current of either frequency detector or phase
detector is converted into a DC voltage via the loop filter,
which controls the VCO frequency. In the event of positive
modulated signals the phase detector is gated by
composite sync in order to avoid signal distortion for
overmodulated VIF signals.

TDA9819

VCO, Travelling Wave Divider (TWD) and AFC

The VCO operates with a resonance circuit (with L and C
in parallel) at double the PC frequency. The VCO is
controlled by two integrated variable capacitors.
The control voltage required to tune the VCO from its
free-running frequency to actually double the PC
frequency is generated by the frequency-phase detector
and fed via the loop filter to the first variable capacitor
(FPLL). This control voltage is amplified and converted
into a current which represents the AFC output signal.
The VCO centre frequency can be decreased by activating
an additional internal capacitor. With a variable resistor at
VCOADJ (pin 11) the frequency for the M, B/G and L mode
can be tuned to the picture carrier frequency. At centre
frequency the AFC output current is equal to zero.

The oscillator signal is divided-by-two with a TWD which
generates two differential output signals with a 90 degree
phase difference independent of the frequency.

Video demodulator and amplifier

The video demodulator is realized by a multiplier which is
designed for low distortion and large bandwidth. The vision
IF input signal is multiplied with the ‘in phase’ signal of the
travelling wave divider output. In the demodulator stage
the video signal polarity can be switched in accordance
with the TV standard.

The demodulator output signal is fed via an integrated
low-pass filter for attenuation of the carrier harmonics to
the video amplifier. The video amplifier is realized by an
operational amplifier with internal feedback and high
bandwidth. A low-pass filter is integrated to achieve an
attenuation of the carrier harmonics for M, B/G and
L standard. The standard dependent level shift in this
stage delivers the same sync level for positive and
negative modulation. The video output signal is 1 V (p-p)
for nominal vision IF modulation.

Video buffer

For an easy adaption of the sound traps an operational
amplifier with internal feedback is used in the event of M,
B/G and L standard. This amplifier is featured with a high
bandwidth and 7 dB gain. The input impedance is adapted
for operating in combination with ceramic sound traps.
The output stage delivers a nominal 2 V (p-p) positive
video signal. Noise clipping is provided.

1996 Aug 02 6

Philips Semiconductors Preliminary specification

Multistandard vision and sound-IF PLL with
DVB-IF processing

SIF amplifier and AGC

The sound IF amplifier consists of two AC-coupled
differential amplifier stages. Each differential stage
comprises a controlled feedback network provided by
emitter degeneration.

The SIF AGC detector is related to the SIF input signals
(average level of AM or FM carriers) and controls the SIF
amplifier to provide a constant SIF signal to the AM
demodulator and single reference QSS mixer. The SIF
AGC reaction time is set to ‘slow’ for nominal video
conditions. But with a decreasing VIF amplitude step the
SIF AGC is set to ‘fast’ mode controlled by the VIF AGC
detector. In FM mode this reaction time is also set to ‘fast’
controlled by the standard switch.

Single reference QSS mixer

The single reference QSS mixer is realized by a multiplier.
The SIF amplifier output signal is fed to the single
reference QSS mixer and converted to intercarrier
frequency by the regenerated picture carrier (VCO).
The mixer output signal is fed via a high-pass for
attenuation of the video signal components to the output
pin 20. With this system a high performance hi-fi stereo
sound processing can be achieved.

For a simplified application without a sound-IF SAW filter
the single reference QSS mixer can be switched to the
intercarrier mode by connecting pins 31 and 32 to ground
(see note 18 of Chapter “Characteristics”).

In this mode the sound-IF passes the VIF SAW filter and
the composite IF signal is fed to the single reference QSS
mixer. This IF signal is multiplied by the 90° TWD output
signal for converting the sound-IF to intercarrier frequency.
By using this quadrature detection, the low frequency
video signals are removed.

Due to the sound-IF attenuation in the VIF filter (sound
shelf), the audio signal-to-noise (S/N) figure decreases.

AM demodulator

The AM demodulator (French L standard) is realized by a
multiplier. The modulated SIF amplifier output signal is
multiplied in phase with the limited (AM is removed)
SIF amplifier output signal. The demodulator output signal
is fed via an integrated low-pass filter for attenuation of the
carrier harmonics to the AF amplifier.

TDA9819

FM detector

The FM detector consists of a limiter, an FM-PLL and an
AF amplifier. The limiter provides the amplification and
limitation of the FM sound intercarrier signal before
demodulation. The result is high sensitivity and AM
suppression. The amplifier consists of 7 stages which are
internally AC-coupled in order to minimize the DC offset
and to save pins for DC decoupling.

The FM-PLL consists of an integrated relaxation oscillator,
an integrated loop filter and a phase detector.
The oscillator is locked to the FM intercarrier signal, output
from the limiter. As a result of locking, the oscillator
frequency tracks with the modulation of the input signal
and the oscillator control voltage is superimposed by the
AF voltage. The FM-PLL operates as an FM-demodulator.

The AF amplifier consists of two parts:

1. The AF preamplifier for FM sound is an operational
amplifier with internal feedback, high gain and high
common mode rejection. The AF voltage from the PLL
demodulator, by principle a small output signal, is
amplified by approximately 30 dB. The low-pass
characteristic of the amplifier reduces the harmonics of
the intercarrier signal at the sound output terminal.
An additional DC control circuit is implemented to keep
the DC level constant, independent of process spread.

2. The AF output amplifier (10 dB) provides the required
output level by a rail-to-rail output stage. This amplifier
makes use of an input selector for switching to AM/FM
or mute state, controlled by the standard switching
voltage and the mute switching voltage.

Internal voltage stabilizer and

The band-gap circuit internally generates a voltage of
approximately 1.25 V, independent of supply voltage and
temperature. A voltage regulator circuit, connected to this
voltage, produces a constant voltage of 3.6 V which is
used as an internal reference voltage.

For all audio output signals the constant reference voltage
cannot be used because large output signals are required.
Therefore these signals refer to half the supply voltage to
achieve a symmetrical headroom, especially for the
rail-to-rail output stage. For ripple and noise attenuation

1

the

⁄2VP voltage has to be filtered via a low-pass filter by

using an external capacitor together with an integrated
resistor (fg= 5 Hz). For a fast setting to 1⁄2VP an internal
start-up circuit is added.

1

⁄2VP reference

1996 Aug 02 7

Philips Semiconductors Preliminary specification

Multistandard vision and sound-IF PLL with

TDA9819

DVB-IF processing

DVB mixer

The VCO can be controlled by an external DC signal to
provide a carrier for the down-conversion of the DVB-IF
signal. The VCO frequency as a function of the voltage at
pin 16 is given in Figs 10 and 11.

DVB AGC

For the DVB operation a peak AGC detector is activated.
The peak value of (digital) QAM signal is detected and
controlled to a constant value by the variable VIF amplifier.
The detector bandwidth is adapted to the signal frequency
(3 to 11 MHz). The external AGC time constant is given by

The DVB output signal V
of ±3 dB by a control voltage ∆V
AGC can be switched off (see Table 2) and the IF gain can
be controlled by an external voltage at pin 13. The tuner
AGC is active in both instances.

DVB output buffer

The output buffer for the DVB signal has a high bandwidth
and 0 dB gain. An inverting configuration was chosen to
obtain minimum distortion. For non-DVB standards the
buffer is switched to a mute to reduce the output signal
level.

the VIF AGC capacitor at pin 28.

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

P

supply voltage (pin 29) maximum chip temperature of 125 °C;

note 1

V

n

voltage at pins 1 to 9, 11 to 13,
15, 16, 19, 22, 23 and 28 to 32

t

sc(max)

V

19

T

stg

T

amb

V

es

maximum short-circuit time − 10 s
tuner AGC output voltage 0 13.2 V
storage temperature −25 +150 °C
operating ambient temperature −20 +70 °C
electrostatic handling voltage note 2 −300 +300 V

can be adjusted in a range

O DVB

at pin 15. The internal

adj

0 7.0 V

0V

P

V

Notes

1. IP= 125 mA; T

=70°C; R

amb

th j-a

= 60 K/W.

2. Machine model class B.

THERMAL CHARACTERISTICS

SYMBOL PARAMETER VALUE UNIT

R

th j-a

thermal resistance from junction to ambient in free air 60 K/W

1996 Aug 02 8

Philips Semiconductors Preliminary specification

Multistandard vision and sound-IF PLL with

TDA9819

DVB-IF processing

CHARACTERISTICS

VP=5V; T
(sync-level for M and B/G, peak white level for L); video modulation DSB; residual carrier M and B/G: 10%; L = 3%;
video signal in accordance with “

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Supply (pin 29)

V

P

I

P

Vision IF amplifier (pins 1, 2, 4 and 5)

V

i VIF(rms)

V

i max(rms)

∆V

o(int)

G

IF

R

i(diff)

C

i(diff)

V

1, 2,4, 5

R

i

V

1, 2,4, 5

α

iIF

=25°C; see Table 1 for input frequencies and level; input level V

amb

CCIR, line 17”

; measurements taken in Fig.12; unless otherwise specified.

i IF1-2,4-5

= 10 mV RMS value

supply voltage note 1 4.5 5.0 5.5 V
supply current M, B/G and L standard 89 105 121 mA

DVB 81 96 111 mA

input signal voltage sensitivity
(RMS value)

maximum input signal voltage
(RMS value)

internal IF amplitude difference
between picture and sound

M, B/G and L standard;

−1 dB video at output
M, B/G and L standard;

+1 dB video at output
within AGC range;

∆f=5MHz

− 60 90 µV

140 200 − mV

− 0.7 1 dB

carrier
IF gain control range see Fig.3 65 70 − dB
differential input resistance note 2; input activated 1.7 2.2 2.7 kΩ
differential input capacitance note 2; input activated 1.2 1.7 2.5 pF
DC input voltage note 2; input activated − 3.3 − V
input resistance to ground note 2; input not activated − 1.1 − kΩ
DC input voltage note 2; input not activated − 0.2 − V
crosstalk attenuation of IF input

notes 2 and 3 55 60 − dB

switch at pins 1, 2, 4 and 5
True synchronous video demodulator; note 4
f

VCO(max)

maximum oscillator frequency for

f=2f

PC

carrier regeneration

f∆

osc

------------ ­T∆

V

0 ref(rms)

oscillator drift as a function of
temperature

oscillator voltage swing between

free-running oscillator;
I

= 0; note 5

AFC

pins 24 and 25 (RMS value)

f

PC CR

vision carrier capture range M standard ±1.0 ±1.25 − MHz

B/G and L standard ±1.35 ±1.6 − MHz

∆f

∆f

PC(fr)

PC(alg)

vision carrier frequency accuracy
(free-running)

frequency alignment range I

M standard −±150 ±300 kHz
B/G and L standard −±200 ±400 kHz

= 0; M standard ±300 ±400 − kHz

AFC

I

= 0; B/G and

AFC

L standard

t

acq

V

i VIF(rms)

acquisition time BL = 70 kHz; note 6 −−30 ms
VIF input signal voltage

maximum IF gain; note 7 − 60 90 µV
sensitivity for PLL to be locked
(RMS value; pins 1, 2, 4 and 5)

I

FPLL(offset)

FPLL offset current at pin 7 note 8 −−±4.5 µA

1996 Aug 02 9

125 130 − MHz

−−±20 ppm/K

− 60 − mV

±400 ±600 − kHz

Philips Semiconductors Preliminary specification

Multistandard vision and sound-IF PLL with

TDA9819

DVB-IF processing

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Composite video amplifier (pin 21; sound carrier off)

V

o video(p-p)

output signal voltage
(peak-to-peak value)

V

21(sync)

V

21(clu)

V

21(cll)

R

o,21

I

int 21

sync voltage level − 1.5 − V
upper video clipping voltage level VP− 1.1 VP− 1 − V
lower video clipping voltage level − 0.7 0.9 V
output resistance note 2 −−10 Ω
internal DC bias current for

emitter-follower

I

21 max(sink)

maximum AC and DC output
sink current

I

21 max(source)

maximum AC and DC output
source current

B

−1

B

−3

α

H

−1 dB video bandwidth CL< 50 pF; RL> 1kΩ;

−3 dB video bandwidth CL< 50 pF; RL> 1kΩ;

suppression of video signal
harmonics

PSRR power supply ripple rejection at

pin 21

see Fig.8 0.88 1.0 1.12 V

1.6 2.0 − mA

1.0 −−mA

2.0 −−mA

56−MHz

AC load

78−MHz

AC load

CL< 50 pF; RL> 1kΩ;

35 40 − dB

AC load; note 9

video signal; grey level; see

Fig.9

M and B/G standard 32 35 − dB
L standard 26 30 − dB

CVBS buffer amplifier (only) and noise clipper (pins 10 and 22)

R

i,22

C

i,22

V

I,22

G

v

input resistance note 2 2.6 3.3 4.0 kΩ
input capacitance note 2 1.4 2 3.0 pF
DC input voltage 1.5 1.8 2.1 V
voltage gain M, B/G and L standard;

note 10

V

10(clu)

V

10(cll)

R

o,10

I

int 10

upper video clipping voltage level 3.9 4.0 − V
lower video clipping voltage level − 1.0 1.1 V
output resistance note 2 −−10 Ω
DC internal bias current for

emitter-follower

I

o,10 max(sink)

maximum AC and DC output
sink current

I

o,10 max(source)

maximum AC and DC output
source current

B

−1

−1 dB video bandwidth CL< 20 pF; RL> 1kΩ;

AC load

B

−3

−3 dB video bandwidth CL< 20 pF; RL> 1kΩ;

AC load

6.5 7 7.5 dB

2.0 2.5 − mA

1.4 −−mA

2.4 −−mA

8.4 11 − MHz

11 14 − MHz

1996 Aug 02 10

Philips Semiconductors Preliminary specification

Multistandard vision and sound-IF PLL with

TDA9819

DVB-IF processing

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Measurements from IF input to CVBS output (pin 10; 330 Ω between pins 21 and 22, sound carrier off)

V

o CVBS(p-p)

CVBS output signal voltage on
pin 10 (peak-to-peak value)

V

o CVBS(sync)

∆V

o

sync voltage level M and B/G standard − 1.35 − V

deviation of CVBS output signal
voltage at M and B/G standard

∆V

o(blBG)

black level tilt in M and
B/G standard

∆V

o(blL)

black level tilt for worst case in
L standard

G

diff

ϕ

diff

B

−1

B

−3

differential gain
differential phase

−1 dB video bandwidth CL< 20 pF; RL> 1kΩ;

−3 dB video bandwidth CL< 20 pF; RL> 1kΩ;

S/N (W) weighted signal-to-noise ratio see Fig.5 and note 12 56 60 − dB
S/N unweighted signal-to-noise ratio see Fig.5 and note 12 49 53 − dB
IMα

1.1

intermodulation attenuation at
‘blue’

intermodulation attenuation at
‘yellow’

IMα

3.3

intermodulation attenuation at
‘blue’

intermodulation attenuation at
‘yellow’

α

c(rms)

residual vision carrier
(RMS value)

α

H(sup)

suppression of video signal
harmonics

α

H(spur)

spurious elements note 14 40 −−dB

PSRR power supply ripple rejection at

pin 10

note 10 1.7 2.0 2.3 V

L standard − 1.35 − V

50 dB gain control −−0.5 dB

30 dB gain control −−0.1 dB

gain variation; note 11 −−1%

vision carrier modulated by

−−1.9 %
test line (VITS) only; gain
variation; note 11

“CCIR, line 330”
“CCIR, line 330”

− 25%

− 1 2 deg

56−MHz
AC load; M, B/G and
L standard

78−MHz
AC load; M, B/G and
L standard

f = 1.1 MHz; see Fig.6 and

58 64 − dB
note 13

f = 1.1 MHz; see Fig.6 and

60 66 − dB
note 13

f = 3.3 MHz; see Fig.6 and

58 64 − dB
note 13

f = 3.3 MHz; see Fig.6 and

59 65 − dB
note 13

fundamental wave and

− 210mV
harmonics; M, B/G and
L standard

note 9 35 40 − dB

video signal; grey level;
see Fig.9

M and B/G standard 25 28 − dB
L standard 20 23 − dB

1996 Aug 02 11

Philips Semiconductors Preliminary specification

Multistandard vision and sound-IF PLL with

TDA9819

DVB-IF processing

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

VIF-AGC detector (pin 28)

I

28

charging current M, B/G and L standard;

additional charging current L standard in event of

discharging current M and B/G standard 15 20 25 µA

t

resp

AGC response to an increasing
VIF step

AGC response to a decreasing
VIF step

∆IF VIF amplitude step for activating

fast AGC mode

V

3(th)

threshold voltage level
additional charging current

note 11

missing VITS pulses and no
white video content

normal mode L 225 300 375 nA
fast mode L 30 40 50 µA
M, B/G and L standard;

note 15
M and B/G standard − 2.2 3.5 ms/dB
fast mode L − 1.1 1.8 ms/dB
normal mode L; note 15 − 150 240 ms/dB
L standard −2 −6 −10 dB

see Fig.8

L standard − 1.95 − V
L standard; fast mode L − 1.65 − V

0.75 1 1.25 mA

1.9 2.5 3.1 µA

−−0.1 ms/dB

Tuner AGC (pin 19)

V

i(rms)

IF input signal voltage for
minimum starting point of tuner
takeover (RMS value)

IF input signal voltage for
maximum starting point of tuner
takeover (RMS value)

V

o,19

V

sat,19

V∆

TOP 19,

----------------------- ­T∆

I

19(sink)

∆G

IF

permissible output voltage from external source; note 2 −−13.2 V
saturation voltage I19= 1.5 mA −−0.2 V
variation of takeover point by

temperature
sink current see Fig.3

IF slip by automatic gain control tuner gain current from

input at pins 1, 2, 4 and 5;
R

=22kΩ; I19= 0.4 mA

TOP

input at pins 1, 2, 4 and 5;
R

=0Ω; I19= 0.4 mA

TOP

I

= 0.4 mA − 0.03 0.07 dB/K

19

no tuner gain reduction;

= 13.2 V

V

19

maximum tuner gain

− 25mV

50 100 − mV

−−5µA

1.5 2 2.6 mA

reduction

− 68dB

20 to 80%

1996 Aug 02 12

Philips Semiconductors Preliminary specification

Multistandard vision and sound-IF PLL with

TDA9819

DVB-IF processing

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

AFC circuit (pin 23); see Fig.7 and note 16

S

S

---------

V

USA

EUR

f∆

IF

T∆

o,23

control steepness ∆I23/∆ff

frequency variation by
temperature

output voltage upper limit see Fig.7 VP− 0.6 VP− 0.3 − V
output voltage lower limit see Fig.7 − 0.3 0.6 V

I

o,23(source)

I

o,23(sink)

∆I

23(p-p)

output source current 150 200 250 µA
output sink current 150 200 250 µA
residual video modulation

current (peak-to-peak value)
Sound IF amplifier (pins 31 and 32); note 18
V

i SIF(rms)

input signal voltage sensitivity

(RMS value)

V

i max(rms)

maximum input signal voltage

(RMS value)

G

SIFcr

R

i(diff)

C

i(diff)

V

I(31,32)

α

SIF,VIF

SIF gain control range FM and AM mode; see Fig.4 59 64 − dB

differential input resistance note 2 1.7 2.2 2.7 kΩ

differential input capacitance note 2 1.2 1.7 2.5 pF

DC input voltage − 3.4 − V

crosstalk attenuation between

SIF and VIF input

= 45.75 MHz; see Fig.12

0

0.6 0.91 1.2 µA/kHz

and note 17
f0= 38.9 MHz; see Fig.12

0.5 0.72 1.0 µA/kHz

and note 17

= 0; note 5 −−±20 ppm/K

I

AFC

M, B/G and L standard − 20 30 µA

FM mode; −3 dB at

− 40 70 µV

intercarrier output pin 20
AM mode; −3 dB at

− 80 110 µV

AF output pin 12
FM mode; +1 dB at

40 80 − mV

intercarrier output pin 20
AM mode; +1 dB at

100 160 − mV

AF output pin 12

between pins 1, 2, 4 and 5

50 −−dB
and pins 31 and 32;
notes 2 and 3

SIF-AGC detector (pin 8)

I

8

charging current FM mode 8 12 16 µA

AM mode 0.8 1.2 1.6 µA

discharging current FM mode 8 12 16 µA

normal mode AM 1 1.4 1.8 µA
fast mode AM 60 85 110 µA

1996 Aug 02 13

Philips Semiconductors Preliminary specification

Multistandard vision and sound-IF PLL with

TDA9819

DVB-IF processing

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Single reference QSS intercarrier mixer (M and B/G standard; pin 20); note 18

V

o(rms)

B

−3

α

SC(rms)

R

o,20

V

O,20

I

int 20

I

20 max(sink)

I

20 max(source)

Limiter amplifier (pin 17); note 19
V

i FM(rms)

V

i FM(rms)

R

17

V

17

FM-PLL detector

f

i FM(catch)

f

i FM(hold)

t

acqu

IF intercarrier level (RMS value) SC1; sound carrier 2 off 75 100 125 mV

−3 dB intercarrier bandwidth upper limit 7.5 9 − MHz
residual sound carrier

(RMS value)

fundamental wave and
harmonics

− 2 − mV

output resistance note 2 − 10 20 Ω
DC output voltage − 2.0 − V
DC internal bias current for

1.5 1.9 − mA

emitter-follower
maximum AC and DC output

1.1 1.5 − mA

sink current
maximum AC and DC output

3.0 3.5 − mA

source current

input signal voltage for lock-in

−−100 µV

(RMS value)
input signal voltage (RMS value) − 300 400 µV

allowed input signal voltage

SN+

-------------­N

40 dB=

200 −−mV

(RMS value)
input resistance note 2 480 600 720 Ω
DC input voltage − 2.7 − V

catching range of PLL upper limit 7.0 −−MHz

lower limit −−4.0 MHz

holding range of PLL upper limit 9.0 −−MHz

lower limit −−3.0 MHz

acquisition time −−4µs

1996 Aug 02 14

Philips Semiconductors Preliminary specification

Multistandard vision and sound-IF PLL with

TDA9819

DVB-IF processing

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

FM operation (M and B/G standard) (pin 12); note 19

V

o AF12(rms)

AF output signal voltage
(RMS value)

V

o AF12(cl)(rms)

AF output clipping signal voltage
level (RMS value)

∆f
∆V

AF

o

frequency deviation THD < 1.5%; note 20 −−±53 kHz
temperature drift of AF output

signal voltage

V

14

DC voltage at decoupling
capacitor

R

12

V

12

I

12(max)(sink)

output resistance note 2 −−100 Ω
DC output voltage tracked with supply voltage −
maximum AC and DC output

sink current

I

12(max)(source)

maximum AC and DC output
source current

B

−3

−3 dB AF bandwidth without de-emphasis 100 125 − kHz

THD total harmonic distortion − 0.15 0.5 %
S/N (W) weighted signal-to-noise ratio FM-PLL only; with 75 µs

α

c(rms)

residual sound carrier
(RMS value)

α

AM

α

12

I

17(mute)

∆V

12

AM suppression 75 µs de-emphasis;

mute attenuation of AF signal 68 73 − dB
current output from pin 17 AF signal muted 200 300 600 µA
DC jump voltage of AF output

terminal for switching AF output
to mute state and vice versa

PSRR power supply ripple rejection at

pin 12

without de-emphasis;
25 kHz; see Fig.12 and
note 20

= 470 Ω 200 250 300 mV

R

x

R

=0Ω 400 500 600 mV

x

THD < 1.5% 1.3 1.4 − V

− 3710
dB/K

voltage dependent on VCO

1.2 − 3.0 V

frequency; note 21

1

⁄2V

P

− V

−−1.1 mA

−−1.1 mA

55 60 − dB

de-emphasis; 25 kHz;

“CCIR 468-4”

fundamental wave and

−−75 mV

harmonics

45 50 − dB
AM: f = 1 kHz; m = 0.3
referenced to 25 kHz

FM-PLL in lock mode −±50 ±150 mV

M standard; see Fig.9 26 30 − dB
B/G standard; see Fig.9 20 24 − dB

−3

1996 Aug 02 15

Philips Semiconductors Preliminary specification

Multistandard vision and sound-IF PLL with

TDA9819

DVB-IF processing

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Single reference QSS AF performance for FM operation (M standard); see Table 1 and notes 20 and 22 to 24;

sound attenuation of VIF SAW filter: minimum 33 dB
S/N (W) weighted signal-to-noise ratio PC/SC ratio at pins 1 and 2;

25 kHz FM deviation;
75 µs de-emphasis;

“CCIR 468-4”

black picture 51 56 − dB
white picture 50 53 − dB
colour bar 48 51 − dB

Single reference QSS AF performance for FM operation (B/G standard); see Table 1 and notes 20 and 22 to 24;
sound attenuation of VIF filter: minimum 27 dB

S/N (W)

weighted signal-to-noise ratio
(SC

/SC2)

1

PC/SC ratio at pins 1 and 2;
27 kHz;

“CCIR 468-4”

;

50 µs de-emphasis

black picture 53/48 58/55 − dB
white picture 52/46 55/53 − dB
6 kHz sine wave (black to

white modulation)

40 −−dB

40 −−dB

44/42 48/46 − dB

AM operation (L standard; pin 12); note 25
V

o AF 12(rms)

AF output signal voltage

54% modulation 400 500 600 mV

(RMS value)
THD total harmonic distortion 54% modulation − 0.5 1.0 %
B

−3

S/N (W) weighted signal-to-noise ratio
V

12

−3 dB AF bandwidth 100 125 − kHz

“CCIR 468-4”

DC potential voltage tracked with supply voltage −

47 53 − dB

1

⁄2V

P

− V

PSRR power supply ripple rejection see Fig.9 22 25 − dB
Standard switch (pin 9); see also Table 2
V

9

V

IH

V

IL

I

IL

DC potential for settings

HIGH level input voltage 1.3 − V

P

V
LOW level input voltage 0 − 0.8 V
LOW level input current V9= 0 V 85 110 135 µA

VIF input/DVB switch (pin 30); see also Table 2
V

30

V

IH

V

IL

I

IL

DC potential for settings
HIGH level input voltage 1.3 − V

P

V
LOW level input voltage 0 − 0.8 V
LOW level input current V30= 0 V 180 230 280 µA

VCO adjust (pin 11)

V

11

DC potential for VCO frequency

012V

adjust

1996 Aug 02 16

Philips Semiconductors Preliminary specification

Multistandard vision and sound-IF PLL with

TDA9819

DVB-IF processing

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

VIF amplifier (measured at fIF= 43.75 MHz; DVB mode)

V

4-5(rms)

V

4-5(rms)

∆G total gain control IF amplifier 52 58 − dB

R

4-5(diff)

C

4-5(diff)

DVB mixer and VCO

f

VCO

V

0 ref(rms)

∆ϕ

SSB

V

16

R

i,16

S

VCO

input sensitivity (RMS value) −1dBαAM signal at output − 200 −µV
maximum input signal

+1 dB αAM signal at output − 200 − mV

(RMS value)

tilt for ∆f ±3 MHz fs= 6.9 MHz; 40 dB gain − 0.5 1 dB
input resistance (differential) note 2 − 2.2 − kΩ
input capacitance (differential) note 2 − 1.7 − pF

maximum oscillator frequency 2(fIF+fs) 125 130 − MHz
oscillator voltage swing between

− 60 − mV

pins 24 and 25 (RMS value)
VCO phase noise at f = 100 kHz free-running 103 107 − dBc/Hz
VCO control range see Figs 10 and 11 0 − V

P

V
VCO control input resistance 50 63 76 kΩ
control steepness ∆fs/∆V

16

see Figs 10 and 11

DVB (USA) − 0.29 − MHz/V
DVB (EUROPE) − 0.40 − MHz/V

DVB output buffer

V

O DVB(p-p)

DVB output signal (QAM)
(peak-to-peak value)

I

int 18

DC internal bias current for
emitter-follower

I

18 max(sink)

maximum AC and DC output
sink current

I

18 max(source)

maximum AC and DC output
source current

DVB AGC detector

t

resp

response to an increasing
amplitude step in the
IF input signal

response to a decreasing
amplitude step in the
IF input signal

I

28

charging current − 200 −µA
discharging current − 200 −µA

V

15

R

i,15

S

adj

V

13

R

i,13

AGC adjust input voltage range 1 2.5 4.5 V
AGC adjust input resistance 8 10 12 kΩ
AGC adjust steepness 2V<V15<3V −−5−dB/V
external AGC voltage for DVB see Fig.3 1 − 4.5 V
external AGC input resistance 40 −−kΩ

1.8 2.1 2.4 V

1.9 2.3 2.7 mA

1.5 −−mA

2.0 −−mA

− 0.25 0.1 ms/dB

− 0.25 − ms/dB

1996 Aug 02 17

Philips Semiconductors Preliminary specification

Multistandard vision and sound-IF PLL with

TDA9819

DVB-IF processing

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

AFC circuit (DVB mode)

S

US

S

EU

DVB output signal (IF input to DVB output)

V

18(p-p)

V

18DC

B −1 dB bandwidth C

α

C(DVB)

α

H

Notes to the characteristics

1. Values of video and sound parameters are decreased at VP= 4.5 V.

2. This parameter is not tested during production and is only given as application information for designing the television
receiver.

3. Source impedance: 2.3 kΩ in parallel to 12 pF (SAW filter); fIF= 45 MHz.

4. Loop filter 330 Ω/220 nF; loop bandwidth for M standard: BL ≈ 70 kHz (natural frequency fn≈ 12 kHz; damping factor
d ≈ 2.9; loop bandwidth for B/G and L standard: BL ≈ 80 kHz (natural frequency fn≈ 13 kHz; damping factor d ≈ 3.2;
calculated with sync level within gain control range). Resonance circuit of VCO: Q0> 50; C

5. Temperature coefficient of external LC-circuit is equal to zero.

6. V

= 10 mV RMS; ∆f = 1 MHz (VCO frequency offset related to picture carrier frequency); white picture video

iIF

modulation.

7. V

signal for nominal video signal.

iIF

8. Offset current measured between pin 7 and half of supply voltage (VP= 2.5 V) under the following conditions:
no input signal at VIF input (pins 1, 2, 4 and 5) and VIF amplifier gain at minimum (V28=VP). Due to sample-and-hold
mode of the FPLL in L standard, the leakage current of the loop filter capacitor (C = 220 nF) should not exceed
500 nA.

9. Measurements taken with SAW filter M3951M and M9352M (Siemens, M standard);
frequency range = 10 kHz to 5 MHz. Sound carrier ON; PC/SC ratio 7 dB (transmitter); modulation VSB.

10. The 7 dB buffer gain accounts for 1 dB loss in the sound trap. Buffer output signal is typical 2 V (p-p), in event of
CVBS video amplifier output typical 1 V (p-p). If no sound trap is applied a 330 Ω resistor must be connected from
output to input (from pin 21 to pin 22).

11. The leakage current of the AGC capacitor should not exceed 1 µA at M and B/G standard respectively 10 nA current
at L standard. Larger currents will increase the tilt.

12. S/N is the ratio of black-to-white amplitude to the black level noise voltage (RMS value, pin 10). B = 5 MHz weighted
in accordance with

control steepness ∆I23/∆ff

= 48.75 MHz; see Fig.12

0

0.7 0.98 1.3 µA/kHz

and note 17
f0= 43.0 MHz; see Fig.12

0.45 0.70 0.95 µA/kHz

and note 17

output voltage
(peak-to-peak value)

CL< 15 pF; RL> 5kΩ; with
internal AGC

1.8 2.1 2.4 V

DC voltage − 2.5 − V

< 15 pF; RL> 5kΩ 11 12 − MHz

L

−3 dB bandwidth − 17 − MHz
fundamental input signal and

35 40 − dB

IF harmonics
suppression of in-band

2.0 V (p-p) output voltage 30 35 − dB

harmonics

“CCIR 567”

and C

ext

.

see Fig.12.

int

1996 Aug 02 18

Philips Semiconductors Preliminary specification





Multistandard vision and sound-IF PLL with

TDA9819

DVB-IF processing

13. The intermodulation figures are defined:

V

at 3.58 MHz

0

0.92

2.76

20

20

--------------------------------------­V

at 0.92 MHz



0

V

at 3.58 MHz

0



log=

--------------------------------------­at 2.76 MHz

V



0

α

α

3.6dB+log=

; α

value at 2.76 MHz referenced to colour carrier.

2.76



14. Sound carrier ON; SIF SAW filter L9453; f

15. Response speed valid for a VIF input level range of 200 µVupto70mV.

16. To match the AFC output signal to different tuning systems a current source output is provided. The test circuit is
given in Fig.7. The AFC-steepness can be changed by the resistors at pin 23.

17. Depending on the ratio ∆C/C0 of the LC resonant circuit of VCO (Q0> 50; C0=C

18. The intercarrier mode can be activated by connecting the SIF input pins 31 and 32 to GND (only for negative
modulation standard BG/M). In this event the intercarrier level depends on the sound shelf of VIF SAW filter and the
transmitter PC/SC ratio.

19. Input level for second IF from an external generator with 50 Ω source impedance. AC-coupled with 10 nF capacitor,
f

= 400 Hz, 25 kHz (50% FM deviation) of audio references. A VIF/SIF input signal is not permitted. Pins 8 and 28

mod

have to be connected to positive supply voltage for minimum IF gain. S/N and THD measurements are taken at 75 µs
de-emphasis. The FM demodulator steepness ∆V

20. Measured with an FM deviation of 25 kHz the typical AF output signal is 500 mV RMS (Rx=0Ω; see Fig.12). By
using Rx= 470 Ω the AF output signal is attenuated by 6 dB (250 mV RMS). For handling an FM deviation of more
than 53 kHz the AF output signal has to be reduced by using Rx in order to avoid clipping (THD < 1.5%). For an FM
deviation up to 100 kHz an attenuation of 6 dB is recommended with Rx= 470 Ω.

21. The leakage current of the decoupling capacitor (2.2 µF) should not exceed 1 µA.

22. For all S/N measurements the used vision IF modulator has to meet the following specifications:
Incidental phase modulation for black-to-white jump less than 0.5 degrees;
QSS AF performance, measured with the television-demodulator AMF2 (audio output, weighted S/N ratio) better
than 60 dB (deviation 25 kHz) for 6 kHz sine wave black-to-white video modulation.

23. The PC/SC ratio at pins 1 and 2 is calculated as the addition of TV transmitter PC/SC ratio and SAW filter PC/SC
ratio. This PC/SC ratio is necessary to achieve the S/N(W) values as noted. A different PC/SC ratio will change these
values.

24. Measurements for M standard with SAW filter M3951M (Siemens) for vision IF (suppressed sound carrier) and
M9352M (Siemens) for sound IF (suppressed picture carrier). Input level V

Measurements for B/G standard with SAW filter G3962 (Siemens) for vision IF (suppressed sound carrier) and
G9350 (Siemens) for sound IF (suppressed picture carrier). Input level V
(54% FM deviation).

25. Measurements taken with SAW filter L9453 (Siemens) for AM sound IF (suppressed picture carrier).

value at 0.92 MHz referenced to black/white signal;

; α

0.92

= 10 kHz to 10 MHz.

video

int+Cext

/∆fAF is negative.

oAF

= 10 mV RMS, 25 kHz FM deviation.

i SIF

= 10 mV RMS, 27 kHz

i SIF

; see Fig.12).

1996 Aug 02 19

Philips Semiconductors Preliminary specification

Multistandard vision and sound-IF PLL with

TDA9819

DVB-IF processing

Table 1 Input frequencies and carrier ratios

DESCRIPTION SYMBOL B/G STANDARD M STANDARD L STANDARD DVB (EU) DVB (US) UNIT

Symbol frequency f
Picture carrier f
Sound carrier f

Picture-to-sound
carrier ratio

Table 2 Switch logic

STANDARD

DVB 0 0 digital external external B mute off on

Standard M,
B/G and L

INPUT

SWITCH

IF/fs

PC

SC1

f

SC2

SC

1

SC

2

STANDARD

SWITCH

0 1 digital internal external B mute off on
1 0 positive internal PLL A AM on off
1 1 negative internal PLL A FM on off

−−−36.15/6.9 43.75/5.0 MHz

38.9 45.75 38.9 −−MHz

33.4 41.25 32.4 −−MHz

33.158 −−−−MHz
13 7 10 −−dB
20 −−−−dB

MODULATION

MODE

AGC

VCO

CONTROLIFINPUT

VIDEO OUTPUT

AF

M, B/G, L DVB

1996 Aug 02 20

Philips Semiconductors Preliminary specification

Multistandard vision and sound-IF PLL with
DVB-IF processing

handbook, full pagewidth

VIF input

(1/2 or 4/5)

(mV RMS)

0.6

70
gain
(dB)

600.06

50

40

30

206

10

060

−10

1.0 2.521.5 3 3.5 4

(1) (2) (3) (4)

TDA9819

MED682 - 1

I

0

1.0

2.0

V28 (V)

4.5

tuner
(mA)

(1) I

; R

tuner

(2) Gain.

handbook, full pagewidth

TOP

(dBµV)

100

SIF input

(31,32)

(mV RMS)

10

1

0.1

0.01

=22kΩ.

(3) I
(4) I

tuner
tuner

; R
; R

TOP
TOP

=11kΩ.
=0Ω.

Fig.3 Typical VIF and tuner AGC characteristic.

110

100

90

80

70

60

50

40

30

20

1.0 2.521.5 3 3.5 4

(1)

(2)

MED683 - 1

V8 (V)

4.5

(1) AM mode.
(2) FM mode.

Fig.4 Typical SIF AGC characteristic.

1996 Aug 02 21

Philips Semiconductors Preliminary specification

Multistandard vision and sound-IF PLL with
DVB-IF processing

0

V

i IF(rms)

600.06 0.6 6

V

i IF(rms)

MED684

(dB)

600

(mV)

70

handbook, halfpage

S/N
(dB)

60

50

40

30

20

10

0

60 40 20 20

10

Fig.5 Typical signal-to-noise ratio as a function of

IF input voltage.

handbook, halfpage

13.2 dB

27 dB

SC CC PC SC CC PC

3.2 dB

13.2 dB

27 dB

BLUE YELLOW

SC = sound carrier, with respect to sync level.
CC = chrominance carrier, with respect to sync level.
PC = picture carrier, with respect to sync level.
The sound carrier levels are taking into account

a sound shelf attenuation of 20 dB (SAW filter G1962).

Fig.6 Input signal conditions.

TDA9819

10 dB

MED685 - 1

handbook, full pagewidth

V

P

TDA9819

V = 5 V

P

22 kΩ

I

23

23

22 kΩ

V

(V)

4.5

3.5

2.5

1.5

0.5

Fig.7 Measurement conditions and typical AFC characteristic.

1996 Aug 02 22

23I23

(µA)

200
100

0

100

200

38.5 38.9 39.3

MBH355

(source current)

(sink current)

f (MHz)

Philips Semiconductors Preliminary specification

Multistandard vision and sound-IF PLL with
DVB-IF processing

handbook, halfpage

2.5 V

1.8 V

1.5 V

standard B/G

2.5 V

1.95 V

1.8 V

1.65 V

1.5 V

TDA9819

white level

black level

sync level

white level

threshold level
black level
threshold level
sync level

handbook, full pagewidth

standard L

MED864

Fig.8 Typical video signal levels on output pin 21 (sound carrier off).

VP = 5 V

VP = 5 V

TDA9819

MBH356

(f

ripple

100 mV

= 70 Hz)

t

Fig.9 Ripple rejection condition.

1996 Aug 02 23

Philips Semiconductors Preliminary specification

Multistandard vision and sound-IF PLL with
DVB-IF processing

100

handbook, full pagewidth

f

VCO

(MHz)

96

92

88

01 4

2

TDA9819

MBH357

(1)

(2)

(3)

(4)

3

V7 (V)

5V16 (V)

L = 115 nH and C = 15 pF.
(1) DVB.
(2) f0= 97.5 MHz.
(3) M standard.
(4) f0= 91.5 MHz.

Fig.10 VCO control characteristic for standard M and DVB (USA).

1996 Aug 02 24

Philips Semiconductors Preliminary specification

Multistandard vision and sound-IF PLL with
DVB-IF processing

90

handbook, full pagewidth

f

VCO

(MHz)

86

82

78

TDA9819

MBH358

(1)

(2)

(3)

(4)

74

01 4

L = 248 nH and C = 5.6 pF.
(1) DVB.
(2) f0= 86.0 MHz.
(3) BG/L standard.
(4) f0= 77.8 MHz.

32

Fig.11 VCO control characteristic for standard BG/L and DVB (EUROPE).

5V16 (V)

V7 (V)

1996 Aug 02 25

Philips Semiconductors Preliminary specification

Multistandard vision and sound-IF PLL with
DVB-IF processing

TEST CIRCUIT

AF

mute

kΩ

5.6

10

AFC

AGC

tuner

QSS

output

MHz

4.5/5.5

560 Ω

video

output

nF

171819202122232425

DVBOUT

330 Ω

16151413121110987654321

adjust

DVB

AGC

external

DVB

AGC

22

kΩ

control

VCO

(1)

x

R

VCO

CVBS

22 µF

adjust

AF

C

2.2

AFOUT

de-emphasis

AF

kΩ

D

C

(2)

TDA9819

MBH353

dth

(3)

L

C7

22 kΩ100 nF

22 kΩ

VIF/DVB

SIF

1:1

input

input switch

5

1

P

V

10 nF

ref

C

GND

VIF

AGC

2.2 µF 2.2 µF

4

3

2

Ω

50

TDA9819

2627

2829303132

TOP

VIF

2.2 µF

330

22

BL

C

nF

100

5

1:1

1

input A

SIF

AGC

Ω

kΩ

220

4

2

50

nF

loop

Ω

V

P

filter

3

switch

standard

DVB

P

V

10 µF

1:1

input B

5

1

4

2

50

BC547

75 Ω

3

Ω

CVBS

220 Ω

Fig.12 Test circuit.

= 33 nF for 75 µs de-emphasis.

D

= 22 nF for 50 µs de-emphasis; C

D

(3) See Table 3.

(1) See note 20 in Chapter “Characteristics”.

(2) C

1996 Aug 02 26

Philips Semiconductors Preliminary specification

Multistandard vision and sound-IF PLL with

TDA9819

DVB-IF processing

Table 3 Test circuit values

PARAMETER EUROPE USA

IF frequency 36.15/38.9 MHz 43.75/45.75 MHz
VCO frequency 86.0/77.8 MHz 97.5/91.5 MHz
Oscillator circuit

Toko coil 5KM 369SNS - 2010Z 5KM 369SNS - 1647Z
Philips ceramic capacitor 2222 632 39478 2222 632 33129

page

(1) C(VCO) = 8.2/11.3 pF.
(2) C7 = 5.6 pF.
(3) L = 248 nH.

24

(1) (2) (3)

25

MBH359

lfpage

(1) C(VCO) = 8.2/11.3 pF.
(2) C7 = 15 pF.
(3) L = 115 nH.

24

(1) (2) (3)

25

MBH359

1996 Aug 02 27

Philips Semiconductors Preliminary specification

Multistandard vision and sound-IF PLL with
DVB-IF processing

INTERNAL PIN CONFIGURATIONS

+

1

1.1 kΩ 5 kΩ

+

1.1 kΩ

2

3.6 V

2.65
V

MGD640

TDA9819

++

+

3

2.5 µA

25 µA

MGD641

Fig.13 Pin 1; V

+

4

+

5

and pin 2; V

i VIF1

1.1 kΩ 5 kΩ

1.1 kΩ

i VIF2

3.6 V

2.65

.

V

MGD642

Fig.14 Pin 3; CBL.

+

6

30 kΩ

1.9 V

20
kΩ

9 kΩ

3.6 V

MGD643

Fig.15 Pin 4; V

and pin 5; V

i VIF3

i VIF4

.

1996 Aug 02 28

Fig.16 Pin 6; TADJ.

Philips Semiconductors Preliminary specification

Multistandard vision and sound-IF PLL with
DVB-IF processing

+

+

7

53 µA

50

kΩ

39 µA

VCO

5 µA

MGD644

TDA9819

+++

+

8

MGD645

Fig.17 Pin 7; T

26

kΩ

+

9

PLL

3.6 V

MGD646

.

Fig.18 Pin 8; C

SAGC

.

+

+

6.4 kΩ

10

5.1 kΩ

0.5 pF

0.2
pF

2.5 mA

MGD647

Fig.19 Pin 9; STD.

1996 Aug 02 29

Fig.20 Pin 10; V

o CVBS

.

Philips Semiconductors Preliminary specification

Multistandard vision and sound-IF PLL with
DVB-IF processing

17 kΩ

+

11

Fig.21 Pin 11; VCOADJ.

+

9 kΩ

3.6 V

MGD648

+

+

12

Fig.22 Pin 12; V

+

TDA9819

++

2.3 mA

14.7 kΩ

25 pF

120 Ω

MGD649

.

oAF

13

Fig.23 Pin 13; V

+

15

50 kΩ

1.6 kΩ

AGC(ext)

12 kΩ

10.1 kΩ

17.2 kΩ

MGD652

MGD650

.

3.6 V

14

MGD651

Fig.24 Pin 14; C

AF.

+

+

16

50 kΩ 50 kΩ

12.5 kΩ

2.7 V

MGD653

VCO

5 µA

Fig.25 Pin 15; AGCADJ.

1996 Aug 02 30

Fig.26 Pin 16; V

VCO(ext)

.

Philips Semiconductors Preliminary specification

Multistandard vision and sound-IF PLL with
DVB-IF processing

10 kΩ

+

640 Ω

17

40 kΩ 40 kΩ

10 pF

Fig.27 Pin 17; V

3.9 kΩ

iFM

3.6 V

MGD654

.

+

+

18

2.7 mA

Fig.28 Pin 18; DVB.

TDA9819

10 µA

5.1 kΩ

5.1 kΩ

MGD655

+

19

2.5 mA

MGD656

Fig.29 Pin 19; TAGC.

+

20

Fig.30 Pin 20; V

1.9 mA

10 kΩ

o QSS

1.6
kΩ

MGD657

.

+

10 kΩ

21

2.0 mA

20 kΩ3.3 kΩ

2.1 pF

0.7 pF

+

22

3.3
kΩ

2 kΩ

2.2
kΩ

50 kΩ

3.6 V

Fig.31 Pin 21; V

10 pF

MGD658

. Fig.32 Pin 22; V

o(vid)

1996 Aug 02 31

i(vid)

MGD659

.

Philips Semiconductors Preliminary specification

Multistandard vision and sound-IF PLL with
DVB-IF processing

+

200 µA

23

1 kΩ 1 kΩ

MGD660

24

25

TDA9819

+

420 Ω

2 × 10 kΩ

+

MGD661

420 Ω

2.8 V

Fig.33 Pin 23; AFC.

Fig.34 Pin 24; VCO1 and pin 25; VCO2.

+

20 kΩ

70 kΩ

+

26

20 kΩ

MGD662

++

650

Ω

27GND

MGD663

Fig.35 Pin 26; C

ref

.

1996 Aug 02 32

Fig.36 Pin 27; GND.

Philips Semiconductors Preliminary specification

Multistandard vision and sound-IF PLL with
DVB-IF processing

+

+

28

50 kΩ

+++

1 mA

MGD664

TDA9819

29

+

MGD665

Fig.37 Pin 28; C

VAGC

.

Fig.38 Pin 29; VP.

+

+

31

30

13

kΩ

MGD666

3.6 V

+

32

1.1 kΩ

1.1 kΩ

5
kΩ

3.6 V

2.65 V

MGD667

Fig.39 Pin 30; INSWI.

1996 Aug 02 33

Fig.40 Pin 31; V

and pin 32; V

i SIF1

i SIF2

.

Philips Semiconductors Preliminary specification

Multistandard vision and sound-IF PLL with
DVB-IF processing

PACKAGE OUTLINE

SDIP32: plastic shrink dual in-line package; 32 leads (400 mil)

D

seating plane

L

Z

32

e

b

TDA9819

SOT232-1

M

E

A

2

A

A

1

w M

b

1

17

c

(e )

M

1

H

pin 1 index

1

0 5 10 mm

scale

DIMENSIONS (mm are the original dimensions)

A

A

A

UNIT b

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

mm

OUTLINE
VERSION

SOT232-1

max.

4.7 0.51 3.8

12

min.

max.

IEC JEDEC EIAJ

1.3

0.8

b

1

0.53

0.40

REFERENCES

0.32

0.23

cEe M

(1) (1)

D

29.4

28.5

9.1

8.7

E

16

(1)

Z

L

3.2

2.8

EUROPEAN

PROJECTION

M

10.7

10.2

E

12.2

10.5

e

1

w

H

0.181.778 10.16

ISSUE DATE

92-11-17
95-02-04

max.

1.6

1996 Aug 02 34

Philips Semiconductors Preliminary specification

Multistandard vision and sound-IF PLL with
DVB-IF processing

SOLDERING
Introduction

There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.

This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in

“IC Package Databook”

our

Soldering by dipping or by wave

The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joint for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.

(order code 9398 652 90011).

TDA9819

The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (T
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.

Repairing soldered joints

Apply a low voltage soldering iron (less than 24 V) to the
lead(s) of the package, below the seating plane or not
more than 2 mm above it. If the temperature of the
soldering iron bit is less than 300 °C it may remain in
contact for up to 10 seconds. If the bit temperature is
between 300 and 400 °C, contact may be up to 5 seconds.

stg max

). If the

DEFINITIONS

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

1996 Aug 02 35

Philips Semiconductors – a worldwide company

Argentina: see South America
Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,

Tel. [phone], Fax. [phone]
Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213,

Tel. [phone], Fax. [phone]
Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6,

220050 MINSK, Tel. [phone], Fax. [phone]

Belgium: see The Netherlands
Brazil: see South America
Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor,

51 James Bourchier Blvd., 1407 SOFIA,
Tel. [phone], Fax. [phone]

Canada: PHILIPS SEMICONDUCTORS/COMPONENTS,
Tel. [phone]

China/Hong Kong: 501 Hong Kong Industrial Technology Centre,
72 Tat Chee Avenue, Kowloon Tong, HONG KONG,
Tel. [phone], Fax. [phone]

Colombia: see South America
Czech Republic: see Austria
Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S,

Tel. [phone], Fax. [phone]
Finland: Sinikalliontie 3, FIN-02630 ESPOO,

Tel. [phone], Fax. [phone]
France: 4 Rue du Port-aux-Vins, BP317, 92156 SURESNES Cedex,

Tel. [phone], Fax. [phone]
Germany: Hammerbrookstraße 69, D-20097 HAMBURG,

Tel. [phone], Fax. [phone]
Greece: No. 15, 25th March Street, GR 17778 TAVROS,

Tel. [phone], Fax. [phone]

Hungary: see Austria
India: Philips INDIA Ltd, Shivsagar Estate, A Block, Dr. Annie Besant Rd.

Worli, MUMBAI 400 018, Tel. [phone], Fax. [phone]

Indonesia: see Singapore
Ireland: Newstead, Clonskeagh, DUBLIN 14,

Tel. [phone], Fax. [phone]
Israel: RAPAC Electronics, 7 Kehilat Saloniki St, TEL AVIV 61180,

Tel. [phone], Fax. [phone]
Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3,

20124 MILANO, Tel. [phone], Fax. [phone]
Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108,

Tel. [phone], Fax. [phone]
Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,

Tel. [phone], Fax. [phone]
Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,

Tel. [phone], Fax. [phone]
Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,

Tel. [phone]

Middle East: see Italy

Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,

Tel. [phone], Fax. [phone]
New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,

Tel. [phone], Fax. [phone]
Norway: Box 1, Manglerud 0612, OSLO,

Tel. [phone], Fax. [phone]
Philippines: Philips Semiconductors Philippines Inc.,

106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. [phone], Fax. [phone]

Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA,
Tel. [phone], Fax. [phone]

Portugal: see Spain
Romania: see Italy
Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,

Tel. [phone], Fax. [phone]
Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231,

Tel. [phone], Fax. [phone]

Slovakia: see Austria
Slovenia: see Italy
South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,

2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000,
Tel. [phone], Fax. [phone]

South America: Rua do Rocio 220, 5th floor, Suite 51,
04552-903 São Paulo, SÃO PAULO - SP, Brazil,
Tel. [phone], Fax. [phone]

Spain: Balmes 22, 08007 BARCELONA,
Tel. [phone], Fax. [phone]

Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,
Tel. [phone], Fax. [phone]

Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. [phone], Fax. [phone]

Taiwan: PHILIPS TAIWAN Ltd., 23-30F, 66,
Chung Hsiao West Road, Sec. 1, P.O. Box 22978,
TAIPEI 100, Tel. [phone], Fax. [phone]

Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,
Tel. [phone], Fax. [phone]

Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,
Tel. [phone], Fax. [phone]

Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. [phone], Fax. [phone]

United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. [phone], Fax. [phone]

United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. [phone]

Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,

Tel. [phone], Fax.[phone]

For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications,
Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. [phone]

© Philips Electronics N.V. 1996 SCA51
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.

Internet: http://www.semiconductors.philips.com

Printed in The Netherlands 537021/51/01/pp36 Date of release: 1996 Aug 02 Document order number: 9397 750 00997