Datasheet tda9813t DATASHEETS (Philips)

Page 1
INTEGRATED CIRCUITS
DATA SH EET
TDA9813T
VIF-PLL with QSS-IF and dual FM-PLL demodulator
Preliminary specification File under Integrated Circuits, IC02
1995 Oct 03
Page 2
Philips Semiconductors Preliminary specification
VIF-PLL with QSS-IF and
TDA9813T
dual FM-PLL demodulator
FEATURES
• 5 V supply voltage
• Gain controlled wide band VIF-amplifier (AC-coupled)
• True synchronous demodulation with active carrier
regeneration (very linear demodulation, good intermodulation figures, reduced harmonics, excellent pulse response)
• Separate video amplifier for sound trap buffering with high video bandwidth
• VIF AGC detector for gain control, operating as peak sync detector
• Tuner AGC with adjustable takeover point (TOP)
• AFC detector without extra reference circuit
• AC-coupled limiter amplifier for sound intercarrier signal
QUICK REFERENCE DATA
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
P
I
P
V
i VIF(rms)
supply voltage 4.5 5 5.5 V supply current 93 109 125 mA vision IF input signal voltage
sensitivity (RMS value)
V
o CVBS(p-p)
CVBS output signal voltage (peak-to-peak value)
B
−3
−3 dB video bandwidth on pin CVBS B/G standard; CL< 20 pF;
S/N (W) weighted signal-to-noise ratio for
video IM IM
α
H(sup)
α1.1 α3.3
intermodulation attenuation at ‘blue’ f = 1.1 MHz 58 64 − dB
intermodulation attenuation at ‘blue’ f = 3.3 MHz 58 64 − dB
suppression of harmonics in video
signal V
i SIF(rms)
sound IF input signal voltage
sensitivity (RMS value) V
o(rms)
audio output signal voltage for FM
(RMS value) THD total harmonic distortion 54% modulation − 0.15 0.5 % S/N (W) weighted signal-to-noise ratio 54% modulation − 60 − dB
• Two alignment-free FM-PLL demodulators with high linearity
• SIF input for single reference QSS mode (PLL controlled); SIF AGC detector for gain controlled SIF amplifier; single reference QSS mixer able to operate in high performance single reference QSS mode
• Stabilizer circuit for ripple rejection and to achieve constant output signals.
GENERAL DESCRIPTION
The TDA9813T is an integrated circuit for vision IF signal processing and sound dual FM demodulation, with single reference QSS-IF in TV and VCR sets. For negative modulation standards only.
−1 dB video at output − 60 100 µV
1.7 2.0 2.3 V
78−MHz
> 1kΩ; AC load
R
L
56 60 − dB
35 40 − dB
−3 dB at intercarrier output − 30 70 µV
B/G standard;
− 0.5 − V
54% modulation
ORDERING INFORMATION
TYPE
NUMBER
NAME DESCRIPTION VERSION
TDA9813T SO28 plastic small outline package; 28 leads; body width 7.5 mm SOT136-1
1995 Oct 03 2
PACKAGE
Page 3
Philips Semiconductors Preliminary specification
VIF-PLL with QSS-IF and dual FM-PLL demodulator
BLOCK DIAGRAM
20212251625 43
AFC
PC
2 x f
video
1 V (p-p)
18
AFC DETECTOR
VIDEO DEMODULATOR
(vid)
CVBS
Vi
2 V (p-p)
8
19
VIDEO
BUFFER
AND AMPLIFIER
13
10
FM DETECTOR (PLL)
TDA9813T
AF1
11
AF AMPLIFIER
FM DETECTOR (PLL)
AF2
AF AMPLIFIER
14 12
MHA037
5.5
5.74
TDA9813T
SIF
andbook, full pagewidth
TOP
loop
tuner
AGC
C
filter
AGC
n.c.
VCO TWD
FPLL
TUNER AND VIF-AGC
VIF AMPLIFIER
2
1
VIF
MIXER
SINGLE REFERENCE
SIF
AMPLIFIER
28
27
SIF
917 15
n.c.n.c.
AGC
C
SIF-AGC
P
V 1/2
STABILIZER
26 24 23 7 6
INTERNAL VOLTAGE
Fig.1 Block diagram.
5 V
1995 Oct 03 3
Page 4
Philips Semiconductors Preliminary specification
VIF-PLL with QSS-IF and dual FM-PLL demodulator
PINNING
SYMBOL PIN DESCRIPTION
V
i VIF1
V
i VIF2
n.c. 3 not connected TADJ 4 tuner AGC takeover adjust (TOP) T
PLL
C
SAGC
n.c. 7 not connected V
o CVBS
n.c. 9 not connected V
o AF1
V
o AF2
C
DEC2
C
DEC1
V
i FM2
V
i FM1
TAGC 16 tuner AGC output V
o QSS
V
o(vid)
V
i(vid)
AFC 20 AFC output VCO1 21 VCO1 reference circuit for 2f VCO2 22 VCO2 reference circuit for 2f C
ref
GND 24 ground C
VAGC
V
P
V
i SIF1
V
i SIF2
1 VIF differential input signal voltage 1 2 VIF differential input signal voltage 2
5 PLL loop filter 6 SIF AGC capacitor
8 CVBS output signal voltage
10 audio voltage frequency output 1 11 audio voltage frequency output 2 12 decoupling capacitor 2 13 decoupling capacitor 1 14 sound intercarrier input voltage 2 15 sound intercarrier input voltage 1
17 single reference QSS output voltage 18 composite video output voltage 19 video buffer input voltage
PC PC
231⁄2VP reference capacitor
25 VIF AGC capacitor 26 supply voltage 27 SIF differential input signal voltage 1 28 SIF differential input signal voltage 2
handbook, halfpage
V V
C
V
o CVBS
V V C C
V
i VIF1 i VIF2
n.c.
TADJ
T
PLL
SAGC
n.c.
n.c.
o AF1 o AF2 DEC2 DEC1
i FM2
1 2 3 4 5 6 7
TDA9813T
8
9 10 11 12 13 14
Fig.2 Pin configuration.
MHA038
TDA9813T
V
28
i SIF2
V
27
i SIF1
V
26
P
C
25
VAGC
24
GND C
23
ref
22
VCO2
21
VCO1
20
AFC V
19
i(vid)
V
18
o(vid)
V
17
o QSS
16
TAGC V
15
i FM1
1995 Oct 03 4
Page 5
Philips Semiconductors Preliminary specification
VIF-PLL with QSS-IF and dual FM-PLL demodulator
FUNCTIONAL DESCRIPTION Vision IF amplifier
The vision IF amplifier consists of three AC-coupled differential amplifier stages. Each differential stage comprises a feedback network controlled by emitter degeneration.
Tuner and VIF AGC
The AGC capacitor voltage is transferred to an internal IF control signal, and is fed to the tuner AGC to generate the tuner AGC output current (open-collector output). The tuner AGC takeover point can be adjusted. This allows the tuner and the SWIF filter to be matched to achieve the optimum IF input level.
The AGC detector charges/discharges the AGC capacitor to the required voltage for setting of VIF and tuner gain in order to keep the video signal at a constant level. Therefore the sync level of the video signal is detected.
Frequency Phase Locked Loop (FPLL) detector
TDA9813T
Video demodulator and amplifier
The video demodulator is realized by a multiplier which is designed for low distortion and large bandwidth. The vision IF input signal is multiplied with the ‘in phase’ signal of the travelling wave divider output.
The demodulator output signal is fed via an integrated low-pass filter for attenuation of the carrier harmonics to the video amplifier. The video amplifier is realized by an operational amplifier with internal feedback and high bandwidth. A low-pass filter is integrated to achieve an attenuation of the carrier harmonics. The video output signal is 1 V (p-p) for nominal vision IF modulation.
Video buffer
For an easy adaption of the sound traps an operational amplifier with internal feedback is used. This amplifier is featured with a high bandwidth and 7 dB gain. The input impedance is adapted for operating in combination with ceramic sound traps. The output stage delivers a nominal 2 V (p-p) positive video signal. Noise clipping is provided.
The VIF-amplifier output signal is fed into a frequency detector and into a phase detector via a limiting amplifier. During acquisition the frequency detector produces a DC current proportional to the frequency difference between the input and the VCO signal. After frequency lock-in the phase detector produces a DC current proportional to the phase difference between the VCO and the input signal. The DC current of either frequency detector or phase detector is converted into a DC voltage via the loop filter, which controls the VCO frequency.
VCO, travelling wave divider and AFC
The VCO operates with a resonance circuit (with L and C in parallel) at double the PC frequency. The VCO is controlled by two integrated variable capacitors. The control voltage required to tune the VCO from its free-running frequency to actually double the PC frequency is generated by the Frequency-Phase detector and fed via the loop filter to the first variable capacitor (FPLL). This control voltage is amplified and additionally converted into a current which represents the AFC output signal. At centre frequency the AFC output current is equal to zero.
The oscillator signal is divided-by-two with a Travelling Wave Divider (TWD) which generates two differential output signals with a 90 degree phase difference independent of the frequency.
SIF amplifier and AGC
The sound IF amplifier consists of two AC-coupled differential amplifier stages. Each differential stage comprises a controlled feedback network provided by emitter degeneration.
The SIF AGC detector is related to the SIF input signals (average level of FM carriers) and controls the SIF amplifier to provide a constant SIF signal to the single reference QSS mixer.
Single reference QSS mixer
The single reference QSS mixer is realized by a multiplier. The SIF amplifier output signal is fed to the single reference QSS mixer and converted to intercarrier frequency by the regenerated picture carrier (VCO). The mixer output signal is fed via a high-pass for attenuation of the video signal components to the output pin 17. With this system a high performance hi-fi stereo sound processing can be achieved.
1995 Oct 03 5
Page 6
Philips Semiconductors Preliminary specification
VIF-PLL with QSS-IF and dual FM-PLL demodulator
FM detectors
Each FM detector consists of a limiter, an FM-PLL and an AF amplifier. The limiter provides the amplification and limitation of the FM sound intercarrier signal before demodulation. The result is high sensitivity and AM suppression. The amplifier consists of 7 stages which are internally AC-coupled in order to minimize the DC offset and to save pins for DC decoupling.
The second limiter is extended with an additional level detector consisting of a rectifier and a comparator. By means of this the AF2 signal is set to mute and the PLL VCO is switched off, if the intercarrier signal at pin 14 is below 1 mV (RMS) in order to avoid false identification of a stereo decoder. Note that noise at pin 14 disables the mute state (at low SIF input signal), but this will not lead to false identification. This ‘auto-mute’ function can be disabled by connecting a 5.6 kΩ resistor from pin 14 to +V
Furthermore the AF output signals can be muted by connecting a resistor between the limiter inputs pin 14 or pin 15 and ground.
(see Fig.11).
P
TDA9813T
1
Internal voltage stabilizer and
The bandgap circuit internally generates a voltage of approximately 1.25 V, independent of supply voltage and temperature. A voltage regulator circuit, connected to this voltage, produces a constant voltage of 3.6 V which is used as an internal reference voltage.
For all audio output signals the constant reference voltage cannot be used because large output signals are required. Therefore these signals refer to half the supply voltage to achieve a symmetrical headroom, especially for the rail-to-rail output stage. For ripple and noise attenuation
1
the
⁄2VP voltage has to be filtered via a low-pass filter by
using an external capacitor together with an integrated resistor (fg= 5 Hz). For a fast setting to 1⁄2VP an internal start-up circuit is added.
⁄2VP-reference
The FM-PLL consists of an integrated relaxation oscillator, an integrated loop filter and a phase detector. The oscillator is locked to the FM intercarrier signal, output from the limiter. As a result of locking, the oscillator frequency tracks with the modulation of the input signal and the oscillator control voltage is superimposed by the AF voltage. The FM-PLL operates as an FM-demodulator.
The AF amplifier consists of two parts:
1. The AF preamplifier for FM sound is an operational amplifier with internal feedback, high gain and high common mode rejection. The AF voltage from the PLL demodulator, by principle a small output signal, is amplified by approximately 33 dB. The low-pass characteristic of the amplifier reduces the harmonics of the intercarrier signal at the sound output terminal. An additional DC control circuit is implemented to keep the DC level constant, independent of process spread.
2. The AF output amplifier (10 dB) provides the required output level by a rail-to-rail output stage. This amplifier makes use of an input selector for switching to FM or mute state, controlled by the mute switching voltage.
1995 Oct 03 6
Page 7
Philips Semiconductors Preliminary specification
VIF-PLL with QSS-IF and
TDA9813T
dual FM-PLL demodulator
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
P
V
i
t
s(max)
V
19
T
stg
T
amb
V
es
Notes
1. I
P
2. Machine model class B.
supply voltage (pin 26) maximum chip temperature of
0 5.5 V
125 °C; note 1
voltage at pins 1 to 7, 9 to 16, 19, 20 and
0V
23 to 28 maximum short-circuit time − 10 s tuner AGC output voltage 0 13.2 V storage temperature −25 +150 °C operating ambient temperature −20 +70 °C electrostatic handling voltage note 2 −300 +300 V
= 125 mA; T
=70°C; R
amb
th j-a
= 80 K/W.
P
V
THERMAL CHARACTERISTICS
SYMBOL PARAMETER VALUE UNIT
R
th j-a
thermal resistance from junction to ambient in free air 80 K/W
1995 Oct 03 7
Page 8
Philips Semiconductors Preliminary specification
VIF-PLL with QSS-IF and
TDA9813T
dual FM-PLL demodulator
CHARACTERISTICS
VP=5V; T video modulation DSB; residual carrier: 10%; video signal in accordance with Fig.11; unless otherwise specified.
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Supply (pin 26)
V
P
I
P
Vision IF amplifier (pins 1 and 2)
V
i VIF(rms)
V
i max(rms)
∆V
o(int)
G
IFcr
R
i(diff)
C
i(diff)
V
1, 2
True synchronous video demodulator; note 3 f
VCO(max)
/∆T oscillator drift as a function
∆f
osc
V
0 ref(rms)
f
pcCR
t
acq
V
i VIF(rms)
I
FPLL(offset)
=25°C; see Table 1 for input frequencies and level;input level V
amb
supply voltage note 1 4.5 5 5.5 V supply current 93 109 125 mA
input signal voltage sensitivity (RMS value)
maximum input signal voltage (RMS value)
internal IF amplitude difference between picture and sound carrier
B/G standard;
−1 dB video at output B/G standard;
+1 dB video at output within AGC range;
B/G standard;
∆f = 5.5 MHz IF gain control range see Fig.3 65 70 − dB differential input resistance note 2 1.7 2.2 2.7 kΩ differential input capacitance 1.2 1.7 2.5 pF DC input voltage − 3.4 − V
maximum oscillator
f=2f
PC
frequency for carrier regeneration
oscillator is free-running; of temperature
oscillator voltage swing at
I
= 0; note 4
AFC
B/G standard 70 100 130 mV pins 21 and 22 (RMS value)
picture carrier capture
B/G standard ±1.5 ±2.0 − MHz frequency range
acquisition time BL = 180 kHz; note 5 −−30 ms VIF input signal voltage
maximum IF gain; note 6 − 30 70 µV sensitivity for PLL to be locked (RMS value; pins 1 and 2)
FPLL offset current at pin 5 note 7 −−±4.5 µA
= 10 mV RMS value (sync-level);
iIF1,2
“CCIR, line 17”
; measurements taken in
− 60 100 µV
120 200 − mV
− 0.7 1 dB
125 130 − MHz
−−±20 ppm/K
1995 Oct 03 8
Page 9
Philips Semiconductors Preliminary specification
VIF-PLL with QSS-IF and
TDA9813T
dual FM-PLL demodulator
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Composite video amplifier (pin 18; sound carrier off)
V
o video(p-p)
output signal voltage (peak-to-peak value)
V
18(sync)
V
18(clu)
sync voltage level B/G standard − 1.5 − V upper video clipping voltage
level
V
18(cll)
lower video clipping voltage level
R I
int 18
o,18
output resistance note 2 −−10 Ω internal DC bias current for
emitter-follower
I
18 max(sink)
maximum AC and DC output sink current
I
18 max(source)
maximum AC and DC output source current
B
−1
B
−3
α
H
−1 dB video bandwidth B/G standard; CL< 50 pF;
−3 dB video bandwidth B/G standard; CL< 50 pF;
suppression of video signal harmonics
PSRR power supply ripple rejection
at pin 18
see Fig.8 0.88 1.0 1.12 V
VP− 1.1 VP− 1 − V
− 0.3 0.4 V
2.2 3.0 − mA
1.6 −−mA
2.9 −−mA
56−MHz
RL> 1kΩ; AC load
78−MHz
RL> 1kΩ; AC load
CL< 50 pF; RL> 1kΩ;
35 40 − dB
AC load; note 8a
video signal; grey level;
32 35 − dB
see Fig.9; B/G standard
CVBS buffer amplifier (only) and noise clipper (pins 8 and 19)
R C V G V
i,19 i,19
I,19
v
8(clu)
input resistance note 2 2.6 3.3 4.0 kΩ input capacitance note 2 1.4 2 3.0 pF DC input voltage 1.4 1.7 2.0 V voltage gain B/G standard; note 9 6.5 7 7.5 dB upper video clipping voltage
level
V
8(cll)
lower video clipping voltage level
R I
int 8
o,8
output resistance note 2 −−10 Ω DC internal bias current for
emitter-follower
I
o,8 max(sink)
maximum AC and DC output sink current
I
o,8 max(source)
maximum AC and DC output source current
B
−1
−1 dB video bandwidth B/G standard; CL< 20 pF;
RL> 1kΩ; AC load
B
−3
−3 dB video bandwidth B/G standard; CL< 20 pF;
RL> 1kΩ; AC load
3.9 4.0 − V
− 1.0 1.1 V
2.0 2.5 − mA
1.4 −−mA
2.4 −−mA
8.4 11 − MHz
11 14 − MHz
1995 Oct 03 9
Page 10
Philips Semiconductors Preliminary specification
VIF-PLL with QSS-IF and
TDA9813T
dual FM-PLL demodulator
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Measurements from IF input to CVBS output (pin 8; 330 Ω between pins 18 and 19, sound carrier off)
V
o CVBS(p-p)
CVBS output signal voltage on pin 10 (peak-to-peak value)
V
o CVBS(sync)
∆V
o
sync voltage level B/G standard − 1.35 − V deviation of CVBS output
signal voltage
∆V
o(blBG)
black level tilt in B/G standard
G
diff
ϕ
diff
B
−1
B
−3
differential gain differential phase
−1 dB video bandwidth B/G standard; CL< 20 pF;
−3 dB video bandwidth B/G standard; CL< 20 pF;
S/N (W) weighted signal-to-noise
ratio
S/N unweighted signal-to-noise
ratio
IMα
1.1
intermodulation attenuation at ‘blue’
intermodulation attenuation at ‘yellow’
IMα
3.3
intermodulation attenuation at ‘blue’
intermodulation attenuation at ‘yellow’
α
c(rms)
residual vision carrier (RMS value)
α
H(sup)
suppression of video signal harmonics
α
H(spur)
spurious elements note 8b 40 −−dB
PSRR power supply ripple rejection
at pin 8
note 9 1.7 2.0 2.3 V
50 dB gain control −−0.5 dB
30 dB gain control −−0.1 dB
gain variation; note 10 −−1%
“CCIR, line 330”
“CCIR, line 330”
− 25%
− 1 2 deg
56−MHz
RL> 1kΩ; AC load
78−MHz
RL> 1kΩ; AC load
see Fig.5 and note 11 56 60 − dB
see Fig.5 and note 11 49 53 − dB
f = 1.1 MHz;
58 64 − dB
see Fig.6 and note 12
f = 1.1 MHz;
60 66 − dB
see Fig.6 and note 12
f = 3.3 MHz;
58 64 − dB
see Fig.6 and note 12
f = 3.3 MHz;
59 65 − dB
see Fig.6 and note 12
fundamental wave and
− 25mV
harmonics; B/G standard
note 8a 35 40 − dB
video signal; grey level;
25 28 − dB
see Fig.9; B/G standard
VIF-AGC detector (pin 25)
I
25
charging current B/G standard; note 10 0.75 1 1.25 mA discharging current B/G standard 15 20 25 µA
t
resp
AGC response to an increasing VIF step
AGC response to a decreasing VIF step
1995 Oct 03 10
B/G standard; note 13 − 0.05 0.1 ms/dB
B/G standard − 2.2 3.5 ms/dB
Page 11
Philips Semiconductors Preliminary specification
VIF-PLL with QSS-IF and
TDA9813T
dual FM-PLL demodulator
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Tuner AGC (pin 16)
V
i(rms)
V
o,16
V
sat,16
∆V
TOP,16
I
16(sink)
∆G
IF
IF input signal voltage for minimum starting point of tuner takeover (RMS value)
IF input signal voltage for maximum starting point of tuner takeover (RMS value)
permissible output voltage from external source;
saturation voltage I16= 1.5 mA −−0.2 V
/∆T variation of takeover point by
temperature sink current see Fig.3
IF slip by automatic gain control
input at pins 1 and 2;
R
=22kΩ; I16= 0.4 mA
TOP
input at pins 1 and 2;
=0Ω; I16= 0.4 mA
R
TOP
− 25mV
50 100 5 mV
−−13.2 V
note 2
I16= 0.4 mA − 0.03 0.07 dB/K
no tuner gain reduction;
= 13.2 V
V
16
maximum tuner gain
−−5µA
1.5 2 2.6 mA
reduction
tuner gain current from
− 68dB
20 to 80%
AFC circuit (pin 20); see Fig.7 and note 14 S control steepness ∆I
/∆T frequency variation by
∆f
IF
/∆f note 15 0.5 0.72 1.0 µA/kHz
23
temperature
V
o,20
output voltage upper limit see Fig.7 VP − 0.6 VP − 0.3 − V output voltage lower limit see Fig.7 − 0.3 0.6 V
I
o,20(source)
I
o,20(sink)
∆I
20(p-p)
output source current 150 200 250 µA output sink current 150 200 250 µA residual video modulation
current (peak-to-peak value)
Sound IF amplifier (pins 27 and 28)
V
i SIF(rms)
input signal voltage sensitivity (RMS value)
V
i max(rms)
maximum input signal voltage (RMS value)
G
SIF
R
i(diff)
C
i(diff)
V
27/28
α
SIF/VIF
SIF gain control range see Fig.4 60 67 − dB differential input resistance note 2 1.7 2.2 2.7 kΩ differential input capacitance note2 1.2 1.7 2.5 pF DC input voltage − 3.4 − V crosstalk attenuation
between SIF and VIF input
I
= 0; note 4 −−±20 ppm/K
AFC
B/G standard − 20 30 µA
−3 dB at intercarrier output
− 30 70 µV
pin 17
+1 dB at intercarrier output
50 70 − mV
pin 17
between pins 1 and 2 and
50 −−dB
pins 27 and 28; note 16
1995 Oct 03 11
Page 12
Philips Semiconductors Preliminary specification
VIF-PLL with QSS-IF and
TDA9813T
dual FM-PLL demodulator
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
SIF-AGC detector (pin 6)
I
6
Single reference QSS intercarrier mixer (B/G standard; pin 17)
V
o(rms)
B
−3
α
c(rms)
R
o,17
V
O,17
I
int 17
I
17 max(sink)
I
17 max(source)
charging current 8 12 16 µA discharging current 8 12 16 µA
IF intercarrier level
SC1; sound carrier 2 off 75 100 125 mV (RMS value)
−3 dB intercarrier bandwidth upper limit 7.5 9 − MHz residual sound carrier
(RMS value)
fundamental wave and
harmonics
− 2 − mV
output resistance note 2 −−25 Ω DC output voltage − 2.0 − V DC internal bias current for
1.5 1.9 − mA
emitter-follower maximum AC and DC output
1.1 1.5 − mA
sink current maximum AC and DC output
3.0 3.5 − mA
source current
Limiter amplifier 1 (pin 15); note 17 V
i FM(rms)
input signal voltage for lock-in (RMS value)
V
i FM(rms)
input signal voltage (RMS value)
allowed input signal voltage (RMS value)
R
i,15
V
I,15
input resistance note 2 480 600 720 Ω DC input voltage − 2.8 − V
Limiter amplifier 2 (pin 14); note 17 V
i FM(rms)
input signal voltage for lock-in (RMS value)
V
i FM(rms)
input signal voltage (RMS value)
allowed input signal voltage (RMS value)
input signal voltage for no auto mute; PLL enabled (RMS value)
HYS
14
hysteresis of level detector for auto mute
R
i,14
V
I,14
input resistance note 2 480 600 720 Ω DC input voltage − 2.0 − V
SN+

--------------

N
SN+

--------------

N
40 dB=
40 dB=
PLL1 has to be in locked
mode; auto mute off
−−100 µV
− 300 400 µV
200 −−mV
−−100 µV
− 300 400 µV
200 −−mV
0.7 1 1.5 mV
−3 −6 −8dB
1995 Oct 03 12
Page 13
Philips Semiconductors Preliminary specification
VIF-PLL with QSS-IF and
TDA9813T
dual FM-PLL demodulator
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
FM-PLL detectors
f
i FM(catch)
f
i FM(hold)
t
acq
FM operation (B/G standard; pins 10 and 11); notes 17 and 17a V
o AF10,11(rms)
V
o AF10,11(cl)
∆f
AF
/∆T temperature drift of AF
∆V
o
V
12,13
R
10,11
V
10,11
I
10,11max(sink)
I
10,11max(source)
B
−3
THD total harmonic distortion − 0.15 0.5 % S/N (W) weighted signal-to-noise
α
c(rms)
α
AM
α
10,11
∆V
10,11
PSRR power supply ripple rejection
catching range of PLL upper limit 7.0 −−MHz
lower limit −−4.0 MHz holding range of PLL upper limit 9.0 −−MHz
lower limit −−3.5 MHz acquisition time −−4µs
AF output signal voltage (RMS value)
27 kHz
(54% FM deviation);
see Fig.11 and note 18
= 470 Ω 200 250 300 mV
x=Ry
=0Ω 400 500 600 mV
x=Ry
AF output clipping signal
R R
THD <1.5% 1.3 1.4 − V voltage level
frequency deviation THD <1.5%; note 18 −−53 kHz
− 3 × 10−37 × 10−3dB/K
output signal voltage DC voltage at decoupling
capacitor
voltage dependent on VCO
frequency; note 19
1.2 − 3.0 V
output resistance note 2 −−100 Ω DC output voltage tracked with supply voltage − maximum AC and DC output
−−1.1 mA
1
⁄2V
P
− V
sink current maximum AC and DC output
−−1.1 mA
source current
−3 dB video bandwidth 100 125 − kHz
55 60 − dB
ratio
FM-PLL only; with 50 µs
de-emphasis; 27 kHz
(54% FM deviation);
“CCIR 468-4”
residual sound carrier (RMS value)
AM suppression 50 µs de-emphasis; AM:
fundamental wave and
harmonics
−−75 mV
46 50 − dB f = 1 kHz; m = 0.3 refer to 27 kHz (54% FM deviation)
mute attenuation of AF
B/G standard 70 80 − dB
signals DC jump voltage of AF
output terminals for
FM-PLLs in lock mode; note 20
−±50 ±150 mV
switching AF output to mute state and vice versa
at pins 10 and 11
R see Figs 9 and 11
x=Ry
= 470 Ω;
26 30 − dB
1995 Oct 03 13
Page 14
Philips Semiconductors Preliminary specification
VIF-PLL with QSS-IF and
TDA9813T
dual FM-PLL demodulator
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Single reference QSS AF performance for FM operation (B/G standard); notes 21, 22 and 23; see Table 1
S/N (W) weighted signal-to-noise
ratio (SC
/SC2)
1
PC/SC1 ratio at pins 1 and 2; 27 kHz (54% FM deviation);
“CCIR 468-4”
black picture 53/48 58/55 − dB white picture 52/46 55/52 − dB 6 kHz sine wave (black to
white modulation) 250 kHz square wave
(black to white modulation)
sound carrier subharmonics; f = 2.75 MHz ±3 kHz
sound carrier subharmonics; f = 2.87 MHz ±3 kHz
40 −−dB
44/42 48/46 − dB
35/25 41/30 − dB
45/44 51/50 − dB
46/45 52/51 − dB
Notes to the characteristics
1. Values of video and sound parameters are decreased at VP= 4.5 V.
2. This parameter is not tested during production and is only given as application information for designing the television receiver.
3. Loop bandwidth BL = 180 kHz (natural frequency fn= 15 kHz; damping factor d ≈ 5; calculated with sync level within gain control range). Resonance circuit of VCO: Q0> 50; C
= 8.2 pF ±0.25 pF; C
ext
≈ 8.5 pF (loop voltage
int
approximately 2.7 V).
4. Temperature coefficient of external LC-circuit is equal to zero.
5. V
= 10 mV (RMS); ∆f = 1 MHz (VCO frequency offset related to picture carrier frequency); white picture
iIF
video modulation.
6. V
signal for nominal video signal.
iIF
7. Offset current measured between pin 5 and half of supply voltage (VP= 2.5 V) under the following conditions: no input signal at VIF input (pins 1 and 2) and VIF amplifier gain at minimum (V25=VP).
8. Measurements taken with SAW filter G3962 (sound carrier suppression: 40 dB); loop bandwidth BL = 180 kHz: a) Modulation VSB; sound carrier off; f b) Ssound carrier on; SIF SAW filter L9453; f
> 0.5 MHz.
video
= 10 kHz to 10 MHz.
video
9. The 7 dB buffer gain accounts for 1 dB loss in the sound trap. Buffer output signal is typical 2 V (p-p), in event of CVBS video amplifier output typical 1 V (p-p). If no sound trap is applied a 330 Ω resistor must be connected from output to input (from pin 18 to pin 19).
10. The leakage current of the AGC capacitor should not exceed 1 µA. Larger currents will increase the tilt.
11. S/N is the ratio of black-to-white amplitude to the black level noise voltage (RMS value, pin 8). B = 5 MHz weighted in accordance with
“CCIR 567”
.
1995 Oct 03 14
Page 15
Philips Semiconductors Preliminary specification
VIF-PLL with QSS-IF and
TDA9813T
dual FM-PLL demodulator
12. The intermodulation figures are defined:

at 4.4 MHz
V
0
α
1.1
α
3.3

20
20
------------------------------------- ­at 1.1 MHz
V

0

at 4.4 MHz
V
0

log=
------------------------------------- ­at 3.3 MHz
V

0
3.6dB+log=
; α
value at 3.3 MHz referenced to colour carrier.
3.3
13. Response speed valid for a VIF input level range of 200 µVupto70mV.
14. To match the AFC output signal to different tuning systems a current source output is provided. The test circuit is given in Fig.7. The AFC-steepness can be changed by the resistors at pin 20.
15. Depending on the ratio ∆C/C0 of the LC resonant circuit of VCO (Q0> 50; see note 3; C0=C
16. Source impedance: 2.3 kΩ in parallel to 12 pF (SAW filter); fIF= 38.9 MHz.
17. Input level for second IF from an external generator with 50 Ω source impedance. AC-coupled with 10 nF capacitor, f
= 1 kHz, 27 kHz (54% FM deviation) of audio references. A VIF/SIF input signal is not permitted. Pins 6 and 25
mod
have to be connected to positive supply voltage for minimum IF gain. S/N and THD measurements are taken at 50 µs de-emphasis. The not tested FM-PLL has to be locked to an unmodulated carrier.
a) Second IF input level 10 mV (RMS).
18. Measured with an FM deviation of 27 kHz the typical AF output signal is 500 mV RMS (Rx=Ry=0Ω; see Fig.11). By using Rx=Ry= 470 Ω the AF output signal is attenuated by 6 dB (250 mV RMS) and adapted to the stereo decoder family TDA9840. For handling an FM deviation of more than 53 kHz the AF output signal has to be reduced by using Rx and Ry in order to avoid clipping (THD < 1.5%). For an FM deviation up to 100 kHz an attenuation of 6 dB is recommended with Rx=Ry= 470 Ω.
19. The leakage current of the decoupling capacitor (2.2 µF) should not exceed 1 µA.
20. In the event of activated auto mute state the second FM-PLL oscillator is switched off, if the input signal at pin 14 is missing or too weak (see Fig.11). In the event of switching the second FM-PLL oscillator on by the auto mute stage an increased DC jump is the consequence. Note, that noise at pin 14 disables the mute state (at low SIF input signal), but this will not lead to false identification of the used stereo decoder family TDA9840.
21. For all S/N measurements the used vision IF modulator has to meet the following specifications: a) Incidental phase modulation for black-to-white jump less than 0.5 degrees. b) QSS AF performance, measured with the television-demodulator AMF2 (audio output, weighted S/N ratio) better
than 60 dB (deviation 27 kHz) for 6 kHz sinewave black-to-white video modulation.
c) Picture-to-sound carrier ratio; PC/SC1= 13 dB; (transmitter).
22. Measurements taken with SAW filter G3962 (Siemens) for vision IF (suppressed sound carrier) and G9350 (Siemens) for sound IF (suppressed picture carrier). Input level V
23. The PC/SC ratio at pins 1 and 2 is calculated as the addition of TV transmitter PC/SC ratio and SAW filter PC/SC ratio. This PC/SC ratio is necessary to achieve the S/N(W) values as noted. A different PC/SC ratio will change these values.
value at 1.1 MHz referenced to black/white signal;
; α
1.1
= 10 mV (RMS), 27 kHz (54% FM deviation).
i SIF
int+Cext
).
Table 1 Input frequencies and carrier ratios
DESCRIPTION SYMBOL B/G STANDARD UNIT
Picture carrier f Sound carrier f
Picture-to-sound carrier ratio SC
1995 Oct 03 15
SC1
f
SC2
SC
PC
38.9 MHz
33.4 MHz
33.158 MHz
1 2
13 dB 20 dB
Page 16
Philips Semiconductors Preliminary specification
VIF-PLL with QSS-IF and dual FM-PLL demodulator
andbook, full pagewidth
VIF input
(1,2)
(mV RMS)
0.6
70 gain (dB)
600.06
50
40
30
206
10
060
−10
1.0 2.521.5 3 3.5 4
(1) (2) (3) (4)
TDA9813T
MED861 - 1
I
tuner (mA)
0
1.0
2.0
V25 (V)
4.5
(1) I
; R
100
(27,28)
10
1
0.1
TOP
(dBµV)
=22kΩ.
tuner
(2) Gain.
handbook, full pagewidth
SIF input
(mV RMS)
110
100
90
80
70
60
50
40
30
(3) I (4) I
; R ; R
TOP TOP
=11kΩ. =0Ω.
tuner tuner
Fig.3 Typical VIF and tuner AGC characteristic.
MHA039
0.01
20
1.0 2.521.5 3 3.5 4
1995 Oct 03 16
Fig.4 Typical SIF AGC characteristic.
V6 (V)
4.5
Page 17
Philips Semiconductors Preliminary specification
VIF-PLL with QSS-IF and dual FM-PLL demodulator
0
V
i IF(rms)
600.06 0.6 6
V
i IF(rms)
MED684
(dB)
600
(mV)
70
handbook, halfpage
S/N
(dB)
60
50
40
30
20
10
0
60 40 20 20
10
Fig.5 Typical signal-to-noise ratio as a function of
IF input voltage.
handbook, halfpage
13.2 dB
27 dB
SC CC PC SC CC PC
3.2 dB
27 dB
BLUE YELLOW
SC = sound carrier, with respect to sync level. CC = chrominance carrier, with respect to sync level. PC = picture carrier, with respect to sync level. The sound carrier levels are taking into account
a sound shelf attenuation of 20 dB (SWIF G1962).
Fig.6 Input signal conditions.
TDA9813T
13.2 dB
10 dB
MED685 - 1
handbook, full pagewidth
V
P
TDA9813T
V = 5 V
P
22 kΩ
I
20
20
22 kΩ
V
Fig.7 Measurement conditions and typical AFC characteristic.
1995 Oct 03 17
(V)
4.5
3.5
2.5
1.5
0.5
I
20
20
(µA)
200
100
0
100
200
38.5
38.9
MHA040
(source current) 
(sink current) 
39.3
f (MHz)
Page 18
Philips Semiconductors Preliminary specification
VIF-PLL with QSS-IF and dual FM-PLL demodulator
handbook, halfpage
2.5 V
1.8 V
1.5 V
standard B/G
TDA9813T
white level
black level
sync level
MHA041
handbook, full pagewidth
Fig.8 Typical video signal levels on output pin 18 (sound carrier off).
VP = 5 V
TDA9813T
VP = 5 V
MHA042
100 mV
(f = 70 kHz)
ripple
t 
1995 Oct 03 18
Fig.9 Ripple rejection condition.
Page 19
Philips Semiconductors Preliminary specification
VIF-PLL with QSS-IF and dual FM-PLL demodulator
INTERNAL PIN CONFIGURATION
16
0.5 pF
1.6 kΩ
17
18
19
20
+
21
+
+
22
10 kΩ
+
9 kΩ
1.7 pF
+
+
2.2
kΩ
3.3
kΩ
+
200 µA
420 Ω
420
1.9 mA
1.7 pF
3.0 mA
2 kΩ
1 kΩ
1 kΩ
2.8 V 10 kΩ10 kΩ
Ω
2.5 mA
TDA9813T
15
+
40 kΩ
640 Ω
10 pF
40 kΩ
3.9 kΩ
3.6 V
10 kΩ
3.6 V
TDA9813T
14
+
3.9 kΩ
15 pF
2.3 mA
2.3 mA
+
+
25 pF
14.7 kΩ
+
25 pF
14.7 kΩ
+
+
2.5 mA
+
120 Ω
120 Ω
9 kΩ
600 Ω
3.6 V
40 kΩ
10 pF
40 kΩ
3.6 V
27 kΩ
+
+
+
+
+
n.c.
n.c.
MHA045
13
12
11
10
9
8
7
handbook, full pagewidth
Fig.10 Internal circuitry.
+
650 Ω
+
20 kΩ
GND
P
V
+
2324
+
25
26
20 kΩ
+
70 kΩ
+
+ +
1 mA
+
3.6 V
1.1 kΩ
1.1 kΩ
+
+
27
+
28
1995 Oct 03 19
3.6 V
1
+ +
+
VCO
23 µA
+
67 µA
1.1 kΩ
1.1 kΩ +
0.6 µA
3.6 V 20 kΩ
2
+
9 kΩ
34 5 6
n.c.
Page 20
Philips Semiconductors Preliminary specification
VIF-PLL with QSS-IF and dual FM-PLL demodulator
TEST AND APPLICATION INFORMATION
10
nF
mute switch
output
QSS intercarrier
video
output
5.6
kΩ
SFT
560 Ω
AGC
tuner
AF1
5.5 MHz
Ω
330
TDA9813T
MHA043
SFT
560 Ω
5.74 MHz
15
16
17
18
19
14
12 13
11
10
R
R
5.6
y
x
10
kΩ
22
(1)
(1)
22 µF
µF
nF
AF1
C
AF2
C
AF2 mute switch
+ 5 V: auto mute off
open: auto mute on
ground: mute
5 V
10 nF10 nF
5.6 kΩ
5.6
kΩ
AF2 output
de-emphasis
AFC
V
20
22
kΩ
21
50
nF
100
22 kΩ
P
Q
1:1
8.2 pF
0
GND
10
nF
5
4
1
2
Ω
50
ref
C
2.2
2.2
VIF
3
22
23
µF
µF
AGC
26 25 24
27
28
9
8
7
TDA9813T
6
5
4
3
2
1
n.c. n.c. n.c.
1:1
2.2
470
µF
Ω
TOP
5
1
SIF
22
AGC
loop
kΩ
4
2
50
filter
Ω
CVBS
nF
220
3
AF1 output
de-emphasis
handbook, full pagewidth
Fig.11 Test circuit.
1995 Oct 03 20
SIF
input
VIF
input
(1) See note 18 of Chapter “Characteristics”.
Page 21
Philips Semiconductors Preliminary specification
VIF-PLL with QSS-IF and dual FM-PLL demodulator
10
mute switch
AGC
output
AFC
22 kΩ
nF
video
output
22
100
kΩ
nF
330
kΩ
5.6
SFT
560 Ω
Ω
15
50
0
Q
10
nF
AF1
tuner
QSS intercarrier
P
V
5.5 MHz
µH
8.2 pF ref
C
µF
2.2
µF
2.2
VIF
AGC
15
16
17
18
19
20
21
22
23
26 25 24
27
560 Ω
SFT
5.74 MHz
14
12 13
11
10
9
8
7
TDA9813T
6
5
4
3
2
TDA9813T
MHA044
AF2 mute switch
+ 5 V: auto mute off
open: auto mute on
10
nF
kΩ
5.6
y
22
470
µF
Ω
TOP
SIF
22
22 µF
AGC
loop
kΩ
µF
AF1
C
AF2
C
filter
CVBS
nF
220
R
(2)
x
R
n.c. n.c.
2.2
n.c.
ground: mute
5 V
decoder
de-emphasis
depending on
TV standard/stereo
handbook, full pagewidth
Fig.12 Application circuit.
1995 Oct 03 21
IF
SWIF
input
G9350
50 Ω
28
(1)
1
(1)
SWIF
G3962
(1) Depends on standard.
(2) See note 18 of Chapter “Characteristics”.
Page 22
Philips Semiconductors Preliminary specification
VIF-PLL with QSS-IF and dual FM-PLL demodulator
PACKAGE OUTLINE
SO28: plastic small outline package; 28 leads; body width 7.5 mm
D
c
y
Z
28
15
TDA9813T
SOT136-1
E
H
E
A
X
v M
A
pin 1 index
1
e
0 5 10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
mm
A
max.
2.65
0.10
A
0.30
0.10
0.012
0.004
A
A
0.25
0.01
b
3
p
0.49
0.32
0.36
0.23
0.019
0.013
0.014
0.009
1
2
2.45
2.25
0.096
0.089
UNIT
inches
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
(1)E(1) (1)
cD
18.1
7.6
17.7
7.4
0.71
0.30
0.69
0.29
14
w M
b
p
scale
eHELLpQ
1.27
0.050
10.65
10.00
0.42
0.39
1.4
0.055
A
2
0.043
0.016
A
1.1
0.4
Q
A
3
θ
ywv θ
Z
0.9
0.4
0.035
0.004
0.016
o
8
o
0
L
p
L
0.25 0.1
0.01
(A )
1
detail X
1.1
0.25
1.0
0.043
0.01
0.039
OUTLINE
VERSION
SOT136-1
1995 Oct 03 22
REFERENCES
IEC JEDEC EIAJ
075E06 MS-013AE
EUROPEAN
PROJECTION
ISSUE DATE
91-08-13
95-01-24
Page 23
Philips Semiconductors Preliminary specification
VIF-PLL with QSS-IF and dual FM-PLL demodulator
SOLDERING Introduction
There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used.
This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our
“IC Package Databook”
Reflow soldering
Reflow soldering techniques are suitable for all SO packages.
Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement.
(order code 9398 652 90011).
TDA9813T
During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured.
Maximum permissible solder temperature is 260 °C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 °C within 6 seconds. Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications.
Repairing soldered joints
Fix the component by first soldering two diagonally­opposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C.
Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 °C.
Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 °C.
Wave soldering
Wave soldering techniques can be used for all SO packages if the following conditions are observed:
• A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used.
• The longitudinal axis of the package footprint must be parallel to the solder flow.
• The package footprint must incorporate solder thieves at the downstream end.
1995 Oct 03 23
Page 24
Philips Semiconductors Preliminary specification
VIF-PLL with QSS-IF and
TDA9813T
dual FM-PLL demodulator
DEFINITIONS
Data sheet status
Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
1995 Oct 03 24
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