Datasheet TDA9813T Datasheet (Philips)

INTEGRATED CIRCUITS

DATA SH EET

TDA9813T

VIF-PLL with QSS-IF and
dual FM-PLL demodulator

Product specification
Supersedes data of 1995 Oct 03
File under Integrated Circuits, IC02

1999 Sep 16

Philips Semiconductors Product specification

VIF-PLL with QSS-IF and
dual FM-PLL demodulator

FEATURES

• 5 V supply voltage

• Gain controlled wide band VIF amplifier (AC-coupled)

• True synchronous demodulation with active carrier

regeneration (very linear demodulation, good
intermodulation figures, reduced harmonics,
excellent pulse response)

• Separate video amplifier for sound trap buffering with
high video bandwidth

• VIF-AGC detector for gain control, operating as peak
sync detector

• Tuner AGC with adjustable takeover point (TOP)

• AFC detector without extra reference circuit

• AC-coupled limiter amplifier forsound intercarrier signal

• Two alignment-free FM-PLL demodulators with

high linearity

• SIF input for single reference QSS mode (PLL
controlled); SIF-AGC detector for gain controlled SIF
amplifier; single reference QSS mixer able to operate in
high performance single reference QSS mode

• Stabilizer circuit for ripple rejection and to achieve
constant output signals

• ESD protection for all pins.

TDA9813T

GENERAL DESCRIPTION

The TDA9813T is an integrated circuit for vision IF signal
processing and sound dual FM demodulation, with single
reference QSS-IF in TV and VCR sets. For negative
modulation standards only.

ORDERING INFORMATION

TYPE NUMBER

NAME DESCRIPTION VERSION

TDA9813T SO28 plastic small outline package; 28 leads; body width 7.5 mm SOT136-1

PACKAGE

1999 Sep 16 2

Philips Semiconductors Product specification

VIF-PLL with QSS-IF and

TDA9813T

dual FM-PLL demodulator

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

P

I

P

V

i VIF(rms)

V

o CVBS(p-p)

B

−3

S/N(W) weighted signal-to-noise ratio for video 56 60 − dB
IM

α1.1

IM

α3.3

α

H(sup)

V

i SIF(rms)

V

o(rms)

THD total harmonic distortion 54% modulation − 0.15 0.5 %
S/N(W) weighted signal-to-noise ratio 54% modulation − 60 − dB

supply voltage 4.5 5 5.5 V
supply current 93 109 125 mA
vision IF input signal voltage sensitivity

−1 dB video at output − 60 100 µV

(RMS value)
CVBS output signal voltage

1.7 2.0 2.3 V

(peak-to-peak value)

−3 dB video bandwidth on pin 8 CL< 20 pF; RL> 1kΩ; AC load 7 8 − MHz

intermodulation attenuation at ‘blue’ f = 1.1 MHz 58 64 − dB
intermodulation attenuation at ‘blue’ f = 3.3 MHz 58 64 − dB
suppression of harmonics in video

35 40 − dB

signal
sound IF input signal voltage

−3 dB at intercarrier output − 30 70 µV

sensitivity (RMS value)
audio output signal voltage for FM

B/G standard; 54% modulation − 0.5 − V

(RMS value)

1999 Sep 16 3

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1999 Sep 16 4

C

TOP

AGC

n.c.

tuner
AGC

handbook, full pagewidth

loop
filter

2 x f

PC

AFC

20212251625 43

BLOCK DIAGRAM

Philips Semiconductors Product specification

VIF-PLL with QSS-IF and

dual FM-PLL demodulator

VIF

SIF

2

VIF AMPLIFIER

1

28
27

INTERNAL VOLTAGE

STABILIZER

26 24 23 7 6

5 V

TUNER AND VIF-AGC

AMPLIFIER

SIF-AGC

VP1/2

SIF

C

AGC

FPLL

SINGLE REFERENCE

MIXER

917 15

n.c.n.c.

VCO TWD

AFC DETECTOR

VIDEO DEMODULATOR

AND AMPLIFIER

TDA9813T

5.5

5.74
SIF

VIDEO

BUFFER

FM DETECTOR (PLL)

AF AMPLIFIER

FM DETECTOR (PLL)

AF AMPLIFIER

14 12

18

19

13

10

11

MHA037

video

1 V (p-p)

8

CVBS

2 V (p-p)

V

i(vid)

AF1

AF2

TDA9813T

Fig.1 Block diagram.

Philips Semiconductors Product specification

VIF-PLL with QSS-IF and
dual FM-PLL demodulator

PINNING

SYMBOL PIN DESCRIPTION

V

i VIF1

V

i VIF2

n.c. 3 not connected
TADJ 4 tuner AGC takeover adjust (TOP)
T

PLL

C

SAGC

n.c. 7 not connected
V

o CVBS

n.c. 9 not connected
V

o AF1

V

o AF2

C

DEC2

C

DEC1

V

i FM2

V

i FM1

TAGC 16 tuner AGC output
V

o QSS

V

o(vid)

V

i(vid)

AFC 20 AFC output
VCO1 21 VCO1 reference circuit for 2f
VCO2 22 VCO2 reference circuit for 2f
C

ref

GND 24 ground
C

VAGC

V

P

V

i SIF1

V

i SIF2

1 VIF differential input signal voltage 1
2 VIF differential input signal voltage 2

5 PLL loop filter
6 SIF-AGC capacitor

8 CVBS output signal voltage

10 audio voltage frequency output 1
11 audio voltage frequency output 2
12 decoupling capacitor 2
13 decoupling capacitor 1
14 sound intercarrier input voltage 2
15 sound intercarrier input voltage 1

17 single reference QSS output voltage
18 composite video output voltage
19 video buffer input voltage

PC
PC

231⁄2VPreference capacitor

25 VIF-AGC capacitor
26 supply voltage
27 SIF differential input signal voltage 1
28 SIF differential input signal voltage 2

handbook, halfpage

V
V

C

V

o CVBS

V
V
C
C

V

i VIF1
i VIF2

n.c.

TADJ

T

PLL

SAGC

n.c.

n.c.

o AF1
o AF2
DEC2
DEC1

i FM2

1
2
3
4
5
6
7

TDA9813T

8

9
10
11
12
13
14

Fig.2 Pin configuration.

MHA038

TDA9813T

V

28

i SIF2

V

27

i SIF1

V

26

P

C

25

VAGC

24

GND
C

23

ref

22

VCO2

21

VCO1

20

AFC
V

19

i(vid)

V

18

o(vid)

V

17

o QSS

16

TAGC
V

15

i FM1

1999 Sep 16 5

Philips Semiconductors Product specification

VIF-PLL with QSS-IF and
dual FM-PLL demodulator

FUNCTIONAL DESCRIPTION

The integrated circuit comprises the functional blocks as
shown in Fig.1:

• Vision IF amplifier

• Tuner and VIF-AGC

• Frequency Phase Locked Loop (FPLL) detector

• VCO, Travelling Wave Divider (TWD) and AFC

• Video demodulator and amplifier

• Video buffer

• SIF amplifier and SIF-AGC

• Single reference Quasi Split Sound (QSS) mixer

• FM-PLL demodulator

• Internal voltage stabilizer and1⁄2VPreference.

Vision IF amplifier

The vision IF amplifier consists of three AC-coupled
differential amplifier stages. Each differential stage
comprises a feedback network controlled by emitter
degeneration.

Tuner and VIF-AGC

The AGC capacitor voltage is transferred to an internal IF
control signal, and is fed to the tuner AGC to generate the
tuner AGC output current (open-collector output).
The tuner AGC takeover point can be adjusted. This
allows the tuner and the SAW filter to be matched to
achieve the optimum IF input level.

The AGC detector charges/discharges the AGC capacitor
to the required voltage for setting of VIF and tuner gain in
order to keep the video signal at a constant level.
Therefore the sync level of the video signal is detected.

Frequency Phase Locked Loop (FPLL) detector

The VIF amplifier output signal is fed into a frequency
detector and into a phase detector via a limiting amplifier.
During acquisition the frequency detector produces a DC
current proportional to the frequency difference between
the input and the VCO signal. After frequency lock-in the
phase detector produces a DC current proportional to the
phase difference between the VCO and the input signal.
The DC current of either frequency detector or phase
detector is converted into a DC voltage via the loop filter,
which controls the VCO frequency.

TDA9813T

VCO, Travelling Wave Divider (TWD) and AFC

The VCO operates with a resonance circuit (with L and C
in parallel) at double the PC frequency. The VCO is
controlled by two integrated variable capacitors.
The control voltage required to tune the VCO from its
free-running frequency to actually double the PC
frequency is generated by the frequency-phase detector
(FPLL) and fed via the loop filter to the first variable
capacitor.Thiscontrol voltage is amplified and additionally
converted into a current which represents the AFC output
signal.AtcentrefrequencytheAFCoutputcurrentisequal
to zero.

The oscillator signal is divided-by-two with a TWD which
generates two differential output signals with a 90 degree
phase difference independent of the frequency.

Video demodulator and amplifier

The video demodulator is realized by a multiplier which is
designedforlowdistortion and large bandwidth. Thevision
IF input signal is multiplied with the ‘in phase’ signal of the
travelling wave divider output.

The demodulator output signal is fed via an integrated
low-pass filter for attenuation of the carrier harmonics to
the video amplifier. The video amplifier is realized by an
operational amplifier with internal feedback and high
bandwidth. A low-pass filter is integrated to achieve an
attenuation of the carrier harmonics. The video output
signal is 1 V (p-p) for nominal vision IF modulation.

Video buffer

For an easy adaption of the sound traps an operational
amplifier with internal feedback is used. This amplifier is
featured with a high bandwidth and 7 dB gain. The input
impedance is adapted for operating in combination with
ceramic sound traps. The output stage delivers a nominal
2 V (p-p) positive video signal. Noise clipping is provided.

SIF amplifier and SIF-AGC

The sound IF amplifier consists of two AC-coupled
differential amplifier stages. Each differential stage
comprises a controlled feedback network provided by
emitter degeneration.

The SIF-AGC detector is related to the SIF input signals
(average level of FM carriers) and controls the SIF
amplifier to provide a constant SIF signal to the single
reference QSS mixer.

1999 Sep 16 6

Philips Semiconductors Product specification

VIF-PLL with QSS-IF and
dual FM-PLL demodulator

Single reference QSS mixer

The single reference QSS mixer is realized by a multiplier.
The SIF amplifier output signal is fed to the single
reference QSS mixer and converted to intercarrier
frequency by the regenerated picture carrier (VCO).
The mixer output signal is fed via a high-pass for
attenuation of the video signal components to the output
pin 17. With this system a high performance hi-fi stereo
sound processing can be achieved.

FM-PLL demodulator

Each FM-PLL demodulator consists of a limiter, an
FM-PLL and an AF amplifier. The limiter provides the
amplification and limitation of the FM sound intercarrier
signal before demodulation. The result is high sensitivity
and AM suppression. The amplifier consists of 7 stages
which are internally AC-coupled in order to minimize the
DC offset and to save pins for DC decoupling.

The second limiter is extended with an additional level
detector consisting of a rectifier and a comparator.
By means of this the AF2 signal is set to mute and the
PLL VCO is switched off, if the intercarrier signal at pin 14
is below 1 mV (RMS) in order to avoid false identification
of a stereo decoder. It should be noted that noise at pin 14
disables the mute state (at low SIF input signal), but this
willnotleadto false identification. This ‘auto-mute’function
can be disabled by connecting a 5.6 kΩ resistor from
pin 14 to VP (see Fig.11).

Furthermore the AF output signals can be muted by
connecting a resistor between the limiter inputs pin 14 or
pin 15 and ground.

TDA9813T

The AF amplifier consists of two parts:

1. The AF preamplifier for FM sound is an operational
amplifier with internal feedback, high gain and high
common mode rejection. The AF voltage from the PLL
demodulator, by principle a small output signal, is
amplified by approximately 33 dB. The low-pass
characteristicofthe amplifier reducestheharmonicsof
the intercarrier signal at the sound output terminal.
An additionalDCcontrol circuit isimplementedtokeep
the DC level constant, independent of process spread.

2. The AF output amplifier (10 dB) provides the required
output level by a rail-to-rail output stage. This amplifier
makes use of an input selector for switching to FM or
mute state, controlled by the mute switching voltage.

1

Internal voltage stabilizer and

The band gap circuit internally generates a voltage of
approximately 1.25 V, independent of supply voltage and
temperature. A voltage regulator circuit, connected to this
voltage, produces a constant voltage of 3.6 V which is
used as an internal reference voltage.

For all audio output signals the constant reference voltage
cannot be used because large output signals are required.
Therefore these signals refer to half the supply voltage to
achieve a symmetrical headroom, especially for the
rail-to-rail output stage. For ripple and noise attenuation

1

the

⁄2VP voltage has to be filtered via a low-pass filter by

using an external capacitor together with an integrated
resistor (fg= 5 Hz). For a fast setting to 1⁄2VP an internal
start-up circuit is added.

⁄2VPreference

TheFM-PLLconsists of an integrated relaxation oscillator,
an integrated loop filter and a phase detector.
The oscillatorislockedtotheFMintercarriersignal,output
from the limiter. As a result of locking, the oscillator
frequency tracks with the modulation of the input signal
and the oscillator control voltage is superimposed by the
AF voltage. The FM-PLL operates as an FM demodulator.

1999 Sep 16 7

Philips Semiconductors Product specification

VIF-PLL with QSS-IF and

TDA9813T

dual FM-PLL demodulator

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

P

V

n

t

s(max)

V

16

T

stg

T

amb

V

es

Notes

1. IP= 125 mA; T

2. Machine model class B (L = 2.5 µH).

THERMAL CHARACTERISTICS

supply voltage (pin 26) maximum chip temperature

0 5.5 V

of 125 °C; note 1

voltage at pins 1 to 7, 9 to 16, 19, 20 and

0V

P

V

23 to 28
maximum short-circuit time − 10 s
tuner AGC output voltage 0 13.2 V
storage temperature −25 +150 °C
ambient temperature −20 +70 °C
electrostatic handling voltage note 2 −300 +300 V

=70°C; R

amb

th(j-a)

= 80 K/W.

SYMBOL PARAMETER CONDITIONS VALUE UNIT

R

th(j-a)

thermal resistance from junction to ambient in free air 80 K/W

1999 Sep 16 8

Philips Semiconductors Product specification

VIF-PLL with QSS-IF and

TDA9813T

dual FM-PLL demodulator

CHARACTERISTICS

VP=5V; T
V

= 10 mV RMS value (sync-level); video modulation DSB; residual carrier: 10%; video signal in accordance with

i IF 1-2

“CCIR, line 17”

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Supply (pin 26)

V

P

I

P

Vision IF amplifier (pins 1 and 2)

V

i VIF(rms)

V

i max(rms)

∆V

o(int)

G

IFcr

R

i(diff)

C

i(diff)

V

1,2

True synchronous video demodulator; note 3
f

VCO(max)

/∆T oscillator drift as a function

∆f

osc

V

o ref(rms)

f

PC CR

t

acq

V

i VIF(rms)

Composite video amplifier (pin 18; sound carrier off)

V

o video(p-p)

V/S ratio between video

V

18(sync)

V

18(clu)

=25°C; see Table 1 for input frequencies and carrier ratios (B/G standard); input level

amb

; measurements taken in Fig.11; unless otherwise specified.

supply voltage note 1 4.5 5 5.5 V
supply current 93 109 125 mA

input signal voltage

−1 dB video at output − 60 100 µV

sensitivity (RMS value)
maximum input signal

+1 dB video at output 120 200 − mV

voltage (RMS value)
internal IF amplitude

difference between picture

within AGC range;

∆f = 5.5 MHz

− 0.7 1 dB

and sound carrier
IF gain control range see Fig.3 65 70 − dB
differential input resistance note 2 1.7 2.2 2.7 kΩ
differential input capacitance note 2 1.2 1.7 2.5 pF
DC input voltage note 2 − 3.4 − V

maximum oscillator

f=2f

PC

125 130 − MHz
frequency for carrier
regeneration

of temperature
oscillator voltage swing at

oscillator is free-running;
I

= 0; note 4

AFC

−−±20 × 10−6K

70 100 130 mV
pins 21 and 22 (RMS value)

picture carrier capture range ±1.4 ±1.8 − MHz
acquisition time BL = 75 kHz; note 5 −−30 ms
VIF input signal voltage

maximum IF gain; note 6 − 30 70 µV
sensitivity for PLL to be
locked (RMS value; pins 1
and 2)

output signal voltage

see Fig.8 0.88 1.0 1.12 V
(peak-to-peak value)

1.9 2.33 3.0 −
(black-to-white) and
sync level

sync voltage level − 1.5 − V
upper video clipping voltage

VP− 1.1 VP− 1 − V

level

−1

1999 Sep 16 9

Philips Semiconductors Product specification

VIF-PLL with QSS-IF and

TDA9813T

dual FM-PLL demodulator

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

18(cll)

R

o,18

I

int 18

I

18 max(sink)

I

18 max(source)

B

−1

B

−3

α

H(sup)

PSRR power supply ripplerejection

CVBS buffer amplifier (only) and noise clipper (pins 8 and 19)

R

i,19

C

i,19

V

I,19

G

v

V

8(clu)

V

8(cll)

R

o,8

I

int 8

I

o,8 max(sink)

I

o,10 max(source)

B

−1

B

−3

Measurements from IF input to CVBS output (pin 8; 330 Ω between pins 18 and 19, sound carrier off)

V

o CVBS(p-p)

V

o CVBS(sync)

lower video clipping voltage

− 0.7 0.9 V
level

output resistance note 2 −−10 Ω
internal DC bias current for

2.2 3.0 − mA
emitter-follower

maximum AC and DC output

1.6 −− mA
sink current

maximum AC and DC output

2.9 −− mA
source current

−1 dB video bandwidth CL< 50 pF; RL>1kΩ;

56− MHz

AC load

−3 dB video bandwidth CL< 50 pF; RL>1kΩ;

78− MHz

AC load

suppression of video signal
harmonics

at pin 18

CL< 50 pF; RL>1kΩ;
AC load; note 7a

video signal; grey level;
see Fig.9

35 40 − dB

32 35 − dB

input resistance note 2 2.6 3.3 4.0 kΩ
input capacitance note 2 1.4 2 3.0 pF
DC input voltage 1.4 1.7 2.0 V
voltage gain note 8 6.5 7 7.5 dB
upper video clipping voltage

3.9 4.0 − V
level

lower video clipping voltage

− 1.0 1.1 V
level

output resistance note 2 −−10 Ω
DC internal bias current for

2.0 2.5 − mA
emitter-follower

maximum AC and DC output

1.4 −− mA
sink current

maximum AC and DC output

2.4 −− mA
source current

−1 dB video bandwidth CL< 20 pF; RL>1kΩ;

8.4 11 − MHz

AC load

−3 dB video bandwidth CL< 20 pF; RL>1kΩ;

11 14 − MHz

AC load

CVBS output signal voltage

note 8 1.7 2.0 2.3 V
on pin 8
(peak-to-peak value)

sync voltage level − 1.35 − V

1999 Sep 16 10

Philips Semiconductors Product specification

VIF-PLL with QSS-IF and

TDA9813T

dual FM-PLL demodulator

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

∆V

o

∆V

o(blB/G)

G

diff

ϕ

diff

B

−1

B

−3

S/N(W) weighted signal-to-noise

S/N unweighted signal-to-noise

IMα

1.1

IMα

3.3

α

pc(rms)

α

H(sup)

α

H(spur)

PSRR power supply ripplerejection

VIF-AGC detector (pin 25)

I

25

t

resp

Tuner AGC (pin 16)

V

i(rms)

V

o,16

deviation of CVBS output
signal voltage at B/G

black level tilt in

50 dB gain control −−0.5 dB

30 dB gain control −−0.1 dB

gain variation; note 9 −−1%
B/G standard

differential gain
differential phase

−1 dB video bandwidth CL< 20 pF; RL>1kΩ;

“CCIR, line 330”

“CCIR, line 330”

− 25 %

− 1 2 deg

56− MHz

AC load

−3 dB video bandwidth CL< 20 pF; RL>1kΩ;

78− MHz

AC load

see Fig.5 and note 10 56 60 − dB
ratio

see Fig.5 and note 10 49 53 − dB
ratio

intermodulation attenuation
at ‘blue’

intermodulation attenuation
at ‘yellow’

intermodulation attenuation
at ‘blue’

intermodulation attenuation
at ‘yellow’

residual picture carrier
(RMS value)

suppression of video signal

f = 1.1 MHz;

58 64 − dB

see Fig.6 and note 11

f = 1.1 MHz;

60 66 − dB

see Fig.6 and note 11

f = 3.3 MHz;

58 64 − dB

see Fig.6 and note 11

f = 3.3 MHz;

59 65 − dB

see Fig.6 and note 11

fundamental wave and

− 25 mV

harmonics

note 7a 35 40 − dB
harmonics

spurious elements note 7b 40 −− dB

at pin 8

video signal; grey level;

see Fig.9

25 28 − dB

charging current note 9 0.75 1 1.25 mA
discharging current 15 20 25 µA
AGC response to an

note 12 − 0.05 0.1 ms/dB
increasing VIF step

AGC response to a

− 2.2 3.5 ms/dB

decreasing VIF step

IF input signal voltage for
minimum starting point of

input at pins 1 and 2;

R

=22kΩ; I16= 0.4 mA

TOP

− 25 mV

tuner takeover (RMS value)
IF input signal voltage for

maximum starting point of

input at pins 1 and 2;

R

=0Ω; I16= 0.4 mA

TOP

50 100 − mV

tuner takeover (RMS value)
permissible output voltage from external source; note 2 −−13.2 V

1999 Sep 16 11

Philips Semiconductors Product specification

VIF-PLL with QSS-IF and

TDA9813T

dual FM-PLL demodulator

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

sat,16

∆V

I

16(sink)

∆G

/∆T variation of takeoverpoint by

TOP,16

IF

AFC circuit (pin 20); see Fig.7 and note 13
S control steepness ∆I

∆f

/∆T frequency variation by

IF

V

o,20

I

o,20(source)

I

o,20(sink)

∆I

20(p-p)

Sound IF amplifier (pins 27 and 28)

V

i SIF(rms)

V

i max(rms)

G

SIFcr

R

i(diff)

C

i(diff)

V

I(27,28)

α

ct(SIF,VIF)

SIF-AGC detector (pin 6)

I

6

Single reference QSS intercarrier mixer (B/G standard; pin 17)

V

o(rms)

B

−3

α

SC(rms)

R

o,17

V

O,17

saturation voltage I16= 1.5 mA −−0.2 V

I16= 0.4 mA − 0.03 0.07 dB/K
temperature

sink current see Fig.3

no tuner gain reduction;
V

= 13.2 V

16

maximum tuner gain

−−1 µA

1.5 2 2.6 mA

reduction

IF slip by automatic gain
control

/∆f note 14 0.5 0.75 1.0 µA/kHz

20

tuner gain current from

− 68 dB

20% to 80%

I

= 0; note 5 −−±20 × 10−6K

AFC

temperature
output voltage upper limit see Fig.7 without external
output voltage lower limit − 0.3 0.6 V

components

VP− 0.6 VP− 0.3 − V

output source current see Fig.7 150 200 250 µA
output sink current 150 200 250 µA
residual video modulation

− 20 30 µA

current (peak-to-peak value)

input signal voltage
sensitivity (RMS value)

maximum input signal
voltage (RMS value)

−3 dB at intercarrier output

pin 17

+1 dB at intercarrier output

pin 17

− 30 70 µV

50 70 − mV

SIF gain control range see Fig.4 60 67 − dB
differential input resistance note 2 1.7 2.2 2.7 kΩ
differential input capacitance note 2 1.2 1.7 2.5 pF
DC input voltage − 3.4 − V
crosstalk attenuation

between SIF and VIF input

between pins 1 and 2 and

pins 27 and 28; note 15

50 −− dB

charging current 8 12 16 µA
discharging current 8 12 16 µA

IF intercarrier level

SC1; sound carrier 2 off 75 100 125 mV
(RMS value)

−3 dB intercarrier bandwidth upper limit 7.5 9 − MHz
residual sound carrier

(RMS value)

fundamental wave and

harmonics

− 2 − mV

output resistance note 2 −−25 Ω
DC output voltage − 2.0 − V

−1

1999 Sep 16 12

Philips Semiconductors Product specification

VIF-PLL with QSS-IF and

TDA9813T

dual FM-PLL demodulator

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

I

int 17

I

17 max(sink)

I

17 max(source)

Limiter amplifier 1 (pin 15); note 16
V

i FM(rms)

V

i FM(rms)

R

i,15

V

I,15

Limiter amplifier 2 (pin 14); note 16
V

i FM(rms)

V

i FM(rms)

HYS

14

R

i,14

V

I,14

FM-PLL demodulator

f

i FM(catch)

f

i FM(hold)

t

acq

DC internal bias current for

1.5 1.9 − mA

emitter-follower
maximum AC and DC output

1.1 1.5 − mA

sink current
maximum AC and DC output

3.0 3.5 − mA

source current

input signal voltage for

−−100 µV

lock-in (RMS value)
input signal voltage

(RMS value)
allowed input signal voltage

SN+

-------------­N

40 dB=

− 300 400 µV

200 −− mV

(RMS value)
input resistance note 2 480 600 720 Ω
DC input voltage − 2.8 − V

input signal voltage for

−−100 µV

lock-in (RMS value)
input signal voltage

(RMS value)

SN+

-------------­N

40 dB=

− 300 400 µV

PLL1 has to be in locked
mode; auto mute off

allowed input signal voltage

200 −− mV

(RMS value)
input signal voltage for no

0.7 1 1.5 mV
auto mute; PLL enabled
(RMS value)

hysteresis of level detector

−3 −6 −8dB
for auto mute

input resistance note 2 480 600 720 Ω
DC input voltage − 2.0 − V

catching range of PLL upper limit 7.0 −− MHz

lower limit −−4.0 MHz

holding range of PLL upper limit 8.0 −− MHz

lower limit −−3.5 MHz

acquisition time −−4 µs

1999 Sep 16 13

Philips Semiconductors Product specification

VIF-PLL with QSS-IF and

TDA9813T

dual FM-PLL demodulator

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

FM operation (B/G standard; pins 10 and 11); notes 16 and 16a

V

o AF10,11(rms)

AF output signal voltage
(RMS value)

V

o AF10,11(cl)

AF output clipping signal
voltage level

∆f

AF

/∆T temperature drift of AF

∆V

o

frequency deviation THD < 1.5%; note 17 −−±53 kHz

output signal voltage

V

12,13

DC voltage at decoupling
capacitor

R

10,11

V

10,11

I

10,11max(sink)

output resistance note 2 −−100 Ω
DC output voltage tracked with supply voltage −
maximum AC and DC output

sink current

I

10,11max(source)

maximum AC and DC output
source current

B

−3

−3 dB video bandwidth 100 125 − kHz

THD total harmonic distortion − 0.15 0.5 %
S/N(W) weighted signal-to-noise

ratio

α

SC(rms)

residual sound carrier
(RMS value)

α

α

AM

10,11

AM suppression 50 µs de-emphasis;

mute attenuation of AF
signal

∆V

10,11

DC jump voltage of AF
output terminals for
switching AF output to mute
state and vice versa

PSRR power supply ripplerejection

at pins 10 and 11

27 kHz (54% FM deviation);
see Fig.11 and note 17

R
R

= 470 Ω 200 250 300 mV

x=Ry

=0Ω 400 500 600 mV

x=Ry

THD < 1.5% 1.3 1.4 − V

−3

voltage dependent on VCO

− 3 × 10−37 × 10

1.2 − 3.0 V

frequency; note 18

1

⁄2V

P

− V

−−1.1 mA

−−1.1 mA

FM-PLL only; with 50 µs

55 60 − dB
de-emphasis; 27 kHz
(54% FM deviation);

“CCIR 468-4”

fundamental wave and

−−75 mV

harmonics

46 50 − dB
AM: f = 1 kHz; m = 0.3 refer
to 27 kHz (54% FM
deviation)

70 80 − dB

FM-PLLs in lock mode;

−±50 ±150 mV

note 19

R

x=Ry

=0Ω;

22 28 − dB
see Figs 9 and 11

dB/K

1999 Sep 16 14

Philips Semiconductors Product specification

α

VIF-PLL with QSS-IF and

TDA9813T

dual FM-PLL demodulator

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Single reference QSS AF performance for FM operation (B/G standard); see Table 1 and notes 20, 21 and 22

S/N(W) weighted signal-to-noise

ratio (SC

/SC2)

1

PC/SC1 ratio at pins 1
and 2; 27 kHz (54% FM
deviation);

“CCIR 468-4”

black picture 53/48 58/55 − dB
white picture 50/46 55/52 − dB
6 kHz sine wave;

black-to-white modulation
250 kHz square wave;

black-to-whitemodulation;
see note 2 in Fig.12

sound carrier
subharmonics;
f = 2.75 MHz ±3 kHz

sound carrier
subharmonics;
f = 2.87 MHz ±3 kHz

40 −− dB

42/40 48/46 − dB

45/42 53/50 − dB

45/44 51/50 − dB

46/45 52/51 − dB

Notes

1. Values of video and sound parameters are decreased at VP= 4.5 V.

2. This parameter is not tested during production and is only given as application information for designing the
television receiver.

3. LoopbandwidthBL = 75 kHz(natural frequency fn= 11 kHz;dampingfactord ≈ 3.5; calculated with sync level within
gain control range). Resonance circuit of VCO: Q0> 50; C

= 8.2 pF ±0.25 pF; C

ext

≈ 8.5 pF (loop voltage

int

approximately 2.7 V).

4. Temperature coefficient of external LC circuit is equal to zero.

5. V

= 10 mV RMS; ∆f = 1 MHz (VCO frequency offset related to picture carrier frequency); white picture

iIF

video modulation.

6. V

signal for nominal video signal.

iIF

7. Measurements taken with SAW filter G3962 (sound carrier suppression: 40 dB); loop bandwidth BL = 75 kHz:
a) Modulation VSB; sound carrier off; f
b) Sound carrier on; SIF SAW filter G9353; f

video

> 0.5 MHz.

= 10 kHz to 10 MHz.

video

8. The 7 dB buffer gain accounts for 1 dB loss in the sound trap. Buffer output signal is typical 2 V (p-p), in event of
CVBS video amplifier output typical 1 V (p-p). If no sound trap is applied a 330 Ω resistor must be connected from
output to input (between pin 18 and pin 19).

9. The leakage current of the AGC capacitor should not exceed 1 µA. Larger currents will increase the tilt.

10. S/N is the ratio of black-to-white amplitude to the black level noise voltage (RMS value), on pin 8. B = 5 MHz
weighted in accordance with

“CCIR 567”

.

11. The intermodulation figures are defined:

20

1.1

3.3

20

α

--------------------------------------



at 1.1 MHz

V

0

V

at 4.4 MHz

0



log=

--------------------------------------



at 3.3 MHz

V

0

3.6 dB+log=

; α

; α

value at 1.1 MHz referenced to black/white signal;

1.1

value at 3.3 MHz referenced to colour carrier.

3.3

V

at 4.4 MHz

0



12. Response speed valid for a VIF input level range of 200 µVupto70mV.

1999 Sep 16 15

Philips Semiconductors Product specification

VIF-PLL with QSS-IF and

TDA9813T

dual FM-PLL demodulator

13. To match the AFC output signal to different tuning systems a current source output is provided. The test circuit is
given in Fig.7. The AFC steepness can be changed by the resistors at pin 20.

14. Depending on the ratio ∆C/C0 of the LC resonant circuit of VCO (Q0> 50; see note 3; C0=C

int+Cext

15. Source impedance: 2.3 kΩ in parallel to 12 pF (SAW filter); fIF= 38.9 MHz.

16. Input level for second IF from an external generator with 50 Ω source impedance. AC-coupled with 10 nF capacitor,
f

= 1 kHz, 27 kHz (54% FM deviation) of audio references. A VIF/SIF input signal is not permitted. Pins 6 and 25

mod

havetobe connected to positive supply voltage for minimum IF gain. S/N and THD measurements are taken at 50 µs
de-emphasis. The not tested FM-PLL has to be locked to an unmodulated carrier.

a) Second IF input level 10 mV RMS.

17. Measured with an FM deviation of 27 kHz the typical AF output signal is 500 mV RMS (Rx=Ry=0Ω; see Fig.11).
By using Rx=Ry= 470 Ω the AF output signal is attenuated by 6 dB (250 mV RMS) and adapted to the stereo
decoder family TDA9840. For handling an FM deviation of more than 53 kHz the AF output signal has to be reduced
by using Rxand Ryin order to avoid clipping (THD < 1.5%). For an FMdeviation up to 100 kHz an attenuation of 6 dB
is recommended with Rx=Ry= 470 Ω.

18. The leakage current of the decoupling capacitor (2.2 µF) should not exceed 1 µA.

19. In the event of activated auto mute state the second FM-PLL oscillator is switched off, if the input signal at pin 14 is
missing or too weak (see Fig.11). In the event of switching the second FM-PLL oscillator on by the auto mute stage
an increased DC jump is the consequence. It should be noted that noise at pin 14 disables the mute state (at low SIF
input signal), but this will not lead to false identification of the stereo decoder family TDA9840.

20. For all S/N measurements the used vision IF modulator has to meet the following specifications:
a) Incidental phase modulation for black-to-white jump less than 0.5 degrees.
b) QSS AF performance, measured with the television-demodulator AMF2 (audio output, weighted S/N ratio) better

than 60 dB (deviation 27 kHz) for 6 kHz sine wave black-to-white video modulation.

c) Picture-to-sound carrier ratio; PC/SC1= 13 dB (transmitter).

21. Measurements taken with SAW filter G3962 (Siemens) for vision IF (suppressed sound carrier) and G9350
(Siemens) for sound IF (suppressed picture carrier). Input level V

= 10 mV RMS, 27 kHz (54% FM deviation).

i SIF

22. The PC/SC ratio at pins 1 and 2 is calculated as the addition of TV transmitter PC/SC ratio and SAW filter PC/SC
ratio. This PC/SC ratio is necessary to achieve the S/N(W) values as noted. A different PC/SC ratio will change these
values.

).

Table 1 Input frequencies and carrier ratios

DESCRIPTION SYMBOL B/G STANDARD UNIT

Picture carrier f
Sound carrier f

SC1

f

SC2

PC

Picture-to-sound carrier ratio SC

SC

1999 Sep 16 16

38.9 MHz

33.4 MHz

33.158 MHz

1
2

13 dB
20 dB

Philips Semiconductors Product specification

VIF-PLL with QSS-IF and
dual FM-PLL demodulator

handbook, full pagewidth

VIF input

(1,2)

(mV RMS)

0.6

70
gain
(dB)

600.06

50

40

30

206

10

060

−10
1 2.521.5 3 3.5 4

(1) (2) (3) (4)

TDA9813T

MED861 - 1

I

tuner
(mA)

0

1

2

V25 (V)

4.5

(1) I

; R

tuner

(2) Gain.

handbook, full pagewidth

TOP

100

SIF input

(27,28)

(mV RMS)

10

1

0.1

(dBµV)

=22kΩ.

110

100

90

80

70

60

50

40

30

(3) I
(4) I

; R
; R

TOP
TOP

=11kΩ.
=0Ω.

tuner
tuner

Fig.3 Typical VIF and tuner AGC characteristic.

MHA039

0.01

20

1 2.521.5 3 3.5 4

Fig.4 Typical SIF-AGC characteristic.

1999 Sep 16 17

V6 (V)

4.5

Philips Semiconductors Product specification

VIF-PLL with QSS-IF and
dual FM-PLL demodulator

0

V

i (VIF)(rms)

V

i (VIF)(rms)

MED684

(dB)

(mV)

75

handbook, halfpage

S/N
(dB)

50

25

0

−60 −40 −20 20

0.06 0.6 6 60060

10

Fig.5 Typicalsignal-to-noise ratio as a function of

IF input voltage.

handbook, halfpage

13.2 dB

27 dB

SC CC PC SC CC PC

3.2 dB

13.2 dB

27 dB

BLUE YELLOW

SC = sound carrier, with respect to sync level.
CC = chrominance carrier, with respect to sync level.
PC = picture carrier, with respect to sync level.
The sound carrier levels are taking into account

a sound shelf attenuation of 20 dB (SAW filter G1962).

Fig.6 Input signal conditions.

TDA9813T

10 dB

MED685 - 1

handbook, full pagewidth

V

P

TDA9813T

VP = 5 V

22 kΩ

I

20

20

22 kΩ

V

Fig.7 Measurement conditions and typical AFC characteristic.

1999 Sep 16 18

(V)

2.5

I

20

20

(µA)

−200

−100

0

100

200

38.5 38.9 39.3

MHA040

(source current)

(sink current)

f (MHz)

Philips Semiconductors Product specification

VIF-PLL with QSS-IF and
dual FM-PLL demodulator

handbook, halfpage

2.5 V

1.8 V

1.5 V

B/G standard

TDA9813T

white level

black level

sync level

MHA041

handbook, full pagewidth

Fig.8 Typical video signal levels on output pin 18 (sound carrier off).

VP = 5 V

VP = 5 V

TDA9813T

MHA042

(f

ripple

100 mV

= 70 Hz)

t

Fig.9 Ripple rejection condition.

1999 Sep 16 19

Philips Semiconductors Product specification

VIF-PLL with QSS-IF and
dual FM-PLL demodulator

(dBµV)

140

120

100

(1)

80

dbook, full pagewidth

antenna input

tuning gain

control range

SAW insertion

loss 14 dB

IF slip

6 dB

70 dB

VIF AGC

TDA9813T

10

IF signals

RMS value

(V)

video 2 V (p-p)

1

−1

10

−2

10

(TOP)

(1) Depends on TOP.

−3

MHB571

10

0.66 × 10

−4

10

−5

10

0.66 × 10

−3

−5

60

SAW insertion

loss 14 dB

40

40 dB

RF gain

20

10

VHF/UHF tuner VIF

tuner SAW filter TDA9813T

VIF amplifier, demodulator

and video

Fig.10 Front-end level diagram.

1999 Sep 16 20

Philips Semiconductors Product specification

VIF-PLL with QSS-IF and
dual FM-PLL demodulator

INTERNAL CIRCUITRY
Table 2 Equivalent pin circuits and pin voltages

PIN
NO.

1V
2V

3 n.c. −
4 TADJ 0 to 1.9

PIN

SYMBOL

i VIF1
i VIF2

DC VOLTAGE

(V)

3.4

3.4

TDA9813T

EQUIVALENT CIRCUIT (WITHOUT ESD PROTECTION CIRCUIT)

+

1

1.1 kΩ

1.1 kΩ800 Ω

2

3.4 V

650 µA

+

650 µA

MHA673

5T

PLL

1.5 to 4.0

30 kΩ

4

5

9 kΩ

1.9 V

++++

20 kΩ 3.6 V

MHB020

I

+

b

MHB021

VCO

200 µA

1999 Sep 16 21

Philips Semiconductors Product specification

VIF-PLL with QSS-IF and
dual FM-PLL demodulator

PIN
NO.

6C

7 n.c. −
8V

PIN

SYMBOL

SAGC

o CVBS

DC VOLTAGE

(V)

1.5 to 4.0

sync level:

1.35

TDA9813T

EQUIVALENT CIRCUIT (WITHOUT ESD PROTECTION CIRCUIT)

+

15 µA

6

I

b

+++

±1 µA

MHB022

+

9 n.c. −

10 V

o AF1

2.3

8

2.5 mA

MHB024

++

21.7 kΩ

10

25 pF

23.7 kΩ

120 Ω

MHB025

1999 Sep 16 22

Philips Semiconductors Product specification

VIF-PLL with QSS-IF and
dual FM-PLL demodulator

PIN
NO.

11 V

12 C

PIN

SYMBOL

o AF2

DEC2

DC VOLTAGE

(V)

2.3

1.2 to 3.0

TDA9813T

EQUIVALENT CIRCUIT (WITHOUT ESD PROTECTION CIRCUIT)

++

21.7 kΩ

11

23.7 kΩ

25 pF

++

120 Ω

MHB026

+

90 µA

13 C

DEC1

1.2 to 3.0

12

1 kΩ

MHB027

+

++

13

90 µA

1 kΩ

MHB028

1999 Sep 16 23

Philips Semiconductors Product specification

VIF-PLL with QSS-IF and
dual FM-PLL demodulator

PIN
NO.

14 V

15 V

PIN

SYMBOL

i FM2

i FM1

DC VOLTAGE

(V)

2.65

2.65

TDA9813T

EQUIVALENT CIRCUIT (WITHOUT ESD PROTECTION CIRCUIT)

14

2.65 V 35 µA

15

2.65 V 35 µA

400 Ω

40 kΩ640 Ω

600 µA

MHB029

400 Ω

40 kΩ640 Ω

600 µA

MHB030

16 TAGC 0 to 13.2

17 V

18 V

o QSS

o(vid)

2.0

sync level: 1.5

16

MHB031

+

150 Ω

17

14.7 kΩ

18

1.9 mA

MHB032

+

100 Ω

2.1 pF

3.0 mA

1999 Sep 16 24

MHB033

Philips Semiconductors Product specification

VIF-PLL with QSS-IF and
dual FM-PLL demodulator

PIN
NO.

19 V

20 AFC 0.3 to VP− 0.3

PIN

SYMBOL

i(vid)

DC VOLTAGE

(V)

1.7

TDA9813T

EQUIVALENT CIRCUIT (WITHOUT ESD PROTECTION CIRCUIT)

2 kΩ

2.2
kΩ

±200 µA

I

AFC

MHB034

3.3
kΩ

19

++

20

21 VCO1 2.7
22 VCO2 2.7

MHB035

420 Ω 420 Ω 50 Ω

21
22

+

+

500 µA 2.8 V

MHB570

1999 Sep 16 25

Philips Semiconductors Product specification

VIF-PLL with QSS-IF and
dual FM-PLL demodulator

PIN
NO.

23 C

24 GND 0
25 C

PIN

SYMBOL

ref

VAGC

DC VOLTAGE

(V)

1

⁄2V

P

1.5 to 4.0

TDA9813T

EQUIVALENT CIRCUIT (WITHOUT ESD PROTECTION CIRCUIT)

+

++

20

20
kΩ

kΩ

650 Ω

40 µA

70 kΩ

23

MHB037

26 V
27 V
28 V

P
i SIF1
i SIF2

V

3.4

3.4

25

I

b

1 mA

P

27

1.1 kΩ
5 kΩ

1.1 kΩ

28

800 Ω

+

100 µA

2.5 µA

0.3/20/40 µA

MHB038

+

400 µA

10 kΩ

1.8 V

+

1999 Sep 16 26

3.4 V

400 µA

MHB039

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1999 Sep 16 27

tuner

QSS

output

AGC

560 Ω

SFT

5.5 MHz

AF1

mute switch

10
nF

5.6
kΩ

SIF

input

50 Ω

22
kΩ

AFC

intercarrier

video

output

(1)

330

Ω

V

P

22 kΩ

100

C

ref

nF

Q0 > 50

8.2 pF

1:1

1

2

3

10 nF

5

4

VIF

AGC

2.2
µF

GND

2.2
µF

TEST AND APPLICATION INFORMATION

Philips Semiconductors Product specification

VIF-PLL with QSS-IF and

dual FM-PLL demodulator

28227

1

1:1

VIF

input

50 Ω

(1) Application for improved 250 kHz sound performance.
(2) See note 17 of Chapter “Characteristics”.

1

2

5

4

3

n.c.

26 25 24423522621

TDA9813T

3

TOP

22
kΩ

loop
filter

470

SIF

AGC

220

nF

Ω

7

n.c. n.c.

2.2 µF

(1)

39

820

pF

pF

CVBS

Fig.11 Test circuit.

2081991810171116

5.6

5.6
kΩ

kΩ

10 nF

AF1 output

de-emphasis

handbook, full pagewidth

12 131514

R

x

(2)

22 µF

C

C

10 nF

AF1

AF2

AF2 output

de-emphasis

R

(2)

+ 5 V

22
µF

560 Ω

SFT

5.74 MHz

5.6

y

kΩ

10

nF

AF2 mute switch
+ 5 V: auto mute off
open: auto mute on
ground: mute

MHA043

TDA9813T

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1999 Sep 16 28

Philips Semiconductors Product specification

VIF-PLL with QSS-IF and

dual FM-PLL demodulator

IF

input

50 Ω

SAW

FILTER

G9350

SAW

FILTER

G3962

(1)

28227

(1)

V

10 nF

P

22 kΩ

100

nF

Q0 > 50

VIF

AGC

26 25 2442352262172081991810171116

µF

µF

2.2

2.2

8.2 pF

C

ref

kΩ

AFC

22

(2)

330

Ω

15

µH

QSS intercarrier

output

video

output

TDA9813T

1

3

n.c.

TOP

22 kΩ

loop
filter

470 Ω

SIF

AGC

220 nF

(2)

39
pF

2.2 µF

n.c.

820

pF

CVBS

n.c.

de-emphasis
depending on

TV standard/stereo

decoder

22 µF

C

AF2

tuner
AGC

560 Ω

SFT

5.5 MHz

12 131514

R

R

x

y

(3)

(3)

22
µF

C

AF1

+ 5 V

560 Ω

5.74 MHz

5.6
kΩ

10
nF

AF2 mute switch
+ 5 V: auto mute off
open: auto mute on
ground: mute

AF1

mute switch

10
nF

5.6
kΩ

SFT

MHA044

TDA9813T

(1) Depends on standard.
(2) Application for improved 250 kHz sound performance.
(3) See note 17 of Chapter “Characteristics”.

Fig.12 Application circuit.

handbook, full pagewidth

Philips Semiconductors Product specification

VIF-PLL with QSS-IF and
dual FM-PLL demodulator

PACKAGE OUTLINE

SO28: plastic small outline package; 28 leads; body width 7.5 mm

D

c

y

Z

28

15

TDA9813T

SOT136-1

E

H

E

A

X

v M

A

pin 1 index

1

e

0 5 10 mm

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

mm

A

max.

2.65

0.10

A

1

0.30

0.10

0.012

0.004

A2A3b

2.45

0.25

2.25

0.096

0.01

0.089

p

0.49

0.36

0.019

0.014

0.32

0.23

0.013

0.009

UNIT

inches

Note

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

(1)E(1) (1)

cD

18.1

7.6

17.7

7.4

0.71

0.30

0.69

0.29

14

w M

b

p

scale

eHELLpQ

1.27

0.050

10.65

10.00

0.419

0.394

1.4

0.055

Q

A

2

0.043

0.016

A

1.1

0.4

L

p

L

0.25 0.1

0.01

(A )

1

detail X

1.1

0.25

1.0

0.043

0.01

0.039

A

3

θ

ywv θ

Z

0.9

0.4

0.035

0.004

0.016

o

8

o

0

OUTLINE

VERSION

SOT136-1

IEC JEDEC EIAJ

075E06 MS-013AE

REFERENCES

1999 Sep 16 29

EUROPEAN

PROJECTION

ISSUE DATE

95-01-24
97-05-22

Philips Semiconductors Product specification

VIF-PLL with QSS-IF and
dual FM-PLL demodulator

SOLDERING
Introduction to soldering surface mount packages

Thistextgivesaverybrief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our

“Data Handbook IC26; Integrated Circuit Packages”

(document order number 9398 652 90011).
There is no soldering method that is ideal for all surface

mount IC packages. Wave soldering is not always suitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.

Reflow soldering

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
totheprinted-circuitboardbyscreenprinting,stencillingor
pressure-syringe dispensing before package placement.

Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.

Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.

TDA9813T

• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.

• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint

longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;

– smaller than 1.27 mm, the footprint longitudinal axis

must be parallel to the transport direction of the
printed-circuit board.

The footprint must incorporate solder thieves at the
downstream end.

• Forpackageswithleadson four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.

During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

Manual soldering

Wave soldering

Conventional single wave soldering is not recommended
forsurfacemountdevices(SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.

To overcome these problems the double-wave soldering
method was specifically developed.

If wave soldering is used the following conditions must be
observed for optimal results:

Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.

When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.

1999 Sep 16 30

Philips Semiconductors Product specification

VIF-PLL with QSS-IF and

TDA9813T

dual FM-PLL demodulator

Suitability of surface mount IC packages for wave and reflow soldering methods

PACKAGE

BGA, SQFP not suitable suitable
HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS not suitable

(3)

PLCC
LQFP, QFP, TQFP not recommended
SSOP, TSSOP, VSO not recommended

Notes

1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum

2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink

3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.

4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;

5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is

, SO, SOJ suitable suitable

temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the

(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).

The package footprint must incorporate solder thieves downstream and at the side corners.

it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.

definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.

“Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”

WAVE REFLOW

(2)

SOLDERING METHOD

suitable

(3)(4)
(5)

suitable
suitable

(1)

.

DEFINITIONS

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

1999 Sep 16 31

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Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,

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For all other countries apply to: Philips Semiconductors,
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© Philips Electronics N.V. SCA
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.

1999

Internet: http://www.semiconductors.philips.com

68

Printed in The Netherlands 545004/02/pp32 Date of release: 1999 Sep 16 Document order number: 9397 750 06056