Single standard VIF-PLL with
QSS-IF and FM-PLL demodulator
Product specification
Supersedes data of 1999 Jan 18
File under Integrated Circuits, IC02
1999 Jun 04
Page 2
Philips SemiconductorsProduct specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
FEATURES
• 5 V supply voltage (9 V supply voltage for TDA9808
(DIP20) only)
• Applicable for IFs (Intermediate Frequencies) of
38.9 MHz, 45.75 MHz and 58.75 MHz
• Gain controlled wide band Video IF (VIF)-amplifier
(AC-coupled)
• True synchronous demodulation with active carrier
regeneration (very linear demodulation, good
intermodulation figures, reduced harmonics, excellent
pulse response)
• Robustness for over-modulation better than 105% due
to Phase Locked Loop (PLL)-bandwidth control at
negative modulated standards
• VIF Automatic Gain Control (AGC) detector for gain
control, operating as peak sync detector
• Tuner AGC with adjustable TakeOver Point (TOP)
• Automatic Frequency Control (AFC) detector without
extra reference circuit
• AC-coupled limiter amplifier for sound intercarrier signal
• Alignment-free FM-PLL demodulator with high linearity
• Sound IF (SIF) input for single reference Quasi Split
Sound (QSS) mode (PLL controlled); SIF AGC detector
for gain controlled SIF amplifier; single reference QSS
mixer for high performance
• Electrostatic Discharge (ESD) protection for all pins.
GENERAL DESCRIPTION
The TDA9808 is an integrated circuit for single standard
(negative modulated) vision IF signal processing and FM
demodulation, with single reference QSS-IF in TV and
VTR sets.
TDA9808
ORDERING INFORMATION
TYPE NUMBER
TDA9808DIP20
TDA9808TSO20
1999 Jun 042
NAMEDESCRIPTIONVERSION
plastic dual in-line package; 20 leads (300 mil)
plastic small outline package; 20 leads; body width 7.5 mm
PACKAGE
SOT146-1
SOT163-1
Page 3
Philips SemiconductorsProduct specification
Single standard VIF-PLL with QSS-IF and
TDA9808
FM-PLL demodulator
QUICK REFERENCE DATA
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX. UNIT
V
P
supply voltageVP= 9 V for TDA9808 (DIP20)
only
I
P
V
i(VIF)(rms)
supply current718395mA
VIF input signal voltage sensitivity
−1 dB video at output−60100µV
(RMS value)
V
o(video)(p-p)
video output signal voltage
(peak-to-peak value)
B
−3
S/N
W(video)
−3 dB video bandwidth on pin 9CL< 30 pF; RL> 1.5 kΩ; AC load 78−MHz
weighted signal-to-noise ratio for
video
α
IM(0.92)
α
IM(2.76)
α
H(sup)
intermodulation attenuation at ‘blue’f = 0.92 MHz5864−dB
intermodulation attenuation at ‘blue’f = 2.76 MHz5864−dB
suppression of harmonics in video
17VIF AGC capacitor
18supply voltage
19SIF differential input signal voltage 1
20SIF differential input signal voltage 2
handbook, halfpage
V
i VIF1
V
i VIF2
TADJ
T
C
SAGC
V
C
V
o(vid)
V
o QSS
PLL
o AF
DEC
n.c.
1
2
3
4
5
6
7
8
9
10
TDA9808
MHA734
V
20
i SIF2
V
19
i SIF1
V
18
P
C
17
VAGC
GND
16
VCO2
15
VCO1
14
AFC
13
TAGC
12
V
11
i FM
Fig.2 Pin configuration DIP20.
handbook, halfpage
V
i VIF1
V
i VIF2
TADJ
T
C
SAGC
V
C
V
o(vid)
V
o QSS
PLL
o AF
DEC
n.c.
1
2
3
4
5
TDA9808T
6
7
8
9
10
MHA735
V
20
i SIF2
V
19
i SIF1
V
18
P
C
17
VAGC
GND
16
VCO2
15
VCO1
14
AFC
13
TAGC
12
V
11
i FM
Fig.3 Pin configuration SO20.
1999 Jun 045
Page 6
Philips SemiconductorsProduct specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
FUNCTIONAL DESCRIPTION
The integrated circuit comprises the functional blocks as
shown in Fig.1:
1. Vision IF amplifier and VIF AGC detector
2. Tuner AGC
3. Frequency Phase Locked Loop (FPLL) detector
4. Voltage Controlled Oscillator (VCO), Travelling Wave
Divider (TWD) and AFC
5. Video demodulator and amplifier
6. SIF amplifier and SIF AGC
7. Single reference QSS mixer
8. FM-PLL demodulator
9. Audio Frequency (AF) signal processing
10. Internal voltage stabilizer.
Vision IF amplifier and VIF AGC detector
The vision IF amplifier consists of three AC-coupled
differential amplifier stages. Each differential stage
comprises a feedback network controlled by emitter
degeneration.
The AGC detector generates the required VIF gain control
voltage for constant video output by charging/discharging
the AGC capacitor. Therefore, for negative video
modulation the synchronisation level of the video signal is
detected.
TDA9808
VCO, Travelling Wave Divider (TWD) and AFC
The VCO operates with a resonance circuit (with L and C
in parallel) at double the Picture Carrier (PC) frequency.
The VCO is controlled by two integrated variable
capacitors. The control voltage required to tune the VCO
from its free-running frequency to double the PC frequency
is generated by the frequency-phase detector of the FPLL
and fed via the loop filter to the first variable capacitor. This
control voltage is amplified and additionally converted into
a current which represents the AFC output signal. At the
centre frequency the AFC output current is equal to zero.
The oscillator signal is divided-by-two with a TWD which
generates two differential output signals with a 90 degree
phase difference independent of the frequency.
Video demodulator and amplifier
The video demodulator is realized by a multiplier which is
designed for low distortion and large bandwidth. The vision
IF input signal is multiplied with the ‘in phase’ signal of the
travelling wave divider output.
The demodulator output signal is fed to the video amplifier
via an integrated low-pass filter for attenuation of the
carrier harmonics. The video amplifier is realized by an
operational amplifier with internal feedback and high
bandwidth. A low-pass filter is integrated to achieve an
attenuation of the carrier harmonics. The video output
signal at pin V
modulation. Noise clipping is provided.
is 1.35 V (p-p) for nominal vision IF
o(vid)
Tuner AGC
The AGC capacitor voltage is converted to an internal IF
control signal, and is fed to the tuner AGC to generate the
tuner AGC output current at pin TAGC (open-collector
output). The tuner AGC takeover point can be adjusted at
pin TADJ. This allows to match the tuner to the SAW filter
in order to achieve the optimum IF input level.
Frequency Phase Locked Loop (FPLL) detector
The VIF-amplifier output signal is fed into a frequency
detector and into a phase detector via a limiting amplifier.
During acquisition the frequency detector produces a DC
current proportional to the frequency difference between
the input and the VCO signal. After frequency lock-in the
phase detector produces a DC current proportional to the
phase difference between the VCO and the input signal.
The DC current of either the frequency detector or the
phase detector is converted to a DC voltage via the loop
filter, which controls the VCO frequency.
1999 Jun 046
SIF amplifier and SIF AGC
The sound IF amplifier consists of two AC-coupled
differential amplifier stages. Each differential stage
comprises a controlled feedback network provided by
emitter degeneration.
The SIF AGC detector is related to the SIF input signal
(average level of FM carrier) and controls the SIF amplifier
to provide a constant SIF signal to the single reference
QSS mixer.
Page 7
Philips SemiconductorsProduct specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
Single reference QSS mixer
The single reference QSS mixer is realized by a multiplier.
The SIF amplifier output signal is fed to the single
reference QSS mixer and converted to intercarrier
frequency by the regenerated picture carrier (VCO).
The mixer output signal is fed via a high-pass filter for
attenuation of the video signal components to the output
pin 10. With this system a high performance hi-fi stereo
sound processing can be achieved.
FM-PLL demodulator
The FM-PLL demodulator consists of a limiter and an
FM-PLL. The limiter provides the amplification and
limitation of the FM sound intercarrier signal. The result is
high sensitivity and AM suppression. The amplifier
consists of 7 stages which are internally AC-coupled in
order to minimize the DC offset.
Furthermore the AF output signal can be muted by
connecting a resistor between the limiter input pin 11 and
ground.
The FM-PLL consists of an integrated relaxation oscillator,
an integrated loop filter and a phase detector.
The oscillator is locked to the FM intercarrier signal, output
from the limiter. As a result of locking, the oscillator
frequency tracks with the modulation of the input signal
and the oscillator control voltage is superimposed by the
AF voltage. The FM-PLL operates as an FM demodulator.
TDA9808
AF signal processing
The AF amplifier consists of two parts:
1. The AF pre-amplifier for FM sound is an operational
amplifier with internal feedback, high gain and high
common mode rejection. The AF voltage from the
PLL demodulator, by principle a small output signal, is
amplified by approximately 33 dB. The low-pass
characteristic of the amplifier reduces the harmonics of
the intercarrier signal at the sound output terminal
pin 10. An additional DC control circuit is implemented
to keep the DC level constant, independent of process
spread.
2. The AF output amplifier (10 dB) provides the required
output level by a rail-to-rail output stage. This amplifier
makes use of an input selector for switching to FM or
mute state, controlled by the mute switching voltage.
Internal voltage stabilizer
The bandgap circuit internally generates a voltage of
approximately 1.25 V, independent of supply voltage and
temperature. A voltage regulator circuit, connected to this
voltage, produces a constant voltage of 3.6 V which is
used as an internal reference voltage.
1999 Jun 047
Page 8
Philips SemiconductorsProduct specification
Single standard VIF-PLL with QSS-IF and
TDA9808
FM-PLL demodulator
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOLPARAMETERCONDITIONSMIN.MAX.UNIT
V
P
V
i
t
s(max)
V
12
T
stg
T
amb
V
es
Notes
1. I
P
2. Machine model class B (L = 2.5 µH).
supply voltagenote 1
T
j(max)
= 125 °C;
−9.9V
TDA9808 (DIP20)
T
j(max)
= 115 °C;
−5.5V
TDA9808T (SO20)
voltage at pins 1, 2, 5, 13, 17, 19 and 200V
maximum short-circuit time to ground or V
thermal resistance from junction to ambient in free air
TDA9808 (DIP20)62K/W
TDA9808T (SO20)85K/W
1999 Jun 048
Page 9
Philips SemiconductorsProduct specification
Single standard VIF-PLL with QSS-IF and
TDA9808
FM-PLL demodulator
CHARACTERISTICS (9 V SUPPLY, TDA9808; DIP20 only)
VP=9V; T
(pins 1 and 2) (sync-level); V
transformer 1 : 1; video modulation DSB; residual carrier: 10%; video signal in accordance with
measurements taken in Fig.13; unless otherwise specified.
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
Supply (pin 18)
V
P
I
P
True synchronous video demodulator; note 2
V
i(VIF)(rms)
Composite video amplifier (pin 9; sound carrier off)
V
o(video)(p-p)
S/N
W(video)
PSRRpower supply ripple rejection
=25°C; see Table 1 for input frequencies and carrier ratios; input level V
amb
i(SIF)(rms)
= 4.5 mV (pins 19 and 20) (sound carrier); IF input from 50 Ω via broadband
(peak-to-peak value)
weighted signal-to-noise ratiosee Fig.6 and note 45660−dB
see Fig.112530−dB
at pin 9
;
Tuner AGC (pin 12)
∆G
IF
IF slip by automatic gain
control
tuner gain current from
20 to 80%
AFC circuit (pin 13); see Fig.10 and note 5
Scontrol steepness ∆I13/∆fnote 6
= 38.9 MHz0.350.550.75µA/kHz
f
pc
f
= 45.75 MHz0.350.550.75µA/kHz
pc
f
= 58.75 MHz0.350.550.75µA/kHz
pc
∆f
/∆Tfrequency variation by
IF
I
= 0; note 7−−±20 × 10−6K
AFC
temperature
FM-PLL sound demodulator and AF output (pin 6); note 8
V
o(AF)(6)(rms)
AF output signal voltage
(RMS value)
±25 kHz
(50% FM deviation);
see Fig.13
S/N
W(audio)
weighted signal-to-noise ratio
“CCIR 468-4”
see Fig.13
α
∆V
6
5
mute attenuation7075−dB
DC jump voltage of AF output
FM-PLL in lock mode−±50±175mV
terminal
−68 dB
−1
375500625mV
;
5560−dB
1999 Jun 049
Page 10
Philips SemiconductorsProduct specification
Single standard VIF-PLL with QSS-IF and
TDA9808
FM-PLL demodulator
Notes to the characteristics
1. Values of video and sound parameters are decreased at VP= 4.5 V.
2. Loop bandwidth BL = 70 kHz (natural frequency fn= 12 kHz; damping factor d ≈ 3; calculated with sync level within
gain control range). Resonance circuit of VCO: Q0> 50; C
2.7 V).
3. V
4. S/N is the ratio of black to white amplitude to the black level noise voltage (RMS value, pin 9). B = 5 MHz weighted
5. To match the AFC output signal to different tuning systems a current source output is provided (Fig.10).
6. Depending on the ratio ∆C/C0 of the LC resonant circuit of VCO (Q0> 50; see note 2; C0=C
7. Temperature coefficient of external LC-circuit is equal to zero.
8. Input level for second IF from an external generator with 50 Ω source impedance. AC-coupled with 10 nF capacitor,
signal for nominal video signal.
i(VIF)
in accordance with
f
= 1 kHz, 25 kHz (50% FM deviation) of audio reference. A VIF/SIF input signal is not permitted. Pin 17 has to be
mod
connected to positive supply voltage. S/N and THD measurements are taken at 50 µs (75 µs at M standard)
de-emphasis.
“CCIR 567”
at a source impedance of 50 Ω.
: see Table 3; C
ext
≈ 8.5 pF (loop voltage approximately
int
int+Cext
).
1999 Jun 0410
Page 11
Philips SemiconductorsProduct specification
Single standard VIF-PLL with QSS-IF and
TDA9808
FM-PLL demodulator
CHARACTERISTICS (5 V SUPPLY)
=5V; T
V
P
(sync-level); V
video modulation DSB; residual carrier: 10%; video signal in accordance with
in Fig.13; unless otherwise specified.
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
Supply (pin 18)
V
P
I
P
Vision IF amplifier (pins 1 and 2)
V
i(rms)
V
I(max)(rms)
V
i(VIF)(rms)
∆V
o(int)
G
IFcr
R
i(diff)
C
i(diff)
V
I(1,2)
True synchronous video demodulator; note 4
f
VCO(max)
/∆Toscillator drift as a function of
∆f
osc
∆f
/∆V
osc
V
VCO(rms)
f
cr(pc)
t
acq
V
i(IF)(rms)
=25°C; see Table 1 for input frequencies andcarrier ratios; input level V
amb
i(SIF)(rms)
= 4.5 mV (pins 19 and 20) (sound carrier); IF input from 50 Ω via broadband transformer 1 : 1;
∆f = 4.5 MHz
IF gain control rangesee Fig.46570−dB
differential input resistancenote 31.72.22.7kΩ
differential input capacitancenote 31.21.72.5pF
DC input voltagenote 3−3.4−V
maximum oscillator frequency
f=2f
pc
for carrier regeneration
oscillator is
temperature
free-running; I
AFC
=0;
note 5
P
oscillator shift as a function of
supply voltage
oscillator is
free-running; note 5
oscillator voltage swing at
pins 14 and 15 (RMS value)
picture carrier capture range±1.4±1.8−MHz
acquisition timeBL = 70 kHz; note 6−−30ms
IF input signal voltage
sensitivity for PLL to be locked
maximum IF gain;
note 7
(RMS value; pins 1 and 2)
i(VIF)(rms)
“NTC-7 Composite”
= 10 mV (pins 1 and 2)
; measurements taken
−−140mV
−60100µV
−0.71dB
125130−MHz
−−±20 × 10
−6
−−±1500 × 10−6V
5080110mV
−6090µV
−1
K
−1
1999 Jun 0411
Page 12
Philips SemiconductorsProduct specification
Single standard VIF-PLL with QSS-IF and
TDA9808
FM-PLL demodulator
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
Composite video amplifier (pin 9; sound carrier off)
V
o(video)(p-p)
output signal voltage
(peak-to-peak value)
V/Sratio between video
(black-to-white) and sync level
V
sync(9)
V
clu(9)
sync voltage level1.41.51.6V
upper video clipping voltage
level
V
cll(9)
lower video clipping voltage
level
R
I
int(9)
o(9)
output resistancenote 3−−10Ω
internal DC bias current for
emitter-follower
I
o(sink)(9)(max)
maximum AC and DC output
sink current
I
o(source)(9)(max)
maximum AC and DC output
source current
∆V
o
deviation of CVBS output
signal voltage
∆V
o(bl)
G
diff
ϕ
diff
B
−1
B
−3
S/N
W(video)
black level tiltgain variation; note 8−−1%
differential gain
differential phase
−1 dB video bandwidthCL<30pF;
−3 dB video bandwidthCL<30pF;
weighted signal-to-noise ratio
for video
S/N
(video)
unweighted signal-to-noise
ratio for video
α
IM(0.92)
intermodulation attenuation atf = 0.92 MHz; see Fig.7
‘blue’5864−dB
‘yellow’6066−dB
α
IM(2.76)
intermodulation attenuation atf = 2.76 MHz; see Fig.7
‘blue’5864−dB
‘yellow’5965−dB
V
VC(rms)
residual vision carrier
(RMS value)
α
H(sup)
suppression of video signal
harmonics
α
H(spur)
spurious elementsnote 11b40−−dB
PSRRpower supply ripple rejection
at pin 9
see Fig.81.21.351.5V
2.02.53.0
3.33.45−V
−1.11.25V
1.62.0−mA
1.0−−mA
2.0−−mA
50 dB gain control−−0.5dB
30 dB gain control−−0.1dB
“NTC-7 Composite”
“NTC-7 Composite”
−25%
−24deg
56−MHz
RL> 1.5 kΩ; AC load
78−MHz
RL> 1.5 kΩ; AC load
see Fig.6 and note 95660−dB
see Fig.6 and note 94953−dB
and note 10
and note 10
fundamental wave and
−210mV
harmonics
note 11a3540−dB
video signal; grey level;
2530−dB
see Fig.1 1
1999 Jun 0412
Page 13
Philips SemiconductorsProduct specification
Single standard VIF-PLL with QSS-IF and
TDA9808
FM-PLL demodulator
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
VIF-AGC detector (pin 17)
I
17
t
resp
Tuner AGC (pin 12)
V
i(rms)
V
o(12)
V
sat(12)
∆V
TOP(12)
I
12(sink)
∆G
IF
charging current557595µA
discharging currentnote 81.01.41.8µA
AGC response to an
note 12−0.050.1ms/dB
increasing VIF step
AGC response to a
−2.23.5ms/dB
decreasing VIF step
IF input signal voltage for
minimum starting point of
tuner takeover (RMS value)
IF input signal voltage for
maximum starting point of
tuner takeover (RMS value)
tuner takeover point accuracyR
input at pins 1 and 2;
R
=22kΩ;
TOP
I12= 0.4 mA
input at pins 1 and 2;
R
=0Ω;
TOP
I12= 0.4 mA
=13kΩ;
TOP
−25mV
50100−mV
6−14mV
I12= 0.4 mA
permissible output voltagefrom external source;
−−13.2V
note 3
saturation voltageI12= 1.6 mA−−0.2V
/∆Tvariation of takeover point by
I12= 0.4 mA−0.030.07dB/K
temperature
sink currentsee Fig.4
no tuner gain
−−5µA
reduction;
V
= 13.2 V
12
maximum tuner gain
1.522.6mA
reduction
IF slip by automatic gain
control
tuner gain current from
20 to 80%
−68dB
AFC circuit (pin 13); see Fig.10 and note 13
Scontrol steepness ∆I13/∆fnote 14
f
= 38.9 MHz0.350.550.75µA/kHz
pc
f
= 45.75 MHz0.350.550.75µA/kHz
pc
f
= 58.75 MHz0.350.550.75µA/kHz
pc
∆f
/∆Tfrequency variation by
IF
I
= 0; note 5−−±20 × 10
AFC
temperature
V
o(13)
output voltage upper limitsee Fig.10VP− 0.7 VP− 0.3 −V
output voltage lower limitsee Fig.10−0.30.7V
I
o(source)(13)
I
o(sink)(13)
∆I
13(p-p)
output source current150200250µA
output sink current150200250µA
residual video modulation
current (peak-to-peak value)
1999 Jun 0413
−6
K
−2030µA
−1
Page 14
Philips SemiconductorsProduct specification
Single standard VIF-PLL with QSS-IF and
TDA9808
FM-PLL demodulator
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
Sound IF amplifier (pins 19 and 20)
V
i(SIF)(rms)
input signal voltage sensitivity
(RMS value)
V
i(max)(rms)
maximum input signal voltage
(RMS value)
G
cr(SIF)
R
i(diff)
C
i(diff)
V
I(19,20)
α
SIF,VIF
SIF gain control rangesee Fig.56066−dB
differential input resistancenote 31.72.22.7kΩ
differential input capacitancenote 31.21.72.5pF
DC input voltage−3.4−V
crosstalk attenuation between
−3 dB intercarrier bandwidthupper limit7.59−MHz
residual sound carrier
(RMS value)
V
VC(rms)
residual vision carrier
(RMS value)
R
o(10)
V
O(10)
I
int(10)
output resistancenote 3−−25Ω
DC output voltage−2.0−V
DC internal bias current for
emitter-follower
I
sink(max)(10)
maximum AC and DC output
sink current
I
source(max)(10)
maximum AC and DC output
source current
−1 dB at intercarrier
−50100µV
output pin 10
+1 dB at intercarrier
40110−mV
output pin 10
between pins 1 and 2
50−−dB
and pins 19 and 20;
note 15
SC1; sound carrier 2 off 75100125mV
141198225mV
fundamental wave and
−25mV
harmonics
fundamental wave and
−25mV
harmonics
1.51.9−mA
1.21.6−mA
2.02.5−mA
1999 Jun 0414
Page 15
Philips SemiconductorsProduct specification
Single standard VIF-PLL with QSS-IF and
TDA9808
FM-PLL demodulator
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
Limiter amplifier (pin 11); note 16
V
i(FM)(rms)
input signal voltage for lock-in
(RMS value)
V
i(FM)(rms)
input signal voltage
(RMS value)
SN+
--------------
N
40 dB
allowed input signal voltage
(RMS value)
α
AM
AM suppression50 µs de-emphasis;
AM: f = 1 kHz; m = 0.3
refer to 25 kHz
(50% FM deviation)
R
V
i(11)
I(11)
input resistancenote 3480600720Ω
DC input voltage−2.8−V
FM-PLL demodulator
f
cr
catching range of PLLupper limit7.0−−MHz
lower limit−−4.0MHz
f
hr
holding range of PLLupper limit9.0−−MHz
lower limit−−3.5MHz
t
acq
acquisition time−−4µsFM operation (M, N standard; pin 6); notes 16 and 16a
V
o(AF)(6)(rms)
AF output signal voltage
(RMS value)
25 kHz
(50% FM deviation);
Rx=0Ω; see Fig.13
and note 17
V
o(AF)(6)(cl)
AF output clipping signal
THD < 1.5%1.0−1.2V
voltage level
∆f
AF
frequency deviationTHD < 1.5%; Rx=0Ω;
note 17
∆V
/∆Ttemperature drift of AF output
o
signal voltage
V
7
DC voltage at decoupling
capacitor
voltage dependent on
VCO frequency;
note 18
R
o(6)
V
O(6)
I
sink(max)(6)
output resistancenote 3−−100Ω
DC output voltage−2.3−V
maximum AC and DC output
sink current
I
source(max)(6)
maximum AC and DC output
source current
B
−3
−3 dB audio frequency
bandwidth
without de-emphasis
capacitor
weighted
−−100µV
−300400µV
=
200−−mV
4650−dB
400500600mV
−−±53kHz
−3 × 10−37 × 10
1.2−3.0V
−−1.1mA
−−1.1mA
100125−kHz
−3
dB/K
1999 Jun 0415
Page 16
Philips SemiconductorsProduct specification
Single standard VIF-PLL with QSS-IF and
TDA9808
FM-PLL demodulator
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
THDtotal harmonic distortion25 kHz
(50% FM deviation)
S/N
W(audio)
weighted signal-to-noise ratio
for audio
FM-PLL only; with
75 µs de-emphasis;
25 kHz
(50% FM deviation);
“CCIR 468-4”
V
SC(rms)
α
6
∆V
6
residual sound carrier
(RMS value)
mute attenuation of AF signal7075−dB
DC jump voltage of AF output
fundamental wave and
harmonics
FM-PLL in lock mode−±50±150mV
terminal for switching AF
output to mute state and vice
versa
PSRRpower supply ripple rejection
at pin 6
R
=0Ω; f = 70 Hz;
x
see Figs 11 and 13
Single reference QSS AF performance for FM operation (M standard); notes 19, 20 and 21; see Table 1
S/N
W(audio)
weighted signal-to-noise ratio
for audio
black picture5056−dB
white picture4753−dB
colour bar4551−dB
−0.150.5%
5560−dB
−−75mV
2026−dB
Notes to the characteristics
1. Values of video and sound parameters are decreased at VP= 4.5 V.
2. Level headroom for input level jumps during gain control setting.
3. This parameter is not tested during production and is only given as an application information for designing the
television receiver.
4. Loop bandwidth BL = 70 kHz (natural frequency fn= 12 kHz; damping factor d ≈ 3; calculated with sync level within
gain control range). Resonance circuit of VCO: Q0> 50; C
see Table 3; C
ext
≈ 8.5 pF (loop voltage approximately
int
2.7 V).
5. Temperature coefficient of external LC-circuit is equal to zero.
6. V
i(IF)(rms)
= 10 mV; ∆f = 1 MHz (VCO frequency offset related to picture carrier frequency); white picture
video modulation.
7. V
signal for nominal video signal.
i(VIF)
8. The leakage current of the AGC capacitor should not exceed 100 nA at M, N standard. Larger currents will increase
the tilt.
9. S/N is the ratio of black-to-white amplitude to the black level noise voltage (RMS value, pin 9). B = 5 MHz weighted
in accordance with
value at 0.92 MHz referenced to black/white signal;
; α
0.92
1999 Jun 0416
Page 17
Philips SemiconductorsProduct specification
Single standard VIF-PLL with QSS-IF and
TDA9808
FM-PLL demodulator
11. Measurements taken with SAW filter M3951 (sound carrier suppression: 32 dB); loop bandwidth BL = 70 kHz:
a) Modulation VSB; sound carrier off; f
b) Sound carrier on; SIF SAW filter M9352; f
12. Response speed valid for a VIF input level range of 200 µVupto70mV.
13. To match the AFC output signal to different tuning systems a current source output is provided. The test circuit is
given in Fig.10. The AFC-steepness can be changed by the resistors at pin 13.
14. Depending on the ratio ∆C/C0 of the LC resonant circuit of VCO (Q0> 50; see note 4; C0=C
15. Source impedance: 2.3 kΩ in parallel to 12 pF (SAW filter); fIF= 38.9 MHz.
16. Input level for second IF from an external generator with 50 Ω source impedance, AC-coupled with 10 nF capacitor,
f
= 400 Hz, 25 kHz (50% FM deviation) of audio reference. A VIF/SIF input signal is not permitted. Pins 5 and 17
mod
have to be connected to positive supply voltage for minimum IF gain. S/N and THD measurements are taken at
75 µs de-emphasis (modulator pre-emphasis has to be activated). The FM demodulator steepness ∆V
positive.
a) Second IF input level 10 mV RMS.
17. Measured at de-emphasis circuitry with an FM deviation of 25 kHz (f
500 mV RMS (Rx=0Ω). By using Rx= 470 Ω the AF output signal is attenuated by 6 dB (250 mV RMS).
For handling a frequency deviation of more than 53 kHz the AF output signal has to be reduced by using Rx in order
to avoid clipping (THD < 1.5%). For an FM deviation up to 100 kHz an attenuation of 6 dB is recommended with
Rx= 470 Ω.
18. The leakage current of the decoupling capacitor (22 µF) should not exceed 1 µA.
19. For all S/N measurements the used vision IF modulator has to meet the following specifications:
a) Incidental phase modulation for black-to-white jump less than 0.5 degrees.
b) QSS AF performance, measured with the television demodulator AMF2 (audio output, weighted S/N ratio) better
than 60 dB (deviation 25 kHz) for 6 kHz sine wave black-to-white video modulation.
c) Picture-to-sound carrier ratio; PC/SC1= 7 dB (transmitter).
20. The PC/SC1 ratio is calculated as the addition to TV transmitter PC/SC1 ratio and SAW filter PC/SC1 ratio.
This PC/SC1 ratio is necessary to achieve the S/N
values.
21. Measurements taken with SAW filter M3951 for vision IF (suppressed sound carrier, minimum 25 dB) and M9352 for
sound IF (suppressed picture carrier). Input level V
accordance with
“CCIR 468-4”
.
video
> 0.5 MHz.
= 10 kHz to 10 MHz.
video
values as noted. A different PC/SC1 ratio will change these
W(audio)
i(SIF)(rms)
int+Cext
= 400 Hz) the typical AF output signal is
mod
).
o(AF)
/∆fAF is
= 10 mV, 25 kHz (50% FM deviation). Measurements in
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
handbook, full pagewidth
V
i(VIF)(rms)
(mV)
0.6
70
gain
(dB)
600.06
50
40
30
206
10
060
−10
12.521.533.54
(1)(2)(3)(4)
TDA9808
MHA737
I
0
1
2
V17 (V)
4.5
tuner
(mA)
(1) I
; R
tuner
(2) Gain.
handbook, full pagewidth
TOP
100
V
i(SIF)(rms)
(mV) (dBµV)
10
1
0.1
=22kΩ.
110
100
90
80
70
60
50
40
30
(3) I
; R
; R
TOP
TOP
=11kΩ.
=0Ω.
(4) I
tuner
tuner
Fig.4 Typical VIF (pins 1 and 2) and tuner AGC characteristic.
MHA738
0.01
20
12.521.533.54
Fig.5 Typical SIF (pins 19 and 20) AGC characteristic.
1999 Jun 0418
V5 (V)
4.5
Page 19
Philips SemiconductorsProduct specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
0
V
i (VIF)(rms)
V
i (VIF)(rms)
MED684
(dB)
(mV)
75
handbook, halfpage
S/N
(dB)
50
25
0
−60−40−2020
0.060.6660060
10
Fig.6Typical signal-to-noise ratio as a function of
IF input voltage.
handbook, halfpage
13.2 dB
21 dB
SC CCPCSC CCPC
3.2 dB
21 dB
BLUEYELLOW
SC = sound carrier, with respect to sync level.
CC = chrominance carrier, with respect to sync level.
PC = picture carrier, with respect to sync level.
Fig.7 Input signal conditions.
TDA9808
13.2 dB
10 dB
MHA739
3.0 V
handbook, halfpage
2.85 V
1.85 V
1.5 V
M, N standard
zero carrier level
white level
black level
sync level
Fig.8Typical video signal levels on output pin 9
(sound carrier off).
MHA740
10
handbook, halfpage
(dB)
−10
−30
−50
−70
305070
(1) Signal.
(2) AM rejection.
(3) Noise.
(1)
(2)
(3)
input voltage (dBµV)
MHA741
90
Fig.9Typical audio level, noise and AM rejection
(50% FM deviation).
110
1999 Jun 0419
Page 20
Philips SemiconductorsProduct specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
handbook, full pagewidth
VP = 5 VVP = 5 V
I
13
TDA9808
13
22 kΩ
V
AFC
22 kΩ
MHA742
V
AFC
(V)
3.75
2.5
1.25
TDA9808
5
(source current)
(sink current)
0
45.3545.7546.15
f (MHz)
225
I
(µA)
150
75
0
−75
−150
−225
13
handbook, full pagewidth
VP = 9 VVP = 9 V
I
13
TDA9808
13
62 kΩ
V
AFC
62 kΩ
a. VP=5V.
MHA743
b. VP=9V.
V
AFC
(V)
7.5
4.5
1.5
9
(source current)
6
3
(sink current)
0
45.3545.7546.15
f (MHz)
150
(µA)
100
50
0
−50
−100
−150
I
13
Fig.10 Measurement conditions and typical AFC characteristic.
1999 Jun 0420
Page 21
Philips SemiconductorsProduct specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
handbook, full pagewidth
VP = 5 V
VP = 5 V
TDA9808
MHA744
100 mV
(f = 70 Hz)
ripple
t
TDA9808
Fig.11 Ripple rejection condition.
1999 Jun 0421
Page 22
Philips SemiconductorsProduct specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
(dBµV)
140
120
100
(1)
80
tuning gain
control range
handbook, full pagewidth
antenna input
SAW insertion
loss 14 dB
IF slip
6 dB
70 dB
VIF AGC
TDA9808
10
video 1.35 V (p-p)
1
−1
10
IF signals
RMS value
(V)
−2
10
(TOP)
(1) Depends on TOP.
−3
MHA745
10
0.66 × 10
−4
10
−5
10
0.66 × 10
−3
−5
60
SAW insertion
loss 14 dB
40
40 dB
RF gain
20
10
VHF/UHF tunerVIF
tunerSAW filter
VIF amplifier, demodulator
and video
TDA9808
Fig.12 Front end level diagram.
1999 Jun 0422
Page 23
Philips SemiconductorsProduct specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
INTERNAL CIRCUITRY
Table 2 Equivalent pin circuits and pin voltages
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
A
A
UNIT
inches
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
max.
mm
OUTLINE
VERSION
SOT146-1
12
min.
max.
1.73
1.30
0.068
0.051
IEC JEDEC EIAJ
b
b
1
0.53
0.38
0.021
0.015
0.36
0.23
0.014
0.009
REFERENCES
cD E eM
(1)(1)
26.92
26.54
1.060
1.045
SC603
6.40
6.22
0.25
0.24
E
10
(1)
M
e
L
1
3.60
8.25
3.05
7.80
0.14
0.32
0.12
0.31
EUROPEAN
PROJECTION
H
E
10.0
0.2542.547.62
8.3
0.39
0.010.100.30
0.33
ISSUE DATE
92-11-17
95-05-24
Z
w
max.
2.04.20.513.2
0.0780.170.0200.13
1999 Jun 0430
Page 31
Philips SemiconductorsProduct specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
SO20: plastic small outline package; 20 leads; body width 7.5 mm
D
c
y
Z
20
11
TDA9808
SOT163-1
E
H
E
A
X
v M
A
pin 1 index
1
e
0510 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
mm
A
max.
2.65
0.10
A
0.30
0.10
0.012
0.004
1
A2A3b
2.45
0.25
2.25
0.096
0.01
0.089
p
0.49
0.36
0.019
0.014
cD
0.32
0.23
0.013
0.009
UNIT
inches
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
10
w M
b
p
scale
(1)E(1)(1)
13.0
12.6
0.51
0.49
eHELLpQ
7.6
1.27
7.4
0.30
0.050
0.29
10.65
10.00
0.419
0.394
Q
A
2
0.055
A
1.4
1
detail X
1.1
1.1
1.0
0.4
0.043
0.043
0.039
0.016
(A )
L
p
L
0.25
0.01
A
3
θ
0.250.1
0.01
ywvθ
Z
0.9
0.4
8
0.004
0.035
0.016
0
o
o
OUTLINE
VERSION
SOT163-1
IEC JEDEC EIAJ
075E04 MS-013AC
REFERENCES
1999 Jun 0431
EUROPEAN
PROJECTION
ISSUE DATE
95-01-24
97-05-22
Page 32
Philips SemiconductorsProduct specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
SOLDERING
Introduction
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
“Data Handbook IC26; Integrated Circuit Packages”
our
(document order number 9398 652 90011).
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mount components are mixed on
one printed-circuit board. However, wave soldering is not
always suitable for surface mount ICs, or for printed-circuit
boards with high population densities. In these situations
reflow soldering is often used.
Through-hole mount packages
S
OLDERING BY DIPPING OR BY SOLDER WAVE
The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joints for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (T
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.
M
ANUAL SOLDERING
Apply the soldering iron (24 V or less) to the lead(s) of the
package, either below the seating plane or not more than
2 mm above it. If the temperature of the soldering iron bit
is less than 300 °C it may remain in contact for up to
10 seconds. If the bit temperature is between
300 and 400 °C, contact may be up to 5 seconds.
Surface mount packages
REFLOW SOLDERING
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.
stg(max)
). If the
TDA9808
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.
W
AVE SOLDERING
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
To overcome these problems the double-wave soldering
method was specifically developed.
If wave soldering is used the following conditions must be
observed for optimal results:
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
The footprint must incorporate solder thieves at the
downstream end.
• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
M
ANUAL SOLDERING
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
1999 Jun 0432
Page 33
Philips SemiconductorsProduct specification
Single standard VIF-PLL with QSS-IF and
TDA9808
FM-PLL demodulator
Suitability of IC packages for wave, reflow and dipping soldering methods
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the
2. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board.
3. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
4. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
5. Wave soldering is only suitable for LQFP, QFP and TQFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
6. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
Objective specificationThis data sheet contains target or goal specifications for product development.
Preliminary specificationThis data sheet contains preliminary data; supplementary data may be published later.
Product specificationThis data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1999 Jun 0433
Page 34
Philips SemiconductorsProduct specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
NOTES
TDA9808
1999 Jun 0434
Page 35
Philips SemiconductorsProduct specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
NOTES
TDA9808
1999 Jun 0435
Page 36
Philips Semiconductors – a worldwide company
Argentina: see South America
Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +1 800 234 7381, Fax. +1 800 943 0087
Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Tel. +381 11 62 5344, Fax.+381 11 63 5777
For all other countries apply to: Philips Semiconductors,
International Marketing & Sales Communications, Building BE-p, P.O. Box 218,
5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
199965
Internet: http://www.semiconductors.philips.com
Printed in The Netherlands545004/06/pp36 Date of release: 1999 Jun 04Document order number: 9397 750 05973
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