Single standard VIF-PLL with
QSS-IF and FM-PLL demodulator
Preliminary specification
File under Integrated Circuits, IC02
February 1995
Page 2
Philips SemiconductorsPreliminary specification
Single standard VIF-PLL with QSS-IF
TDA9808
and FM-PLL demodulator
FEATURES
• 5 V positive supply voltage
• Applicable for IF frequencies of 38.9 MHz, 45.75 MHz
and 58.75 MHz
• Gain controlled wide band VIF-amplifier (AC-coupled)
• True synchronous demodulation with active carrier
regeneration (very linear demodulation, good
intermodulation figures, reduced harmonics, excellent
pulse response)
• VIF AGC detector for gain control, operating as peak
sync detector
• Tuner AGC with adjustable take over point (TOP)
• AFC detector without extra reference circuit
QUICK REFERENCE DATA
SYMBOLPARAMETERMIN.TYP.MAX.UNIT
V
P
I
P
V
i VIF
V
o CVBS
positive supply voltage (pin 18)4.555.5V
supply current728598mA
vision IF input signal sensitivity (RMS value; pins 1 and 2)−60100µV
CVBS output signal on pin 9 (peak-to-peak value)1.21.351.5V
B−3 dB video bandwidth on pin 978−MHz
S/N (W)weighted signal-to-noise ratio for video5660−dB
α
α
α
V
V
0.92
2.76
H
i SIF
o
intermodulation attenuation5864−dB
suppression of harmonics in video signal3540−dB
sound IF input signal sensitivity (RMS value; pins 19 and 20)−50100µV
audio output signal for FM standard M, N (RMS value; 25 kHz
modulation)
THDtotal harmonic distortion; 25 kHz modulation for FM−0.15−%
S/N (W)weighted signal-to-noise ratio; 25 kHz modulation for FM−60−dB
• SIF input for Single Reference QSS mode (PLL
controlled); SIF AGC detector for gain controlled SIF
amplifier; Single Reference QSS for high performance
• AC coupled limiter amplifier for sound intercarrier signal
• PLL-FM demodulator with high linearity, alignment-free
• Stabilizer circuit for ripple rejection and to achieve
constant output signals.
GENERAL DESCRIPTION
The TDA9808 is an integrated circuit for singlestandard
(negative modulated) vision IF signal processing and FM
demodulation, with single reference QSS-IF in TV and
VTR sets.
5864−dB
−0.5−V
ORDERING INFORMATION
EXTENDED
TYPE NUMBER
TDA980820DILplasticSOT146
TDA9808T20SOplasticSOT163A
Note
1. SOT146-1; 1996 November 22.
2. SOT163-1; 1996 November 22.
February 19952
PINS
PIN
POSITION
PACKAGE
MATERIALCODE
(1)
(2)
Page 3
Philips SemiconductorsPreliminary specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
TDA9808
February 19953
Fig.1 Block diagram.
Page 4
Philips SemiconductorsPreliminary specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
PINNING
SYMBOLPINDESCRIPTION
V
i VIF
TADJ3tuner AGC takeover adjust
T
PLL
C
SAGC
V
o AF
C
AF
C
Vp/2
V
o CVBS
V
o QSS
V
i FM
TAGC12tuner AGC output
AFC13AFC output
VCO114VCO reference circuit for 2f
VCO215
GND16ground
C
17VIF AGC capacitor
18positive supply voltage
19SIF differential input signal
20
PC
TDA9808
Fig.2 Pin configuration.
February 19954
Page 5
Philips SemiconductorsPreliminary specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
FUNCTIONAL DESCRIPTION
Vision IF amplifier
The vision IF amplifier consists of three AC-coupled
differential amplifier stages. Each differential stage
comprises a controlled feedback network by means of
emitter degeneration.
Tuner and VIF AGC
The AGC capacitor voltage is transferred to an internal IF
control signal, to control the vision IF amplifier. Additionally
it is fed into the tuner AGC amplifier to generate the tuner
AGC output current on pin 12 (open-collector output). The
tuner AGC take over point can be adjusted at pin 3. This
allows the tuner and the SWIF filter to be matched to
achieve the optimum IF input level.
The AGC detector charges/discharges the AGC capacitor
to the required voltage for setting of VIF and tuner gain in
order to keep the video signal at a constant level.
Therefore the sync level of the video signal is detected.
Frequency-Phase detector (FPLL)
The VIF amplifier output signal is fed into a frequency
detector and into a phase detector via a limiting amplifier.
During acquisition the frequency detector produces a DC
current which is proportional to the frequency difference
between the input and the VCO signal. After frequency
lock-in the phase detector produces a DC current
proportional to the phase difference between the VCO and
the input signal. Via the loop filter the DC current of either
frequency detector or phase detector is converted into a
DC voltage, which controls the VCO frequency.
VCO and AFC
TDA9808
Video demodulator and amplifier
The video demodulator is realized by a multiplier which is
designed for low distortion and large bandwidth. The vision
IF input signal is multiplied with the ‘in phase’ VCO output
signal.
The demodulator output signal is fed via an integrated
low-pass for attenuation of the carrier harmonics to the
video amplifier. The video amplifier is realized by an
operational amplifier with internal feedback and high
bandwidth. A low-pass filter is integrated to achieve an
attenuation of the carrier harmonics. The video output
signal at pin 9 is 1.35 V (p-p) for nominal vision IF
modulation.
SIF amplifier and AGC
The sound IF amplifier consists of two AC coupled
differential amplifier stages. Each differential stage
comprises a controlled feedback network provided by
emitter degeneration.
The SIF AGC detector is related to the SIF signals
(average level of FM carriers) at pin 19 and pin 20 (SIF
input) and controls the SIF amplifier to provide a constant
SIF signal at the SIF amplifier output.
Single reference QSS mixer
The single reference QSS mixer is realized by a multiplier.
The SIF amplifier output signal is fed to the single
reference QSS mixer and converted to intercarrier
frequency by the regenerated picture carrier (VCO). The
mixer output signal is fed via a high-pass for attenuation of
the video signal components to the output pin 10. With this
system a high performance Hi-Fi stereo sound processing
can be achieved.
The VCO operates with a symmetrically connected
resonance circuit (with L and C in parallel). It is tuned to the
double VIF picture carrier frequency. The VCO is
controlled by two integrated varicaps. The control voltage
required to tune the VCO from its free running frequency
to actual double the PC frequency is generated by
the frequency-phase detector and fed via the loop filter to
the first varicap (FPLL). This control voltage is amplified,
and additionally converted into a current which represents
the AFC output signal. At centre frequency the AFC output
current is equal to zero.
The oscillator signal is divided-by-two. Two differential
output signals were generated with 90 degree phase
difference independent of the frequency.
February 19955
FM detector
The FM detector consists of a limiter, an FM-PLL and an
AF amplifier. The limiter provides the amplification and
limitation of the FM sound intercarrier signal before
demodulation. The result is high sensitivity and AM
suppression. The amplifier consists of 7 stages which are
internally AC coupled in order to minimize the DC offset
and to save pins for DC decoupling.
Page 6
Philips SemiconductorsPreliminary specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
The FM-PLL consists of an integrated RC oscillator, an
integrated loop filter and a phase detector. The oscillator is
locked to the limited FM intercarrier signal. As a result of
locking, the oscillator tracks with the frequency modulation
of the input signal. The oscillator control voltage is
superimposed by the AF voltage. By this way the FM-PLL
operates as an FM-demodulator.
The AF amplifier consists of two parts:
1. The AF pre-amplifier is an operational amplifier with
internal feedback, high gain and high common mode
rejection. The AF output voltage from the PLL
demodulator, by principle a small output signal, is
amplified by approximately 33 dB. The low-pass
characteristic of this pre-amplifier reduces the
harmonics of the intercarrier signal at the sound output
terminal.
An additional DC control circuit is implemented to keep
the DC level constant, independent of process
spreadings.
TDA9808
2. The AF output amplifier (10 dB) provides the required
output level by means of a rail-to-rail output stage.
Internal voltage stabilizer and V
The bandgap circuit internally generates a voltage of
approximately 1.25 V, independent of supply voltage and
temperature.
A voltage regulator circuit, connected to this voltage,
produces a constant voltage of 3.6 V which is used as an
internal reference voltage.
For all audio output signals this constant reference voltage
cannot be used because large output signals are required.
Therefore these signals refer to half the supply voltage to
achieve a symmetrical headroom, especially for the
rail-to-rail output stage. For ripple and noise attenuation
the V
/2 voltage has to be filtered via a low-pass by using
P
an external capacitor at pin 8 together with an integrated
resistor (fg≈ 5 Hz). For a fast setting to VP/2 an internal
start-up circuit is added.
/2-reference
P
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOLPARAMETERMIN.MAX.UNIT
V
P
supply voltage (pin 18) for a maximum
chip temperature (note 1)
SOT146 at +120 °C−7.6V
SOT163A at +120 °C−5.9V
V
i
t
s max
V
12
T
stg
T
amb
V
ESD
voltage at pins 1 to 8, 11 to 13, 16 to 2005.5V
maximum short-circuit time−10s
tuner AGC output voltage013.2V
storage temperature−25+150°C
operating ambient temperature−20+70°C
electrostatic handling for all pins (note 2)−±300V
Notes to the Limiting Values
1. I
= 98 mA; T
18
amb
= +70 °C.
2. Charge device model class B: equivalent to discharging a 200 pF capacitor through a 0 Ω series resistor.
value (SC), IF input from 50 Ω via broadband transformer 1:1; video modulation DSB; residual carrier M: 10%;
video signal: NTC-7 composite; test circuit according to Fig.3 unless otherwise specified.
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
Supply (pin 18)
V
18
I
18
supply voltagenote 14.555.5V
supply current728598mA
Vision IF amplifier (pins 1 and 2)
V
i VIF
input sensitivity (RMS value) at
45.75 MHz
input sensitivity (RMS value) at
58.75 MHz
maximum input signal (RMS value) at
45.75 MHz
maximum input signal (RMS value) at
58.75 MHz
∆V
o int.
internal IF amplitude difference
between picture and sound carrier
G
IF
R
i
C
i
V
1/2
IF gain control rangesee Fig.4
input resistance (differential)note 21.72.22.7kΩ
input capacitance (differential)1.21.72.5pF
DC voltage−3.4−V
True synchronous video demodulator (note 3)
f
output resistancenote 2−−10Ω
DC voltage−2.0−V
internal bias current for
DC1.51.9−mA
emitter-follower
I
10
output current (RMS value)AC; RL> 1 kΩ;
−−1.2mA
C10< 50 pF
output currentDC; R
> 1 kΩ2.02.5−mA
L
February 199510
Page 11
Philips SemiconductorsPreliminary specification
Single standard VIF-PLL with QSS-IF and
TDA9808
FM-PLL demodulator
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
Limiter amplifier (pin 11)
V
i FM
R
11
V
11
FM-PLL demodulator
f
i FM
t
acqu
FM operation (standard M, N) (pin 6; notes 15 and 15a)
V
o AF
∆f
AF
∆V
o
V
7
R
6
V
6
I
6
B−3 dB audio frequency bandwidth100125−kHz
THDtotal harmonic distortionwithout ceramic filter;
S/N(W)signal-to-noise ratio; weightedFM-PLL only;
V
sc
α
AM
α
6
∆V
6
RRripple rejection at pin 6R
input signal for lock-in−−100µV
input signal (RMS value)(S+N)/N = 40 dB−300400µV
permitted input signal (RMS value)200−−mV
input resistancenote 2480600720Ω
DC voltage−1.8−V
catching range of PLL4.0−7MHz
holding range of PLL3.5−8MHz
acquisition time−−4µs
AF output signal (RMS value)25 kHz FM deviation;
400500600mV
see Fig.3 and note 16;
Rx= 0 Ω
clipping level (RMS value)THD < 1.5%1.31.4−V
frequency deviationTHD < 1.5%
=0Ω; see Fig.3−−±53kHz
R
x
= 470 Ω; see Fig.3−−±106kHz
R
x
temperature drift of AF output signal−3710
DC voltage at decoupling capacitorvoltage dependent on
1.2−3.0V
−3
dB/K
VCO frequency; note 17
output resistancenote 2−−100Ω
DC voltagetracked with supply
−VP/2−V
voltage
output sink and source currentDC and AC−−1.1mA
−0.150.5%
∆f = 25 kHz
5560−dB
with 75 µs de-emphasis;
25 kHz FM deviation;
CCIR468-4
residual sound carrier and
−−75mV
harmonics (RMS value)
AM suppressionwith 75 µs de-emphasis;
4650−dB
AM: f = 1 kHz; m = 0.3
refer to 25 kHz FM
deviation
mute attenuation of AF signalpin 67075−dB
DC jump of AF output terminal for
switching from FM to mute state
FM PLL has to be in
locked mode
−±50±150mV
and vice versa
= 470 Ω; see Fig.102228−dB
x
February 199511
Page 12
Philips SemiconductorsPreliminary specification
Single standard VIF-PLL with QSS-IF and
TDA9808
FM-PLL demodulator
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
Single reference QSS AF performance for FM operation (standard M) notes 18 and 19
picture to sound carrier ratio: PC/SC = 7 dB
sound attenuation of VIF SAW filter: minimum 33 dB
measurement condition: PC/SC ratio at pins 1 and 2; note 2040−−dB
S/N(W)signal-to-noise ratio; weighted25 kHz FM deviation; CCIR 468-4; 75 µs de-emphasis
black picture5056−dB
white picture4753−dB
colour bar4551−dB
Notes to the characteristics
1. Values of video and sound parameters are decreased at VP= 4.5 V.
2. This parameter is not tested during production and is only given as an application information for designing the
television receiver.
3. Loop bandwidth BL = 60 kHz (natural frequency fn= 15 kHz; damping factor d = 2; calculated with sync level within
gain control range). Resonance circuit of VCO: Q0> 50; C
2.7 V).
4. The oscillator drift is related to the picture carrier frequency (at external temperature-compensated LC-circuit).
5. V
= 10 mV RMS; ∆f = 1 MHz (VCO frequency offset related to picture carrier frequency); white picture video
i IF
modulation.
6. V
for 1.2 V (peak-to-peak value) output signal at composite video output pin 9; PLL is still locked.
i IF
7. Offset current between pin 4 and half of supply voltage (V = 2.5 V) under the following conditions: no input signal at
VIF input (pins 1 and 2) and VIF amplifier gain at minimum (V17=VP).
8. The leakage current of the AGC capacitor should not exceed 100 nA at M, N standard. Larger currents will increase
the tilt.
9. S/N is the ratio of black-to-white amplitude to the black level noise voltage (RMS value, pin 9). B = 4.2 MHz weighted
in accordance with CCIR 567 at a source impedance of 50 Ω.
11. Measurements taken with SAW filter M3951M (Siemens, M standard); modulation: VSB, f
bandwidth BL = 60 kHz.
12. Measurements taken with SAW filter M3951M and M9352M (Siemens, M standard); loop bandwidth BL = 60 kHz,
frequency range = 10 kHz to 5 MHz. Sound carrier on, PC/SC ratio 7 dB (transmitter).
13. To match the AFC output signal to different tuning systems a current source output is provided. The test circuit is
given in Fig.8. The AFC-steepness can be changed by the resistors R11 and R12.
14. Depending on the ratio ∆C/ C0of the LC resonant circuit of VCO (Q > 50; see note 3; C0= C
15. Input level for second IF from an external generator with 50 Ω source impedance. AC-coupled with 10 nF capacitor,
f
= 400 Hz, 25 kHz (50% FM deviation) of audio references. A VIF/SIF input signal is not permitted. Pins 5 and
mod
17 have to be connected to positive supply voltage for minimum IF gain. S/N and THD measurements are taken at
75 µs de-emphasis. The FM demodulator steepness ∆V
a) Second IF input level 10 mV RMS.
see Fig.11; C
ext
value at 0.92 MHz related to black/white signal
0.92
≈ 10 pF (loop voltage approximately
int
value at 2.76 MHz related to colour carrier.
> 0.5 MHz, loop
video
+ C
int
/∆fAFis positive.
o AF
ext
).
February 199512
Page 13
Philips SemiconductorsPreliminary specification
Single standard VIF-PLL with QSS-IF and
TDA9808
FM-PLL demodulator
16. Measured at de-emphasis circuitry with an FM deviation of 25 kHz (f
500 mV RMS (Rx=0Ω; see Fig.3). By using Rx= 470 Ω the AF output signal is attenuated by 6 dB (250 mV RMS).
For handling an FM deviation of more than 53 kHz the AF output signal has to be reduced by using Rxin order to
avoid clipping (THD < 1.5%). For an FM deviation up to 100 kHz an attenuation of 6 dB is recommended with
Rx= 470 Ω.
17. The leakage current of the decoupling capacitor (2.2 µF) should not exceed 1 µA.
18. For all S/N measurements the used vision IF modulator has to meet the following specifications:
- Incidental phase modulation for black-to-white jump less than 0.5 degree.
- QSS AF performance, measured with the television-demodulator AMF2 (audio output, weighted S/N ratio) better
than 60 dB for 6 kHz sinewave black-to-white video modulation.
19. Measurements are taken with SAW filter M3951M (Siemens) for vision IF (suppressed sound carrier) and M9352M
(Siemens) for sound IF (suppressed picture carrier). Input level V
20. The PC/SC ratio is calculated as the addition of TV transmitter PC/SC ratio and SAW filter PC/SC ratio. This PC/SC
ratio is necessary to achieve the S/N(W) values as noted. A different PC/SC ratio will change these values.
= 400 Hz) the typical AF output signal is
mod
= 10 mV RMS, 25 kHz FM deviation.
i SIF
February 199513
Page 14
Philips SemiconductorsPreliminary specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
TDA9808
(1) depends on TV standard
(2) de-emphasis circuitry for 75 µs
(3) see note 16 of the characteristics
(1)depends on TV standard.
(2)de-emphasis circuitry for 75µs.
(3)see note 16 of the characteristics.
Fig.3 Test circuit.
February 199514
Page 15
Philips SemiconductorsPreliminary specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
TDA9808
Fig.4 Typical VIF and tuner AGC characteristic.
February 199515
Fig.5 Typical SIF AGC characteristic.
Page 16
Philips SemiconductorsPreliminary specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
TDA9808
SC =sound carrier
CC = chrominance carrier
PC = picture carrier
all with respect to sync level
The sound carrier levels are taking into account a
sound shelf attenuation of 20 dB.
Fig.6 Typical S/N as a function of IF input voltage.Fig.7 Input signal conditions.
February 199516
Fig.8 Measurement conditions and typical AFC characteristic.
Page 17
Philips SemiconductorsPreliminary specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
TDA9808
Fig.9 Video signal levels on output pin 9 (sound carrier off).
Fig.10 Ripple rejection condition.
February 199517
Page 18
Philips SemiconductorsPreliminary specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
TDA9808
(1) depends on TV standard.
(2) de-emphasis circuitry for 75 µs.
(3) see note 16 of the characteristics.
Fig.11 Application circuit.
February 199518
Page 19
Philips SemiconductorsPreliminary specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
TDA9808
February 199519
Fig.12 Internal circuits.
Page 20
Philips SemiconductorsPreliminary specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
A
A
UNIT
inches
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
max.
mm
OUTLINE
VERSION
SOT146-1
12
min.
max.
1.73
1.30
0.068
0.051
IEC JEDEC EIAJ
SC603
b
b
1
0.53
0.38
0.021
0.015
0.36
0.23
0.014
0.009
REFERENCES
cD E eM
(1)(1)
26.92
26.54
1.060
1.045
6.40
6.22
0.25
0.24
E
10
(1)
M
e
L
1
3.60
8.25
3.05
7.80
0.14
0.32
0.12
0.31
EUROPEAN
PROJECTION
H
E
10.0
0.2542.547.62
8.3
0.39
0.010.100.30
0.33
ISSUE DATE
w
92-11-17
95-05-24
Z
max.
2.04.20.513.2
0.0780.170.0200.13
February 199520
Page 21
Philips SemiconductorsPreliminary specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
SO20: plastic small outline package; 20 leads; body width 7.5 mm
D
c
y
Z
20
11
TDA9808
SOT163-1
E
H
E
A
X
v M
A
pin 1 index
1
e
0510 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
mm
A
max.
2.65
0.10
A
1
0.30
0.10
0.012
0.004
A2A
2.45
2.25
0.096
0.089
0.25
0.01
b
0.49
0.36
p
cD
0.32
0.23
0.013
0.009
3
0.019
0.014
UNIT
inches
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
10
w M
b
p
scale
(1)E(1)(1)
13.0
12.6
0.51
0.49
eHELLpQ
7.6
1.27
7.4
0.30
0.050
0.29
10.65
10.00
0.42
0.39
Q
A
2
A
1
1.4
0.055
1.1
0.4
0.043
0.016
detail X
1.1
1.0
0.043
0.039
(A )
L
p
L
0.25
0.01
A
3
θ
0.250.1
0.01
0.004
ywvθ
Z
0.9
0.4
0.035
0.016
o
8
o
0
OUTLINE
VERSION
SOT163-1
February 199521
REFERENCES
IEC JEDEC EIAJ
075E04 MS-013AC
EUROPEAN
PROJECTION
ISSUE DATE
92-11-17
95-01-24
Page 22
Philips SemiconductorsPreliminary specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
SOLDERING
Introduction
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
“IC Package Databook”
our
DIP
OLDERING BY DIPPING OR BY WAVE
S
The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joint for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (T
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.
R
EPAIRING SOLDERED JOINTS
Apply a low voltage soldering iron (less than 24 V) to the
lead(s) of the package, below the seating plane or not
more than 2 mm above it. If the temperature of the
soldering iron bit is less than 300 °C it may remain in
contact for up to 10 seconds. If the bit temperature is
between 300 and 400 °C, contact may be up to 5 seconds.
SO
REFLOW SOLDERING
(order code 9398 652 90011).
). If the
stg max
TDA9808
method. Typical reflow temperatures range from
215 to 250 °C.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.
AVE SOLDERING
W
Wave soldering techniques can be used for all SO
packages if the following conditions are observed:
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.
• The longitudinal axis of the package footprint must be
parallel to the solder flow.
• The package footprint must incorporate solder thieves at
the downstream end.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
EPAIRING SOLDERED JOINTS
R
Fix the component by first soldering two diagonally-
opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.
Reflow soldering techniques are suitable for all SO
packages.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
February 199522
Page 23
Philips SemiconductorsPreliminary specification
Single standard VIF-PLL with QSS-IF and
TDA9808
FM-PLL demodulator
DEFINITIONS
Data sheet status
Objective specificationThis data sheet contains target or goal specifications for product development.
Preliminary specificationThis data sheet contains preliminary data; supplementary data may be published later.
Product specificationThis data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
February 199523
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