1VIF differential input signal voltage 1
2VIF differential input signal voltage 2
7PLL loop filter
10CVBS output signal voltage
12audio voltage frequency output
13de-emphasis input
14de-emphasis output
15decoupling capacitor
17sound intercarrier input voltage
20sound intercarrier output voltage
21composite video output voltage
22video buffer input voltage
PC
PC
261⁄2VP reference capacitor
28VIF AGC capacitor
29supply voltage
handbook, halfpage
V
V
V
o CVBS
DEEM
DEEM
i VIF1
i VIF2
TADJ
T
V
o AF
C
DEC
n.c.
n.c.
n.c.
PLL
n.c.
n.c.
n.c.
n.c.
1
2
3
4
5
6
7
8
TDA9806
9
10
11
12
13
I
14
O
15
16
Fig.2 Pin configuration.
MHA053
TDA9806
32
n.c.
n.c.
31
30
n.c.
V
29
P
C
28
VAGC
GND
27
C
26
ref
VCO2
25
VCO1
24
AFC
23
V
22
i(vid)
V
21
o(vid)
V
20
o(int)
TAGC
19
18
n.c.
V
17
i FM
1995 Sep 055
Page 6
Philips SemiconductorsPreliminary specification
Multistandard VIF-PLL and
FM-PLL demodulator
FUNCTIONAL DESCRIPTION
Vision IF amplifier
The vision IF amplifier consists of three AC-coupled
differential amplifier stages. Each differential stage
comprises a feedback network controlled by emitter
degeneration.
Tuner and VIF AGC
The AGC capacitor voltage is transferred to an internal IF
control signal, and is fed to the tuner AGC to generate the
tuner AGC output current (open-collector output). The
tuner AGC takeover point can be adjusted. This allows the
tuner and the SWIF filter to be matched to achieve the
optimum IF input level.
The AGC detector charges/discharges the AGC capacitor
to the required voltage for setting of VIF and tuner gain in
order to keep the video signal at a constant level.
Therefore for negative video modulation the sync level of
the video signal is detected.
TDA9806
Video demodulator and amplifier
The video demodulator is realized by a multiplier which is
designed for low distortion and large bandwidth. The vision
IF input signal is multiplied with the ‘in-phase’ signal of the
travelling wave divider output.
The demodulator output signal is fed via an integrated
low-pass filter for attenuation of the carrier harmonics to
the video amplifier. The video amplifier is realized by an
operational amplifier with internal feedback and high
bandwidth. A low-pass filter is integrated to achieve an
attenuation of the carrier harmonics. The video output
signal is 1 V (p-p) for nominal vision IF modulation.
Video buffer
For an easy adaption of the sound traps an operational
amplifier with internal feedback is used. This amplifier is
featured with a high bandwidth and 7 dB gain. The input
impedance is adapted for operating in combination with
ceramic sound traps. The output stage delivers a nominal
2 V (p-p) positive video signal. Noise clipping is provided.
Frequency Phase Locked Loop detector (FPLL)
The VIF-amplifier output signal is fed into a frequency
detector and into a phase detector via a limiting amplifier.
During acquisition the frequency detector produces a DC
current proportional to the frequency difference between
the input and the VCO signal. After frequency lock-in the
phase detector produces a DC current proportional to the
phase difference between the VCO and the input signal.
The DC current of either frequency detector or phase
detector is converted into a DC voltage via the loop filter,
which controls the VCO frequency.
VCO, travelling wave divider and AFC
The VCO operates with a resonance circuit (with L and C
in parallel) at double the PC frequency. The VCO is
controlled by two integrated variable capacitors. The
control voltage required to tune the VCO from its
free-running frequency to actually double the PC
frequency is generated by the Frequency-Phase detector
and fed via the loop filter to the first variable capacitor
(FPLL). This control voltage is amplified and additionally
converted into a current which represents the AFC output
signal. At centre frequency the AFC output current is equal
to zero.
Intercarrier mixer
The intercarrier mixer is realized by a multiplier. The VIF
amplifier output signal is fed to the intercarrier mixer and
converted to intercarrier frequency by the regenerated
picture carrier (VCO). The mixer output signal is fed via a
high-pass for attenuation of the video signal components.
The oscillator signal is divided-by-two with a Travelling
Wave Divider (TWD) which generates two differential
output signals with a 90 degree phase difference
independent of the frequency.
1995 Sep 056
Page 7
Philips SemiconductorsPreliminary specification
Multistandard VIF-PLL and
FM-PLL demodulator
FM detector
The FM detector consists of a limiter, an FM-PLL and an
AF amplifier. The limiter provides the amplification and
limitation of the FM sound intercarrier signal before
demodulation. The result is high sensitivity and AM
suppression. The amplifier consists of 7 stages which are
internally AC-coupled in order to minimize the DC offset
and to save pins for DC decoupling.
The FM-PLL consists of an integrated relaxation oscillator,
an integrated loop filter and a phase detector. The
oscillator is locked to the FM intercarrier signal, output
from the limiter. As a result of locking, the oscillator
frequency tracks with the modulation of the input signal
and the oscillator control voltage is superimposed by the
AF voltage. The FM-PLL operates as an FM-demodulator.
The AF amplifier consists of two parts:
1. The AF preamplifier for FM sound is an operational
amplifier with internal feedback, high gain and high
common mode rejection. The AF voltage from the PLL
demodulator, by principle a small output signal, is
amplified by approximately 33 dB. The low-pass
characteristic of the amplifier reduces the harmonics of
the intercarrier signal at the sound output terminal, at
which the de-emphasis network for FM sound is
applied. An additional DC control circuit is
implemented to keep the DC level constant,
independent of process spread.
2. The AF output amplifier (10 dB) provides the required
output level by a rail-to-rail output stage. This amplifier
makes use of an input selector for switching to FM
de-emphasis or mute state, controlled by the mute
switching voltage.
TDA9806
1
Internal voltage stabilizer and
The bandgap circuit internally generates a voltage of
approximately 1.25 V, independent of supply voltage and
temperature. A voltage regulator circuit, connected to this
voltage, produces a constant voltage of 3.6 V which is
used as an internal reference voltage.
For all audio output signals the constant reference voltage
cannot be used because large output signals are required.
Therefore these signals refer to half the supply voltage to
achieve a symmetrical headroom, especially for the
rail-to-rail output stage. For ripple and noise attenuation
1
the
⁄2VPvoltage has to be filtered via a low-pass filter by
using an external capacitor together with an integrated
resistor (fg= 5 Hz). For a fast setting to 1⁄2VP an internal
start-up circuit is added.
⁄2VP-reference
1995 Sep 057
Page 8
Philips SemiconductorsPreliminary specification
Multistandard VIF-PLL and
TDA9806
FM-PLL demodulator
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOLPARAMETERCONDITIONSMIN.MAX.UNIT
V
P
V
i
t
s(max)
V
19
T
stg
T
amb
V
es
Notes
1. I
P
2. Charge device model class B: equivalent to discharging a 200 pF capacitor via a 0 Ω series resistor.
supply voltage (pin 29)maximum chip temperature
05.5V
of 120 °C; note 1
voltage at pins 1 to 7, 12 to 19, 22, 23, 28
0V
and 29
maximum short-circuit time−10s
tuner AGC output voltage013.2V
storage temperature−25+150°C
operating ambient temperature−20+70°C
electrostatic handling voltagenote 2−300+300V
= 110 mA; T
=70°C; R
amb
th j-a
= 60 K/W.
P
V
THERMAL CHARACTERISTICS
SYMBOLPARAMETER VALUE UNIT
R
th j-a
thermal resistance from junction to ambient in free air60K/W
1995 Sep 058
Page 9
Philips SemiconductorsPreliminary specification
Multistandard VIF-PLL and
TDA9806
FM-PLL demodulator
CHARACTERISTICS
VP=5V; T
for B/G); video modulation DSB; residual carrier B/G: 10%; video signal in accordance with
measurements taken in Fig.10; unless otherwise specified.
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
Supply (pin 29)
V
P
I
P
Vision IF amplifier (pins 1 and 2)
V
i VIF(rms)
V
i max(rms)
∆V
o(int)
G
IFcr
R
i(diff)
C
i(diff)
V
1,2
True synchronous video demodulator; note 3
f
VCO(max)
/∆Toscillator drift as a function of
∆f
osc
V
0 ref(rms)
f
pcCR
t
acq
V
i VIF(rms)
I
FPLL(offset)
= 25°C; see Table 1 for input frequencies and level; input level V
internal IF amplitude difference
between picture and sound
carrier
B/G standard;
−1 dB video at output
B/G standard;
+1 dB video at output
within AGC range;
B/G standard;
∆f = 5.5 MHz
−60100µV
120200−mV
−0.71dB
IF gain control rangesee Fig.36570−dB
differential input resistancenote 21.72.22.7kΩ
differential input capacitancenote 21.21.72.5pF
DC input voltage−3.4−V
maximum oscillator frequency
f=2f
PC
125130−MHz
for carrier regeneration
temperature
oscillator voltage swing at
oscillator is free-running;
I
= 0; note 4
AFC
B/G standard70100130mV
−−±20ppm/K
pins 24 and 25 (RMS value)
picture carrier capture rangeB/G standard±1.5±2.0−MHz
acquisition timeBL = 60 kHz; note 5−−30ms
VIF input signal voltage
maximum IF gain; note 6−3070µV
sensitivity for PLL to be locked
(RMS value; pins 1 and 2)
FPLL offset current at pin 7note 7−−±4.5µA
;
1995 Sep 059
Page 10
Philips SemiconductorsPreliminary specification
Multistandard VIF-PLL and
TDA9806
FM-PLL demodulator
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
Composite video amplifier (pin 21; sound carrier off)
V
o video(p-p)
output signal voltage
(peak-to-peak value)
V
21(sync)
V
21(clu)
sync voltage levelB/G standard−1.5−V
upper video clipping voltage
level
V
21(cll)
lower video clipping voltage
level
R
I
int 21
o,21
output resistancenote 2−−10Ω
internal DC bias current for
emitter-follower
I
21 max(sink)
maximum AC and DC output
sink current
I
21 max(source)
maximum AC and DC output
source current
B
−1
B
−3
α
H
−1 dB video bandwidthB/G standard; CL< 50 pF;
−3 dB video bandwidthB/G standard; CL< 50 pF;
suppression of video signal
harmonics
PSRRpower supply ripple rejection at
pin 21
see Fig.70.881.01.12V
VP− 1.1VP− 1−V
−0.30.4V
1.62.0−mA
1.0−−mA
2.0−−mA
56−MHz
RL> 1kΩ; AC load
78−MHz
RL> 1kΩ; AC load
CL< 50 pF; RL> 1kΩ;
3540−dB
AC load; note 8a
video signal; grey level;
3235−dB
B/G standard; see Fig.8
CVBS buffer amplifier (only) and noise clipper (pins 10 and 22)
R
i,22
C
i,22
V
I,22
G
v
V
10(clu)
input resistancenote 22.63.34.0kΩ
input capacitancenote 21.423.0pF
DC input voltage1.51.82.1V
voltage gainB/G standard; note 96.577.5dB
upper video clipping voltage
level
V
10(cll)
lower video clipping voltage
level
R
I
int 10
o,10
output resistancenote 2−−10Ω
DC internal bias current for
emitter-follower
I
o,10 max(sink)
maximum AC and DC output
sink current
I
o,10 max(source)
maximum AC and DC output
source current
B
−1
−1 dB video bandwidthB/G standard; CL< 20 pF;
RL> 1kΩ; AC load
B
−3
−3 dB video bandwidthB/G standard; CL< 20 pF;
RL> 1kΩ; AC load
3.94.0−V
−1.01.1V
2.02.5−mA
1.4−−mA
2.4−−mA
8.411−MHz
1114−MHz
1995 Sep 0510
Page 11
Philips SemiconductorsPreliminary specification
Multistandard VIF-PLL and
TDA9806
FM-PLL demodulator
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
Measurements from IF input to CVBS output (pin 10; 330 Ω between pins 21 and 22, sound carrier off)
V
o CVBS(p-p)
CVBS output signal voltage
on pin 10 (peak-to-peak value)
V
o CVBS(sync)
∆V
o
sync voltage levelB/G standard−1.35−V
deviation of CVBS output
signal voltage at B/G
∆V
o(blBG)
G
diff
ϕ
diff
B
−1
B
−3
black level tilt in B/G standardgain variation; note 10−−1%
differential gain
differential phase
−1 dB video bandwidthB/G standard; CL< 20 pF;
−3 dB video bandwidthB/G standard; CL< 20 pF;
S/N (W)weighted signal-to-noise ratiosee Fig.4 and note 115660−dB
S/Nunweighted signal-to-noise
mute attenuation of AF signalB/G standard7075−dB
DC jump voltage of AF output
terminal for switching AF
output to mute state and vice
versa
PSRRpower supply ripple rejection at
pin 12
without de-emphasis;
short-circuit from
pin 13 to pin 14; 27 kHz
(54% FM deviation);
see Fig.10 and note 18
= 470 Ω200250300mV
R
x
R
=0Ω400500600mV
x
THD < 1.5%1.31.4−V
−3 × 10−37 × 10−3dB/K
voltage dependent on VCO
1.2−3.0V
frequency; note 19
1
⁄2V
P
−V
−−1.1mA
−−1.1mA
100125−kHz
short-circuit from
pin 13 to pin 14
5560−dB
de-emphasis; 27 kHz
(54% FM deviation);
“CCIR 468-4”
fundamental wave and
−−75mV
harmonics
4650−dB
f = 1 kHz; m = 0.3 refer to
27 kHz (54% FM deviation)
FM-PLL in lock mode−±50±150mV
R
= 470 Ω; see Fig.82630−dB
x
1995 Sep 0514
Page 15
Philips SemiconductorsPreliminary specification
α
α
Multistandard VIF-PLL and
TDA9806
FM-PLL demodulator
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
AF performance for FM operation (B/G standard); notes 20, 21 and 22; see Table 1
S/N (W)weighted signal-to-noise ratioPC/SC ratio at pins 1 and 2;
27 kHz (54% FM
deviation);
“CCIR 468-4”
black picture4551−dB
white picture4551−dB
6 kHz sine wave (black to
white modulation)
sound carrier
subharmonics;
f = 2.75 MHz ±3 kHz
Notes
1. Values of video and sound parameters are decreased at VP= 4.5 V.
2. This parameter is not tested during production and is only given as application information for designing the
television receiver.
3. Loop bandwidth BL = 60 kHz (natural frequency fn= 15 kHz; damping factor d = 2; calculated with sync level within
gain control range). Resonance circuit of VCO: Q0> 50; C
= 8.2 pF ±0.25 pF; C
ext
approximately 2.7 V).
4. Temperature coefficient of external LC-circuit is equal to zero.
5. V
= 10 mV (RMS); ∆f = 1 MHz (VCO frequency offset related to picture carrier frequency); white picture
iIF
video modulation.
6. V
signal for nominal video signal.
iIF
7. Offset current measured between pin 7 and half of supply voltage (VP= 2.5 V) under the following conditions: no
input signal at VIF input (pins 1 and 2) and VIF amplifier gain at minimum (V28=VP).
8. Measurements taken with SAW filter G1962 (sound shelf: 20 dB); loop bandwidth BL = 60 kHz:
a) modulation VSB; sound carrier off; f
b) sound carrier on; f
= 10 kHz to 10 MHz.
video
video
> 0.5 MHz.
9. The 7 dB buffer gain accounts for 1 dB loss in the sound trap. Buffer output signal is typical 2 V (p-p), in event of
CVBS video amplifier output typical 1 V (p-p). If no sound trap is applied a 330 Ω resistor must be connected from
output to input (from pin 21 to pin 22).
10. The leakage current of the AGC capacitor should not exceed 1 µA at B/G standard. Larger currents will increase
the tilt.
11. S/N is the ratio of black-to-white amplitude to the black level noise voltage (RMS value, pin 10). B = 5 MHz weighted
in accordance with
“CCIR 567”
.
12. The intermodulation figures are defined:
at 4.4 MHz
V
0
1.1
3.3
20
20
-------------------------------------V
at 1.1 MHz
0
at 4.4 MHz
V
0
log=
-------------------------------------V
at 3.3 MHz
0
; α
; α
3.6dB+log=
value at 3.3 MHz referenced to colour carrier.
3.3
value at 1.1 MHz referenced to black/white signal;
1.1
13. Response speed valid for a VIF input level range of 200 µVupto70mV.
27−−dB
4046−dB
3540−dB
≈ 8.5 pF (loop voltage
int
1995 Sep 0515
Page 16
Philips SemiconductorsPreliminary specification
B
Multistandard VIF-PLL and
TDA9806
FM-PLL demodulator
14. To match the AFC output signal to different tuning systems a current source output is provided. The test circuit is
given in Fig.6. The AFC-steepness can be changed by the resistors at pin 23.
15. Depending on the ratio ∆C/C0 of the LC resonant circuit of VCO (Q0> 50; see note 3; C0=C
int+Cext
16. The intercarrier output signal at pin 20 can be calculated by the following formula taking into account the video output
signal at pin 21 (V
= sound-to-picture carrier ratio at VIF input (pins 1 and 2) in dB,
dB()
6 dB = correction term of internal circuitry
and ±3 dB = tolerance of video output and intercarrier output amplitude V
V
Example: SAW filter G1962 (sound shelf: 20 dB) ⇒⇒ V
iSC
----------- V
iPC
27 dB–=
.
o(rms)
= 32 mV typical.
o(rms)
17. Input level for second IF from an external generator with 50 Ω source impedance. AC-coupled with 10 nF capacitor,
f
= 1 kHz, 27 kHz (54% FM deviation) of audio references. A VIF input signal is not permitted. Pin 28 has to be
mod
connected to positive supply voltage for minimum IF gain. S/N and THD measurements are taken at 50 µs
de-emphasis.
a) Second IF input level 10 mV RMS.
18. Measured with an FM deviation of 27 kHz the typical AF output signal is 500 mV (RMS) (Rx=0Ω; see Fig.10).
By using Rx= 470 Ω the AF output signal is attenuated by 6 dB (250 mV RMS). For handling an FM deviation of
more than 53 kHz the AF output signal has to be reduced by using Rx in order to avoid clipping (THD < 1.5%).
For an FM deviation up to 100 kHz an attenuation of 6 dB is recommended with Rx= 470 Ω.
19. The leakage current of the decoupling capacitor (2.2 µF) should not exceed 1 µA.
20. For all S/N measurements the used vision IF modulator has to meet the following specifications:
a) Incidental phase modulation for black-to-white jump less than 0.5 degrees.
b) Picture-to-sound carrier ratio; PC/SC = 13 dB (transmitter).
c) Sound shelf of VIF SAW filter: minimum 20 dB.
21. Measurements taken with SAW filter K6256 (Siemens) for vision and sound IF (sound shelf: 20 dB). Input level
V
= 10 mV (RMS), 27 kHz (54% FM deviation).
i SIF
22. The PC/SC ratio at pins 1 and 2 is calculated as the addition of TV transmitter PC/SC ratio and SAW filter PC/SC
ratio. This PC/SC ratio is necessary to achieve the S/N (W) values as noted. A different PC/SC ratio will change
these values.
).
Table 1 Input frequencies and carrier ratios
DESCRIPTIONSYMBOLB/G STANDARDUNIT
Picture carrierf
Sound carrierf
PC
SC
38.9MHz
33.4MHz
Picture-to-sound carrier ratioSC13dB
1995 Sep 0516
Page 17
Philips SemiconductorsPreliminary specification
Multistandard VIF-PLL and
FM-PLL demodulator
ndbook, full pagewidth
VIF input
(1,2)
(mV RMS)
0.6
70
gain
(dB)
600.06
50
40
30
206
10
060
−10
1.02.521.533.54
(1)(2)(3)(4)
TDA9806
MHA061
V28 (V)
4.5
I
0
1.0
2.0
tuner
(mA)
(1) I
; R
tuner
(2) Gain.
handbook, halfpage
TOP
80
S/N
(dB)
60
40
20
0
−60−40−2020
0.060.6660060
=22kΩ.
(3) I
(4) I
tuner
tuner
; R
; R
10
Fig.4Typical signal-to-noise ratio as a
function of IF input voltage.
=11kΩ.
TOP
=0Ω.
TOP
Fig.3 Typical VIF and tuner AGC characteristic.
MED684
andbook, halfpage
13.2 dB
27 dB
SC CCPCSC CCPC
3.2 dB
BLUEYELLOW
0
V
i (VIF)(rms)
V
i (VIF)(rms)
(dB)
(mV)
SC = sound carrier, with respect to sync level.
CC = chrominance carrier, with respect to sync level.
PC = picture carrier, with respect to sync level.
The sound carrier levels are taking into account
a sound shelf attenuation of 20 dB (SWIF G1962).
Fig.5 Input signal conditions.
27 dB
13.2 dB
10 dB
MED685 - 1
1995 Sep 0517
Page 18
Philips SemiconductorsPreliminary specification
Multistandard VIF-PLL and
FM-PLL demodulator
handbook, full pagewidth
V
P
TDA9806
Fig.6 Measurement conditions and typical AFC characteristic.
V = 5 V
P
I
23
23
handbook, halfpage
2.6 V
2.5 V
22 kΩ
22 kΩ
V
23I23
(V)
4.5
3.5
2.5
1.5
0.5
(µA)
200
100
0
100
200
38.538.939.3
zero carrier level
white level
TDA9806
MHA055
(source current)
(sink current)
f (MHz)
handbook, full pagewidth
1.8 V
1.5 V
B/G standard
black level
sync level
MHA056
Fig.7 Typical video signal levels on output pin 21 (sound carrier off).
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
mm
OUTLINE
VERSION
SOT232-1
max.
4.70.513.8
12
min.
max.
IEC JEDEC EIAJ
1.3
0.8
b
1
0.53
0.40
REFERENCES
0.32
0.23
cEeM
(1)(1)
D
29.4
28.5
9.1
8.7
E
16
(1)
Z
L
3.2
2.8
EUROPEAN
PROJECTION
M
10.7
10.2
E
12.2
10.5
e
1
w
H
0.181.77810.16
ISSUE DATE
92-11-17
95-02-04
max.
1.6
1995 Sep 0522
Page 23
Philips SemiconductorsPreliminary specification
Multistandard VIF-PLL and
FM-PLL demodulator
SOLDERING
Introduction
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our
“IC Package Databook”
Soldering by dipping or by wave
The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joint for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.
(order code 9398 652 90011).
TDA9806
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (T
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.
Repairing soldered joints
Apply a low voltage soldering iron (less than 24 V) to the
lead(s) of the package, below the seating plane or not
more than 2 mm above it. If the temperature of the
soldering iron bit is less than 300 °C it may remain in
contact for up to 10 seconds. If the bit temperature is
between 300 and 400 °C, contact may be up to 5 seconds.
stg max
). If the
DEFINITIONS
Data sheet status
Objective specificationThis data sheet contains target or goal specifications for product development.
Preliminary specificationThis data sheet contains preliminary data; supplementary data may be published later.
Product specificationThis data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1995 Sep 0523
Page 24
Philips Semiconductors – a worldwide company
Argentina: IEROD, Av. Juramento 1992 - 14.b, (1428)
BUENOS AIRES, Tel. (541)786 7633, Fax. (541)786 9367
Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,
Tel. (02)805 4455, Fax. (02)805 4466
Austria: Triester Str. 64, A-1101 WIEN, P.O. Box 213,
Tel. (01)60 101-1236, Fax. (01)60 101-1211
Belgium: Postbus 90050, 5600 PB EINDHOVEN, The Netherlands,
All rights are reserved. Reproduction in whole or in part is prohibited without the
prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation
or contract, is believed to be accurate and reliable and may be changed without
notice. No liability will be accepted by the publisher for any consequence of its
use. Publication thereof does not convey nor imply any license under patent- or
other industrial or intellectual property rights.
Printed in The Netherlands
533061/1500/01/pp24Date of release: 1995 Sep 05
Document order number:9397 750 00307
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