Datasheet TDA9801T, TDA9801 Datasheet (Philips)

INTEGRATED CIRCUITS

DATA SH EET

TDA9801

Single standard VIF-PLL
demodulator and FM-PLL detector

Product specification
Supersedes data of 1998 May 06
File under Integrated Circuits, IC02

1999 Aug 26

Philips Semiconductors Product specification

Single standard VIF-PLL demodulator
and FM-PLL detector

FEATURES

• Suitable for negative vision modulation

• Applicable for IF frequencies of 38.9, 45.75 and

58.75 MHz

• Gain controlled wide-band Vision Intermediate
Frequency (VIF) amplifier (AC-coupled)

• True synchronous demodulation with active carrier
regeneration (ultra-linear demodulation, good
intermodulation figures, reduced harmonics and
excellent pulse response)

• Peak sync pulse AGC

• Video amplifier to match sound trap and sound filter

• AGC output voltage for tuner with fixed resistor for

takeover point setting

• AFC detector without extra reference circuit

• Alignment-free FM-PLL detector with high linearity

TDA9801

• Stabilizer circuit for ripple rejection and to achieve
constant output signals

• 5 to 9 V positive supply voltage range

• Low power consumption of 300 mW at 5 V supply

voltage.

GENERAL DESCRIPTION

TheTDA9801(T)isamonolithicintegratedcircuitforvision
and sound IF signal processing in TV and VTR sets and
multimedia front-ends.

ORDERING INFORMATION

TYPE NUMBER

NAME DESCRIPTION VERSION

TDA9801 DIP20 plastic dual in-line package; 20 leads (300 mil) SOT146-1
TDA9801T SO20 plastic small outline package; 20 leads; body width 7.5 mm SOT163-1

PACKAGE

1999 Aug 26 2

Philips Semiconductors Product specification

Single standard VIF-PLL demodulator

TDA9801

and FM-PLL detector

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

P

I

P

V

i(sens)(VIF)(rms)

V

i(max)(rms)

G

IF

V

o(CVBS)(p-p)

B

v(−3dB)

S/N

W

α

IM(0.92/1.1)

α

IM(2.76/3.3)

α

H(sup)

V

o(AF)(max)(rms)

T

amb

supply voltage note 1 4.5 5.0 9.9 V
supply current VP= 9 V 52 61 70 mA
sensitivity of VIF input signal

(RMS value)
maximum input voltage

(RMS value)

−1 dB video at output;
fPC= 38.9 or 45.75 MHz

+1 dB video at output;
fPC= 38.9 or 45.75 MHz

− 50 90 µV

70 150 − mV

IF gain control fPC= 38.9 or 45.75 MHz 64 70 dB
CVBS output voltage

VP= 5 V 1.7 2.0 2.3 V

(peak-to-peak value)

−3 dB video bandwidth CL< 20 pF; RL>1kΩ 68−MHz
weighted signal-to-noise ratio VP= 5 V; note 2 56 60 − dB
intermodulation attenuation at

for BLUE 56 62 − dB

f = 0.92 or 1.1 MHz
intermodulation attenuation at

for BLUE 56 62 − dB

f = 2.76 or 3.3 MHz
harmonics suppression in video

note 3 35 40 − dB

signal
maximum output AF signal

THD < 1.5% 0.8 −−V

handling voltage (RMS value)
ambient temperature −20 − +70 °C

Notes

1. Values of video and sound parameters can be decreased at V

= 4.5 V.

P

2. S/N is the ratio of the black-to-white amplitude to the black level noise voltage (RMS value) at pin CVBS.
B = 5 MHz weighted in accordance with

3. Measurements taken with SAW filter G1962; VSB modulation; f

“CCIR 567”

at a source impedance of 50 Ω.

> 0.5 MHz; loop bandwidth BL = 60 kHz.

video

1999 Aug 26 3

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TPLL
6

ndbook, full pagewidth

2f

PC

17

16

AFC
15

1999 Aug 26 4

VP = 5 V (9 V)

V

P VCO2 VCO1

20

BLOCK DIAGRAM

Philips Semiconductors Product specification

Single standard VIF-PLL demodulator

and FM-PLL detector

GND

VIF1

VIF2

ADJ

18

1

2

4

takeover

point

INTERNAL

REFERENCE

VOLTAGE

3-STAGE
IF-AMPLIFIER

TUNER

AGC

3

R

TOP

tuner AGC

TRAVELLING

WAVE

DIVIDER

FREQUENCY

DETECTOR

AND PHASE

DETECTOR

VCO

VIDEO

DEMODULATOR

AFC

DETECTOR

VIDEO

AMPLIFIER

TDA9801

sound

mute

IF

AGC

12
TAGCTOP

19

DETECTOR

C

AGC

AGC

5

sound

mute

switch

8
n.c.

BUFFER AMPLIFIER

AND NOISE CLIPPER

13

1 V (p-p)

AMPLIFIER

DETECTOR

AMPLIFIER

14

SOUND

TRAP

AF

FM-PLL

LIMITER

SOUND
FILTER

9

10

7

11
SIVIVSOMUTEAGC

AF
DAF

CVBS

2 V (p-p)

video and
intercarrier

MHA879

C

DAF

TDA9801

Fig.1 Block diagram.

Philips Semiconductors Product specification

Single standard VIF-PLL demodulator
and FM-PLL detector

PINNING

SYMBOL PIN DESCRIPTION

VIF1 1 VIF differential input 1
VIF2 2 VIF differential input 2
TOP 3 tuner AGC TakeOver Point (TOP)

connection
ADJ 4 phase adjust connection
MUTE 5 sound mute switch connection
TPLL 6 PLL time constant connection
CVBS 7 CVBS (positive) video output
n.c. 8 not connected
AF 9 AF output
DAF 10 AF amplifier decoupling capacitor

connection
SI 11 sound intercarrier input
TAGC 12 tuner AGC output
VSO 13 video and sound intercarrier output
VI 14 buffer amplifier video input
AFC 15 AFC output
VCO1 16 VCO1 reference circuit for 2f
VCO2 17 VCO2 reference circuit for 2f
GND 18 ground supply (0 V)
AGC 19 AGC detector capacitor connection
V

P

20 supply voltage (+5 V)

PC
PC

handbook, halfpage

1

VIF1

2

VIF2

3

TOP

4

ADJ

MUTE

5

TDA9801

6

TPLL

7

CVBS

8

n.c.

9

AF

10

DAF

MHA880

Fig.2 Pin configuration.

TDA9801

V

20

P

19

AGC

18

GND

17

VCO2

16

VCO1
AFC

15

VI

14

VSO

13

TAGC

12
11

SI

1999 Aug 26 5

Philips Semiconductors Product specification

Single standard VIF-PLL demodulator
and FM-PLL detector

FUNCTIONAL DESCRIPTION
3-stage IF amplifier

The VIF amplifier consists of three AC-coupled differential
amplifier stages (see Fig.1). Each differential stage
comprises a feedback network controlled by emitter
degeneration.

AGC detector, IF AGC and tuner AGC

The automatic control voltage to maintain the video output
signal at a constant level is generated in accordance with
the transmission standard. Since the TDA9801(T) is
suitable for negative modulation only the peak sync pulse
level is detected.

TheAGCdetectorchargesanddischargescapacitorC
to set the IF amplifier and tuner gain. The voltage on
capacitor C
signal, and is fed to the tuner AGC to generate the tuner
AGC output current on pin TAGC (open-collector output).
The tuner AGC takeover point level is set at pin TOP. This
allows the tuner to be matched to the SAW filter in order to
achieve the optimum IF input level.

is transferred to an internal IF control

AGC

AGC

TDA9801

The voltage to set the VCO frequency to the actual double
vision carrier frequency isalso amplified and converted for
the AFC output current.

The VCO signal is divided-by-2 with a Travelling Wave
Divider (TWD) which generates two differential output
signals with a 90 degree phase difference independent of
the frequency.

Video amplifier

The composite video amplifier is a wide bandwidth
operational amplifier with internal feedback. A nominal
positive video signal of 1 V (p-p) is present at pin VSO.

Buffer amplifier and noise clipper

The input impedance of the 7 dB wideband CVBS buffer
amplifier (with internal feedback) is suitable for ceramic
sound trap filters. Pin CVBS provides a positive video
signal of 2 V (p-p). Noise clipping is provided internally.

Sound demodulation

LIMITER AMPLIFIER

Frequency detector and phase detector

The VIF amplifier output signal is fed into a frequency
detector and into a phase detector. During acquisition the
frequency detector produces a DC current proportional to
the frequency difference between the input and the VCO
signal. After frequency lock-in the phase detector
produces a DC current proportional to the phase
difference between the VCO and the input signal. The DC
current of either frequency detector or phase detector is
converted into a DC voltage via the loop filter which
controls the VCO frequency.

Video demodulator

The true synchronous video demodulator is realized by a
linear multiplier which is designed for low distortion and
widebandwidth.ThevisionIFinputsignalis multiplied with
the ‘in phase’ component of the VCO output.
The demodulator output signal is fed via an integrated
low-pass filter (fg= 12 MHz) for suppression of the carrier
harmonics to the video amplifier.

VCO, AFC detector and travelling wave divider

The VCO operates with a symmetrically connected
reference LC circuit, operating at the double vision carrier
frequency. Frequency control is performed by an internal
variable capacitor diode.

The FM sound intercarrier signal is fed to pin SI and
through a limiter amplifier before it is demodulated.
The result is high sensitivity and AM suppression.
The limiter amplifier consists of 7 stages which are
internally AC-coupled in order to minimizing the DC offset.

FM-PLL DETECTOR
The FM-PLL demodulator consists of an RC oscillator,

loop filter and phase detector. The oscillator frequency is
locked on the FM intercarrier signal from the limiter
amplifier. As a result of this locking, the RC oscillator is
frequency modulated. The modulating voltage (AF signal)
is used to control the oscillator frequency. By this, the
FM-PLL operates as an FM demodulator.

AF AMPLIFIER
The audio frequency amplifier with internal feedback is

designed for high gain and high common-mode rejection.
The low-level AF signal output from the FM-PLL
demodulator is amplified and buffered in a low-ohmic
audiooutput stage. An external decouplingcapacitor C
removes the DC voltage from the audio amplifier input.

By using the sound mute switch (pin MUTE) the AF
amplifier is set in the mute state.

DAF

1999 Aug 26 6

Philips Semiconductors Product specification

Single standard VIF-PLL demodulator

TDA9801

and FM-PLL detector

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

P

V

n

t

sc(max)

T

stg

T

amb

V

es

Notes

1. Machine model class B (L = 2.5 µH).

supply voltage IP= 70 mA; T

amb

=70°C;

maximum chip temperature

125 °C for TDA9801 0 9.9 V
128 °C for TDA9801T 0 9.9 V

voltage on

pins VIF1, VIF2, AFC and AGC 0 V

P

V

pin TAGC − 13.2 V

maximum short-circuit time to ground or V

P

− 10 s
storage temperature −25 +150 °C
ambient temperature −20 +70 °C
electrostatic handling voltage note 1 −300 +300 V

THERMAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS VALUE UNIT

R

th(j-a)

thermal resistance from junction to ambient in free air

TDA9801 73 K/W
TDA9801T 85 K/W

CHARACTERISTICS

VP=5V; T

=25°C; see Table 1 for input frequencies and picture-to-sound carrier ratios; V

amb

i(VIF)(rms)

= 10 mV (sync
pulse level); IF input from 50 Ω via broadband transformer 1 : 1; DSB video modulation; 10% residual carrier; video
signal in accordance with

“CCIR, line 17”

or

“NTC-7 Composite”

; measurements taken in test circuit of Fig.12; unless

otherwise specified.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Supply: pin V

V

P

I

P

P

supply voltage note 1 4.5 5.0 9.9 V
supply current VP= 5 V 51 60 70 mA

V

= 9 V 52 61 70 mA

P

Vision IF input: pins VIF1 and VIF2

V

i(sens)(VIF)(rms)

V

i(max)(rms)

V

I

sensitivity of VIF input
voltage (RMS value)

maximum VIF input voltage
(RMS value)

−1 dB video at output
= 38.9 or 45.75 MHz − 50 90 µV

f

PC

f

= 58.75 MHz − 60 100 µV

PC

1 dB video at output

f

= 38.9 or 45.75 MHz 70 150 − mV

PC

f

= 58.75 MHz 80 160 − mV

PC

DC input voltage 3.0 3.4 3.8 V

1999 Aug 26 7

Philips Semiconductors Product specification

Single standard VIF-PLL demodulator

TDA9801

and FM-PLL detector

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

∆V

int

G

IF

B

IF(−3dB)

R

i(dif)

C

i(dif)

VCO and video demodulator; note 3
f

VCO(max)

/∆T VCO frequency variation

∆f

VCO

V

VCO(rms)

f

cr(PC)

t

acq

V

i(sens)(VIF)(rms)

I

offset(TPLL)

Video amplifier output (sound carrier off): pin VSO

V

o(VSO)(p-p)

V

sync

V

v(clu)

V

v(cll)

V

o(intc)(rms)

R

o

I

bias

internal IF amplitude

within AGC range − 0.7 1 dB
difference between picture
and sound carrier

IF gain control see Fig.6

= 38.9 or 45.75 MHz 64 70 − dB

f

PC

f

= 58.75 MHz 62 68 − dB

PC

−3 dB IF bandwidth upper limit cut-off

70 100 − MHz

frequency
differential input resistance note 2 1.7 2.2 2.7 kΩ
differential input

note 2 1.2 1.7 2.5 pF
capacitance

maximum VCO frequency for carrier regeneration;

f=2f

PC

with temperature
VCO voltage swing

(RMS value)

picture carrier capture
frequency range

free running; I

note 4

measured between

pins VCO1 and VCO2

= 38.9 MHz − 120 − mV

f

PC

f

= 45.75 MHz − 100 − mV

PC

f

= 58.75 MHz − 80 − mV

PC

negative 1.4 1.8 − MHz

positive 1.4 1.8 − MHz

AFC

=0;

125 130 − MHz

−−±20 × 10−6K

acquisition time BL = 60 kHz; note 5 −−30 ms
sensitivity of VIF input

(RMS value)

PLL still locked;

maximum IF gain; note 6

− 50 90 µV

C/N = 10 dB; note 7 − 100 140 µV
offset current at pin TPLL note 8 −−±2.0 µA

VSO output voltage
(peak-to-peak value)

see Fig.5

V

= 5 V 0.90 1.0 1.25 V

P

V

= 9 V 0.95 1.1 1.25 V

P

sync pulse voltage level 1.35 1.5 1.6 V
upper video clipping

VP− 1.1 VP− 1 − V

voltage level
lowervideo clipping voltage

− 0.7 0.9 V

level
intercarrier output voltage

sound carrier on; note 9 − 32 − mV
(RMS value)

output resistance note 2 −−10 Ω
DC bias current for internal emitter-follower

1.8 2.5 − mA

at pin VSO

−1

1999 Aug 26 8

Philips Semiconductors Product specification

Single standard VIF-PLL demodulator

TDA9801

and FM-PLL detector

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

I

o(sink)(max)

I

o(source)(max)

B

v(−3dB)

α

H(sup)

PSRR

VSO

Buffer amplifier and noise clipper input: pin VI

R

i

C

i

V

I

Buffer amplifier output: pin CVBS

G

v

B

v(−3dB)

V

o(v)(p-p)

V

v(clu)

V

v(cll)

V

sync

R

o

I

bias

I

o(sink)(max)

I

o(source)(max)

Measurements from VIF inputs to CVBS output (330 Ω connected between pins VSO and VI, sound carrier off)

V

o(CVBS)(p-p)

∆V

o(CVBS)

∆V

o(bl)

G

dif

ϕ

dif

B

v(−3dB)

maximum AC and DC

1.4 −− mA

output sink current
maximum AC and DC

2.0 −− mA

output source current

−3 dB video bandwidth CL< 50 pF; RL>1kΩ 710− MHz
harmonics suppression in

video signal
power supply ripple

CL< 50 pF; RL>1kΩ;

35 40 − dB

note 10

see Fig.7 32 35 − dB
rejection at pin VSO

input resistance 2.6 3.3 4.0 kΩ
input capacitance 1.4 2 3.0 pF
DC input voltage pin VI not connected 1.5 1.8 2.1 V

voltage gain note 11 6 7 7.5 dB

−3 dB video bandwidth CL< 20 pF; RL>1kΩ 811− MHz
video output voltage

(peak-to-peak value)
upper video clipping

sound carrier off;

see Fig.12

1.7 2.0 2.3 V

3.9 4.0 − V

voltage level
lowervideo clipping voltage

− 1.0 1.1 V

level
sync pulse voltage level − 1.35 − V
output resistance −−10 Ω
DC bias current internal emitter-follower at

1.8 2.5 − mA

pin CVBS
maximum AC and DC

1.4 −− mA

output sink current
maximum AC and DC

2.4 −− mA

output source current

CVBS output voltage
(peak-to-peak value)

deviation of CVBS output
voltage

VP= 5 V 1.7 2.0 2.3 V

= 9 V 1.8 2.2 2.6 V

V

P

at B/G standard

50 dB gain control −−0.5 dB

30 dB gain control −−0.1 dB
black level tilt gain variation; note 12 −−1%
differential gain

“CCIR, line 330”

or

− 25 %

“NTC-7 Composite”

differential phase

“CCIR, line 330”

or

− 2 4 deg

“NTC-7 Composite”

−3 dB video bandwidth CL< 20 pF; RL>1kΩ 68− MHz

1999 Aug 26 9

Philips Semiconductors Product specification

Single standard VIF-PLL demodulator

TDA9801

and FM-PLL detector

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

S/N

W

α

IM(0.92/1.1)

α

IM(2.76/3.3)

∆V

r(PC)(rms)

α

H(sup)

PSRR

CVBS

AGC detector output: pin AGC

t

res

I

ch

I

dch

V

o

Tuner AGC

V

i(VIF)(rms)

QV

i(VIF)(rms)

/∆T variation of tuner takeover

∆V

i(VIF)

∆G

IF

weighted signal-to-noise
ratio

intermodulation attenuation
at f = 0.92 or 1.1 MHz

see Fig.3; note 13

V

=5V 56 60 − dB

P

V

=9V 55 59 − dB

P

see Fig.4; note 14

for BLUE 56 62 − dB

for YELLOW 58 64 − dB
intermodulation attenuation

at f = 2.76 or 3.3 MHz

see Fig.4; note 14

for BLUE 56 62 − dB

for YELLOW 57 63 − dB
residual picture carrier

(RMS value)
harmonics suppression in

fundamental wave − 110 mV
harmonics − 110 mV
note 10 35 40 − dB

video signal
power supply ripple

see Fig.7 25 28 − dB

rejection at pin CVBS

response time at 50 dB amplitude step of

input signal

for increasing step − 110 ms

for decreasing step − 50 100 ms
charging current note 12 0.82 1.1 1.38 mA
discharging current 16 22 28 µA
gain control output voltage see Fig.6

maximum gain 0 −− V

VIF input voltage
(RMS value)

accuracy level of tuner
takeover point (RMS value)

minimum gain −−V

for onset tuner takeover
point

minimum level with

R

=22kΩ

TOP

maximum level with

=0Ω

R

TOP

R

=13kΩ;

TOP

I

= 0.4 mA

TAGC

I

= 0.4 mA − 0.02 0.06 dB/K

TAGC

−−5mV

50 −− mV

7 − 14 mV

−0.7 V

P

point with temperature
IF slip by automatic gain

control

tuner gain current from
20 to 80%

− 68 dB

1999 Aug 26 10

Philips Semiconductors Product specification

Single standard VIF-PLL demodulator

TDA9801

and FM-PLL detector

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

TUNER AGC OUTPUT: PIN TAGC
V

max

maximum voltage from external source;

note 2
V
I

sat

sink

saturation voltage I

TAGC

sink current see Fig.6

AFC detector: pin AFC; note 15
CR

stps

control steepness equal to ∆I

see Table 2

∆f/∆T frequency variation with

I

AFC

temperature

V

o

output voltage without external

components; see Fig.8

I

o

∆I

r(v)(p-p)

output current see Fig.8

residual video modulation
current

(peak-to-peak value)
Sound mute switch: pin MUTE; note 16
V

IL

V

IH

I

IL

α

mute

∆V

offset(MUTE)

LOW-level input voltage mute on 0 − 0.8 V

HIGH-level input voltage mute off 1.5 − V

LOW-level input current V

mute attenuation V

DC offset voltage at

pin MUTE

MUTE
MUTE

at switching to mute on

state (plop)
FM sound limiter amplifier input: pin SI; note 17
V

i(FM)(rms)

FM input voltage

“CCIR468-4”

(RMS value)

V

i(FM)(max)(rms)

maximum FM input
handling voltage
(RMS value)

V

I

DC input voltage 2.3 2.6 2.9 V

= 1.7 mA −−0.2 V

no tuner gain reduction − 0.1 0.3 µA
maximum tuner gain

reduction

/∆f

AFC

VIF

f

= 38.9 MHz −0.5 −0.75 −1.0 µA/kHz

PC

= 45.75 MHz −0.4 −0.65 −0.9 µA/kHz

f

PC

f

= 58.75 MHz −0.3 −0.55 −0.8 µA/kHz

PC

= 0; note 4 −−±20 × 106K

upper limit V
lower limit − 0.3 0.5 V

source current 150 200 250 µA
sink current 150 200 250 µA

=0V −−300 −360 µA
=0V 70 80 − dB

S/N = 40 dB; see Fig.10 − 200 300 µV

α

= 40 dB; f = 1 kHz;

AM

m = 0.3

−−13.2 V

1.7 2.0 2.6 mA

− 0.5 VP− 0.3 − V

P

− 20 30 µA

P

− 100 500 mV

− 1 − mV

200 −− mV

−1

V

1999 Aug 26 11

Philips Semiconductors Product specification

Single standard VIF-PLL demodulator

TDA9801

and FM-PLL detector

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

R

i

α

AM

f

res(−3dB)

FM-PLL sound detector and AF amplifier; note 17
f

cr(PLL)

f

hr(PLL)

t

acq

∆f

AF

B

AF(−3dB)

THD total harmonic distortion 27 kHz FM deviation;

S/N

W

∆V

r(SC)(rms)

AUDIO OUTPUT: PIN AF
V

o(AF)(rms)

V

o(AF)(max)(rms)

/∆T AF output voltage variation

∆V

o(AF)

R

o

R

L

I

o(sink/source)(max)

V

O

PSRR

AF

DECOUPLING CAPACITOR: PIN DAF
V

DAF

input resistance note 2 480 600 720 Ω
AM suppression AM signal: f = 1 kHz;

46 50 − dB

m = 0.3; see Fig.9

frequency response −3 dB points of lower and

3.5 − 10 MHz
upper limits of IF sound
cut-off frequency

catching range of PLL upper limit 7 −− MHz

lower limit −−4 MHz

holding range of PLL upper limit 8 −− MHz

lower limit −−3.5 MHz

acquisition time −−4 µs
audio frequency deviation THD < 1.5%; note 18 −−±50 kHz

−3 dB audio frequency

95 120 − kHz

bandwidth

− 0.25 0.5 %
R3 = 0 Ω; note 18

weighted signal-to-noise

“CCIR 468-4”

; see Fig.10 50 55 − dB

ratio
residual sound carrier

(RMS value)

AF output voltage
(RMS value)

fundamental wave and
harmonics

∆fAF= ±27 kHz;
B/G standard; see Fig.10

∆f

= ±25 kHz;

AF

−−75 mV

400 500 600 mV

370 460 550 mV

M standard; see Fig.10

maximum AF output

THD < 1.5% 0.8 −− V

handling voltage
(RMS value)

− 3 × 10−37 × 10

−3

with temperature
output resistance note 2 − 200 −Ω
load resistance AC-coupled at pin AF 2.2 −− kΩ
maximum sink or source

AC and DC −−1.5 mA

output current
DC output voltage 2.1 2.5 2.9 V
power supply ripple

rejection at pin AF

DC voltage at decoupling
capacitor

R3 = 0 Ω; see Fig.7;
note 18

voltage depends on VCO
frequency; note 19

24 30 − dB

1.5 − 3.3 V

dB/K

1999 Aug 26 12

Philips Semiconductors Product specification

Single standard VIF-PLL demodulator

TDA9801

and FM-PLL detector

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Measurements from VIF input to AF output; notes 20 and 21; see Fig.13

S/N

W

weighted signal-to-noise
ratio

Notes

1. Values of video and sound parameters can be decreased at VP= 4.5 V.

2. Thisparameteris not tested during production andisonlygiven as application information for designing thetelevision
receiver.

3. Conditions for video demodulator:
a) Loopbandwidth: BL = 60 kHz, natural frequencyfn= 15 kHz, damping factor d = 2, calculatedwith grey level and

FPLL input level

b) Resonance circuit of VCO: Qo> 50, see Table 2 for the value of the external capacitor C; C

voltage is approximately 2.6 V at VP= 5 V and approximately 2.7 V at VP=9V.

4. Temperature coefficient of the external LC circuit is equal to zero.

5. V

6. V

i(VIF)(rms)
i(VIF)

= 10 mV; ∆f = 1 MHz (VCO frequency offset related to fPC); white picture video modulation.

signal for nominal video signal.

7. Broadband transformer at the VIF input (see Fig.12). The C/N ratio at the VIF input for ‘lock-in’ is defined as the VIF
input signal (RMS value of sync pulse level) related to a superimposed 5 MHz band-limited white noise signal
(RMS value). The video modulation is for white picture.

8. The offset current is measured between pin TPLL and half of the supply voltage (VP= 2.5 V) under the conditions:
a) no input signal at VIF inputs
b) IF amplifier gain at minimum (V

AGC=VP

9. The intercarrier output signal is superimposed to the video signal at pin VSO and can be calculated by the following
formula:

V

---------------

V

o(intc)(rms)

1.0 V (p-p)

1

× 10

---------- ­22

------------------------------------------------------------------

×=

where
a) 1.0 V (p-p) = video output signal as reference

“CCIR 468-4”

black picture (sync only) 46 52 − dB
white picture 42 48 − dB
colour bar 40 46 − dB

) and pin ADJ is left open-circuit.

i(SC)

(dB) 6 dB 2 dB±+

V

i(PC)

20

= 8.5 pF, loop

VCO

1

b) = correction term for RMS value

---------- ­22

V

i(SC)

--------------­V

i(PC)

(dB)

c) = sound-to-picture carrier ratio at VIF inputs in dB

d) 6 dB = correction term of internal circuitry
e) ±2 dB = tolerance of video output and intercarrier output amplitude V
f) Example for SAW filter G1962:

sound shelf value = 20 dB,

V

i(SC)

--------------­V

i(PC)

27 dB– V

o(intc)(rms)

32 mV (typical value)=⇒=

1999 Aug 26 13

o(intc)(rms)

.

Philips Semiconductors Product specification

Single standard VIF-PLL demodulator

TDA9801

and FM-PLL detector

10. Measurements taken with SAW filter G1962; VSB modulation; f

11. The 7 dB buffer amplifier gain accounts for 1 dB loss in the sound trap. The buffer output signal is typical 2 V (p-p).
If no sound trap is applied a resistor of 330 Ω must be connected between pins VSO and VI.

12. The leakage current of C

should not exceed 1 µA. Larger currents will increase the tilt.

AGC

13. S/N is the ratio of the black-to-white amplitude to the black level noise voltage (RMS value) at pin CVBS.
B = 5 MHz weighted in accordance with

“CCIR 567”

at a source impedance of 50 Ω.

14. The intermodulation figures are defined:

at 4.4 (3.58) MHz

V

o

a)

α

IM 0.92 1.1⁄()

α

IM(0.92/1.1)

b)

α

IM 2.76 3.3⁄()

α

IM(2.76/3.3

value at 0.92 (or 1.1) MHz referenced to black or white signal

) value at 2.76 (or 3.3) MHz referenced to colour carrier.



20

20

-------------------------------------------------------



V

at 0.92 (1.1) MHz

o

at 4.4 (3.58) MHz

V

o



log=

-------------------------------------------------------



V

at 2.76 (3.3) MHz

o

3.6 dB+log=

15. To match the AFC output signal to different tuning systems a current source output is provided (see Fig.8).

16. The no mute state is also valid when pin MUTE is not connected.

17. The input signal is provided by an external generator with 50 Ω source impedance, AC-coupled with a 10 nF
capacitor, f

= 1 kHz and 27 kHz (54% FM deviation) of audio reference. A VIF input signal is not permitted.

mod

Pin AGC has to be connected to the supply voltage. Measurements are taken at 50 µs de-emphasis (75 µs at the
M standard).

18. To allow a higher frequency deviation, the value of resistor R3 on pin DAF (see Fig.13) has to be increased.
However, the AF output signal must not exceed 0.5 V (nominal value) for THD = 0.2%. R3 = 4.7 kΩ provides −6dB
amplification.

19. The leakage current of the 2.2 µF decoupling capacitor should not exceed 100 nA.

20. For all S/N measurements the used vision IF modulator has to meet the following specifications:
a) Incidental phase modulation for black-to-white jump less than 0.5 degrees
b) AF performance, measured with the television demodulator AMF2 (audio output, weighted S/N ratio), better than

60 dB (deviation 27 kHz) for white picture video modulation.

21. Input signal according to B/G standard of Table 1:
a) Input: V

i(VIF)(rms)

= 10 mV, VSB modulation and 10% residual carrier

b) Reference: FM deviation = 27 kHz and measurements are taken at 50 µs de-emphasis.

> 0.5 MHz; loop bandwidth BL = 60 kHz.

video

Table 1 Input frequencies and carrier ratios

STANDARD

SYMBOL DESCRIPTION

UNIT

B/G M/N M

f

PC

f

SC

picture carrier frequency 38.9 45.75 58.75 MHz
sound carrier frequency 33.4 41.25 54.25 MHz

PC/SC picture-to-sound carrier ratio 13 7 7 dB

1999 Aug 26 14

Philips Semiconductors Product specification

Single standard VIF-PLL demodulator
and FM-PLL detector

75

handbook, halfpage

S/N

W

(dB)

50

25

0

−60 −40 −20 20

0.06 0.6 6 60060

10

V

i(VIF)(rms)

V

i(VIF)(rms)

MHB507

0

(dB)

(mV)

TDA9801

handbook, halfpage

13.2 dB

27 dB

SC CC PC SC CC PC

SC = sound carrier level, with respect to sync pulse level.
CC = chrominance carrier level, with respect to sync pulse level.
PC = picture carrier level, with respect to sync pulse level.
Sound shelf attenuation: 20 dB.

3.2 dB

13.2 dB

27 dB

BLUE YELLOW

10 dB

MED685 - 1

Fig.3 Video output weighted signal-to-noise ratio

as a function of the VIF input voltage.

handbook, halfpage

2.6 V

2.5 V

1.8 V

1.5 V

B/G and M/N standard

zero carrier level
white level

black level

sync level

MHA889

Fig.4 Input signal conditions for intermodulation

measurements.

Fig.5 Video signal levels on output pin VSO

(sound carrier off).

1999 Aug 26 15

Philips Semiconductors Product specification

Single standard VIF-PLL demodulator
and FM-PLL detector

70

handbook, full pagewidth

60

G

IF

(dB)

50

40

30

20

10

0

−10
0

(1) GIF (IF gain control).
(2) R
(3) R
(4) R

TOP
TOP
TOP

=22kΩ.
=13kΩ.
=0Ω.

1234

(1)

(2)

(3) (4)

TDA9801

V

(V)

AGC

MHB510

5

I

TAGC

(mA)

0

0.2

0.6

1.0

1.4

1.8

2.0

Fig.6 IF AGC gain control and tuner AGC output current as a function of the tuner AGC detector voltage.

handbook, full pagewidth

V

P

TDA9801

VP = 5 V

100 mV
(f

ripple

= 70 Hz)

MHA884

t

Fig.7 Power supply ripple rejection condition.

1999 Aug 26 16

Philips Semiconductors Product specification

Single standard VIF-PLL demodulator
and FM-PLL detector

handbook, halfpage

9

handbook, halfpage

V

AFC
(V)

7.5

6

VP = 5 V VP = 5 V

AFC

TDA9801

15

(source current)

I

AFC

22 kΩ

V

22 kΩ

MHA887

MHB508

AFC

150

100

50

I

AFC
(µA)

handbook, halfpage

5

handbook, halfpage

V

AFC
(V)

3.75

VP = 9 V VP = 9 V

AFC

TDA9801

15

I

AFC

(source current)

TDA9801

62 kΩ

V

AFC

62 kΩ

MHA888

MHB509

225

I

AFC
(µA)

150

75

4.5

3

(sink current)

1.5

0

38.3 38.6 38.9 39.2 39.5
f (MHz)

a. VP= 5 V. b. VP=9V.

Fig.8 AFC measurement conditions and typical characteristics.

0

−50

−100

−150

2.5

1.25

0

38.3 38.6 38.9 39.2 39.5

(sink current)

f (MHz)

0

−75

−150

−225

1999 Aug 26 17

Philips Semiconductors Product specification

Single standard VIF-PLL demodulator
and FM-PLL detector

α

(dB)

−100

AM

−20

−40

−60

−80

0

−1

10

1

handbook, full pagewidth

10 10

TDA9801

MHA885

2

V

i(SI)

(mV)

3

10

Fig.9 AM suppression (typical value) of the FM limiter amplifier as a function of the input voltage.

handbook, full pagewidth

540

V

o(AF)(rms)

(mV)

520

500

480

460

−1

10

(1) Signal-to-noise ratio (weighted).
(2) AF output signal (typical value).

MHA886

(1)

(2)

11010

2

V

i(SI)

(mV)

60

S/N

W

(dB)

50

40

30

20

3

10

Fig.10 AF output signal and signal-to-noise ratio as a function of the input voltage.

1999 Aug 26 18

Philips Semiconductors Product specification

Single standard VIF-PLL demodulator
and FM-PLL detector

handbook, full pagewidth

antenna input

(dBµV)

120

100

80

(1)

tuner gain

control range

SAW insertion

loss 20 dB

6 dB IF slip

IF gain range

64 (<70) dB

64 dB

IF AGC

video
1 V (p-p)

−1

10

−2

10

TDA9801

IF signals

(RMS value)

(V)

TOP

60

SAW insertion

40

40 dB

RF gain

20

VHF/UHF

tuner

SAW filter TDA9801

loss 20 dB

IF

IF amplifier, demodulator

and video

MHA883

−3

10

0.66 × 10

−4

10

0.66 × 10

−5

10

0.66 × 10

−3

−4

−5

(1) Depends on TOP.

Fig.11 Front-end level diagram.

1999 Aug 26 19

Philips Semiconductors Product specification

Single standard VIF-PLL demodulator

TDA9801

and FM-PLL detector

INTERNAL CIRCUITRY

PIN SYMBOL DC VOLTAGE (V) EQUIVALENT CIRCUIT (WITHOUT ESD PROTECTION CIRCUIT)

1 VIF1 3.4
2 VIF2 3.4

3 TOP 0 to 1.9

1

1.1 kΩ

1.1 kΩ

2

3.6 V

+

400 µA

+

400 µA

MHB511

20 kΩ30 kΩ

3.6 V

4 ADJ 0 to 0.4

3

4

9 kΩ

1.9 V

MHB512

5 kΩ

3.6 V

18 kΩ

16 kΩ

MHB513

1999 Aug 26 20

Philips Semiconductors Product specification

Single standard VIF-PLL demodulator

TDA9801

and FM-PLL detector

PIN SYMBOL DC VOLTAGE (V) EQUIVALENT CIRCUIT (WITHOUT ESD PROTECTION CIRCUIT)

5 MUTE 0 to V

6 TPLL 1.5 to 4.0

P

5

mute

++

2.5 µA

25 µA

MHB514

++

7 CVBS sync pulse level:

1.35

8 n.c. −

I

b

+

6

VCO

200 µA

MHB515

6.4
kΩ

2.5 mA

1.5 pF

MHB516

+

7

1999 Aug 26 21

Philips Semiconductors Product specification

Single standard VIF-PLL demodulator

TDA9801

and FM-PLL detector

PIN SYMBOL DC VOLTAGE (V) EQUIVALENT CIRCUIT (WITHOUT ESD PROTECTION CIRCUIT)

9 AF 2.5

9

10 DAF 1.5 to 3.3

10

+

57 kΩ

5 kΩ

2.4 mA

190 µA

+

MHB517

5 kΩ

MHB518

11 SI 2.6

12 TAGC 0 to 13.2

13 VSO sync pulse level:

1.5

3.6 V

670 Ω

11

5.5 kΩ

12

15 V

5.5 kΩ
15 pF

MHB519

MHB520

+

100 Ω

13

20 kΩ

10 µF

11.5 kΩ

1999 Aug 26 22

2.5 mA

2 kΩ

3.6 V

MHB521

Philips Semiconductors Product specification

Single standard VIF-PLL demodulator

TDA9801

and FM-PLL detector

PIN SYMBOL DC VOLTAGE (V) EQUIVALENT CIRCUIT (WITHOUT ESD PROTECTION CIRCUIT)

14 VI 1.8

15 AFC 0.3 to V

P

− 0.3

15

3.6 V

6.6 kΩ

14

2 kΩ

5 kΩ

++ +

MHB522

200 µA

16 VCO1 2.7
17 VCO2 2.7

1 kΩ

420 Ω
16
17

1 kΩ

MHB523

420 Ω 50 Ω

+

+

500 µA

2.8 V

MHB524

1999 Aug 26 23

Philips Semiconductors Product specification

Single standard VIF-PLL demodulator

TDA9801

and FM-PLL detector

PIN SYMBOL DC VOLTAGE (V) EQUIVALENT CIRCUIT (WITHOUT ESD PROTECTION CIRCUIT)

18 GND 0

19 AGC 1.5 to 4.0

20 V

P

V

P

20

13.5 V

18

MHB525

1 mA

19

I

b

20

20 µA

MHB526

13.5 V

18

MHB525

1999 Aug 26 24

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1999 Aug 26 25

VP = 5 V (9 V)

10 µF

10 nF

2.2 µF

V

P

20

19

18

17 16

ndbook, full pagewidth

22 kΩ

(62 kΩ)

22 kΩ

(62 kΩ)

0.1 µF

(1)

AFC

1 V (p-p)

330 Ω

15

14 13 12

video and intercarrier

tuner AGC

560 Ω

TAGCVI SIVSOAFCVCO2 VCO1GNDAGC

11

TEST AND APPLICATION INFORMATION

Philips Semiconductors Product specification

Single standard VIF-PLL demodulator

and FM-PLL detector

vision

(1) See Table 2.

TDA9801

1

1:1

IF

50 Ω

2

VIF1 VIF2 ADJTOP MUTE CVBSTPLL AF DAF

34567 89

n.c.

takeover

point

13 kΩ

sound

mute

390 Ω

0.1 µF

10

2.2 µF

MHA881

AF
CVBS

2 V (p-p)

TDA9801

Fig.12 Test circuit.

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1999 Aug 26 26

VP = 5 V (9 V)

10 µF

10 nF

2.2 µF

V

P

20

19

18

17 16

dbook, full pagewidth

22 kΩ

(62 kΩ)

22 kΩ

(62 kΩ)

0.1 µF

(1)

AFC

330 Ω

1 V (p-p)

sound

trap

VI SIVSOAGC

15

14 13 12

15
µH

560

Ω

sound

filter

video and intercarrier

tuner AGC

(2)

R1

TAGCAFCVCO2 VCO1GND

11

R2

(2)

12 V (9 V)

TDA9801

Philips Semiconductors Product specification

Single standard VIF-PLL demodulator

and FM-PLL detector

(2)

vision

IF

50 Ω

(1) See Table 2.
(2) Depends on tuner.
(3) See note 18 of Chapter “Characteristics”.

SAW

filter

G1962

1

IF input

2

VIF1 VIF2 ADJ CVBSTPLL AF DAF

34567 8910

TOP MUTE

13 kΩ

takeover

point

390 Ω

0.1 µF

sound

mute

n.c.

22 nF

Fig.13 Application circuit.

2.2
k

(3)

R3

Ω

2.2 µF

CVBS
2 V (p-p)

MHA882

AF

TDA9801

Philips Semiconductors Product specification

Single standard VIF-PLL demodulator

TDA9801

and FM-PLL detector

Table 2 Oscillator circuit for different TV standards

PARAMETER EUROPE USA JAPAN

IF frequency 38.9 MHz 45.75 MHz 58.75 MHz
VCO frequency 77.8 MHz 91.5 MHz 117.5 MHz
Oscillator circuit

Toko coil 5KM 369SNS-2010Z 5KMC V369SCS-2370Z MC139 NE545SNAS100108
Philips ceramic

capacitor

16

17

(1) C
(2) C = 8.2 ±0.25 pF.
(3) L = 251 nH.

VCO

= 8.5 pF.

(3)(2)(1)

MGG099

16

17

(1) C
(2) C = 10 ±0.25 pF.
(3) L = 163 nH.

VCO

= 8.5 pF.

(3)(2)(1)

MGG099

16

17

(1) C
(2) C = 15 ±0.25 pF.
(3) L = 78 nH.

VCO

= 8.5 pF.

2222 632 51828 inside coil 15 pF (SMD; size: 0805)

(3)(2)(1)

MGG099

1999 Aug 26 27

Philips Semiconductors Product specification

Single standard VIF-PLL demodulator
and FM-PLL detector

PACKAGE OUTLINES

DIP20: plastic dual in-line package; 20 leads (300 mil)

D

seating plane

L

Z

20

e

b

TDA9801

SOT146-1

M

E

A

2

A

A

1

w M

b

1

11

c

(e )

1

M

H

pin 1 index

1

0 5 10 mm

scale

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

A

A

A

UNIT

inches

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

max.

mm

OUTLINE
VERSION

SOT146-1

1 2

min.

max.

1.73

1.30

0.068

0.051

IEC JEDEC EIAJ

b

b

1

0.53

0.38

0.021

0.015

REFERENCES

0.36

0.23

0.014

0.009

cD E e M

(1) (1)

26.92

26.54

1.060

1.045

SC603

6.40

6.22

0.25

0.24

E

10

(1)

M

e

L

1

3.60

3.05

0.14

0.12

8.25

7.80

0.32

0.31

EUROPEAN

PROJECTION

H

E

10.0

0.2542.54 7.62

8.3

0.39

0.010.10 0.30

0.33

ISSUE DATE

w

92-11-17
95-05-24

Z

max.

2.04.2 0.51 3.2

0.0780.17 0.020 0.13

1999 Aug 26 28

Philips Semiconductors Product specification

Single standard VIF-PLL demodulator
and FM-PLL detector

SO20: plastic small outline package; 20 leads; body width 7.5 mm

D

c

y

Z

20

11

TDA9801

SOT163-1

E

H

E

A

X

v M

A

pin 1 index

1

e

0 5 10 mm

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

mm

A

max.

2.65

0.10

A

1

0.30

0.10

0.012

0.004

A2A

2.45

2.25

0.096

0.089

0.25

0.01

b

0.49

0.36

p

cD

0.32

0.23

0.013

0.009

3

0.019

0.014

UNIT

inches

Note

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

10

w M

b

p

scale

(1)E(1) (1)

13.0

12.6

0.51

0.49

eHELLpQ

7.6

1.27

7.4

0.30

0.050

0.29

10.65

10.00

0.419

0.394

Q

A

2

0.055

A

1.4

1

detail X

1.1

1.1

1.0

0.4

0.043

0.043

0.039

0.016

(A )

L

p

L

0.25

0.01

A

3

θ

0.25 0.1

0.01

ywv θ

Z

0.9

0.4

0.035

0.004

0.016

o

8

o

0

OUTLINE
VERSION

SOT163-1

IEC JEDEC EIAJ

075E04 MS-013AC

REFERENCES

1999 Aug 26 29

EUROPEAN

PROJECTION

ISSUE DATE

95-01-24
97-05-22

Philips Semiconductors Product specification

Single standard VIF-PLL demodulator
and FM-PLL detector

SOLDERING
Introduction

Thistextgivesavery brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our

“Data Handbook IC26; Integrated Circuit Packages”

(document order number 9398 652 90011).
There is no soldering method that is ideal for all IC

packages. Wave soldering is often preferred when
through-holeandsurfacemountcomponentsaremixedon
one printed-circuit board. However, wave soldering is not
always suitable for surfacemount ICs, or for printed-circuit
boards with high population densities. In these situations
reflow soldering is often used.

Through-hole mount packages

SOLDERING BY DIPPING OR BY SOLDER WAVE
The maximum permissible temperature of the solder is

260 °C; solder at this temperature must not be in contact
with the joints for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.

The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (T
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.

MANUAL SOLDERING
Apply the soldering iron (24 V or less) to the lead(s) of the

package, either below the seating plane or not more than
2 mm above it. If the temperature of the soldering iron bit
is less than 300 °C it may remain in contact for up to
10 seconds. If the bit temperature is between
300 and 400 °C, contact may be up to 5 seconds.

Surface mount packages

REFLOW SOLDERING
Reflow soldering requires solder paste (a suspension of

fine solder particles, flux and binding agent) to be applied
tothe printed-circuit board by screen printing,stencillingor
pressure-syringe dispensing before package placement.

Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.

stg(max)

). If the

TDA9801

Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.

WAVE SOLDERING
Conventional single wave soldering is not recommended

forsurfacemountdevices(SMDs)orprinted-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.

To overcome these problems the double-wave soldering
method was specifically developed.

If wave soldering is used the following conditions must be
observed for optimal results:

• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.

• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint

longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;

– smaller than 1.27 mm, the footprint longitudinal axis

must be parallel to the transport direction of the
printed-circuit board.

The footprint must incorporate solder thieves at the
downstream end.

• Forpackageswithleadsonfoursides,the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.

During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

MANUAL SOLDERING
Fix the component by first soldering two

diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.

When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.

1999 Aug 26 30

Philips Semiconductors Product specification

Single standard VIF-PLL demodulator

TDA9801

and FM-PLL detector

Suitability of IC packages for wave, reflow and dipping soldering methods

MOUNTING PACKAGE

Through-hole mount DBS, DIP, HDIP, SDIP, SIL suitable
Surface mount BGA, SQFP not suitable suitable −

HLQFP, HSQFP, HSOP, HTQFP, HTSSOP,
SMS

(4)

PLCC
LQFP, QFP, TQFP not recommended
SSOP, TSSOP, VSO not recommended

Notes

1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the

2. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board.

3. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).

4. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.

5. Wave soldering is only suitable for LQFP, QFP and TQFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.

6. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.

, SO, SOJ suitable suitable −

“Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”

not suitable

SOLDERING METHOD

WAVE REFLOW

(2)

(3)

− suitable

suitable −

(4)(5)

suitable −

(6)

suitable −

(1)

DIPPING

.

DEFINITIONS

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

1999 Aug 26 31

Philips Semiconductors – a w orldwide compan y

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Middle East: see Italy

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For all other countries apply to: Philips Semiconductors,
International Marketing & Sales Communications, Building BE-p, P.O. Box 218,
5600 MD EINDHOVEN, The Netherlands, Fax. [phone]

© Philips Electronics N.V. SCA
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.

1999

Internet: http://www.semiconductors.philips.com

67

Printed in The Netherlands 545004/02/pp32 Date of release: 1999 Aug 26 Document order number: 9397 750 05292