Datasheet TDA9178T-N1, TDA9178-N1 Datasheet (Philips)

Page 1
DATA SH EET
Preliminary specification File under Integrated Circuits, IC02
1999 Sep 24
INTEGRATED CIRCUITS
TDA9178
YUV one chip picture improvement based on luminance vector-, colour vector- and spectral processor
Page 2
1999 Sep 24 2
Philips Semiconductors Preliminary specification
YUV one chip picture improvement based on luminance vector-, colour vector- and spectral processor
TDA9178
FEATURES
Picture content dependent non-linear Y, U and V processing by luminance histogram analysis
Variable gamma control
Adaptive black and white stretch control
Skin tone correction
Green enhancement
Blue stretch
Luminance Transient Improvement (LTI)
Smart peaking for detail enhancement
Colour Transient Improvement (CTI)
SCAn VElocity Modulation (SCAVEM) output
Line Width Control (LWC)
Video Dependent Coring (VDC)
Colour Dependent Sharpness (CDS)
Noise measurement
Feature Mode (FM) detector
Cue Flash (CF) detector
Three additional pins for access to 6-bit ADC and
I2C-bus
Adjustable chrominance delay
TV standard independent
I2C-bus controlled
1fH and 2f
H
DEmonstration MOde (DEMO).
GENERAL DESCRIPTION
The TDA9178 is a transparent analog video processor with YUV input and output interfaces. It offers three main functions: luminance vector processing, colour vector processing and spectral processing. Beside these three main functions, there are some additional functions.
In the luminancevector processor, the luminance transfer function is controlled in a non-linear way by the distribution, in 5 discrete histogram sections, of the luminance values measured in a picture. As a result, the contrast ratio of the most important parts of the scene will be improved. Black restoration is available in the event of a set-up in the luminance signal.
A variable gamma function, after the histogram conversion,offersthepossibilitiesofalternativebrightness control or factory adjustment of the picture tube.
The adaptive black stretch function of the TDA9178 offers the possibility of having a larger ‘weight’ for the black parts of the video signal; the white stretch function offers an additional overall gain for increased light production.
To maintain a proper colour reproduction, the saturation of theU- and V-colour difference signals is also controlledas a function of the actual non-linearity in the luminance channel.
In the colour vector processor, the dynamic skin tone correction locally changes the hue of colours that match skin tones to the correct hue. The green enhancement circuit activates medium saturated green towards to more saturated green. The blue stretch circuit can be activated which shifts colours near white towards blue.
The spectral processor provides 1D luminance transient improvement, luminance detail enhancement by smart peaking and a 1 D colour transient improvement. The TDA9178 can be used as a cost effective alternative to (but also in combination with) scan velocity modulation.
In the spectral processor line width control (or aperture control) can be user defined. The TDA9178 is capable of adjusting the amount of coring according to the video level with the video dependent coring. The TDA9178 is also capable to give extra sharpness in the cases of saturated red and magenta parts of the screen using the colour dependent sharpness feature.
An embedded noise detector measures noise during the field retrace in parts which are expected to be free from video or text information. With the noise detector a variety of ‘smart noise control’ architectures can be set up.
A feature mode detector is available for detecting signal sources like VCR (in still picture mode) that re-insert the levels of the retrace part. For this kind of signals the noise measurement of the TDA9178 is not reliable.
An output signal (on the I2C-bus and on a separate pin) is available that detects when the picture content has been changed significantly, called cue flash.
An embedded 6-bit ADC can be used for interfacing three analog low frequency voltage signals (e.g. ambient light control or beam current voltage level) to the I2C-bus.
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Philips Semiconductors Preliminary specification
YUV one chip picture improvement based on luminance vector-, colour vector- and spectral processor
TDA9178
In the demonstration mode all the features selected by the user are automatically toggled between on and off. The TDA9178 concept has a maximum flexibility which can be controlled by the embedded I2C-bus. The supply voltage
is 8 V. The device is mounted in a 24-lead SDIP package, or in a 24-lead SO package.
QUICK REFERENCE DATA
ORDERING INFORMATION
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
CC
supply voltage 7.2 8.0 8.8 V
V
i(Y)
luminance input voltage (excluding sync) AMS = 0 0.315 0.45 V
AMS = 1 1.0 1.41 V
V
i(UV)
UV input voltage −−1.9 V
V
FS(ADC)
full-scale ADC input voltage 2.0 V
TYPE
NUMBER
PACKAGE
NAME DESCRIPTION VERSION
TDA9178 SDIP24 plastic shrink dual in-line package; 24 leads (400 mil) SOT234-1 TDA9178T SO24 plastic small outline package; 24 leads; body width 7.5 mm SOT137-1
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1999 Sep 24 4
Philips Semiconductors Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
TDA9178
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BLOCK DIAGRAM
handbook, full pagewidth
MGR897
VIDEO DEPENDENT
CORING
LUMINANCE TRANSIENT
IMPROVEMENT
SMART PEAKING
COLOUR DEPENDENT
SHARPNESS
COLOUR
PROCESSING
SATURATION
CORRECTION
LUMINANCE
PROCESSING
OUTPUT
STAGE
COLOUR TRANSIENT
IMPROVEMENT
DELAY
CONTROL
YOUT UOUT VOUT
19
SOUT
21
CF
22
17 16
NOISE
MEASURING
FEATURE
MODE
DETECTION
INPUT STA GE
YIN UIN VIN
6
n.c.12n.c.
13
8 9
WINDOW
GENERATION
SC
1
SUPPL Y
V
CC
V
EE
20
15
18
SDA
14
ADR
7
SCL
11
ANALOG
TO
DIGITAL
CONVERTER
ADEXT1 ADEXT2 ADEXT3
3
n.c.
2
n.c.
23
n.c.
24
4 5
spectral processingluminance vector processing
colour vector
processing
black stretch histogram processing gamma control
skin tone correction green enhancement blue stretch
Y
U, V
cue flash
I2C-BUS CONTROL
DEC
DIG
CALIBRATE
TP
10
+
Fig.1 Block diagram.
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1999 Sep 24 5
Philips Semiconductors Preliminary specification
YUV one chip picture improvement based on luminance vector-, colour vector- and spectral processor
TDA9178
PINNING
SYMBOL PIN DESCRIPTION
SC 1 sandcastle input n.c. 2 not connected ADEXT1 3 ADC input 1 ADEXT2 4 ADC input 2 ADEXT3 5 ADC input 3 YIN 6 luminance input ADR 7 address selection input UIN 8 U signal input VIN 9 V signal input TP 10 test pin SCL 11 serial clock input (I
2
C-bus)
n.c. 12 not connected
n.c. 13 not connected SDA 14 serial data input/output (I
2
C-bus)
DEC
DIG
15 decoupling digital supply VOUT 16 V signal output UOUT 17 U signal output V
EE
18 ground YOUT 19 luminance output V
CC
20 supply voltage SOUT 21 SCAVEM output CF 22 cue flash output n.c. 23 not connected n.c. 24 not connected
SYMBOL PIN DESCRIPTION
Fig.2 Pin configuration (SOT234-1).
handbook, halfpage
SC
n.c. ADEXT1 ADEXT2 ADEXT3
YIN
ADR
UIN
VIN
TP
SCL
n.c.
n.c. n.c. CF SOUT
YOUT V
EE
V
CC
UOUT VOUT DEC
DIG
SDA n.c.
1 2 3 4 5 6 7 8
9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
TDA9178
MGR898
Fig.3 Pin configuration (SOT137-1).
handbook, halfpage
SC
n.c. ADEXT1 ADEXT2 ADEXT3
YIN
ADR
UIN VIN
TP
SCL
n.c.
n.c. n.c. CF SOUT
YOUT V
EE
V
CC
UOUT VOUT DEC
DIG
SDA n.c.
1 2 3 4 5 6 7 8
9 10 11 12
24 23 22 21 20 19 18 17
16 15 14 13
TDA9178T
MGR899
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Philips Semiconductors Preliminary specification
YUV one chip picture improvement based on luminance vector-, colour vector- and spectral processor
TDA9178
FUNCTIONAL DESCRIPTION Y input selection and amplification
The gain of the luminance input amplifier and output amplifier can be adjusted to signal amplitudes of
0.315 and 1.0 V typically (excluding sync) by I2C-bus bit AMS. The sync part is processed transparently to the output, independently of the feature settings. The Y, U and V input signals are clamped during the burstkey period, defined by the sandcastle reference and should be DC-coupled (the circuit uses internal clamp capacitors). During the clamp pulse (see Figs 7, 8, 9 and 10) an artificial black level is inserted in the Y input signal to correctly preset the internal circuitry.
Luminance vector processor
Intheluminancevectorprocessorthetransfer is controlled bya black stretch, the histogramprocessing and a gamma control circuit. The luminance vector processor also creates the cue flash signal.
BLACK STRETCH Ablack detector measures and stores thelevelof the most
black part of the scene within an internal defined fixed window in each field into a time constant. The time constant and the response time of the loop are internally fixed. Any difference between this value and the value measured during the clamp is regarded as black offset. In a closed loop offsets until a predefined value of the full­scale value are fed back to the input stage for compensation.The loop gain is afunction of the histogram and variable gamma settings. The black offset correction can be switched on and off by the I2C-bus bit BON. Related to the corrected black offset the nominal signal amplitude is set again to 100% full scale through an amplitude stretch function. Luminance values beyond full scale are unaffected. Additionally, the measured black offset is also used to set the adaptive black stretch gain (see also Section “Adaptive black stretch”).
HISTOGRAM PROCESSING For the luminance signal the histogram distribution is
measured in real-time over five segments within an internally defined fixed window in each field. During the period that the luminance is in one segment, a corresponding internal capacitor is loaded by a current source. At the end of the field five segment voltages are stored into on-board memories. The voltages stored in the memories determine the non-linear processing of the luminance signal to achieve a picture with a maximum of information (visible details).
Each field the capacitors are discharged and the measurement starts all over again.
Parts in the scene that do not contribute to the information inthatscene,likesub or side titles,should be omitted from the histogram measurement. No measurements are performed outside the internal fixed window period.
Very rapid picture changes, also related to the field interlace,canresultinflickereffects.The histogram values are averaged at the field rate thus cancelling the flicker effects.
Adaptive black stretch
The so-called adaptive black stretch gain is one of the factors that control the gamma of the picture. This gain is controlled by the measured black offset value in the black stretch circuit and theI2C-bus adaptive black stretchDAC: bits BT5 to BT0. For pictures with no black offset the black stretchgainequalsunitysothegammaisnotchanged and the DAC setting has no influence. In case of a black offset, the black stretch gain is increased so the gamma of the pictureis reduced. This procedure results in amaximumof visible details over the whole range of luminances. However, depending on personal taste, sometimes higher values of gamma are preferred. Therefore the amount of gamma reduction can be adjusted by the DAC.
Adaptive white-point stretching
Forpictureswithmany details in white parts, the histogram conversion procedure makes a transfer with large gain in the white parts. The amount of light coming out of the scene is reduced accordingly. The white stretcher introduces additional overall gain for increased light production, and so violating the principle of having a full-scale reference. The white-point stretching can be switched on or off by means of the I2C-bus bit WPO.
Standard deviation
Forscenesin which segments of the histogram distribution areverydominant with respect to the others, the non-linear amplification should be reduced in comparison to scenes with a flat histogram distribution. The standard deviation detectormeasuresthe spread of the histogram distribution and modulates the user setting of the non-linear amplifier.
Non-linear amplifier
Thestoredsegmentvoltagesdeterminetheindividualgain of each segment in such a way that continuity is granted for the complete luminance range.
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Philips Semiconductors Preliminary specification
YUV one chip picture improvement based on luminance vector-, colour vector- and spectral processor
TDA9178
The maximum and minimum gain of each segment is limited. Apart from the adaptive white-point stretching the black and white references are not affected by the non-linear processing. The amount of non-linearity can be controlled by the I2C-bus non-linearity DAC: bits NL5 to NL0.
VARIABLE GAMMA On top of the histogram conversion a variable gamma
function is applied for an alternative brightness control, or for factory adjustment. It is intended as an alternative for the DC-offset of the classic brightness user control. It maintains the black and white references. The gamma ranges from 0.5 to 1.5. The gamma can be set by the I2C-bus variable gamma DAC: bits VG5 to VG0.
CUE FLASH In the present TV environment there is a lot of measured
information like ambient light and noise. This information can be used to make an update of settings of the several algorithms after a picture has changed. The cue flash signal detects when a picture changes significantly. When the picture content has changed, the I2C-bus bit CF is set to logic 1 in the status register. After reading the status register, bit CF is reset to logic 0. On the output pin CF the cue flash information is present (active LOW) for only one line in the vertical retrace part. This pin is configured as an open drain output and therefore should be pulled up to the 5 V supply.
Spectral processor
In the spectral processor the luminance transfer is controlled by smart peaking, colour dependent sharpness and luminance transient improvement, defined by the sharpness improvement processor. The colour transfer is controlled by a colour transient improvement circuit; an additional output is available to provide a SCAVEM circuit.
ADJUSTABLE CHROMINANCE DELAY The colour vector processor drives a delay line for
correctingdelayerrors between the luminance input signal and the chrominance input signals (U and V). The chrominance delay can be adjusted in 6 steps of 12 ns (1fH) or 6 ns (2fH) by the I2C-bus bits CD2 to CD0.
SHARPNESS IMPROVEMENT PROCESSOR The sharpness improvement processor increases the
slope of large luminance transients of vertical objects and enhancestransientsof details in natural scenes by contour correction.
It comprises three main processing units: the step improvement processor, the contour processor and the smart sharpness controller.
Transient improvement processor
The step improvement processor (see Fig.11) comprises two main functions:
MINMAX generator
MINMAX fader.
The MINMAX generator utilizes all taps of an embedded luminance delay line to calculate the minimum and maximumenvelopeofallsignalsmomentarilystored in the delay line. The MINMAX fader chooses between the minimum and maximum envelopes, depending on the polarity of a decision signal derived from the contour processor. Figures 12, 13 and 14 show some waveforms of the step improvement processor and illustrate that fast transients result with this algorithm. The MINMAX generator also outputs a signal that represents the momentary envelope of the luminance input signal. This envelope information is used by the smart sharpness controller.
Line width control (also called aperture control) can be performed by I2C-bus line width DAC: bits LW5 to LW0. This control can be used to compensate for horizontal geometryerrorscausedby the gamma, for blooming of the spot of the CRT, or for compensating SCAVEM.
Contour processor
The contour processor comprises two contour generators with different frequency characteristics. The contour generator generates a second-order derivative of the incoming luminance signal which is supplied to the smart sharpness controller. In the smart sharpness controller, this signal is added to the properly delayed original luminance input signal, making up the peaking signal for detail enhancement. The peaking path features a low peaking frequency of 2 MHz (at 1fH), or a high peaking frequency of 3 MHz (at 1fH), selectable by I2C-bus bit CFS.
The contour generators utilize three taps of the embedded luminance delay line. Figure 15 illustrates the normalized frequency transfer of the filter.
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Philips Semiconductors Preliminary specification
YUV one chip picture improvement based on luminance vector-, colour vector- and spectral processor
TDA9178
Smart sharpness controller
The smart sharpness controller (see Fig.16) is a fader circuit that fades between peaked luminance and step-improved luminance, controlled by the output of a step discriminating device known as the step detector. It also contains a variable coring level stage.
The step detector is basically a differentiator, so both amplitude of the step and its slope add to the detection criterion. The smart sharpness controller has four user controls:
Steepness control, performed by the I2C-bus DAC: bits SP5 to SP0
Peaking control, performed by the I2C-bus DAC: bits PK5 to PK0
Video dependent coring, switched on or switched off by the I2C-bus bit VDC
Coring level control, performed by the I2C-bus DAC: bits CR5 to CR0.
Thesteepness setting controls the amountof steepness in the edge-correction processing path.
The peaking setting controls the amount of contour correction for proper detail enhancement. The envelope signal generated by the step improvement processor modulates the peaking setting in order to reduce the amount of peaking for large sine wave excursions.
With video dependent coring, it is possible to have more reduction of the peaking in the black parts of a scene than inthewhiteparts,andthereforeautomaticallyreducing the visibility of the background noise.
The coring setting controls the coring level in the peaking path for rejection of high-frequency noise.
All four settings facilitate reduction of the impact of the sharpness features, e.g. for noisy luminance signals.
COLOUR DEPENDENT SHARPNESS The colour dependent sharpness circuit increases the
luminance sharpness in saturated red and magenta parts of the screen. Because of the limited bandwidth of the colour signals, there is no need to increase the high frequenciesofthecolour signals. Instead, the details in the luminance signal will be enhanced. In this circuit a limited number of colours are enhanced (red and magenta). Contrarytonormal peaking algorithm, extra gain is applied for low frequencies (2 MHz at 1fH). This is needed, because the information that is lacking below 2 MHz (at 1fH) is most important. In large coloured parts the normal peaking is still active to enhance the fine details.
The smart peaking algorithm has been designed such that the luminance output amplitude will never exceed 110% of the luminance input signal amplitude. Therefore the normal peaking range (12 dB) will be reduced at large transients, and in case of colour dependent sharpness there is even more reduction.
However, by setting bit OSP (Overrule Smart Peaking) onecan undo the extra peaking reduction in case ofcolour dependant sharpness. It must be emphasized that setting OSP may lead to unwanted large luminance output signals, for instance in details in red coloured objects.
COLOUR TRANSIENT IMPROVEMENT The colour transient improvement circuit (see Fig.17)
increases the slope of the colour transients of vertical objects. Each channel of the CTI circuit basically consists oftwodelaycells:anelectronicpotentiometerandanedge detector circuit that controls the wiper position of the potentiometer.Normally the wiper of the potentiometerwill be in position B (mid position), so passing the input signal B to the output with a single delay. The control signal is obtained by the signals A and C.
When an edge occurs the value of the control signal will fade between +1 and 1 and finally will become zero again. A control signal value of +1 fades the wiper in position C, passing the two times delayed input signal to the output. A control signal of 1 fades the wiper in position A, so an undelayed input signal is passed to the output. The result is an output signal which has steeper edges than the input signal. Contrary to other existing CTI algorithms, the transients remain time correct with respect to the luminance signal, as the algorithm steepens edges proportionally, without discontinuity.
SCAVEM A luminance output is available for SCAVEM processing.
This luminance signal is not affected by the spectral processing functions.
Colour vector processor
The colour processing part contains skin tone correction, green enhancement and blue stretch. The colour vector processing is dependent on the amplitude and sign of the colour difference signals. Therefore, both the polarity and the nominal amplitude of the colour difference signals are relevant when using the colour vector processor facility.
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Philips Semiconductors Preliminary specification
YUV one chip picture improvement based on luminance vector-, colour vector- and spectral processor
TDA9178
SKIN TONE CORRECTION Skintones are very sensitive fortransmission (hue) errors,
because we have an absolute feeling for skin tones. To make a picture look free of hue error, the goal is to make sure that skin tones are put at a correct colour.
The dynamic skin tone correction circuit achieves this goal by instantaneously and locally changing the hue of those colours which are located in the area in the UV plane that matches skin tones (see Fig.4).
The correction is dependent on luminance, saturation and distance to the preferred axis and can be done towards twodifferentangles. The preferred angle can be chosen by bit ASK in the I2C-bus settings. The settings are 123° (ASK = 0) and 117° (ASK = 1). The enclosed correction area can be increasedto 140% with the I2C-bus bit SSK(so-called:Size). The enclosed detection ‘angle’ of the correcting area can be increased to 160% with the I2C-bus bit WSK (so-called: Width). The skin tone correction can be switched on or off with the I2C-bus bit DSK.
GREEN ENHANCEMENT The green enhancement circuit (see Fig.5) is intended to
shift low saturated green colours towards more saturated green colours. This shift is achieved by instantaneously andlocallychangingthosecolourswhicharelocatedinthe area in the UV plane that matches low saturated green. The saturation shift is dependent on the luminance, saturation and distance to the detection axis of 208°. The direction of shift in the colour is fixed by hardware. The amount of green enhancement can be increased to 160% by the I2C-bus bit GGR. The enclosed detection ‘angle’ of the correcting area can be increased to 160% withthe I2C-busbit WGR (so-called: Width). The enclosed correction area can be increasedto 140% with the I2C-bus bit SGR (so-called: Size). The green enhancement can be switched on or switched off with the I2C-bus bit DGR.
BLUE STRETCH The blue stretch circuit (see Fig.6) is intended to shift
colours near white towards more blueish coloured white to give a brighter impression. This shift is achieved by instantaneously and locally changing those colours which are located in the area in the UV plane that matches colours near white. The shift is dependent on the luminance and saturation. The direction of shift (towards an angle of 330°) in the colour is fixed by hardware. The amount of blue stretch can be increased to 160% by the I2C-bus bit GBL.
Theenclosed correction area can be increased to 140% by the I2C-bus bit SBL (so-called: Size). The blue stretch can be switched on or off by the I2C-bus bit DBL.
SATURATION CORRECTION The non-linear luminance processing done by the
histogram modification and variable gamma, influences the colour reproduction; mainly the colour saturation. Therefore, the U and V signals are linear processed for saturation compensation.
Noise measuring
A video line which is supposed to be free from video information(‘emptyline’)is used to measure the amount of noise. The measured RMS value of the noise can be used
for reducing several features, by the I
2
C-bus interface, such as luminance vector processing and spectral processing. For the TDA9178 the empty line is chosen three lines after recognition of the vertical blanking from the sandcastle pulse input. Figures 7, 8, 9 and 10 show the measurement locations for different broadcast norms.
The noise detector is capable of measuring the signal-to-noise ratio between 45 and 20 dB. The output scale runs linearly with dB. The noise samples are averagedforover20 fields to reduce the fluctuations in the measurement process. It is obvious, that for signal sources (like VCR in still picture mode) that re-insert the levels of the retrace part, the measurement is not reliable (see Section “Feature mode detector”). The result of the
averaging process will update the contents of the I
2
C-bus
register: bits ND5 to ND0 at a rate of
1
⁄32 of the field
frequency. If a register access conflict occurs, the data of the noise register is made invalid by setting the flag bit DV (Data Valid) to zero.
Feature mode detector
A detector is available for detecting signal sources (like VCR in still picture mode) that re-inserted the levels of the retrace part. For this kind of signals the noise measurement of the TDA9178 is not reliable, but this detector sets bit FM in the ND-register to logic 1. For normal video signals bit FM is set to logic 0. This circuit measures transients (like synchronization pulses) on the luminance input during the internal V-pulse. Thefeaturemodedetector is setting bit FM to logic 1 when no transients are present during 2 lines in the vertical retrace part over 3 fields (like the synchronization pulses).
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Philips Semiconductors Preliminary specification
YUV one chip picture improvement based on luminance vector-, colour vector- and spectral processor
TDA9178
Successive approximation ADC
Pins ADEXT1, ADEXT2 and ADEXT3 are connected to a 6-bit successive approximation ADC via a multiplexer. The multiplexertogglesbetweentheinputswitheachfield. At each field flyback, a conversion is started for two of the three inputs and the result is stored in the corresponding bus register ADEXT1, ADEXT2 or ADEXT3. The input pin ADEXT1 is updated every field, while input fields ADEXT2 and ADEXT3 are updated once in two consecutive fields (see Figs 7, 8, 9 and 10). Once in 32 fields the ADEXT2 input is not updated, because then the noise measurement is updated.
In this way, any slow varying analog signal can be given access to the I2C-bus. If a register access conflict occurs, the data of that register is made invalid by setting the flag bit DV (Data Valid) to zero.
Smart noise control
With the help of the internal noise detector and a user-preferred noise algorithm, the user can make a fully automatic I2C-bus feature reduction, briefly called ‘Smart Noise Control’.
Demonstration mode
By the I2C-bus bit DEM all the picture improvement features can be demonstrated in one picture. By setting bit DEM to logic 1, all the features selected bythe user are active for 5 s in 1fH mode (in 2fH mode: 2.5 s), and for another 5 s in 1fH mode (in 2fH mode: 2.5 s) all features selected are turned off (then the TDA9178 is ‘transparent’ to the incoming signal).
Internal window
To determine the histogram levels and the black offset the TDA9178 performs several measurements. An internally defined window serves to exclude parts in the scene like ‘subtitling’ or ‘logos’. The internal window can be regarded as a weighting function which has a value of one within a square near the centre of the screen and which gradually decreases to zero towards the edges.
When bit WLB (Window Letter Box) is made logic 1, the height of the window is reduced by a factor of
2
⁄3.
This prevents the contribution of the black bars above and below a 16 : 9 scene to the measurements.
I2C-bus
The I2C-bus is always instandby mode and responds on a properly addressed command. Bit PDD (Power-Down Detected) in the status register is set each time an interruptionofthe power supply occurs and is reset only by reading the status register. A 3-bit identification code can also be read from the status register, which code can be used to automatically configure the application by software.
The input control registers can be written sequentially by the I2C-bus by the embedded automatic subaddress increment feature or by addressing them directly. The output control functions cannot be addressed separately. Reading out the output control functions always starts at subaddress 00H and all subsequent words are read out by the automatic subaddress increment procedure.
The bits in the I2C-bus are preset to logic 0 at power-on except for bits AMS and VG5: therefore the TDA9178 is in
1.0 V luminance signal range and the variable gamma is set to 20H (gamma correction 0%).
I
2
C-BUS SPECIFICATION
The slave address of the IC is given in Table “Slave address”. If pin ADR of the TDA9178 is connected to ground, the I2C-bus address is 40H; if pin ADR is connected to pin DEC
DIG
, the I2C-bus address is E0H.
The circuit operates on clock frequencies up to 400 kHz.
Slave address
Auto-increment mode is available for subaddresses.
A6 A5 A4 A3 A2 A1 A0 R/W
ADR 1 ADR 0 0 0 0 X
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Philips Semiconductors Preliminary specification
YUV one chip picture improvement based on luminance vector-, colour vector- and spectral processor
TDA9178
Control functions
FUNCTIONS TYPE SUBADDRESS
DATA BYTE
D7 D6 D5 D4 D3 D2 D1 D0
Inputs
Control 1 REG 00 DEM VDC WLB FHS CFS LDH 0 AMS Control 2 01 0 0 OSP WPO 0 CD2 CD1 CD0 Control 3 02 SGR WGR GGR DGR SSK WSK ASK DSK Control 4 03 0 0 BON CTI CDS SBL GBL DBL Adaptive black stretch DAC 04 0 0 BT5 BT4 BT3 BT2 BT1 BT0 Non-linearity amplifier 05 0 0 NL5 NL4 NL3 NL2 NL1 NL0 Variable gamma 06 0 0 VG5 VG4 VG3 VG2 VG1 VG0 Peaking 07 0 0 PK5 PK4 PK3 PK2 PK1 PK0 Steepness 08 0 0 SP5 SP4 SP3 SP2 SP1 SP0 Coring 09 0 0 CR5 CR4 CR3 CR2 CR1 CR0 Line width 0A 0 0 LW5 LW4 LW3 LW2 LW1 LW0
Outputs
Status REG 00 X X X CF ID2 ID1 ID0 PDD Noise detection 01 FM DV ND5 ND4 ND3 ND2 ND1 ND0 ADEXT1 (output) 02 X DV AD5 AD4 AD3 AD2 AD1 AD0 ADEXT2 (output) 03 X DV AD5 AD4 AD3 AD2 AD1 AD0 ADEXT3 (output) 04 X DV AD5 AD4 AD3 AD2 AD1 AD0
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Philips Semiconductors Preliminary specification
YUV one chip picture improvement based on luminance vector-, colour vector- and spectral processor
TDA9178
Input signals Table 1 Amplitude mode selection
Table 2 Luminance determined histogram
Table 3 Contour filter selection
Table 4 Line frequency selection
Table 5 Window letterbox format
Table 6 Video dependent coring on/off
Table 7 Demonstration mode on/off
Table 8 Chrominance delay
Table 9 Overrule smart peaking
Table 10 White-point stretch on/off
Table 11 Dynamic skin tone on/off
Table 12 Dynamic skin tone angle
Table 13 Dynamic skin tone width
Table 14 Dynamic skin tone size
Table 15 Green enhancement on/off
AMS FUNCTION
0 0.315 V luminance (black to white) at
YIN
1 1.0 V luminance (black to white) at YIN
LDH FUNCTION
0 histogram segments fixed 1 histogram segments determinedby peak
white
CFS FUNCTION
0 peaking frequency is 2 MHz at 1f
H
or
4 MHz at 2f
H
1 peaking frequency is 3 MHz at 1fHor
6 MHz at 2f
H
FHS FUNCTION
01f
H
12f
H
WLB FUNCTION
0 normal internal window format 1 ‘Letterbox’ internal window format
VDC FUNCTION
0 video dependent coring off 1 video dependent coring on
DEM FUNCTION
0 DEMO off 1 DEMO on: auto-toggle selected features
on/off (cycle is 10 s at 1fHor 5 s at 2fH)
CD2 CD1 CD0 FUNCTION
0 0 0 40 ns at 1f
H
or 20 ns at 2f
H
11132 ns at 1fHor +16 ns at 2f
H
OSP FUNCTION
0 smart peaking (maximum peaking
reduced if Coxing)
1 overrule smart peaking
WPO FUNCTION
0 white-point stretch on 1 white-point stretch off
DSK FUNCTION
0 skin tone off 1 skin tone on
ASK FUNCTION
0 angle correction 123° 1 angle correction 117°
WSK FUNCTION
0 default detection angle 1 60% increased detection angle
SSK FUNCTION
0 default area 1 40% increased area
DGR FUNCTION
0 green enhancement off 1 green enhancement on
Page 13
1999 Sep 24 13
Philips Semiconductors Preliminary specification
YUV one chip picture improvement based on luminance vector-, colour vector- and spectral processor
TDA9178
Table 16 Green enhancement gain
Table 17 Green enhancement width
Table 18 Green enhancement size
Table 19 Blue stretch on/off
Table 20 Blue stretch gain
Table 21 Blue stretch size
Table 22 Colour dependent sharpness on/off
Table 23 Colour transient improvement on/off
GGR FUNCTION
0 default enhancement 1 60% increased gain
WGR FUNCTION
0 default detection angle 1 60% increased detection angle
SGR FUNCTION
0 default area 1 40% increased area
DBL FUNCTION
0 blue stretch off 1 blue stretch on
GBL FUNCTION
0 default gain 1 60% increased gain
SBL FUNCTION
0 default area 1 40% increased area
CDS FUNCTION
0 colour dependent sharpness off 1 colour dependent sharpness on
CTI FUNCTION
0 colour transient improvement off 1 colour transient improvement on
Table 24 Black offset compensation on/off
Table 25 Adaptive black stretch
Table 26 Non-linearity amplifier
Table 27 Variable gamma
Table 28 Peaking amplitude
Table 29 Steepness correction
Table 30 Coring level
BON FUNCTION
0 black offset compensation off 1 black offset compensation on
BT5 BT4 BT3 BT2 BT1 BT0 FUNCTION
0000000% 111111100%
NL5 NL4 NL3 NL2 NL1 NL0 FUNCTION
0000000% 111111100%
VG5 VG4 VG3 VG2 VG1 VG0 FUNCTION
000000100% 111111100%
PK5 PK4 PK3 PK2 PK1 PK0 FUNCTION
0000000% 111111100%
SP5 SP4 SP3 SP2 SP1 SP0 FUNCTION
0000000% 111111100%
CR5 CR4 CR3 CR2 CR1 CR0 FUNCTION
0000000% 11111130%
Page 14
1999 Sep 24 14
Philips Semiconductors Preliminary specification
YUV one chip picture improvement based on luminance vector-, colour vector- and spectral processor
TDA9178
Table 31 Line width correction
Output signals Table 32 Power-down detection
Table 33 Identification code
Table 34 Cue flash
LW5 LW4 LW3 LW2 LW1 LW0 FUNCTION
00000033% duty
factorat 2 MHz sine wave/1f
H
11111167% duty
factorat 2 MHz sine wave/1f
H
PDD FUNCTION
0 no power-down detected since last read 1 power-down detected
ID2 ID1 ID0 FUNCTION
0 1 0 TDA9178/N1
CF FUNCTION
0 no cue flash since last read 1 cue flash detected
Table 35 Noise detector
Table 36 ADEXT1, ADEXT2 and ADEXT3
Table 37 Data valid bit of
noise detector/ADEXT1, 2 and 3 registers
Table 38 Feature mode detector
ND5 ND4 ND3 ND2 ND1 ND0 FUNCTION
00000045 dB 11111120 dB
AD5 AD4 AD3 AD2 AD1 AD0 FUNCTION
000000external
voltage = 0 V
111111external
voltage = 2 V
DV FUNCTION
0 data not valid because of possible register
access collision
1 data is valid
FM FUNCTION
0 normal video signal detected 1 feature mode detected (noise detector is
not reliable)
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134); all voltages referenced to ground.
HANDLING
All pins are protected against ESD by means of internal clamping diodes. The protection circuit meets the following specification:
Human body model: C = 100 pF; R = 1.5 k; all pins >3000 V Machine model: C = 200 pF; R = 0 ; all pins >200 V.
At an ambient temperature of 90 °C, all pins meet the following specification:
I
trigger
> 100 mA or V
pin
> 1.5V
CC(max)
I
trigger
< 100 mA or V
pin
< 0.5V
CC(max)
SYMBOL PARAMETER MIN. MAX. UNIT
V
CC
supply voltage 0.5 +8.8 V
V
n
voltage on any pin 0.5 VCC+ 0.5 V
T
stg
storage temperature 55 +150 °C
T
amb
operating ambient temperature 10 +70 °C
T
j
operating junction temperature 150 °C
Page 15
1999 Sep 24 15
Philips Semiconductors Preliminary specification
YUV one chip picture improvement based on luminance vector-, colour vector- and spectral processor
TDA9178
THERMAL CHARACTERISTICS
QUALITY SPECIFICATION
In accordance with
“SNW-FQ-611 part E”
.
CHARACTERISTICS
VCC=8V; T
amb
=25°C; unless otherwise specified.
SYMBOL PARAMETER CONDITIONS VALUE UNIT
R
th(j-a)
thermal resistance from junction to ambient in free air
TDA9178 (SDIP24) 56 K/W TDA9178T (SO24) 65 K/W
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Supply
S
UPPLY VOLTAGE (PIN V
CC
)
V
CC
supply voltage 7.2 8.0 8.8 V
I
CC
supply current 1fH mode 100 mA
2f
H
mode 105 mA
DIGITAL SUPPLY DECOUPLING (PIN DEC
DIG
)
V
DECDIG
decoupling voltage 5 V
I
DECDIG
decoupling load current −−1mA
Input and output selection
LUMINANCE INPUT (PIN YIN) V
i(Y)
input voltage (excluding sync) AMS = 0 0.315 0.45 V
AMS = 1 1.0 1.41 V
I
i(bias)(Y)
input bias current no clamp −−0.1 µA LUMINANCE OUTPUT (PIN YOUT) V
o(cl)
output voltage level during
clamping
AMS = 1 2.7 V AMS = 0 0.8 V
G
Y(i-o)
luminance gain input to output transparent
at AMS = 1; at 1 V (p-p)
0.93 1.04 1.15
transparent at AMS = 0; at 0.3 V (p-p)
0.96 1.07 1.18
S/N(Y) signal-to-noise ratio of luminance
output
transparent 52 −−dB
B
Y
luminance bandwidth 1fH mode (1 dB);
transparent
5 −−MHz
2f
H
mode (1 dB);
transparent
6 −−MHz
E
bl
black level error transparent 1.0 0 +1.0 %
Page 16
1999 Sep 24 16
Philips Semiconductors Preliminary specification
YUV one chip picture improvement based on luminance vector-, colour vector- and spectral processor
TDA9178
R
o
output resistance −−150 I
o(bias)
output bias current 1.3 −−mA C
L
load capacitance −−15 pF COLOUR DIFFERENCE INPUTS U AND V(PINS UIN AND VIN) V
i(U)(p-p)
input voltage U
(peak-to-peak value)
1.33 1.9 V
V
i(V)(p-p)
input voltage V
(peak-to-peak value)
1.05 1.9 V
I
i(bias)
input bias current no clamp −−0.1 µA COLOUR DIFFERENCE OUTPUTS U AND V(PINS UOUT AND VOUT) V
o(cl)
output voltage level during
clamping
2.7 V
G
UV(i-o)
gain inputs to output transparent 0.90 1.00 1.10 E
offset
offset error transparent 1 0 +1 % G
track
UV gain tracking error transparent −−5% B
UV
bandwidth 1fH mode;
transparent (3 dB)
2.5 −−MHz
2f
H
mode;
transparent (3 dB)
5 −−MHz
R
o
output resistance −−150 I
o(bias)
output bias current 1.3 −−mA C
L
load capacitance −−15 pF
Luminance vector processing
BLACK STRETCH BLOS
cor(i)
input black offset correction 8 10 12 % HISTOGRAM
White-point stretch
G
WP(max)
maximum luminance gain for white
stretch
maximum non-linearity setting gain
1.1
Non-linear amplifier
G
nla(min)
minimum segment gain maximum non-linearity
setting gain
0.4
G
nla(max)
maximum segment gain maximum non-linearity
setting gain
2.0
G
nla
non-linear control curve 63 steps 0 to 100 % VARIABLE GAMMA G
g(var)(min)L
minimum variable gamma setting 0.5 G
g(var)(max)
maximum variable gamma setting 1.5 G
nla
non-linear control curve 63 steps 0 to 100 %
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Page 17
1999 Sep 24 17
Philips Semiconductors Preliminary specification
YUV one chip picture improvement based on luminance vector-, colour vector- and spectral processor
TDA9178
Colour vector processing
SKIN TONE; note 1 and Fig.4
ϕ
cor
correction angle ASK = 0; DSK = 1 123 deg
ASK = 1; DSK = 1 117 deg
ϕ
ap
correction range (or aperture angle) DSK = 1; SSK = 1;
WSK = 0
45 deg
GREEN ENHANCEMENT; note 1 and Fig.5
ϕ
cor
correction angle DGR = 1 208 deg
ϕ
ap
correction range (or aperture angle) DGR = 1; SGR = 0;
WGR = 0
45 deg
BLUE STRETCH; note 2 and Fig.6
ϕ
(str)
stretch angle DBL = 1 330 deg
Spectral processing
GENERAL Q
max
maximum contour amplitude at
centre frequency
note 3 12 dB
Contour filter low frequency peaking
f
pc(l)
peaking centre frequency 1fH mode; CFS = 0 2.0 MHz
2f
H
mode; CFS = 0 4.0 MHz
Contour filter high frequency peaking
f
pc(h)
peaking centre frequency 1fH mode; CFS = 1 3.0 MHz
2f
H
mode; CFS = 1 6.0 MHz
Step detector
f
dc
detection centre frequency 1fH mode 1.18 MHz
2f
H
mode 2.36 MHz PEAKING G
PK
peaking control curve 63 steps 0 to 100 % CORING G
CR
coring control curve 63 steps 0to45 % LUMINANCE TRANSIENT IMPROVEMENT t
r(min)
minimum rise time 10% to 90% note 4 30 ns G
SP
steepness control curve 63 steps 0 to 100 %
Line width control
t
sd(max)
maximum step displacement 1fH mode 140 ns
2f
H
mode 70 ns
G
LW
line width control curve (duty factor) 63 steps at 1 MHz
sine wave at 1f
H
33 to 67 %
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Page 18
1999 Sep 24 18
Philips Semiconductors Preliminary specification
YUV one chip picture improvement based on luminance vector-, colour vector- and spectral processor
TDA9178
COLOUR TRANSIENT IMPROVEMENT t
r(min)
minimum rise time 10% to 90% note 5 50 ns COLOUR DEPENDENT SHARPNESS f
pc
peaking centre frequency 1fH mode 2.0 MHz
2f
H
mode 4.0 MHz
Q
max
maximum contour amplitude at
centre frequency
note 3 6 dB
SCAVEM
SCAVEM OUTPUT (PIN SOUT) V
o(cl)
output voltage level during
clamping
2.2 V
G
Y
gain luminance input to SCAVEM
output
0.93 1.04 1.15
B
Y
bandwidth 1fH mode (1 dB) 5 −−MHz
2f
H
mode (1 dB) 6.0 −−MHz
R
o
output resistance −−150 I
o(bias)
output bias current 0.8 −−mA C
L
load capacitance −−15 pF t
d(SOUT-YOUT)
delay w.r.t. YOUT −−20 ns
Successive approximation ADC
ADC INPUTS (PINS ADEXT1, ADEXT2 AND ADEXT3) V
FS
full-scale input voltage range with respect to ground 2.0 V I
i(bias)
input bias current −−0.1 µA RES data path resolution 6 bit DLE differential linearity error −−1 LSB ILE integral linearity error −−1 LSB f
con
conversion frequency ADEXT1 1f
V
Hz
ADEXT2; ADEXT3 0.5f
V
Hz
Q
adt
conversion time (video lines) each channel 8 lines
Timing
SANDCASTLE INPUT (PIN SC) I
i(bias)
input bias current −−1µA V
sc(bn)
detection level for blank no clamping 0.9 1.15 1.40 V V
sc(bc)
detection level for clamp 0.9V
top
V
t
W(bk)
burst key pulse width 1fH mode 1.8 −−µs
2f
H
mode 0.9 −−µs
t
V
vertical retrace time 6 −−lines V
bk(var)(p-p)
ripple on sandcastle burst key level
(peak-to-peak value)
−−0.04V
top
V
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Page 19
1999 Sep 24 19
Philips Semiconductors Preliminary specification
YUV one chip picture improvement based on luminance vector-, colour vector- and spectral processor
TDA9178
Notes
1. The amount of correction depends on the parameters of the incoming YUVsignals; therefore it is not possible to give exact figures for the correction angle. The aperture angle of the correction range of 45° (±22.5°) is just given as an indication and is valid for an input signal with a luminance signal amplitude of 75% and a colour saturation of 50%.
2. The amount of correction depends on the parameters of the incoming YUVsignals; therefore it is not possible to give exact figures for the correction angle.
3. The contour signal cannot be measured separately from the luminance input signal. The contour signal is also processed by the smart noise controller. The frequency transfer in the peaking mode of the luminance signal can be derived from the frequency transfer of the selected contour signal, taking into account the summation of the contour signal and the luminance input signal. The frequency transfer is most easily measured by sine excitation with a relatively small signal amplitude of 10% of the selected dynamic range of the luminance input, to avoid interaction with the step detector.
4. Peaking set to minimum. Input signal is a sine wave with the nominal peak-to-peak amplitude corresponding to the selected input range.
5. Input signal is a 250 kHz block with a rise time of 260 ns and a nominal peak-to-peak amplitude corresponding to the selected input range.
Overall output group delay performance
t
d(YUV)
input to output delay of YUV signals 1fH mode; transparent 300 ns
2f
H
mode; transparent 180 ns
t
dm(UV-Y)
adjustment delay U and V signals w.r.t. Y signal
1fH mode; transparent 32 0 +40 ns 2f
H
mode; transparent 16 0 +20 ns
Noise measurement
R
noise
range of noise detector see Figure 18 45 −−20 dB
t
con
conversion time 32f
V
s
Cue flash
CUE FLASH OUTPUT (PIN CF); OPEN COLLECTOR
V
o(max)
maximum output voltage pull-up to external
supply
−−5.5 V
I
sink(max)
maximum sink current −−1mA
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Page 20
1999 Sep 24 20
Philips Semiconductors Preliminary specification
YUV one chip picture improvement based on luminance vector-, colour vector- and spectral processor
TDA9178
Fig.4 Skin tone correction range for a correction angle of 123°.
handbook, full pagewidth
MGR900
V
U
red
I-axis
fully saturated colours
yellow
Fig.5 Green enhancement correction range.
handbook, full pagewidth
MGR901
V
U
green
detection-axis
fully saturated colours
yellow
Page 21
1999 Sep 24 21
Philips Semiconductors Preliminary specification
YUV one chip picture improvement based on luminance vector-, colour vector- and spectral processor
TDA9178
Fig.6 Blue stretch correction range.
handbook, full pagewidth
MGR902
V
U
cyan
detection-axis
fully saturated colours
blue
Page 22
1999 Sep 24 22
Philips Semiconductors Preliminary specification
YUV one chip picture improvementbased on luminance
vector-, colour vector- and spectral processor
TDA9178
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handbook, full pagewidth
MGR903
noise detector measuring
ADEXT1 conversion
ADEXT2, ADEXT3 conversion
cue flash output
internal V-pulse + FM detection
burst key pulse
clamping pulse
video input
sandcastle input
NTSC-signal, field A
Fig.7 Timing pulses for NTSC input signal, field A.
Page 23
1999 Sep 24 23
Philips Semiconductors Preliminary specification
YUV one chip picture improvementbased on luminance
vector-, colour vector- and spectral processor
TDA9178
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handbook, full pagewidth
MGR904
noise detector measuring
ADEXT1 conversion
ADEXT2, ADEXT3 conversion
cue flash output
internal V-pulse + FM detection
burst key pulse
clamping pulse
video input
sandcastle input
NTSC-signal, field B
Fig.8 Timing pulses for NTSC input signal, field B.
Page 24
1999 Sep 24 24
Philips Semiconductors Preliminary specification
YUV one chip picture improvementbased on luminance
vector-, colour vector- and spectral processor
TDA9178
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handbook, full pagewidth
PAL-signal, field A
noise detector measuring
ADEXT1 conversion
ADEXT2, ADEXT3 conversion
cue flash output
internal V-pulse + FM detection
burst key pulse
clamping pulse
video input
sandcastle input
MGR933
Fig.9 Timing pulses for PAL and SECAM input signal, field A.
Page 25
1999 Sep 24 25
Philips Semiconductors Preliminary specification
YUV one chip picture improvementbased on luminance
vector-, colour vector- and spectral processor
TDA9178
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handbook, full pagewidth
MGR934
PAL-signal, field B
noise detector measuring
ADEXT1 conversion
ADEXT2, ADEXT3 conversion
cue flash output
internal V-pulse + FM detection
burst key pulse
clamping pulse
video input
sandcastle input
Fig.10 Timing pulses for PAL and SECAM input signal, field B.
Page 26
1999 Sep 24 26
Philips Semiconductors Preliminary specification
YUV one chip picture improvement based on luminance vector-, colour vector- and spectral processor
TDA9178
Fig.11 Block diagram of the step improvement processor.
handbook, full pagewidth
MGR905
MINMAX
SELECTOR
MINMAX
Y
envelope
Y
step
CLAMPS
FADER
line width
control
DELAY
Y
in
Fig.12 Response signals for maximum step improvement, no peaking and nominal line width.
handbook, halfpage
0 0.5
1000
800
200
0
400
600
MGR906
1.0 1.5 2.0
t (µs)
(1)
(2)
V
o
(mV)
(1) 90% of nominal amplitude. (2) 30% of nominal amplitude.
Page 27
1999 Sep 24 27
Philips Semiconductors Preliminary specification
YUV one chip picture improvement based on luminance vector-, colour vector- and spectral processor
TDA9178
Fig.13 Response signals for maximum step improvement, no peaking and minimum line width.
handbook, halfpage
0 0.5
1000
800
200
0
400
600
1.0 1.5 2.0
t (µs)
V
o
(mV)
(1)
(2)
MGR907
(1) 90% of nominal amplitude. (2) 30% of nominal amplitude.
Fig.14 Response signals for maximum step improvement, no peaking and maximum line width.
handbook, halfpage
0 0.5
1000
800
200
0
400
600
1.0 1.5 2.0
t (µs)
V
o
(mV)
(1)
(2)
MGR908
(1) 90% of nominal amplitude. (2) 30% of nominal amplitude.
Page 28
1999 Sep 24 28
Philips Semiconductors Preliminary specification
YUV one chip picture improvement based on luminance vector-, colour vector- and spectral processor
TDA9178
Fig.15 Frequency transfers of contour filter at f = 2.0 MHz.
handbook, halfpage
100
0
MGR909
10
5
10
6
10
7
20
40
60
80
f (Hz)
contour
(%)
(1)
(2)
(1) 1fHmode. (2) 2fHmode.
Fig.16 Block diagram of smart sharpness controller.
handbook, full pagewidth
MGR910
STEP
DETECTOR
FADER
CORING
Y
envelope
Y
step
Y
contour
Y
step
Y
c
delay
cells
coring
control
peaking
control
steepness
control
Page 29
1999 Sep 24 29
Philips Semiconductors Preliminary specification
YUV one chip picture improvement based on luminance vector-, colour vector- and spectral processor
TDA9178
Fig.17 Block diagram of colour transient improvement.
handbook, halfpage
MGR911
DELAY DELAY
control
AC
B
UV
in
UV
out
Fig.18 Typical noise measurement curve of input noise (dB) versus DAC-value.
handbook, halfpage
MGR912
50 40 30 10
80
60
20
0
40
20
S/N (dB)
DAC­value
Page 30
1999 Sep 24 30
Philips Semiconductors Preliminary specification
YUV one chip picture improvement based on luminance vector-, colour vector- and spectral processor
TDA9178
TEST AND APPLICATION INFORMATION
The TDA9178 is especially designed for YUV applications. A typical application diagram is shown in Fig.19.
Fig.19 YUV application.
handbook, full pagewidth
MGR913
100
10 µF
100 nF
100
nF
TDA9178
12 13
n.c.
14
SDA
n.c.
223
n.c.
24
n.c.
n.c.
10 15
DEC
DIG
16
VOUT
VOUT
TP
11
SCL
SDA
100
100 k
SCL
9
VIN
VIN
17
UOUT
UOUT
21
SOUT
SOUT
22
CF
CF
YOUT
0 V
8 V
8
UIN
UIN
YIN
18
V
EE
7
ADR
19
YOUT
6
YIN
sandcastle
1
SC
20
V
CC
ADEXT3
5
ADEXT3
100 k
ADEXT2
4
ADEXT2
100 k
ADEXT1
3
ADEXT1
1
0
Page 31
1999 Sep 24 31
Philips Semiconductors Preliminary specification
YUV one chip picture improvement based on luminance vector-, colour vector- and spectral processor
TDA9178
PACKAGE OUTLINES
UNIT b
1
cEe M
H
L
REFERENCES
OUTLINE VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC JEDEC EIAJ
mm
DIMENSIONS (mm are the original dimensions)
SOT234-1
92-11-17 95-02-04
b
max.
w
M
E
e
1
1.3
0.8
0.53
0.40
0.32
0.23
22.3
21.4
9.1
8.7
3.2
2.8
0.181.778 10.16
10.7
10.2
12.2
10.5
1.6
4.7 0.51 3.8
M
H
c
(e )
1
M
E
A
L
seating plane
A
1
w M
b
1
e
D
A
2
Z
24
1
13
12
b
E
pin 1 index
0 5 10 mm
scale
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
(1) (1)
D
(1)
Z
A
max.
12
A
min.
A
max.
SDIP24: plastic shrink dual in-line package; 24 leads (400 mil)
SOT234-1
Page 32
1999 Sep 24 32
Philips Semiconductors Preliminary specification
YUV one chip picture improvement based on luminance vector-, colour vector- and spectral processor
TDA9178
UNIT
A
max.
A1A2A
3
b
p
cD
(1)E(1) (1)
eHELLpQ
Z
ywv θ
REFERENCES
OUTLINE VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC JEDEC EIAJ
mm
inches
2.65
0.30
0.10
2.45
2.25
0.49
0.36
0.32
0.23
15.6
15.2
7.6
7.4
1.27
10.65
10.00
1.1
1.0
0.9
0.4
8 0
o o
0.25 0.1
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
1.1
0.4
SOT137-1
X
12
24
w M
θ
A
A
1
A
2
b
p
D
H
E
L
p
Q
detail X
E
Z
c
L
v M
A
13
(A )
3
A
y
0.25
075E05 MS-013AD
pin 1 index
0.10
0.012
0.004
0.096
0.089
0.019
0.014
0.013
0.009
0.61
0.60
0.30
0.29
0.050
1.4
0.055
0.419
0.394
0.043
0.039
0.035
0.016
0.01
0.25
0.01
0.004
0.043
0.016
0.01
e
1
0 5 10 mm
scale
SO24: plastic small outline package; 24 leads; body width 7.5 mm
SOT137-1
95-01-24 97-05-22
Page 33
1999 Sep 24 33
Philips Semiconductors Preliminary specification
YUV one chip picture improvement based on luminance vector-, colour vector- and spectral processor
TDA9178
SOLDERING Introduction
Thistextgivesaverybriefinsighttoa complex technology. A more in-depth account of soldering ICs can be found in our
“Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011). There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when through-holeand surface mount components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used.
Through-hole mount packages
SOLDERING BY DIPPING OR BY SOLDER WAVE The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact with the joints for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds.
The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (T
stg(max)
). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit.
MANUAL SOLDERING Apply the soldering iron (24 V or less) to the lead(s) of the
package, either below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 °C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 °C, contact may be up to 5 seconds.
Surface mount packages
REFLOW SOLDERING Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied totheprinted-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement.
Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method.
Typical reflow peak temperatures range from 215 to 250 °C. The top-surface temperature of the packages should preferable be kept below 230 °C.
WAVE SOLDERING Conventional single wave soldering is not recommended
forsurfacemountdevices(SMDs)orprinted-circuitboards with a high component density, as solder bridging and non-wetting can present major problems.
To overcome these problems the double-wave soldering method was specifically developed.
If wave soldering is used the following conditions must be observed for optimal results:
Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave.
For packages with leads on two sides and a pitch (e): – larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board;
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the printed-circuit board.
The footprint must incorporate solder thieves at the downstream end.
Forpackageswithleadsonfoursides,thefootprintmust be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners.
During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured.
Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications.
MANUAL SOLDERING Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C.
When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C.
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1999 Sep 24 34
Philips Semiconductors Preliminary specification
YUV one chip picture improvement based on luminance vector-, colour vector- and spectral processor
TDA9178
Suitability of IC packages for wave, reflow and dipping soldering methods
Notes
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the
“Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”
.
2. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board.
3. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
4. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners.
5. Wave soldering is only suitable for LQFP, QFP and TQFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
6. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
MOUNTING PACKAGE
SOLDERING METHOD
WAVE REFLOW
(1)
DIPPING
Through-hole mount DBS, DIP, HDIP, SDIP, SIL suitable
(2)
suitable
Surface mount BGA, LFBGA, SQFP, TFBGA not suitable suitable
HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS
not suitable
(3)
suitable
PLCC
(4)
, SO, SOJ suitable suitable
LQFP, QFP, TQFP not recommended
(4)(5)
suitable
SSOP, TSSOP, VSO not recommended
(6)
suitable
Page 35
1999 Sep 24 35
Philips Semiconductors Preliminary specification
YUV one chip picture improvement based on luminance vector-, colour vector- and spectral processor
TDA9178
DEFINITIONS
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
PURCHASE OF PHILIPS I
2
C COMPONENTS
Data sheet status
Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
Purchase of Philips I
2
C components conveys a license under the Philips’ I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011.
Page 36
© Philips Electronics N.V. SCA All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Internet: http://www.semiconductors.philips.com
1999
68
Philips Semiconductors – a w orldwide compan y
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Printed in The Netherlands 545004/01/pp36 Date of release: 1999 Sep 24 Document order number: 9397 750 04621
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