Datasheet TDA8920BJ, TDA8920BTH Datasheet (Philips) [ru]

Page 1

TDA8920B

2 × 100 W class-D power ampliﬁer

Rev. 01 — 1 October 2004 Preliminary data sheet

1. General description

The TDA8920B is a high efﬁciency class-D audio power ampliﬁer with very low dissipation. The typical output power is 2 × 100 W.

The device is available in the HSOP24 power package and in the DBS23P through-hole power package. The ampliﬁer operates over a wide supply voltage range from ±12.5 V to ±30 V and consumes a very low quiescent current.

2. Features

■ Zero dead time switching

■ Advanced current protection: output current limiting

■ Smooth start-up: no pop-noise due to DC offset

■ High efﬁciency

■ Operating supply voltage from ±12.5 V to ±30 V

■ Low quiescent current

■ Usable as a stereo Single-Ended (SE) ampliﬁer or as a mono ampliﬁer in Bridge-Tied

Load (BTL)

■ Fixed gain of 30 dB in Single-Ended (SE) and 36 dB in Bridge-Tied Load (BTL)

■ High output power

■ High supply voltage ripple rejection

■ Internal switching frequency can be overruled by an external clock

■ Full short-circuit proof across load and to supply lines

■ Thermally protected.

3. Applications

■ Television sets

■ Home-sound sets

■ Multimedia systems

■ All mains fed audio systems

■ Car audio (boosters).

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Philips Semiconductors

4. Quick reference data

Table 1: Quick reference data

Symbol Parameter Conditions Min Typ Max Unit

General; V

q(tot)

Stereo single-ended conﬁguration

Mono bridge-tied load conﬁguration

= ±27 V

supply voltage ±12.5 ±27 ±30 V total quiescent

supply current

output power RL=3Ω; THD = 10 %; VP= ±27 V - 110 - W

output power RL=6Ω; THD = 10 %; VP= ±27 V - 210 - W

5. Ordering information

TDA8920B

2 × 100 W class-D power ampliﬁer

no load; no ﬁlter; no RC-snubber network connected

=4Ω; THD = 10 %; VP= ±27 V - 86 - W

-5065mA

Table 2: Ordering information

Type number Package

Name Description Version

TDA8920BTH HSOP24 plastic, heatsink small outline package; 24 leads; low

stand-off height

TDA8920BJ DBS23P plastic DIL-bent-SIL power package; 23 leads (straight

lead length 3.2 mm)

SOT566-3

SOT411-1

Preliminary data sheet Rev. 01 — 1 October 2004 2 of 34

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Philips Semiconductors

6. Block diagram

TDA8920B

2 × 100 W class-D power ampliﬁer

DDA2

3 (20)

9 (3)

IN1M

IN1P

SGND1

OSC

MODE

SGND2

IN2P

IN2M

8 (2)

11 (5)

7 (1)

6 (23)

2 (19)

5 (22)

4 (21)

SSA2

INPUT

STAGE

mute

MODE

mute

INPUT

STAGE

1 (18)

Pin numbers in parenthesis refer to the TDA8920BJ.

Fig 1. Block diagram.

DDA1

10 (4)

OSCILLATOR

12 (6)

SSA1

PWM

MODULATOR

STABI

MANAGER

PWM

MODULATOR

PROTSTABI

RELEASE1

SWITCH1 ENABLE1

TEMPERATURE SENSOR

CURRENT PROTECTION VOLTAGE PROTECTION

ENABLE2

SWITCH2

RELEASE2

19 (-)24 (17)

SSD

n.c.

CONTROL

AND

HANDSHAKE

CONTROL

AND

HANDSHAKE

DDP2

23 (16)13 (7)18 (12) 14 (8)

DRIVER

HIGH

DRIVER

LOW

TDA8920BTH (TDA8920BJ)

DRIVER

HIGH

DRIVER

LOW

17 (11)

SSP1

DDP1

SSP1

DDP2

SSP2

15 (9)

16 (10)

22 (15)

21 (14)

20 (13)

BOOT1

OUT1

BOOT2

OUT2

coa023

Preliminary data sheet Rev. 01 — 1 October 2004 3 of 34

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Philips Semiconductors

7. Pinning information

7.1 Pinning

SSD

DDP2

BOOT2 V

OUT2 IN2M

SSP2

n.c. MODE

STABI OSC

SSP1

OUT1 IN1M

BOOT1 V

DDP1

PROT V

TDA8920BTH

001aab217

1 2 3 4 5 6 7 8

9 10 11 12

SSA2

SGND2

DDA2

IN2P

IN1P

DDA1

SGND1

SSA1

OSC

IN1P

IN1M

DDA1

SGND1

SSA1

PROT

DDP1

BOOT1

OUT1

SSP1

STABI V

SSP2

OUT2

BOOT2

DDP2

SSD

SSA2

SGND2

DDA2

IN2M

IN2P

MODE

TDA8920B

2 × 100 W class-D power ampliﬁer

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23

TDA8920BJ

001aab218

Fig 2. Pin conﬁguration TDA8920BTH. Fig 3. Pin conﬁguration TDA8920BJ.

7.2 Pin description

Table 3: Pin description

Symbol Pin Description

TDA8920BTH TDA8920BJ

SSA2

SGND2 2 19 signal ground for channel 2 V

DDA2

IN2M 4 21 negative audio input for channel 2 IN2P 5 22 positive audio input for channel 2 MODE 6 23 mode selection input: Standby, Mute or Operating mode OSC 7 1 oscillator frequency adjustment or tracking input IN1P 8 2 positive audio input for channel 1 IN1M 9 3 negative audio input for channel 1 V

DDA1

Preliminary data sheet Rev. 01 — 1 October 2004 4 of 34

1 18 negative analog supply voltage for channel 2

3 20 positive analog supply voltage for channel 2

10 4 positive analog supply voltage for channel 1

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Philips Semiconductors

TDA8920B

2 × 100 W class-D power ampliﬁer

Table 3: Pin description

Symbol Pin Description

TDA8920BTH TDA8920BJ

SGND1 11 5 signal ground for channel 1 V

SSA1

PROT 13 7 decoupling capacitor for protection (OCP) V

DDP1

BOOT1 15 9 bootstrap capacitor for channel 1 OUT1 16 10 PWM output from channel 1 V

SSP1

STABI 18 12 decoupling of internal stabilizer for logic supply n.c. 19 - not connected V

SSP2

OUT2 21 14 PWM output from channel 2 BOOT2 22 15 bootstrap capacitor for channel 2 V

DDP2

SSD

12 6 negative analog supply voltage for channel 1

14 8 positive power supply voltage for channel1

17 11 negative power supply voltage for channel 1

20 13 negative power supply voltage for channel 2

23 16 positive power supply voltage for channel 2 24 17 negative digital supply voltage

8. Functional description

…continued

8.1 General

The TDA8920B is a two channel audio power ampliﬁer using class-D technology. The audio input signal is converted into a digital Pulse Width Modulated (PWM) signal via

an analog input stage and PWM modulator. To enable the output power transistors to be driven, this digital PWM signal is applied to a control and handshake block and driver circuits for both the high side and low side. In this way a level shift is performed from the low power digital PWM signal (at logic levels) to a high power PWM signal which switches between the main supply lines.

A 2nd-order low-pass ﬁlter converts the PWM signal to an analog audio signal across the loudspeakers.

The TDA8920B one-chip class-D ampliﬁer contains high power D-MOS switches, drivers, timing and handshaking between the power switches and some control logic. For protection a temperature sensor and a maximum current detector are built-in.

The two audio channels of the TDA8920B contain two PWMs, two analog feedback loops and two differential input stages. It also contains circuits common to both channels such as the oscillator, all reference sources, the mode functionality and a digital timing manager.

The TDA8920B contains two independent ampliﬁer channels with high output power,high efﬁciency, low distortion and a low quiescent current. The ampliﬁer channels can be connected in the following conﬁgurations:

• Mono Bridge-Tied Load (BTL) ampliﬁer

• Stereo Single-Ended (SE) ampliﬁers.

Preliminary data sheet Rev. 01 — 1 October 2004 5 of 34

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Philips Semiconductors

The ampliﬁer system can be switched in three operating modes with pin MODE:

• Standby mode; with a very low supply current

• Mute mode; the ampliﬁers are operational; but the audio signal at the output is

suppressed by disabling the VI-converter input stages

• Operating mode; the ampliﬁers are fully operational with output signal.

To ensure pop-noise free start-up the DC output offset voltage is applied gradually to the output between Mute mode and Operating mode. The bias current setting of the VI converters is related to the voltage on the MODE pin; in Mute mode the bias current setting of the VI converters is zero (VI converters disabled) and in Operating mode the bias current is at maximum. The time constant required to apply the DC output offset voltage gradually between mute and operating can be generated via an RC-network on the MODE pin. An example of a switching circuit for driving pin MODE is illustrated in

Figure 4. If the capacitor C is left out of the application the voltage on the MODE pin will

be applied with a much smaller time-constant, which might result in audible pop-noises during start-up (depending on DC output offset voltage and used loudspeaker).

In order to fully charge the coupling capacitors at the inputs, the ampliﬁer will remain automatically in the Mute mode before switching to the Operating mode. A complete overview of the start-up timing is given in Figure 5.

TDA8920B

2 × 100 W class-D power ampliﬁer

5 V

standby/

mute

mute/on

Fig 4. Example of mode selection circuit.

MODE pin

SGND

001aab172

Preliminary data sheet Rev. 01 — 1 October 2004 6 of 34

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Philips Semiconductors

mode

TDA8920B

2 × 100 W class-D power ampliﬁer

audio output

modulated PWM

50 %

duty cycle

2.2 V < V

> 4.2 V

< 3 V

mode

0 V (SGND)

mode

> 4.2 V

< 3 V

mode

standby

mute

100 ms

50 %

duty cycle

mute

50 ms

operating

> 350 ms

audio output

modulated PWM

operating

time

0 V (SGND)

standby

100 ms

50 ms

> 350 ms

time

coa024

When switching from standby to mute, there is a delay of 100 ms before the output starts switching. The audio signal is available after V

has been set to operating, but not earlier

mode

than 150 ms after switching to mute. For pop-noise free start-up it is recommended that the time constant applied to the MODE pin is at least 350 ms for the transition between mute and operating.

When switching directly from standby to operating, there is a ﬁrst delay of 100 ms before the outputs starts switching. The audio signal is available after a second delay of 50 ms. For pop-noise freestart-up it is recommended that the time constant applied to the MODE pin is at least 500 ms for the transition between standby and operating.

Fig 5. Timing on mode selection input.

Preliminary data sheet Rev. 01 — 1 October 2004 7 of 34

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Philips Semiconductors

8.2 Pulse width modulation frequency

The output signal of the ampliﬁer is a PWM signal with a carrier frequency of approximately317 kHz. Using a 2nd-order LC demodulation ﬁlter in theapplication results in an analog audio signal across the loudspeaker. This switching frequency is ﬁxed by an external resistor R carrier frequency is between 300 kHz and 350 kHz.

Using an external resistor of 30 kΩ on the OSC pin, the carrier frequency is set to 317 kHz.

If two or more class-D ampliﬁers are used in the same audio application, it is advisable to have all devices operating at the same switching frequency by using an external clock circuit.

8.3 Protections

The following protections are included in TDA8920B:

• OverTemperature Protection (OTP)

• OverCurrent Protection (OCP)

• Window Protection (WP)

• Supply voltage protections:

– UnderVoltage Protection (UVP) – OverVoltage Protection (OVP) – UnBalance Protection (UBP).

connected between pin OSC and V

OSC

TDA8920B

2 × 100 W class-D power ampliﬁer

. An optimal setting for the

SSA

The reaction of the device on the different fault conditions differs per protection:

8.3.1 OverTemperature Protection (OTP)

If the junction temperature Tj> 150 °C, then the power stage will shut-down immediately. The power stage will start switching again if the temperature drops to approximately 130 °C, thus there is a hysteresis of approximately 20 °C.

8.3.2 OverCurrent Protection (OCP)

When the loudspeaker terminals are short-circuited or if one of the demodulated outputs of the ampliﬁer is short-circuited to one of the supply lines, this will be detected by the OverCurrent Protection (OCP). If the output current exceeds the maximum output current of 8 A, this current will be limited by the ampliﬁer to 8 A while the ampliﬁer outputs remain switching (the ampliﬁer is NOT shut-down completely).

The ampliﬁer can distinguish between an impedance drop of the loudspeaker and low-ohmic short across the load. In the TDA8920B this impedance threshold (Zth) depends on the supply voltage used.

When a short is made across the load causing the impedance to drop below the threshold level (< Zth) then the ampliﬁer is switched off completely and after a time of 100 ms it will try to restart again. If the short circuit condition is still present after this time this cycle will be repeated. The average dissipation will be low because of this low duty cycle.

Preliminary data sheet Rev. 01 — 1 October 2004 8 of 34

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Philips Semiconductors

In case of an impedance drop (e.g. due to dynamic behavior of the loudspeaker) the same protection will be activated; the maximum output current is again limited to 8 A, but the ampliﬁer will NOT switch-off completely (thus preventing audio holes from occurring). Result will be a clipping output signal without any artefacts.

See also Section 13.6 for more information on this maximum output current limiting feature.

TDA8920B

2 × 100 W class-D power ampliﬁer

Preliminary data sheet Rev. 01 — 1 October 2004 9 of 34

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Philips Semiconductors

8.3.3 Window Protection (WP)

During the start-up sequence, when pin MODE is switched from standby to mute, the conditions at the output terminals of the power stage are checked. In the event of a short-circuit at one of the output terminals to VDD or VSS the start-up procedure is interrupted and the system waits for open-circuit outputs. Because the test is done before enabling the power stages, no large currents will ﬂow in the event of a short-circuit. This system is called Window Protection (WP) and protects for short-circuits at both sides of the output ﬁlter to both supply lines. When there is a short-circuit from the power PWM output of the power stage to one of the supply lines (before the demodulation ﬁlter) it will also be detected by the start-up safety test. Practical use of this test feature can be found in detection of short-circuits on the printed-circuit board.

Remark: This test is operational during (every) start-up sequence at a transition between Standby and Mute mode. However when the ampliﬁer is completely shut-down due to activation of the OverCurrent Protection (OCP) because a short to one of the supply lines is made, then during restart (after 100 ms) the window protection will be activated. As a result the ampliﬁer will not start-up until the short to the supply lines is removed.

8.3.4 Supply voltage protections

TDA8920B

2 × 100 W class-D power ampliﬁer

If the supply voltage drops below ±12.5 V, the UnderVoltage Protection (UVP) circuit is activated and the system will shut-down correctly. If the internal clock is used, this switch-off will be silent and without pop noise. When the supply voltage rises above the threshold level, the system is restarted again after 100 ms. If the supply voltage exceeds ±33 V the OverVoltage Protection (OVP) circuit is activated and the power stages will shut-down. It is re-enabled as soon as the supply voltage drops below the threshold level. So in this case no timer of 100 ms is started.

An additional UnBalance Protection (UBP) circuit compares the positive analog (V and the negative analog (V

) supply voltages and is triggered if the voltage difference

SSA

DDA

)

between them exceeds a certain level. This level depends on the sum of both supply voltages. An expression for the unbalanced threshold level is as follows: V

th(ub)

≈ 0.15 × (V

DDA+VSSA

When the supply voltage difference drops below the threshold level, the system is restarted again after 100 ms.

Example: With a symmetrical supply of ±30 V, the protection circuit will be triggered if the unbalance exceeds approximately 9 V; see also Section 13.7.

In Table 4 an overview is given of all protections and the effect on the output signal.

Table 4: Overview protections TDA8920B

Protection name Complete shut-down Restart directly Restart every 100 ms

OTP Y Y OCP N WP Y UVP Y N Y OVPYYN UBP Y N Y

[2] [3]

[1] [2]

Y YN

[1]

[2]

[1] Hysteresis of 20 degrees will inﬂuence restart timing depending on heatsink size.

Preliminary data sheet Rev. 01 — 1 October 2004 10 of 34

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Philips Semiconductors

[2] Only complete shut-down of ampliﬁer if short-circuit impedance is below threshold of 1 Ω. In all other cases

current limiting: resulting in clipping output signal.

[3] Fault condition detected during (every) transition between standby-to-mute and during restart after

activation of OCP (short to one of the supply lines).

8.4 Differential audio inputs

Fora high common mode rejection ratio and a maximum of ﬂexibility in the application, the audio inputs are fully differential. By connecting the inputs anti-parallel the phase of one of the channels can be inverted, so that a load can be connected between the two output ﬁlters. In this case the system operates as a mono BTL ampliﬁer and with the same loudspeaker impedance an approximately four times higher output power can be obtained.

The input conﬁguration for a mono BTL application is illustrated in Figure 6. In the stereo single-ended conﬁguration it is also recommended to connect the two

differential inputs in anti-phase. This has advantages for the current handling of the power supply at low signal frequencies.

TDA8920B

2 × 100 W class-D power ampliﬁer

Fig 6. Input conﬁguration for mono BTL application.

9. Limiting values

Table 5: Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

ORM

stg

amb

[1] Current limiting concept. See also Section 13.6.

IN1P

IN1M

IN2P

IN2M

power stage

OUT1

SGND

OUT2

mbl466

supply voltage - ±30 V repetitive peak current in

output pin

maximum output current limiting

[1]

8- A

storage temperature −55 +150 °C ambient temperature −40 +85 °C junction temperature - 150 °C

Preliminary data sheet Rev. 01 — 1 October 2004 11 of 34

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Philips Semiconductors

TDA8920B

2 × 100 W class-D power ampliﬁer

10. Thermal characteristics

Table 6: Thermal characteristics

Symbol Parameter Conditions Typ Unit

th(j-a)

thermal resistance from junction to ambient

[1]

TDA8920BTH in free air 35 K/W TDA8920BJ in free air 35 K/W

th(j-c)

thermal resistance from junction to case

[1]

TDA8920BTH 1.3 K/W TDA8920BJ 1.3 K/W

[1] See also Section 13.5.

11. Static characteristics

Table 7: Static characteristics

VP =±27 V; f

Symbol Parameter Conditions Min Typ Max Unit

Supply

q(tot)

stb

Mode select input; pin MODE

stb

mute

Audio inputs; pins IN1M, IN1P, IN2P and IN2M

Ampliﬁer outputs; pins OUT1 and OUT2

V

OO(SE)(mute)

V

OO(SE)(on)

V

OO(BTL)(mute)

V

OO(BTL)(on)

Stabilizer output; pin STABI

o(stab)

= 317 kHz; T

osc

supply voltage total quiescent supply current no load, no ﬁlter; no

= 25°C; unless otherwise speciﬁed.

amb

[1]

±12.5 ±27 ±30 V

-5065mA

snubber network connected

standby supply current - 150 500 µA

input voltage

[2]

0- 6V input current VI= 5.5 V - 100 300 µA input voltage for Standby mode input voltage for Mute mode input voltage for Operating mode

DC input voltage

[2] [3]

0 - 0.8 V

[2] [3]

2.2 - 3.0 V

[2] [3]

4.2 - 6 V

[2]

-0-V

 mute SE output offset voltage - - 15 mV

 operating SE output offset voltage

[4]

- - 150 mV

 mute BTL output offset voltage - - 21 mV

 operating BTL output offset voltage

stabilizer output voltage mute and operating;

with respect to V

SSP1

[4]

- - 210 mV

11 12.5 15 V

Preliminary data sheet Rev. 01 — 1 October 2004 12 of 34

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Philips Semiconductors

TDA8920B

2 × 100 W class-D power ampliﬁer

Table 7: Static characteristics

VP =±27 V; f

= 317 kHz; T

osc

…continued

= 25°C; unless otherwise speciﬁed.

amb

Symbol Parameter Conditions Min Typ Max Unit

Temperature protection

prot

hys

[1] The circuit is DC adjusted at VP= ±12.5 V to ±30 V. [2] With respect to SGND (0 V). [3] The transition between Standby and Mute mode contain hysteresis, while the slope of the transition between Mute and Operating mode

is determined by the time-constant on the MODE pin; see Figure 7.

[4] DC output offset voltage is applied to the output during the transition between Mute and Operating mode in a gradual way. The slope of

the dV/dt caused by any DC output offset is determined by the time-constant on the MODE pin.

temperature protection activation - 150 - °C hysteresis on temperature protection - 20 - °C

slope is directly related to

time-constant on the MODE pin

VO (V)

(on)

(mute)

STBY MUTE ON

MODE

5.5

(V)

coa021

4.23.02.20.80 V

Fig 7. Behavior of mode selection pin MODE.

12. Dynamic characteristics

12.1 Switching characteristics

Table 8: Switching characteristics

VDD=±27 V; T

Symbol Parameter Conditions Min Typ Max Unit

Internal oscillator

osc

osc(int)

External oscillator or frequency tracking

OSC

OSC(trip)

track

=25°C; unless otherwise speciﬁed.

amb

typical internal oscillator frequency R

= 30.0 kΩ 290 317 344 kHz

OSC

internal oscillator frequency range 210 - 600 kHz

high-level voltage on pin OSC SGND + 4.5 SGND + 5 SGND + 6 V trip level for tracking on pin OSC - SGND + 2.5 - V frequency range for tracking 210 - 600 kHz

Preliminary data sheet Rev. 01 — 1 October 2004 13 of 34

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Philips Semiconductors

12.2 Stereo and dual SE application

TDA8920B

2 × 100 W class-D power ampliﬁer

Table 9: Stereo and dual SE application characteristics

VP=±27 V; RL=4Ω; fi= 1 kHz; f

= 317 kHz; RsL< 0.1

osc

[1]

Ω

; T

=25°C; unless otherwise speciﬁed.

amb

Symbol Parameter Conditions Min Typ Max Unit

output power RL=3Ω; VP= ±27 V

[2]

THD = 0.5 % - 87 - W THD = 10 % - 110 - W

=4Ω; VP= ±27 V

[2]

THD = 0.5 % - 69 - W THD = 10 % - 86 - W

=6Ω; VP= ±27 V

[2]

THD = 0.5 % - 48 - W THD = 10 % - 60 - W

=8Ω; VP= ±27 V

[2]

THD = 0.5 % - 36 - W THD = 10 % - 45 - W

THD total harmonic distortion P

=1W

[3]

fi= 1 kHz - 0.02 0.05 %

= 6 kHz - 0.03 - %

v(cl)

SVRR supply voltage ripple rejection operating

closed loop voltage gain 29 30 31 dB

[4]

fi= 100 Hz - 55 - dB

= 1 kHz 40 50 - dB

[4]

-55-dB

[4]

-80-dB

[5]

- 210 - µV

[6]

- 160 - µV

[7]

-70-dB

[8]

- 100 - µV

= 100 Hz

=0Ω

= 100 Hz

mute; f standby; f

 input impedance 45 68 - kΩ

Z

n(o)

noise output voltage operating

mute

 channel unbalance - - 1 dB

∆G

o(mute)

CMRR common mode rejection ratio V

channel separation

output signal in mute

= 1 V (RMS) - 75 - dB

i(CM)

[1] RsL is the series resistance of inductor of low-pass LC ﬁlter in the application. [2] Output power is measured indirectly; based on R [3] Total harmonic distortion is measured in a bandwidth of 22 Hz to 20 kHz, using AES17 20 kHz brickwall ﬁlter. Maximum limit is

guaranteed but may not be 100 % tested.

[4] V

ripple=Vripple(max)

[5] B = 22 Hz to 20 kHz, using AES17 20 kHz brickwall ﬁlter. [6] B = 22 Hz to 22 kHz, using AES17 20 kHz brickwall ﬁlter; independent of Rs. [7] Po= 1 W; Rs=0Ω; fi= 1 kHz. [8] Vi=V

Preliminary data sheet Rev. 01 — 1 October 2004 14 of 34

i(max)

= 2 V (p-p); Rs=0Ω.

= 1 V (RMS); fi= 1 kHz.

measurement. See also Section 13.3.

DSon

Page 15

Philips Semiconductors

12.3 Mono BTL application

TDA8920B

2 × 100 W class-D power ampliﬁer

Table 10: Mono BTL application characteristics

VP=±27 V; RL=8Ω; fi= 1 kHz; f

= 317 kHz; RsL< 0.1

osc

[1]

Ω

; T

=25°C; unless otherwise speciﬁed.

amb

Symbol Parameter Conditions Min Typ Max Unit

output power RL=6Ω; VP= ±27 V

[2]

THD = 0.5 % - 174 - W THD = 10 % - 210 - W

=8Ω; VP= ±27 V

[2]

THD = 0.5 % - 138 - W THD = 10 % - 173 - W

THD total harmonic distortion P

=1W

[3]

fi= 1 kHz - 0.02 0.05 %

= 6 kHz - 0.03 - %

v(cl)

SVRR supply voltage ripple rejection operating

closed loop voltage gain 35 36 37 dB

[4]

fi= 100 Hz - 80 - dB

= 1 kHz 70 80 - dB

[4]

-80-dB

[4]

-80-dB

[5]

- 300 - µV

[6]

- 220 - µV

[7]

- 200 - µV

=0Ω

= 100 Hz

mute; f standby; f

 input impedance 22 34 - kΩ

Z

n(o)

noise output voltage operating

mute

o(mute)

CMRR common mode rejection ratio V

output signal in mute

= 1 V (RMS) - 75 - dB

i(CM)

guaranteed but may not be 100 % tested.

[4] V

ripple=Vripple(max)

[5] B = 22 Hz to 20 kHz, using an AES17 20 kHz brickwall ﬁlter. [6] B = 22 Hz to 20 kHz, using an AES17 20 kHz brickwall ﬁlter; independent of Rs. [7] Vi=V

i(max)

= 2 V (p-p); Rs=0Ω.

= 1 V (RMS); fi= 1 kHz.

measurement. See also Section 13.3.

DSon

13. Application information

13.1 BTL application

When using the power ampliﬁer in a mono BTL application the inputs of both channels must be connected in parallel and the phase of one of the inputs must be inverted (see

Figure 6). In principle the loudspeaker can be connected between the outputs of the two

single-ended demodulation ﬁlters.

Preliminary data sheet Rev. 01 — 1 October 2004 15 of 34

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Philips Semiconductors

13.2 MODE pin

For pop-noise free start-up an RC time-constant must be applied on the MODE pin. The bias-current setting of the VI-converter input is directly related to the voltage on the MODE pin. In turn the bias-current setting of the VI converters is directly related to the DC output offset voltage. Thus a slow dV/dt on the MODE pin results in a slow dV/dt for the DC output offset voltage, resulting in pop-noise free start-up. A time-constant of 500 ms is sufﬁcient to guarantee pop-noise free start-up (see also Figure 4, 5 and 7).

13.3 Output power estimation

The achievable output powers in several applications (SE and BTL) can be estimated using the following expressions:

SE:

TDA8920B

2 × 100 W class-D power ampliﬁer

o1%()

--------------------

RL0.4+

-----------------------------------------------------------------------------------------

VP1t

minfosc

×–()××

Maximum current (internally limited to 8 A):

o peak()

------------------------------------------------------

RL0.4+

×–()×

minfosc

BTL:

o 1%()

--------------------

RL0.8+

-------------------------------------------------------------------------------------------- -

minfosc

×–()××

Maximum current (internally limited to 8 A):

o peak()

2Vp1t

---------------------------------------------------------

RL0.8+

×–()×

minfosc

Variables:

RL= load impedance f

= oscillator frequency

osc

= minimum pulse width (typical 150 ns)

min

VP= single-sided supply voltage (so, if supply is ±30 V symmetrical, then VP=30V) P

= output power just at clipping

o(1%)

P P

= output power at THD = 10 %

o(10%) o(10%)

= 1.24 × P

o(1%)

(1)

(2)

(3)

(4)

13.4 External clock

When using an external clock the following accuracy of the duty cycle of the external clock has to be taken into account: 47.5 % < δ < 52.5 %.

Preliminary data sheet Rev. 01 — 1 October 2004 16 of 34

Page 17

Philips Semiconductors

If two or more class-D ampliﬁers are used in the same audio application, it is strongly recommended that all devices run at the same switching frequency. This can be realized by connecting all OSC pins together and feed them from an external central oscillator. Using an external oscillator it is necessary to force pin OSC to a DC-level aboveSGND for switching from the internal to an external oscillator. In this case the internal oscillator is disabled and the PWM will be switched on the external frequency.The frequency range of the external oscillator must be in the range as speciﬁed in the switching characteristics; see Section 12.1.

In an application circuit:

TDA8920B

2 × 100 W class-D power ampliﬁer

• Internal oscillator: R

OSC

• External oscillator: connect the oscillator signal between pins OSC and SGND; delete

OSC

and C

OSC

13.5 Heatsink requirements

In some applications it may be necessary to connect an external heatsink to the TDA8920B. Limiting factor is the 150 °C maximum junction temperature T cannot be exceeded. The expression below shows the relationship between the maximum allowable power dissipation and the total thermal resistance from junction to ambient:

th j a–()

diss

------------------------------------

is determined by the efﬁciency (η) of the TDA8920B. The efﬁciency measured in the TDA8920B as a function of output power is given in Figure 21.The power dissipation can be derived as function of output power (see Figure 20).

The derating curves (given for several values of the R A maximum junction temperature Tj= 150 °C is taken into account. From Figure 8 the maximum allowable power dissipation for a given heatsink size can be derived or the required heatsink size can be determined at a required dissipation level.

–

j max()Tamb

diss

connected between pin OSC and V

) are illustrated in Figure 8.

th(j-a)

SSA

j(max)

which

(5)

Preliminary data sheet Rev. 01 — 1 October 2004 17 of 34

Page 18

Philips Semiconductors

TDA8920B

2 × 100 W class-D power ampliﬁer

mbl469

(°C)

amb

(1) R (2) R (3) R (4) R (5) R

th(j-a) th(j-a) th(j-a) th(j-a) th(j-a)

= 5 K/W. = 10 K/W. = 15 K/W. = 20 K/W. = 35 K/W.

diss

(W)

0 20 10040 60 80

(1)

(2)

(3) (4)

(5)

Fig 8. Derating curves for power dissipation as a function of maximum ambient

temperature.

13.6 Output current limiting

To guarantee the robustness of the class-D ampliﬁer the maximum output current which can be delivered by the output stage is limited. An advanced OverCurrent Protection (OCP) is included for each output power switch.

When the current ﬂowing through any of the power switches exceeds the deﬁned internal threshold of 8 A (e.g. in case of a short-circuit to the supply lines or a short-circuit across the load) the maximum output current of the ampliﬁer will be regulated to 8 A.

The TDA8920B ampliﬁer can distinguish between a low-ohmic short circuit condition and other overcurrentconditions likedynamic impedance drops of the used loudspeakers. The impedance threshold (Zth) depends on the supply voltage used.

Depending on the impedance of the short circuit the ampliﬁer will react as follows:

1. Short-circuit impedance > Zth: the maximum output current of the ampliﬁer is regulated to 8 A, but the ampliﬁer will

not shut-down its PWM outputs. Effectively this results in a clipping output signal across the load (behavior is very similar to voltage clipping).

2. Short-circuit impedance < Zth: the ampliﬁer will limit the maximum output current to 8 A and at the same time the

capacitor on the PROT pin is discharged. When the voltage across this capacitor drops below an internal threshold voltage the ampliﬁer will shut-down completely and an internal timer will be started.

Preliminary data sheet Rev. 01 — 1 October 2004 18 of 34

Page 19

Philips Semiconductors

A typical value for the capacitor on the PROT pin is 220 pF. After a ﬁxed time of 100 ms the ampliﬁer is switched on again. If the requested output current is still too high the ampliﬁer will switch-off again. Thus the ampliﬁer will try to switch to the Operating mode every 100 ms. The average dissipation will be low in this situation because of this low duty cycle.If the overcurrentcondition is removedthe ampliﬁer will remain in Operating mode once restarted.

In this way the TDA8920B ampliﬁer is fully robust against short circuit conditions while at the same time so-called audio holes as a result of loudspeaker impedance drops are eliminated.

13.7 Pumping effects

In a typical stereo half-bridge (Single-Ended (SE)) application the TDA8920B class-D ampliﬁer is supplied by a symmetrical voltage (e.g VDD= +27 V and VSS= −27 V). When the ampliﬁer is used in a SE conﬁguration, a so-called ‘pumping effect’ can occur. During one switching interval, energy is taken from one supply (e.g. VDD), while a part of that energy is delivered back to the other supply line (e.g. VSS) and visa versa. When the voltage supply source cannot sink energy, the voltage across the output capacitors of that voltage supply source will increase: the supply voltage is pumped to higher levels. The voltage increase caused by the pumping effect depends on:

TDA8920B

2 × 100 W class-D power ampliﬁer

• Speaker impedance

• Supply voltage

• Audio signal frequency

• Value of decoupling capacitors on supply lines

• Source and sink currents of other channels.

The pumping effectshould not cause a malfunction of either the audio ampliﬁer and/or the voltage supply source. For instance, this malfunction can be caused by triggering of the undervoltage or overvoltage protection or unbalance protection of the ampliﬁer.

Best remedy for pumping effectsis to use the TDA8920B in a mono full-bridge application or in case of stereo half-bridge application adapt the power supply (e.g. increase supply decoupling capacitors).

Preliminary data sheet Rev. 01 — 1 October 2004 19 of 34

Page 20

Philips Semiconductors

13.8 Application schematic

Notes to the application schematic:

• A solid ground plane around the switching ampliﬁer is necessary to prevent emission.

• 100nF capacitors must be placed as close as possible to the powersupply pins of the

TDA8920BTH.

• The internal heat spreader of the TDA8920BTH is internally connected to V

• The external heatsink must be connected to the ground plane.

• Use a thermal conductive electrically non-conductive Sil-Pad

of the TDA8920BTH and a small external heatsink.

• The differential inputs enable the best system level audio performance with

unbalanced signal sources. In case of hum due to ﬂoating inputs, connect the shielding or source ground to the ampliﬁer ground. Jumpers J1 and J2 are open on set level and are closed on the stand-alone demo board.

• Minimum total required capacity per power supply line is 3300 µF.

TDA8920B

2 × 100 W class-D power ampliﬁer

between the backside

Preliminary data sheet Rev. 01 — 1 October 2004 20 of 34

Page 21

Preliminary data sheet Rev. 01 — 1 October 2004 21 of 34

xxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxx xxxxxxxxxx xxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxx x x

DDA

DDP

SSP

SSA

DDP

5.6 kΩ

DZ1 5V6

TDA8920BTH

PROT

C33 220 pF

5.6 kΩ

ON/OFF OPERATE/MUTE

SSA

R6 30 kΩ

C14

100 nF

OSC

71210

MODE

19 2413

n.c.

SSD

STABI

C36 100 nF

C37

100 nF

DDP

DDP1

DDP2

100 µF/10 V

47 µF/

63 V

C15

100 nF

SSP1

SSP2

C38

100 nF

SSP

100 nF

C16

OUT1

BOOT1

BOOT2

OUT2

C39

C10

220 pF

C21

15 nF

C27

15 nF

C40

220 pF

SINGLE ENDED

OUTPUT FILTER VALUES

SSP

LS1/LS2 L3/L4 C22/C31

2 Ω 10 µH1 µF 4 Ω 22 µH 680 nF 6 Ω 33 µH 470 nF

C11

220 pF

DDP

8 Ω 47 µH 330 nF

R7 10 Ω

R9 22 Ω

C22

GND

C24 100 nF

C41

220 pF

R13 10 Ω

C31

GND

R14 22 Ω

C32 100 nF

001aab224

+25 V

GND

−25 V

IN1

IN2

CON1

C17 1 nF

C23

1 nF

C25 1 nF

C30 1 nF

C1 100 nF

L1 BEAD

C2 47 µF/35 V

10 Ω

C3 470 µF/35 V

1 2 3

C7 100 nF

C5 47 µF/35 V

L2 BEAD

FB GND FB GND

C18

470 nF5.6 kΩ

220 pF

C20R10

470 nF5.6 kΩ

C12

100 nF

IN1P

C19

IN1M

SGND1

C6 470 µF/35 V

DDAVSSA

100 nF

DDA1VSSA1

9 11

10 Ω

C13

100 nF

FB GND

SGND2

R11

R12

C26

470 nF5.6 kΩ

C28

220 pF

C29

470 nF5.6 kΩ

FB GND FB GND

IN2P

IN2M

C34

100 nF

2 5

SSA2

DDA2

C35

100 nF

Philips Semiconductors

OUT1P

LS1

OUT1M

2 × 100 W class-D power ampliﬁer

OUT2M

LS2

OUT2P

TDA8920B

DDAVSSA

Fig 9. TDA8920BTH application schematic.

SSA

SSP

DDP

SSP

DDP

SSP

Page 22

Philips Semiconductors

13.9 Curves measured in reference design

TDA8920B

2 × 100 W class-D power ampliﬁer

(1)

(2)

(3)

001aab225

Po (W)

(THD + N)/S

(%)

−1

−2

−3

−2

−1

101

Vp = ±27 V; 2 × 3 Ω SE conﬁguration. (1) f = 6 kHz. (2) 1 kHz. (3) 100 Hz.

Fig 10. (THD + N)/S as a function of output power; SE

conﬁguration with 2 × 3 Ω load.

(THD + N)/S

(%)

001aab227

1010

001aab226

(1)

(2)

(3)

Po (W)

(THD + N)/S

(%)

−1

−2

−3

−2

−1

Vp = ±27 V; 2 × 4 Ω SE conﬁguration. (1) f = 6 kHz. (2) 1 kHz. (3) 100 Hz.

Fig 11. (THD + N)/S as a function of output power; SE

conﬁguration with 2 × 4 Ω load.

(THD + N)/S

(%)

001aab228

−1

−2

−3

−2

−1

(1)

(2)

(3)

101

(W)

Vp = ±27 V; 1 × 6 Ω BTL conﬁguration. (1) f = 6 kHz. (2) 1 kHz. (3) 100 Hz.

Fig 12. (THD + N)/S as a function of output power; BTL

conﬁguration with 1 × 6 Ω load.

−1

−2

−3

−2

−1

(1)

(2)

(3)

101

(W)

Vp = ±27 V; 1 × 8 Ω BTL conﬁguration. (1) f = 6 kHz. (2) 1 kHz. (3) 100 Hz.

Fig 13. (THD + N)/S as a function of output power; BTL

conﬁguration with 1 × 8 Ω load.

Preliminary data sheet Rev. 01 — 1 October 2004 22 of 34

Page 23

Philips Semiconductors

TDA8920B

2 × 100 W class-D power ampliﬁer

001aab229

f (Hz)

(THD + N)/S

(%)

−1

−2

−3

(1)

(2)

10 10

Vp = ±27 V; 2 × 3 Ω SE conﬁguration. (1) P (2) P

= 1 W.

out

= 10 W.

out

Fig 14. (THD + N)/S as a function of frequency; SE

conﬁguration with 2 × 3 Ω load.

(THD + N)/S

(%)

001aab231

001aab230

f (Hz)

(THD + N)/S

(%)

−1

−2

−3

(1)

(2)

10 10

Vp = ±27 V; 2 × 4 Ω SE conﬁguration.

(1) P

= 10 W.

out

(2) P

= 1 W.

out

Fig 15. (THD + N)/S as a function of frequency; SE

conﬁguration with 2 × 4 Ω load.

(THD + N)/S

(%)

001aab232

−1

−2

−3

10 10

(1)

(2)

f (Hz)

Vp = ±27 V; 1 × 6 Ω BTL conﬁguration. (1) P (2) P

= 1 W.

out

= 10 W.

out

Fig 16. (THD + N)/S as a function of frequency; BTL

conﬁguration with 1 × 6 Ω load.

−1

−2

−3

10 10

(1)

(2)

f (Hz)

Vp = ±27 V; 1 × 8 Ω BTL conﬁguration.

(1) P

= 1 W.

out

(2) P

= 10 W.

out

Fig 17. (THD + N)/S as a function of frequency; BTL

conﬁguration with 1 × 8 Ω load.

Preliminary data sheet Rev. 01 — 1 October 2004 23 of 34

Page 24

Philips Semiconductors

TDA8920B

2 × 100 W class-D power ampliﬁer

001aab233

f (Hz)

(dB)

−20

−40

−60

(1)

−80

−100

10 10

(2)

Vp = ±27 V; 2 × 3 Ω SE conﬁguration. (1) P (2) P

= 10 W.

out

= 1 W.

out

Fig 18. Channel separation as a function of frequency;

SE conﬁguration with 2 × 3 Ω load.

001aab235

(3)

(1)

diss

(W)

001aab234

f (Hz)

(dB)

−20

−40

−60

(1)

−80

−100

10 10

(2)

Vp = ±27 V; 2 × 4 Ω SE conﬁguration.

(1) P

= 10 W.

out

(2) P

= 1 W.

out

Fig 19. Channel separation as a function of frequency;

SE conﬁguration with 2 × 4 Ω load.

001aab236

(1)

(3)

(%)

100

(2)

(4)

−2

−1

(4)

(2)

Po (W)

101

Vp = ±27 V; f = 1 kHz. (1) 2 × 3 Ω SE conﬁguration. (2) 2 × 4 Ω SE conﬁguration. (3) 1 × 6 Ω BTL conﬁguration. (4) 1 × 8 Ω BTL conﬁguration.

Fig 20. Power dissipation as a function of total output

0 24016080

Po (W)

Vp = ±27 V; f = 1 kHz. (1) 2 × 3 Ω SE conﬁguration. (2) 2 × 4 Ω SE conﬁguration. (3) 1 × 6 Ω BTL conﬁguration. (4) 1 × 8 Ω BTL conﬁguration.

Fig 21. Efﬁciency as a function of total output power.

power.

Preliminary data sheet Rev. 01 — 1 October 2004 24 of 34

Page 25

Philips Semiconductors

TDA8920B

2 × 100 W class-D power ampliﬁer

001aab237

(1)

(2)

(3) (4)

VS (V)

(W)

200

160

120

10 353020 2515

f = 1 kHz. (1) 1 × 6 Ω BTL conﬁguration. (2) 1 × 8 Ω BTL conﬁguration. (3) 2 × 3 Ω SE conﬁguration. (4) 2 × 4 Ω SE conﬁguration.

Fig 22. Output power as a function of supply voltage;

THD + N = 0.5 %.

001aab238

VS (V)

(W)

240

160

(1)

(2)

(3)

(4)

10 353020 2515

f = 1 kHz. (1) 1 × 6 Ω BTL conﬁguration. (2) 1 × 8 Ω BTL conﬁguration. (3) 2 × 3 Ω SE conﬁguration. (4) 2 × 4 Ω SE conﬁguration.

Fig 23. Output power as a function of supply voltage;

THD+N=10%.

001aab239

(1)

(2)

(3)

(4)

f (Hz)

(dB)

10 10

Vi = 100 mV; Rs = 5.6 kΩ; Ci = 330 pF; Vp = ±27 V. (1) 1 × 8 Ω BTL conﬁguration. (2) 1 × 6 Ω BTL conﬁguration. (3) 2 × 4 Ω BTL conﬁguration. (4) 2 × 3 Ω BTL conﬁguration.

Fig 24. Gain as a function of frequency; RS = 5.6 kΩ

and C

= 330 pF.

001aab240

(1)

(2)

(3)

(4)

f (Hz)

(dB)

10 10

Vi = 100 mV; Rs = 0 Ω; Ci = 330 pF; Vp = ±27 V. (1) 1 × 8 Ω BTL conﬁguration. (2) 1 × 6 Ω BTL conﬁguration. (3) 2 × 4 Ω BTL conﬁguration. (4) 2 × 3 Ω BTL conﬁguration.

Fig 25. Gain as a function of frequency; R

= 330 pF.

= 0 Ω and

Preliminary data sheet Rev. 01 — 1 October 2004 25 of 34

Page 26

Philips Semiconductors

TDA8920B

2 × 100 W class-D power ampliﬁer

SVRR

(dB)

−20

−40

(1)

−60

−80

−100

10 10

Vp = ±27 V; V

(2)

ripple

= 2 V (p-p).

001aab241

f (Hz)

(V)

−1

−2

−3

−4

−5

−6

0642

Vi = 100 mV; f = 1 kHz.

mode

001aab242

(V)

(1) both supply lines rippled. (2) one supply line rippled.

Fig 26. .SVRR as a function of frequency. Fig 27. .Output voltage as a function of mode voltage.

120

001aab243

S/N

(dB)

−2

Vp = ±27 V; Rs = 5.6 kΩ; 20 kHz AES17 ﬁlter. (1) 2 × 3 Ω SE conﬁguration and 1 × 6 Ω BTL conﬁguration. (2) 2 × 4 Ω SE conﬁguration and 1 × 8 Ω BTL conﬁguration.

Fig 28. S/N ratio as a function of output power.

14. Test information

14.1 Quality information

(1) (2)

−1

101

(W)

The

General Quality Speciﬁcation for Integrated Circuits, SNW-FQ-611

is applicable.

Preliminary data sheet Rev. 01 — 1 October 2004 26 of 34

Page 27

Philips Semiconductors

15. Package outline

TDA8920B

2 × 100 W class-D power ampliﬁer

HSOP24: plastic, heatsink small outline package; 24 leads; low stand-off height

pin 1 index

SOT566-3

v M

(A3)

detail X

DIMENSIONS (mm are the original dimensions)

UNIT

Notes

1. Limits per individual lead.

2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

max.

3.5

3.5 0.35

3.2

OUTLINE VERSION

SOT566-3

(1)

bpc

+0.08

0.53

−0.04

0.40

IEC JEDEC JEITA

0.32

0.23

16.0

15.8

w M

0 5 10 mm

scale

(2)

13.0

12.6

REFERENCES

1.1

0.9

(2)

6.2

11.1

5.8

10.9

2.9

2.5

14.5

13.9

1.1

0.8

1.7

0.25w0.25

1.5

EUROPEAN

PROJECTION

0.03

2.7

0.07

2.2

ISSUE DATE

03-02-18 03-07-23

8° 0°

Fig 29. HSOP24 package outline.

Preliminary data sheet Rev. 01 — 1 October 2004 27 of 34

Page 28

Philips Semiconductors

TDA8920B

2 × 100 W class-D power ampliﬁer

DBS23P: plastic DIL-bent-SIL power package; 23 leads (straight lead length 3.2 mm)

non-concave

view B: mounting base side

A A

SOT411-1

123

DIMENSIONS (mm are the original dimensions)

UNIT A

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

1.15

4.6

0.85

4.3

OUTLINE

VERSION

SOT411-1

1.65

1.35

bpcD

0.75

0.60

0.55

0.35

(1)

deD

30.4

28.0

27.5

12 2.54

29.9

IEC JEDEC JEITA

w M

0 5 10 mm

scale

(1)

12.2

11.8

1.27

5.08

REFERENCES

10.15

9.85

6.2

1.85

1.65

3.6

2.8

5.8

10.7

9.9

2.4

4.3

1.6

EUROPEAN

PROJECTION

2.1

1.8

0.6

v M

0.25

0.03x45°

ISSUE DATE

98-02-20 02-04-24

(1)

1.43

0.78

Fig 30. DBS23P package outline.

Preliminary data sheet Rev. 01 — 1 October 2004 28 of 34

Page 29

Philips Semiconductors

16. Soldering

16.1 Introduction

This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our (document order number 9398 652 90011).

There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mount components are mixed on one printed-circuit board. Wavesoldering can still be used for certain surface mount ICs, but it is not suitable for ﬁne pitch SMDs. In these situations reﬂow soldering is recommended.

Driven by legislation and environmental forces the worldwide use of lead-free solder pastes is increasing.

16.2 Through-hole mount packages

16.2.1 Soldering by dipping or by solder wave

TDA8920B

2 × 100 W class-D power ampliﬁer

Data Handbook IC26; Integrated Circuit Packages

Typical dwell time of the leads in the wave ranges from 3 seconds to 4 seconds at 250 °C or 265 °C, depending on solder material applied, SnPb or Pb-free respectively.

The total contact time of successive solder waves must not exceed 5 seconds. The device may be mounted up to the seating plane, but the temperature of the plastic

body must not exceed the speciﬁed maximum storage temperature (T printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit.

16.2.2 Manual soldering

Apply the soldering iron (24 V or less) to the lead(s) of the package, either below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 °C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 °C and 400 °C, contact may be up to 5 seconds.

16.3 Surface mount packages

16.3.1 Reﬂow soldering

Reﬂow soldering requires solder paste (a suspension of ﬁne solder particles, ﬂux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement.

Several methods exist for reﬂowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 seconds and 200 seconds depending on heating method.

stg(max)

). If the

Typical reﬂow peak temperatures range from 215 °Cto270°C depending on solder paste material. The top-surface temperature of the packages should preferably be kept:

• below 225 °C (SnPb process) or below 245 °C (Pb-free process)

– for all BGA, HTSSON..T and SSOP..T packages

Preliminary data sheet Rev. 01 — 1 October 2004 29 of 34

Page 30

Philips Semiconductors

– for packages with a thickness ≥ 2.5 mm – for packages with a thickness < 2.5 mm and a volume ≥ 350 mm3 so called

• below 240 °C (SnPb process) or below 260 °C (Pb-free process) for packages with a

thickness < 2.5 mm and a volume < 350 mm3 so called small/thin packages.

Moisture sensitivity precautions, as indicated on packing, must be respected at all times.

16.3.2 Wave soldering

Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems.

To overcome these problems the double-wave soldering method was speciﬁcally developed.

If wave soldering is used the following conditions must be observed for optimal results:

• Use a double-wave soldering method comprising a turbulent wave with high upward

pressure followed by a smooth laminar wave.

• For packages with leads on two sides and a pitch (e):

– larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be

– smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the

The footprint must incorporate solder thieves at the downstream end.

• For packages with leads on four sides, the footprint must be placed at a 45° angle to

the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners.

TDA8920B

2 × 100 W class-D power ampliﬁer

thick/large packages.

parallel to the transport direction of the printed-circuit board;

transport direction of the printed-circuit board.

During placement and before soldering, the package must be ﬁxed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured.

Typical dwell time of the leads in the wave ranges from 3 seconds to 4 seconds at 250 °C or 265 °C, depending on solder material applied, SnPb or Pb-free respectively.

A mildly-activated ﬂux will eliminate the need for removal of corrosive residues in most applications.

16.3.3 Manual soldering

Fix the component by ﬁrst soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the ﬂat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C.

When using a dedicated tool, all other leads can be soldered in one operation within 2 seconds to 5 seconds between 270 °C and 320 °C.

Preliminary data sheet Rev. 01 — 1 October 2004 30 of 34

Page 31

Philips Semiconductors

TDA8920B

2 × 100 W class-D power ampliﬁer

16.4 Package related soldering information

Table 11: Suitability of IC packages for wave, reﬂow and dipping soldering methods

Mounting Package

Through-hole mount CPGA, HCPGA suitable −−

DBS, DIP, HDIP, RDBS, SDIP, SIL suitable

Through-hole-surface

PMFP

mount Surface mount BGA, HTSSON..T

LFBGA, SQFP, SSOP..T TFBGA, VFBGA, XSON

DHVQFN, HBCC, HBGA, HLQFP, HSO, HSOP, HSQFP, HSSON, HTQFP, HTSSOP, HVQFN, HVSON, SMS

PLCC LQFP, QFP, TQFP not recommended SSOP, TSSOP, VSO, VSSOP not recommended CWQCCN..L

[1]

[4]

[5]

, LBGA,

[5]

[7]

, SO, SOJ suitable suitable −

[10]

, WQCCN..L

[10]

Soldering method Wave Reﬂow

[3]

− suitable

[2]

not suitable not suitable −

not suitable suitable −

not suitable

[6]

[7] [8] [9]

suitable −

suitable − suitable −

not suitable not suitable −

Dipping

[1] For more detailed information on the BGA packages refer to the

Semiconductors sales ofﬁce.

[2] All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with

respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the

Circuit Packages; Section: Packing Methods

[3] For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board. [4] Hot bar soldering or manual soldering is suitable for PMFP packages. [5] These transparent plastic packages are extremely sensitive to reﬂow soldering conditions and must on no account be processed

through more than one soldering cycle or subjected to infrared reﬂow soldering with peak temperature exceeding 217 °C ± 10 °C measured in the atmosphere of the reﬂow oven. The package body peak temperature must be kept as low as possible.

[6] These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder cannot penetrate

between the printed-circuit board and the heatsink. On versions with the heatsink on the top side, the solder might be deposited on the heatsink surface.

[7] If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint

must incorporate solder thieves downstream and at the side corners.

[8] Wave soldering is suitable for LQFP, QFP and TQFP packages with a pitch (e) larger than 0.8 mm; it is deﬁnitely not suitable for

packages with a pitch (e) equal to or smaller than 0.65 mm.

[9] Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is deﬁnitely

not suitable for packages with a pitch (e) equal to or smaller than 0.5mm.

[10] Image sensor packages in principle should not be soldered. They are mounted in sockets or delivered pre-mounted on ﬂex foil.

However, the image sensor package can be mounted by the client on a ﬂex foil by using a hot bar soldering process. The appropriate soldering proﬁle can be provided on request.

(LF)BGA Application Note

(AN01026); order a copy from your Philips

Data Handbook IC26; Integrated

Preliminary data sheet Rev. 01 — 1 October 2004 31 of 34

Page 32

Philips Semiconductors

2 × 100 W class-D power ampliﬁer

TDA8920B

17. Revision history

Table 12: Revision history

Document ID Release date Data sheet status Change notice Order number Supersedes

TDA8920B_1 20041001 Preliminary data sheet - 9397 750 13356 -

Preliminary data sheet Rev. 01 — 1 October 2004 32 of 34

Page 33

Philips Semiconductors

18. Data sheet status

TDA8920B

2 × 100 W class-D power ampliﬁer

Level Data sheet status

I Objective data Development This data sheet contains data from the objective speciﬁcation for product development. Philips

II Preliminary data Qualiﬁcation Thisdata sheet contains data from the preliminary speciﬁcation. Supplementary data will be published

III Product data Production This data sheet contains data from the product speciﬁcation. Philips Semiconductors reserves the

[1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at

URL http://www.semiconductors.philips.com.

[3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.

[1]

Product status

19. Deﬁnitions

Short-form speciﬁcation — The data in a short-form speciﬁcation is

extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook.

Limiting values deﬁnition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the speciﬁcation is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the speciﬁed use without further testing or modiﬁcation.

[2] [3]

Deﬁnition

Semiconductors reserves the right to change the speciﬁcation in any manner without notice.

at a later date. Philips Semiconductors reserves the right to change the speciﬁcation without notice, in order to improve the design and supply the best possible product.

right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notiﬁcation (CPCN).

customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.

Right to make changes — Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notiﬁcation (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, andmakesno representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise speciﬁed.

21. Trademarks

20. Disclaimers

Life support — These products are not designed for use in life support

appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors

Sil-Pad — is a registered trademark of The Bergquist

Company.

22. Contact information

For additional information, please visit: http://www.semiconductors.philips.com For sales ofﬁce addresses, send an email to: sales.addresses@www.semiconductors.philips.com

Preliminary data sheet Rev. 01 — 1 October 2004 33 of 34

Page 34

Philips Semiconductors

23. Contents

TDA8920B

2 × 100 W class-D power ampliﬁer

1 General description. . . . . . . . . . . . . . . . . . . . . . 1

2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

4 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2

5 Ordering information. . . . . . . . . . . . . . . . . . . . . 2

6 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3

7 Pinning information. . . . . . . . . . . . . . . . . . . . . . 4

7.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

7.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4

8 Functional description . . . . . . . . . . . . . . . . . . . 5

8.1 General. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

8.2 Pulse width modulation frequency . . . . . . . . . . 8

8.3 Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

8.3.1 OverTemperature Protection (OTP) . . . . . . . . . 8

8.3.2 OverCurrent Protection (OCP) . . . . . . . . . . . . . 8

8.3.3 Window Protection (WP). . . . . . . . . . . . . . . . . 10

8.3.4 Supply voltage protections . . . . . . . . . . . . . . . 10

8.4 Differential audio inputs . . . . . . . . . . . . . . . . . 11

9 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 11

10 Thermal characteristics. . . . . . . . . . . . . . . . . . 12

11 Static characteristics. . . . . . . . . . . . . . . . . . . . 12

12 Dynamic characteristics . . . . . . . . . . . . . . . . . 13

12.1 Switching characteristics . . . . . . . . . . . . . . . . 13

12.2 Stereo and dual SE application . . . . . . . . . . . 14

12.3 Mono BTL application. . . . . . . . . . . . . . . . . . . 15

13 Application information. . . . . . . . . . . . . . . . . . 15

13.1 BTL application. . . . . . . . . . . . . . . . . . . . . . . . 15

13.2 MODE pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

13.3 Output power estimation. . . . . . . . . . . . . . . . . 16

13.4 External clock. . . . . . . . . . . . . . . . . . . . . . . . . 16

13.5 Heatsink requirements . . . . . . . . . . . . . . . . . . 17

13.6 Output current limiting. . . . . . . . . . . . . . . . . . . 18

13.7 Pumping effects . . . . . . . . . . . . . . . . . . . . . . . 19

13.8 Application schematic. . . . . . . . . . . . . . . . . . . 20

13.9 Curves measured in reference design . . . . . . 22

14 Test information. . . . . . . . . . . . . . . . . . . . . . . . 26

14.1 Quality information . . . . . . . . . . . . . . . . . . . . . 26

15 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 27

16 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

16.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . 29

16.2 Through-hole mount packages. . . . . . . . . . . . 29

16.2.1 Soldering by dipping or by solder wave . . . . . 29

16.2.2 Manual soldering . . . . . . . . . . . . . . . . . . . . . . 29

16.3 Surface mount packages . . . . . . . . . . . . . . . . 29

16.3.1 Reﬂow soldering . . . . . . . . . . . . . . . . . . . . . . . 29

16.3.2 Wave soldering. . . . . . . . . . . . . . . . . . . . . . . . 30

16.3.3 Manual soldering . . . . . . . . . . . . . . . . . . . . . . 30

16.4 Package related soldering information. . . . . . 31

17 Revision history . . . . . . . . . . . . . . . . . . . . . . . 32

18 Data sheet status. . . . . . . . . . . . . . . . . . . . . . . 33

19 Deﬁnitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

20 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

21 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

22 Contact information . . . . . . . . . . . . . . . . . . . . 33

All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.

Published in The Netherlands

Date of release: 1 October 2004

Document order number: 9397 750 13356

Page 35

Datasheet TDA8920BJ, TDA8920BTH Datasheet (Philips) [ru]

Specifications and Main Features

Frequently Asked Questions

User Manual

1. General description

2. Features

3. Applications

4. Quick reference data

5. Ordering information

6. Block diagram

7. Pinning information

7.1 Pinning

7.2 Pin description

8. Functional description

8.1 General

8.2 Pulse width modulation frequency

8.3 Protections

8.4 Differential audio inputs

9. Limiting values

10. Thermal characteristics

11. Static characteristics

12. Dynamic characteristics

12.1 Switching characteristics

12.2 Stereo and dual SE application

12.3 Mono BTL application

13. Application information

13.1 BTL application

13.2 MODE pin

13.3 Output power estimation

13.4 External clock

13.5 Heatsink requirements

13.6 Output current limiting

13.7 Pumping effects

13.8 Application schematic

13.9 Curves measured in reference design

14. Test information

14.1 Quality information

15. Package outline

16. Soldering

16.1 Introduction

16.2 Through-hole mount packages

16.3 Surface mount packages

16.4 Package related soldering information

17. Revision history

18. Data sheet status

21. Trademarks

20. Disclaimers

22. Contact information

23. Contents