Datasheet TDA8745, TDA8745H Datasheet (Philips)

INTEGRATED CIRCUITS

DATA SH EET

TDA8745

Satellite sound receiver with

2

I

C-bus control

Preliminary specification
Supersedes data of 1995 Mar 08
File under Integrated Circuits, IC02

1996 Mar 11

Philips Semiconductors Preliminary specification

Satellite sound receiver with I2C-bus control

FEATURES

• On-chip frequency synthesizer and mixer:
– tuning range 4 to 9.77 MHz
– reference oscillator 4 MHz (using a crystal or 4 MHz

frequency source)

• IF input switches allowing selection of various IF
bandwidths (wide or narrow)

• Demodulation of two audio signals by wide band
Phase-Locked Loops (PLLs)

• Audio level control after PLL (modulation depth setting)

• Noise Reduction (NR) bypass for use with main audio

signals

• Left, right and mono output [1⁄2(l + r)] on SCART level

• External audio inputs (for decoder connection)

• Selectable de-emphasis (DEEM) 50 µs, 75 µs, J17 and

flat response

• I2C-bus control of all functions

• Two selectable addresses

• Carrier presence detector with automatic mute option.

APPLICATIONS

• Satellite receivers

• TV sets

• Video recorders.

GENERAL DESCRIPTION

The TDA8745 is the successor of the TDA8740 and
TDA8741. The device contains the functionality of the
TDA8740 and TDA8741 together with a synthesizer, mixer

2

and I
The pin numbers mentioned in this publication refer to the

SDIP42 package; unless otherwise indicated.

TDA8745

C-bus control.

ORDERING INFORMATION

TYPE

NUMBER

TDA8745 SDIP42

TDA8745H QFP44

NAME DESCRIPTION VERSION

PACKAGE

plastic shrink dual in-line package; 42 leads (600 mil)
plastic quad flat package; 44 leads (lead length 1.3 mm);

body 10 × 10 × 1.75 mm

SOT270-1
SOT307-2

1996 Mar 11 2

Philips Semiconductors Preliminary specification

Satellite sound receiver with I2C-bus control

TDA8745

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

P1

V

P2

V

P3

I

P1

I

P2

I

P3

S/N(A) signal-to-noise ratio secondary channel A-weighted;

synthesizer and mixer supply voltage 4.5 5.0 5.5 V
I2C-bus supply voltage 4.5 5.0 5.5 V
general supply voltage 8.0 12.0 13.2 V
synthesizer and mixer supply current − 37 48 mA
I2C-bus supply current − 0.6 − mA
general supply current − 35 46 mA

68 77 − dB

NR = on; DEEM = 75 µs

V

V
V
P
T
T

i(rms)

i(rms)
o
tot
stg
amb

input sensitivity (RMS value) baseband input
to mixer

S/N(A) = 40 dB;
NR = on; DEEM = 75 µs

− 0.5 1.5 mV

baseband input voltage (RMS value) THD ≤ 0.5% 200 mV
output voltage −8 −6 −4 dBV
total power dissipation − 610 800 mW
storage temperature −65 − +150 °C
operating ambient temperature −20 − +70 °C

1996 Mar 11 3

Philips Semiconductors Preliminary specification

Satellite sound receiver with I2C-bus control

BLOCK DIAGRAM

12 V

5 V

100 µH

5 V

4.7 Ω

L

O

23

OML

L

EXT

CL L

C

220 nF

DEEM OUT LDEEM OUT R

D L

10

nF

C

4.7

1

10

10

1

PRES DET L

470

22

nF

100 µF

2.2

22

nF

1000 µF

22

nF

nF

µF

µF

µF

µF

kΩ

µF

35 34 33 2537 38 36

NR D L

C

ATT/REC L

C

L

RECT

DC L

C

4241

P3

203210

V

ref

19

V

P2

V

1614171812

2

I CGND

SCL

SDA
sel

ADD

P1 AFGNDHFGND

V

46

SYNGND

ref

V

PDL

PDR

2

I C

INTERFACE

PRESENCE

PDL

DC

DETECTOR

50

flat µs

DE-EMPHASIS

NOISE

REDUCTION

LPF

AUDIO

PLL

HF

LIMITER

4 MHz

CRYSTAL

OSCILLATOR

40

10

XTAL

75 µs

J17

12 to 3dB

TUN9 to TUN0

200

pF

4 MHz

M

O

21

DEM1 and DEM0 OS1 and OS0NR

TDA8745

LEV3 to LEV0

OML

BB

IL2 to IL0

N

ϕ

PUMP

CHARGE

OMR

DE-EMPHASIS

NOISE

AUDIO

12 to 3dB

HF

frequency

synthesizer

30 to 40 MHz

VCO

2

SLF

33

6.8

R

O

22

50 µs

75 µs

flat

J17

REDUCTION

LPF

PLL

LIMITER

2

BPFN

nF

1 µF

kΩ

DC

PRESENCE

PE

OMR

DETECTOR

PDR

IR2 to IR0

27 pF

27 pF

IL2

MIXER

PRE-BPF

3

IN

BASEBAND

TDA8745

MBE037

R

EXT

24

CL L

C

220 nF

30 31

10

nF

D R

C

29

NR D R

nF

4.7

C

1

µF

ATT/REC R

26 2839 1

C

R

10

µF

RECT

27

10

µF

DC R

C

1

µF

PRES DET R

kΩ

15 pF

27 pF

470

IN-6
IN-5
IN-4
IN-3
IN-2

11 13 15 7 8

IN-1

9

(2)

(2)

330 Ω

10.7

10.52
NARROW

NARROW

5

IF OUT

330 Ω

330 Ω

10 nF

Ω

Ω

330

330

(2)

10.7

WIDE

330 Ω

When driving more than three filters in parallel, pin 5 should be buffered.

(1) Add 15 pF for NTSC.

IR2

1 kΩ

47 µH

(1)

handbook, full pagewidth

Fig.1 Block diagram (SDIP42).

SFE10.7MJA10-A (narrow)

SFE10.52MJA10-A (narrow)

SFE10.7MS2-A (wide).

(2) Ceramic filters:

1996 Mar 11 4

Philips Semiconductors Preliminary specification

Satellite sound receiver with I2C-bus control

PINNING

SYMBOL

SDIP42 QFP44

C

DC R

SLF 2 41 synthesizer loop-filter
BASEBAND IN 3 42 baseband input to mixer
V

P1

IF OUT 5 44 intercarrier output from mixer
SYNGND 6 1 synthesizer and mixer ground
IN-5 7 2 intercarrier input 5/port expansion output 1
IN-6 8 3 intercarrier input 6/port expansion output 2
IN-1 9 4 Intercarrier input 1
HFGND 10 5 HF ground
IN-2 11 6 intercarrier input 2
ADD

sel

IN-3 13 8 Intercarrier input 3

2

I

CGND 14 9 I2C-bus ground
IN-4 15 10 intercarrier input 4
V

P2

SCL 17 12 I
SDA 18 13 I
V

ref

V

P3

O

M

O

R

O

L

EXT

R

EXT

L

C

ATT/RECR

RECT

R

C

NR D R

C

DR

DEEM OUT R 30 26 de-emphasis output (right channel)
C

CL R

AFGND 32 28 AF ground
C

CL L

DEEM OUT L 34 30 de-emphasis output (left channel)
C

DL

C

NR D L

RECT

L

C

ATT/RECL

PIN

DESCRIPTION

1 39 DC decoupling capacitor (right channel)

4 43 synthesizer and mixer supply voltage (+5 V)

12 7 I2C-bus address selection

16 11 I2C-bus supply voltage (+5 V)

2

C-bus serial clock input

2

C-bus serial data input/output
19 14 decoupling capacitor for reference voltage
20 15 general supply voltage (+12 V)
21 17 mono channel output [1⁄2(l + r)]
22 18 right channel output
23 19 left channel output
24 20 external audio input (right channel)
25 21 external audio input (left channel)
26 22 attack/recovery capacitor (right channel)
27 23 rectifier DC decoupling (right channel)
28 24 noise reduction de-emphasis capacitor (right channel)
29 25 de-emphasis capacitor (right channel)

31 27 audio pass-through input (right channel)

33 29 audio pass-through input (left channel)

35 31 de-emphasis capacitor (left channel)
36 32 noise reduction de-emphasis capacitor (left channel)
37 33 rectifier DC decoupling (left channel)
38 34 attack/recovery capacitor (left channel)

TDA8745

1996 Mar 11 5

Philips Semiconductors Preliminary specification

Satellite sound receiver with I2C-bus control

SYMBOL

SDIP42 QFP44

PRES DET R 39 35 presence detector timing (right channel)
XTAL 40 36 crystal input for 4 MHz oscillator
PRES DET L 41 37 presence detector timing (left channel)
C

DC L

n.c. − 16 not connected
n.c. − 40 not connected

PIN

DESCRIPTION

42 38 DC decoupling capacitor (left channel)

handbook, halfpage

BASEBAND IN

SYNGND

I CGND

C

DC R

V

P1

IF OUT

IN-5
IN-6
IN-1

HFGND

IN-2

ADD

sel

IN-3

2

IN-4

V

P2

SCL

SDA

V

ref

V

P3

O

1
2
3
4
5
6
7
8

9
10
11

TDA8745
12
13
14
15

16
17
18
19
20
21

M

MBE035

C

42

DC L

PRES DET LSLF

41

XTAL

40
39

PRES DET R
C

38

ATT/REC L

RECT

37

C

36

NR D L

C

35

D L

DEEM OUT L

34

C

33

CL L

32

AFGND
C

31

CL R

30

DEEM OUT R
C

29

D R

C

28

NR D R

RECT

27

C

26

ATT/REC R

25

EXT
EXT

24
23

O

L

O

22

R

L

R

L
R

TDA8745

Fig.2 Pin configuration (SDIP42).

1996 Mar 11 6

Philips Semiconductors Preliminary specification

Satellite sound receiver with I2C-bus control

handbook, full pagewidth

DC L

DC R

n.c.

C

40

39

TDA8745H

C

38

SYNGND

IN-5
IN-6
IN-1

HFGND

IN-2

ADD

sel

IN-3

2

I CGND

IN-4

V

P2

P1

IF OUTVBASEBAND IN
44

1
2
3
4
5
6
7
8
9

10
11

SLF
41

43

42

XTAL

PRES DET R

PRES DET L
37

36

35

ATT/REC L

C

34

33
32
31
30
29
28
27
26
25
24
23

RECT

L

C

NR D L

C

D L

DEEM OUT L

C

CL L

AFGND

C

CL R
DEEM OUT R
C

D R
C

NR D R
RECT

R

TDA8745

12

13

14

15

16

17

18

19

20

L

SCL

SDA

P3

n.c.

M

O

O

ref

V

V

R

O

R

EXTLEXT

Fig.3 Pin configuration (QFP44).

21

22

ATT/REC R

C

MBE034

1996 Mar 11 7

Philips Semiconductors Preliminary specification

Satellite sound receiver with I2C-bus control

FUNCTIONAL DESCRIPTION
Satellite sound

The baseband signal coming from a satellite tuner
comprises the demodulated video signal plus a number of
sound carriers in the event of reception of a PAL, NTSC or
SECAM satellite signal.

Nearest to the video signal is the main sound carrier which
carries the mono sound related to the video. This is an FM
modulated carrier with a fixed pre-emphasis. The carrier
frequency can be in the range of 5.8 to 6.8 MHz.

Additionally, a number of optional secondary sound
carriers may be present. These can be used for stereo or
multi-language sound related to the video signal, or for
unrelated radio sound. These carriers are also FM
modulated, and for better sound quality (improved
signal-to-noise performance) broadcast satellites
(e.g. ‘ASTRA’) use a noise reduction system (adaptive
pre-emphasis circuit, combined with a fixed
pre-emphasis). These secondary carrier frequencies can
be in the range of 6.30 to 8.28 MHz.

For accurate tuning to the many sound carriers, an internal
frequency synthesizer and mixer are used to transfer the
sound carriers to intermediate frequencies of

10.7 and 10.52 MHz.
The TDA8745 contains all circuitry for the processing of

the main channel and secondary channels, from baseband
signal to line (SCART) output drivers. By means of
external band-pass filters the desired frequencies coming
from the synthesizer/mixer are routed to the IF
limiter/demodulator inputs.

The mixer transfers the different sound carrier frequencies
to fixed intermediate frequencies of 10.7 and 10.52 MHz.
These frequencies are fed via an internal buffer stage to
external ceramic band-pass filters before they are routed
to the two demodulator inputs. The buffer stage can drive
up to three external ceramic band-pass filters (assuming
330 Ω filter terminations) but this can be increased to four
or more by adding an external buffer.

Synthesizer

The synthesizer consists of the following parts:

• Reference oscillator

• Reference divider

• A 10-bit programmable divider

• Phase detector

• Charge pump

• Voltage Controlled Oscillator (VCO)

• Divide-by-two circuit.

The reference frequency circuit consists of a 4 MHz crystal
oscillator and a divider (by 200). The resulting reference
frequency of 20 kHz is fed to the phase detector.
The programmable divider consists of a series of cells
(divide by 2 or 3) connected as a ripple counter.
The minimum division ratio is 2
ratio is 2

The programmable divider output signal is also fed to the
phase detector. The charge pump provides output current
pulses in accordance with the signals from the phase
detector. The final tuning voltage for the VCO is provided
by the loop filter and a buffer amplifier.

n+1

−1.

TDA8745

n

and the maximum division

Band-pass filter and mixer

Before the incoming baseband signal is applied to the
mixer, the signal is filtered. Related to the sound carriers,
the level of the video part of the baseband signal can be
much higher, so to avoid overload it is desirable to
attenuate the latter, this is also to avoid interference
(additional unwanted mix of signals after mixing).

The internal band-pass filter (pass band from
approximately 4 to 10 MHz) is completed by a simple
external notch filter. The external filter provides substantial
attenuation of the video colour carrier. The notch filter is
chosen to be external because the required notch
frequency is TV standard dependent and also because an
accurate on-chip notch filter requires a tuning mechanism
(consuming additional chip area).

The mixer is a double-balanced mixer with degeneration,
this to accommodate the level of the filter output signal.

1996 Mar 11 8

The oscillator frequency range is from

29.04 to 40.94 MHz, depending on the setting of the
programmable divider (by the TUN signal). The tuning
voltage is clipped to limit the VCO frequency range.
The frequency of the oscillator is divided-by-two before it
is applied to the mixer (to obtain the desired 10 kHz
resolution).

Left and right channel inputs

A maximum of six inputs are available (pins 9, 11, 13, 15,
7 and 8). External ceramic band-pass filters, which are
tuned to the desired intermediate frequencies, route the
signals to the inputs.

For stereo purposes the TDA8745 contains two identical
secondary sound processing channels (secondary
channel 1 will also be referred to as ‘left’ or ‘language 1’
and secondary channel 2 as ‘right’ or ‘language 2’).

Philips Semiconductors Preliminary specification

Satellite sound receiver with I2C-bus control

With the input selection every input pin of the left and/or
right channel can be independently selected. Input
selection for the left channel is controlled by the IL signal
and for the right channel by the IR signal.

From the inputs, the signals are coupled to the
limiter/amplifier and to the PLL demodulator of each
channel. The output signal from the PLL is routed to both
the presence detector and audio level control.

The inputs of pins 7 and 8 can be changed into digital
outputs for external switching purposes, set by the so
called Port Extension bit (PE). Not used inputs should be
connected to ground. Note that the inputs of pins 7 and 8
are also floating when not in Port Extension mode.

Presence detector

The presence detector is used to determine if a carrier is
present on the channel of interest. It does so by measuring
the amount of high frequency noise (>20 kHz) in the audio
signal, which is directly related to the C/N (carrier-to-noise
ratio) at the IF input. If a carrier is present, these high
frequencies are fairly moderate, if no carrier is present,
strong noise components are present.

The audio signal, first high-pass filtered and then rectified,
is filtered by the components at pins 41 and 39
(PRES DET L and PRES DET R). The DC level at this pin
is then compared with an internal reference voltage. If the
level at pins 41 and 39 exceeds this voltage level, the
presence detector output goes HIGH (no carrier).

To adjust for different (main channel) modulation depths
used at some satellites the audio level is made adjustable,
the signal can be controlled in steps of 1 dB from

−12 dB to +3 dB by the LEV signal.

Noise Reduction (NR)

To improve the quality of the secondary channels, the
audio signal is processed at the transmitter side before
modulation. For an overall flat audio response the inverse
processing must take place after demodulation. This is
achieved in the NR.

The NR can be regarded as an input level dependent
Low-Pass Filter (LPF) [adaptive de-emphasis system]
followed by a fixed de-emphasis. Figure 3 shows the
transfer characteristics as function of the input level
(normalized to input level, and without the fixed
de-emphasis).

At maximum input level (50 kHz frequency deviation,
referred to as 0 dB) the frequency response of the first part
(i.e. without fixed de-emphasis) is nearly flat (note the
small dip around 3 kHz in Fig.3; this is a system attribute).
As the input level is X dB lowered, the higher output
frequencies will be reduced an extra X dB with respect to
the lower frequencies (1 : 2 expansion).

If a main carrier signal is received, the NR can be
bypassed at which the signal is fed directly to the
de-emphasis circuit. The noise reduction is active when
the NR signal (via I

2

C-bus) is logic 1.

TDA8745

This output signal can be used to drive the output mute (if
bit PDM = 1; see Section “Output selection”) and can be
monitored by reading bits PDL and PDR. The detection
level can be modified by changing the leakage resistor at
pins 41 and 39, a higher resistor value gives a ‘no carrier’
response ant C/N levels detected as ‘carrier present’ with
a lower resistor value.

Audio level control

Each demodulator output signal is amplified in a buffer
amplifier and DC decoupled by means of electrolytic
capacitors connected to pin 42 (left) and pin 1 (right).

The output level of all channels is −6 dBV typical at a
frequency deviation of the FM signal of 54% of the
maximum deviation (i.e 0.54 × 85 kHz = 46 kHz for the
main channel and 0.54 × 50 kHz = 27 kHz for the
secondary channels) at 1 kHz modulation frequency
(reference level).

1996 Mar 11 9

De-emphasis

De-emphasis is realized by means of several internal
resistors and an external capacitor to ground. Via the

2

I

C-bus, the DEM signal can be switched between 50 µs,
75 µs, J17 and no de-emphasis. Figure 4 shows these
four different possibilities.

Output selection

With the output selector the output pins 23 and 22 can be
switched to the left and right satellite channels
(pins 33 and 31) or to the external inputs (pins 25 and 24)
for an other signal source or for connection of a decoder
box. the OS1 and OS0 bits determine this selection.

Pin 21 is a separate output which delivers the mono
channel. The mono signal is the sum of pin 23 (left) and
pin 22 (right) output signal [

1

⁄2(l + r)].

Philips Semiconductors Preliminary specification

Satellite sound receiver with I2C-bus control

Output pins 23 and 22 can be muted by setting the
OML and OMR signals to logic 1. In addition, automatic
muting is also possible, the presence detector (as
described in Section “Presence detector”) sets the PDL bit
(PDR for other channel). Absence of a carrier at the
selected frequency results in automatic muting. This
mechanism is enabled or inhibited by the PDM bit
(Presence Detector auto Mute).

All outputs (pins 21, 22 and 23) are line drivers with
SCART level capability and are short-circuit protected by
means of 125 Ω output resistors. Pins 34 and 30 are also
line drivers at SCART level and can be used as signal
outputs before the IC’s output selection (i.e. for decoder
box use).

ABBREVIATIONS

BPF = Band-Pass Filter.

= modulating frequency.

f

mod

∆fM= frequency deviation of the main Channel.
∆fS1= frequency deviation of secondary Channel 1 (left).
∆fS2= frequency deviation of secondary Channel 2 (right).

f
f
f
IF = Intermediate Frequency.
IL = Input Left.
IR = Input Right.
LPF = Low-Pass Filter.
NR = Noise Reduction.
OML = Output Mute Left.
OMR = Output Mute Right.
OS = Output Select.
PDM = Presence Detector auto Mute.
PE = Port Extension.
PLL = Phase-Locked Loop.
POR = Power-On Reset.
S/N = Signal-to-Noise ratio.
VCO = Voltage Controlled Oscillator.

= carrier frequency of main Channel.

OM

= carrier frequency of secondary Channel 1.

OS1

= carrier frequency of secondary Channel 2.

OS2

TDA8745

MBE284

0 dB

20 dB

4

10

f (Hz)

5

10

transfer

(dB)

0

4

8

12

16

20

24

10

handbook, halfpage

2

10

3

10

Fig.4 Noise reduction transfer as function of

input level.

1996 Mar 11 10

transfer

(dB)

8

4

0

4

8

12

16

10

handbook, halfpage

Fig.5 LF de-emphasis curves.

MBE285

flat

75 µs

10

50 µs

4

f (Hz)

5

10

J17

2

10

3

10

Philips Semiconductors Preliminary specification

(1)

i1

TDA8745

R/W

TUN8

Satellite sound receiver with I2C-bus control

I2C-BUS PROTOCOL
Table 1 Slave receiver/transmitter address: D4 or D6 (HEX)

BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0

110101AS

Notes

1. AS bit defined by level at address select (pin 12); 0 V = logic 0; 5 V = logic 1.

2. R/W = 0; TDA8745 is receiver (microcontroller is master transmitter).
R/W = 1; TDA8745 is transmitter (microcontroller is master receiver).

TDA8745 receiver use

In the receiver mode the device has four subaddresses with auto-increment, as shown in Tables 2 to 5.

Table 2 Input byte SA: 00; situation after POR

IL2

i7

00000110

IL1

i6

IL0

i5

IR2

i4

IR1

i3

IR0

i2

TUN9

(2)

i0

Table 3 Tuning byte SA: 01; situation after POR

TUN7

t7

11101100

Table 4 Select byte SA: 02; situation after POR

TEST

s7

00000011

Table 5 Audio byte SA: 03; situation after POR

LEV3

a7

11001110

TDA8745 transmitter use

No subaddress.

Table 6 Read byte

PDL

r7

0 or 10 or 1111110 or 1

TUN6

t6

BB

s6

LEV2

a6

PDR

r6

TUN5

t5

OS1

s5

LEV1

a5

−

r5

TUN4

t4

OS0

s4

LEV0

a4

−

r4

TUN3

t3

PDM

s3

NR

a3

−

r3

TUN2

t2

PE

s2

DEM1

a2

−

r2

TUN1

t1

OML

s1

DEM0

a1

−

r1

TUN0

t0

OMR

s0

BPFN

a0

POR

r0

1996 Mar 11 11

Philips Semiconductors Preliminary specification

Satellite sound receiver with I2C-bus control

Slave receiver mode (bits transmitted from microcontroller to TDA8745)

Different IF inputs can be selected for the PLLs, for switching between different external BPFs and/or channels;
see Tables 7 and 8.

Table 7 IL2 to IL0; Input Left; note 1

IL2

i7

0000IF input IN-1 selected for left PLL (after POR)
0010IF input IN-2 selected for left PLL
0100IF input IN-3 selected for left PLL
0110IF input IN-4 selected for left PLL
1000IF input IN-5 selected for left PLL
1010IF input IN-6 selected for left PLL
1100no selection
1110no selection
X 0 0 1 IF input IN-1 selected for left PLL
X 0 1 1 IF input IN-2 selected for left PLL
X 1 0 1 IF input IN-3 selected for left PLL
X 1 1 1 IF input IN-4 selected for left PLL
0 X X 1 IF input IN-5 used as output; 0 = 0 V
1 X X 1 IF input IN-5 used as output; 1 = 5 V

IL1

i6

IL0

i5

PE

s2

(2)

MODE

TDA8745

Notes

1. X = don’t care.

2. Bit PE (s2) can be set to logic 1 to change IF input 5 into digital output for external switching purposes.

1996 Mar 11 12

Philips Semiconductors Preliminary specification

Satellite sound receiver with I2C-bus control

Table 8 IR2 to IR0; input right; note 1

IR2

i4

0000IF input IN-1 selected for right PLL
0010IF input IN-2 selected for right PLL (after POR)
0100IF input IN-3 selected for right PLL.
0110IF input IN-4 selected for right PLL
1000IF input IN-5 selected for right PLL
1010IF input IN-6 selected for right PLL
1100no selection
1110no selection
X 0 0 1 IF input IN-1 selected for right PLL
X 0 1 1 IF input IN-2 selected for right PLL
X 1 0 1 IF input IN-3 selected for right PLL
X 1 1 1 IF input IN-4 selected for right PLL
0 X X 1 IF input IN-6 used as output; 0 = 0 V
1 X X 1 IF input IN-6 used as output; 1 = 5 V

IR1

i3

IR0

i2

PE

s2

(2)

MODE

TDA8745

Notes

1. X = don’t care.

2. Bit PE (s2) can be set to logic 1 to change IF input 6 into digital output for external switching purposes.

1996 Mar 11 13

Philips Semiconductors Preliminary specification

Satellite sound receiver with I2C-bus control

TDA8745

Table 9 TUN9 to TUN0; tuning

TUN9i1TUN8i0TUN7t7TUN6t6TUN5t5TUN4t4TUN3t3TUN2t2TUN1t1TUN0

t0

10.7 IF
(MHz)

0110101100 3.82 4.00
0110101101 3.83 4.01
0110101110 3.84 4.02

0110101111 to 1001010011 3.85 to 5.49 4.03 to 5.67

1001010100 5.50 5.68

1001010101 to 1010000101 5.51 to 5.99 5.69 to 6.17

1010000110 6.00 6.18

1010000111 to 1010110111 6.01 to 6.49 6.19 to 6.67

1010111000 6.50 6.68

1010111001 to 1011101011 6.51 to 7.01 6.69 to 7.19

10111011007.02

(1)

1011101101 to 1100001111 7.03 to 7.37 7.21 to 7.55

1100010000 7.38 7.56

1100010001 to 1100110011 7.39 to 7.73 7.57 to 7.91

1100110100 7.74 7.92

1100110101 to 1111111100 7.75 to 9.74 7.93 to 9.92
1111111101 9.75 9.93
1111111110 9.76 9.94
1111111111 9.77 9.95

10.52 IF
(MHz)

(1)

7.20

Note

1. This is the situation after POR.

The frequency range of synthesizer is shown in Table 10.

Table 10 Frequency range of synthesizer

PARAMETER

RANGE

(MHz)

Synthesizer frequency range 29.04 to 40.94 (in 20 kHz grid); note 1
Mixer input frequency range 14.52 to 20.47 (in 10 kHz grid); note 2
Tuning range 3.82 to 9.77 (in 10 kHz grid; 10.7 MHz IF); note 3

Notes

1. Tuning the synthesizer below 29.04 MHz may be possible, but is not guaranteed.

2. The mixing frequency (f
f

= (1024 + 512[TUN9] + 256[TUN8] + 128[TUN7] + 64[TUN6] + 32[TUN5] + 16[TUN4] + 8[TUN3] + 4[TUN2] +

mix

) can be calculated with equation:

mix

2[TUN1] + [TUN0]) × 10 kHz.

3. Tuning frequency = mixer input frequency − 10.7 MHz.

1996 Mar 11 14

Philips Semiconductors Preliminary specification

Satellite sound receiver with I2C-bus control

TDA8745

Table 11 Bit TEST

TEST

s7

MODE DESCRIPTION

0 − (POR) in applications this bit should always be logic 0, to avoid conflicts with other settings
1 test setting TEST enables some special modes used for factory testing

Table 12 Bit BB; baseband; note 1

BB

s6

MODE DESCRIPTION

0 synthesizer synthesizer use (PLLs central frequency approximately 10.7 MHz) (after POR)
1 baseband baseband use (PLLs central frequency approximately 6 MHz)

Note

1. The PLL demodulators can also be used for demodulating FM carriers (e.g. terrestrial TV sound) at baseband
frequencies, by changing the lock range of the PLLs.

Table 13 Bits OS1 and OS0; output select; note 1

OS1

s5

0 0 stereo (POR) Left channel audio (pin 33) at O
0 1 left Left channel audio (pin 33) at both OLand O
1 0 right Right channel audio (pin 31) at both OLand O
1 1 external External left at (pin 25) at OL; external right (pin 24) at O

OS0

s4

MODE DESCRIPTION

; right channel audio (pin 31) at O

L

R

R

R

R

Note

1. The signal at both line outputs O

and OR (pins 23 and 22) can be selected with bits OS1 and OS0.

L

Table 14 Bit PDM; Presence Detector auto Mute; note 1

PDM

s3

MODE DESCRIPTION

0 − (POR) −
1 PDM if this bit is set to logic 1, a channel for which no incoming carrier is found will be muted

Note

1. In both situations the status of the presence detector can be monitored by reading the bits PDL (r7) and PDR (r6)
back from the IC. Appropriate action (e.g. muting, channel selection or tuning) can then be taken by the
microcontroller. Note that this function also mutes the signal from the external inputs (pins 25 and 24). This may be
desirable when using these inputs for connecting a satellite descrambler box. If not, reset PDM (s3) to logic 0 when
selecting external [e.g. together with bits OS1 (s5) and OS0 (s4)].

1996 Mar 11 15

Philips Semiconductors Preliminary specification

Satellite sound receiver with I2C-bus control

Table 15 Bit PE; Port Extension; note 1

PE

s2

0 6 IF inputs; no digital output (after POR)
1 4 IF inputs; 2 digital outputs

Note

1. Two IF inputs (IN-5 and IN-6; pins 7 and 8) can be used as digital output instead. If no more than four IF inputs are
needed, two external functions can be controlled via the I2C-bus this way. The level at these pins is controlled by
bits IL2 (i7) and IR2 (i4); see Tables 7 and 8.

Table 16 Bits OML and OMR; Output Mute Left and Output Mute Right; note 1

BIT LEVEL MODE DESCRIPTION

OML (s1) 0 −−

1 mute Left audio channel is muted

OMR (s0) 0 −−

1 mute Right audio channel is muted

Note

1. Left and right audio can be muted independently. Note that also the external input signals (pins 25 and 24) can be
muted this way.

DESCRIPTION

TDA8745

1996 Mar 11 16

Philips Semiconductors Preliminary specification

Satellite sound receiver with I2C-bus control

TDA8745

Table 17 Bits LEV3 to LEV0; level adjust; note 1

LEV3

a7

LEV2

a6

LEV1

a5

LEV0

a4

MODE

SECONDARY

CHANNELS

(kHz)

(2)

MAIN CHANNEL

(kHz)

0000−12 dB 199 338
0001−11 dB 177 302
0010−10 dB 158 269
0011−9 dB 141 240
0100−8 dB 126 214
0101−7 dB 112 190
0110−6 dB 100 170
0111−5 dB 89 151
1000−4 dB 79 135
1001−3 dB 71 120
1010−2 dB 63 107
1011−1dB 56 95
1100 0dB 50

(3)

85
1101+1dB 45 76
1110+2dB 40 68
1111+3dB 35 60

(2)

(3)

Notes

1. The audio level can be adjusted in steps of 1 dB, to adjust for different FM deviations used in main channel audio
carriers and/or spread in PLL output amplitude. With secondary carriers the Noise Reduction (NR) is to be used with
the 0 dB setting (note that the NR audio frequency response is level dependent, therefore another setting than 0 dB
is only to be used when making a fine-adjustment (+2 dB/−2 dB) for PLL spread. Typical setting for main channel
carriers is in most cases 85 kHz (0 dB) or 76 kHz (+1 dB).

2. Maximum deviation.

3. Situation after POR.

Table 18 Bit NR; Noise Reduction; note 1

NR

a3

MODE DESCRIPTION

0 NR bypassed Noise Reduction bypassed (main channel)
1 NR active Noise Reduction active (secondary channels) (after POR)

Note

1. For reception of main channel carriers the NR circuit can be bypassed.

1996 Mar 11 17

Philips Semiconductors Preliminary specification

Satellite sound receiver with I2C-bus control

Table 19 Bits DEM1 and DEM0; De-emphasis; note 1;

see Fig.5

DEM1

a2

0 0 no de-emphasis (flat)
0 1 J17
1050µs
1175µs [por]

Notes

1. Different de-emphasis characteristics can be selected,
to adjust for different main channel audio carriers.

2. In most cases the de-emphasis needed for main
channel carriers is 50 µs.

3. The NR is to be used with the 75 µs setting for
standard secondary channels.

Table 20 Bit BPFN; Band-Pass Filter Not; note 1

BPFN

a0

0 mixer input signal filtered by BPF

1 mixer input signal is not filtered

Note

1. To avoid interference by the video signal, the incoming
baseband signal is filtered. If this filtering is not
required the filter can be switched off.

DEM0

a1

(after POR)

DE-EMPHASIS

(2)

(3)

DESCRIPTION

Slave transmitter mode (bits transmitted from
TDA8745 to microcontroller)

Table 21 Bit PDL; Presence Detector Left; note 1

Note

1. Bit PDL (r7) transmits the current status of the left

Table 22 Bit PDR; Presence Detector Right; note 1

Note

1. Bit PDR (r6) transmits the current status of the right

TDA8745

PDL

r7

0 carrier detected at left channel
1 no carrier detected at left channel

channel presence detector. When PDL = 1, no carrier
is found at the currently selected frequency. If bit
PDM (s3) = 0 the left channel audio is muted.

PDR

r6

0 carrier detected at right channel
1 no carrier detected at right channel

channel presence detector. When PDR = 1, no carrier
is found at the currently selected frequency. If bit
PDM (s3) = 0 the right channel audio is muted.

DESCRIPTION

DESCRIPTION

Table 23 Bit POR; Power-On Reset; note 1

POR

r0

0 normal operation
1 POR generated; power dip detected since last read of POR bit

Note

1. At switching on, or after a power dip on the I2C-bus supply voltage (VP2), an internal signal is generated which resets
the I2C-bus registers to a pre-defined state. If bit POR (r0) = 1, such a situation has occurred since the last time the
read byte was read. After reading, the bit is reset to logic 0.

Table 24 Bits r5 to r1

−

r5

11111These bits have no function. Although their state is fixed, the microcontroller

1996 Mar 11 18

r4

−

r3

−

r2

−

−

r1

should not rely on this because of eventual future use.

DESCRIPTION

DESCRIPTION

Philips Semiconductors Preliminary specification

Satellite sound receiver with I2C-bus control

TDA8745

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

P1

V

P2

V

P3

V

n

synthesizer and mixer supply voltage note 1 0 5.5 V
I2C-bus supply voltage note 1 0 5.5 V
general supply voltage note 1 0 13.2 V
voltage on pins 2, 3, 5 and 40 note 1 0 5.5 V
voltage on pins 7 and 8 note 2 0 V

P2

voltage on pins 1 and 42 note 1 0 7.7 V
V
T
T

i
stg
amb

input voltage on pins 7, 8, 9, 11,13 and 15 notes 1 and 3 0 1 V

storage temperature −65 +150 °C

operating ambient temperature −20 +70 °C

Notes

1. All voltages referenced to ground at pins 6, 10, 14 and 32.

2. Port Extension enabled (PE = 1; see Table 15).

3. IN-5 and IN-6 (pins 7 and 8) not being in the Port Extension mode.

V

THERMAL CHARACTERISTICS

SYMBOL PARAMETER VALUE UNIT

R

th j-a

thermal resistance from junction to ambient in free air

SDIP42 50 K/W
QFP44 60 K/W

1996 Mar 11 19

Philips Semiconductors Preliminary specification

Satellite sound receiver with I2C-bus control

TDA8745

DC CHARACTERISTICS

All voltages referenced to ground (pins 6, 10, 14 and 32). In accordance with the block diagram (see Fig.1);
VP1=VP2=5V; VP3=12V; T

amb

=25°C; f

= 10.7 MHz; f

OS1

= 10.52 MHz (no modulation; see note 1); unless

OS2

otherwise specified.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Supply

V

P1

V

P2

V

P3

I

P1

I

P2

I

P3

P

tot

synthesizer and mixer supply voltage 4.5 5.0 5.5 V
I2C-bus supply voltage 4.5 5.0 5.5 V
general supply voltage 8.0 12 13.2 V
synthesizer and mixer supply current − 37 48 mA
I2C-bus supply current − 0.6 − mA
general supply current − 35 46 mA
total power dissipation − 610 800 mW

Pins

V

21,22,23

V

24,25,31,33

V

31,33

V

30,34

V

27,37

V

19

V

9,11,13,15

V

42,1

V

41,39

V

5

V

3

V

2

V

40

voltage on pins 21, 22 and 23 − 3.8 − V
voltage on pins 24, 25, 31 and 33 − 3.8 − V
voltage on pins 31 and 33 − 3.8 − V
voltage on pins 30 and 34 − 3.8 − V
voltage on pins 27 and 37 − 3.8 − V
voltage on pin 19 3.7 3.8 3.9 V
voltage on pins 9, 11, 13 and 15 note 2 − 0 − V
voltage on pins 42 and 1 − 3.4 − V
voltage on pins 41 and 39 − 2.6 − V
voltage on pin 5 − 1.8 − V
voltage on pin 3 − 2.4 − V
voltage on pin 2 − 2.6 − V
voltage on pin 40 − 1.3 − V

Port extensions (pins 7 and 8; bit PE = 1)

V

OH

V

OL

HIGH level output voltage IOH= 0.5 mA 4.5 − 5V
LOW level output voltage IOL= −0.5 mA 0 − 0.5 V

Notes

1. Presence of both carriers is required to achieve lock of the PLLs; otherwise not all pins will have a stable DC voltage.

2. Pin 7 and 8 functioning as normal inputs (bit PE = 0).

1996 Mar 11 20

Philips Semiconductors Preliminary specification

Satellite sound receiver with I2C-bus control

TDA8745

AC CHARACTERISTICS

All voltages referenced to ground (pins 6, 10, 14 and 32); in accordance with the block diagram (see Fig.1);
VP1=VP2=5V; VP3=12V; T
fOM= 10.7 MHz; f

= 10.7 MHz; f

OS1

amb

=25°C; f

= 10.52 MHz; IF level at pins 9, 11,13, 15, 7 and8=20mV (RMS value) and

OS2

= 1 kHz; ∆fM= 46 kHz; ∆fS1= ∆fS2= 27 kHz (reference levels);

mod

SFE 10.7MJA (narrow), SFE 10.52MJA (narrow) and SFE 10.7MS3 (wide) ceramic filters; unless otherwise specified.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Band-pass filter, mixer and buffer

R
V
V
H

i
i(rms)
3

l/Hh

input resistance 10 12.5 15 kΩ
baseband input voltage (RMS value) note 1 −−200 mV
1 dB compression point (RMS value) ∆V3−∆V5= 1 dB; note 2 − 180 − mV
filter transfer at 200 kHz

−−−60 dB

with respect to 7.3 MHz

H

lm/Hh

filter transfer at 2 MHz

−−28 −20 dB

with respect to 7.3 MHz

H

mh/Hh

filter transfer at 5.3 MHz

−2+2+4dB

with respect to 7.3 MHz

*A filter transfer at 7.3 MHz and

H

h

15 17 19 dB

mixer amplification

H

*C filter transfer at 7.3 MHz and

h

note 3 10 12 14 dB

mixer conversion gain

I

o(p)

R

o

mixer output current (peak) 5 7 − mA
mixer output resistance f = 10.7 MHz; note 4 − 12 30 Ω

Charge pump, buffer amplifier and VCO

t repetition time of charge pump pulses − 50 −µs
S

VCO

f

VCO

VCO sensitivity note 5 −−9−MHz/V
VCO frequency V

= 2.6 V − 35.4 − MHz

loopf

Crystal oscillator (4 MHz)

f
R
C
I

xtal

xtal

xtal

i(p)

crystal oscillator frequency − 4 − MHz
resonance resistance of crystal −−60 Ω
parallel capacitance of crystal − 4.5 10 pF
input current from external 4 MHz

note 6 50 −−µA

source (peak)

IF inputs (pins 9, 11, 13, 15, 7 and 8) and limiters

V

IN-1 to IN-6(rms)

input sensitivity (RMS value) S/N(A) = 40 dB;

∆fS= 27 kHz; NR = on;
de-emphasis = 75 µs

S/N(A) = 40 dB;
∆f
de-emphasis = 50 µs

V

i1

to V

i6

input signal THD ≤ 0.5% −−200 mV

1996 Mar 11 21

= 46 kHz; NR = off;

M

− 0.3 1 mV

− 0.8 2 mV

Philips Semiconductors Preliminary specification

Satellite sound receiver with I2C-bus control

TDA8745

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

PLL FM demodulators

f

CCO

free-running frequency PLL left; BB = 0 − 10.6 − MHz

PLL right; BB = 0 − 10.6 − MHz
PLL left; BB = 1 − 6.9 − MHz
PLL right; BB = 1 − 6.9 − MHz

∆f

CCO

lock range of PLLs BB= 0; note 7 10 − 11.5 MHz

BB = 1; note 7 5.50 − 8.50 MHz

V

OL

; V

OR

PLL output voltage (pins 23 and 22) NR = off; DEEM = flat;

−−5.6 − dBV

BB = 0
NR = off; DEEM = flat;

−−7.3 − dBV

BB = 1; note 8

∆VOL; ∆V

OR

spread of PLL output voltage over
lock range (pins 23 and 22)

NR = off; DEEM = flat;
BB = 1; note 8

−−±1.5 dB

Noise reduction

V

37,27 (50 kHz)

--------------------------------­V

37,27 (1 kHz)

V

o 23,22

low-pass filter 50 kHz response
with respect to 1 kHz

output voltage (pins 23 and 22) at 0 dB NR input level;

note 9 −21 −16 −11 dB

−1+1+3dBV

∆fS1= ∆fS2= 50 kHz;

DEEM = flat; note 10
at −20 dB NR input level;

∆f

= ∆fS2= 5 kHz;

S1

−29 −26 −23 dBV

DEEM = flat

V

23,22 (15 kHz)

--------------------------------- ­V

23,22 (1 kHz)

15 kHz frequency response
with respect to 1 kHz

at 0 dB NR input level;
∆f

= ∆fS2= 50 kHz;

S1

DEEM = flat
at −20 dB NR input level;

∆f

= ∆fS2= 5 kHz;

S1

−2 0 +2 dB

−13 −11.5 −10 dB

DEEM = flat

V

offset(DC)

DC offset voltage on attack/recovery

∆f = 0 kHz; all PLLs locked 14 − 22 mV

capacitors (pins 38 and 26)

De-emphasis

V

23,22 (15 kHz)

--------------------------------- ­V

23,22 (1 kHz)

15 kHz frequency response
with respect to 1 kHz flat

NR = off; DEEM = flat −0.5 0.0 +0.5 dB
NR = off; DEEM = J17;

note 11
NR = off; DEEM = 50 µs −15.2 −13.7 −12.2 dB
NR = off; DEEM = 75 µs −18.6 −17.1 −15.6 dB

R

o

output resistance (pins 34 and 30) 100 125 150 Ω

1996 Mar 11 22

−13.9 −12.4 −10.9 dB

Philips Semiconductors Preliminary specification

Satellite sound receiver with I2C-bus control

TDA8745

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Overall performance

V

i 3(rms)

baseband input sensitivity main
sound carrier (RMS value)

S/N(A) = 40 dB;

∆fS= 27 kHz; NR = on;

− 0.5 1.5 mV

DEEM = 75 µs
S/N(A) = 40 dB;

= 46 kHz; NR = off;

∆f

M

− 1.5 3 mV

DEEM = 50 µs

V

o 23,22

output voltage secondary channels;

−8 −6 −4 dBV

∆fS= 27 kHz; NR = on;

DEEM = 75 µs
main channel;

∆f

= 46 kHz; NR = off;

S

−8 −6 −4 dBV

DEEM = 50 µs

UBS unbalance output voltage secondary channels;

−1 − +1 dBV

NR = on; DEEM = 75 µs
main channel; NR = off;

−1 − +1 dBV

DEEM = 50 µs

THD total harmonic distortion secondary channels;

− 0.1 0.5 %
NR = on; DEEM = 75 µs;
note 12

main channel; NR = off;

− 0.1 0.5 %
DEEM = 50 µs; note 12

S/N(A) signal-to-noise ratio A-weighted; secondary

69 77 − dB
channels (synthesizer
included); NR = on;
DEEM = 75 µs; note 12

A-weighted; secondary

72 80 − dB
channels (synthesizer
excluded); NR = on;
DEEM = 75 µs; note 12

A-weighted; main channel

54 62 − dB
(synthesizer included);
NR = off; DEEM = 50 µs;
note 12

A-weighted; main channel

62 70 − dB
(synthesizer excluded);
NR = off; DEEM = 50 µs;
note 12

MUTE

att

mute attenuation output select left and right

74 90 − dB
muted

α

ct S/S

crosstalk attenuation between

− 74 − dB

secondary channels

SVRR

P3

supply voltage ripple rejection VRR= 100 mV; fi= 70 Hz;

− 14.3 − dB

NR = on; DEEM = 75 µs

= 100 mV; fi= 1 kHz;

V

RR

− 15.6 − dB

NR = on; DEEM = 75 µs

1996 Mar 11 23

Philips Semiconductors Preliminary specification

Satellite sound receiver with I2C-bus control

TDA8745

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

SVRR

P1-P2

supply voltage ripple rejection VRR= 100 mV; fi= 70 Hz;

− 25 − dB

NR = on; DEEM = 75 µs
V

= 100 mV; fi= 1 kHz;

RR

− 4 − dB

NR = on; DEEM = 75 µs

Output select

V

i 25,24

R

i 25,24,33,31

input voltage (pins 25 and 24) −−8 dBV
input resistance at

100 150 200 kΩ

pins 25, 24, 33 and 31

V

o 23,22

output voltage at pins 23 and 22 V

24,25

= −6 dBV;

−6.5 −6 −5.5 dBV

OS = external

R

o 23,22,21

output resistance at

100 125 150 Ω

pins 23, 22 and 21

THD total harmonic distortion V

24,25

= −6 dBV;

− 0.01 0.3 %

OS = external; f=1kHz

S/N(A) signal-to-noise ratio A-weighted;

V

= −6 dBV;

24,25

80 −−dB

OS = external

α

; α

ct L/R

ct R/L

2

C-bus

I

C

i

I

sink

V

IH

V

IL

I

IH

I

IL

Address D4H address D4H ADD
Address D6H address D6H ADD
f

SCL

crosstalk between channels f = 1 kHz − 80 − dB

input capacitance − 4 − pF
SDA sink current 3 −−mA
HIGH level input voltage 3 − 5V
LOW level input voltage 0 − 1.5 V
HIGH level input current −−10 µA
LOW level input current −−10 µA

= LOW 0 − 1V

sel

= HIGH 3 − 5V

sel

SCL frequency −−100 kHz

Notes

1. Maximum of 0.5% THD at LF outputs.

2. When the increase of the output signal (pin 5 at 10.7 MHz) lags 1 dB behind the increase of the input signal
(pin 3; 7.02 MHz carrier), the so called 1 dB compression point is reached. For complex signals (more than one
sound carrier), this point will shift to a higher value.

3. The mixer performs both a mixing and amplifying action (normal operation). The synthesizer is tuned to the 7.3 MHz
incoming carrier.

4. The buffer output is sensitive to capacitive loading, therefore (capacitive) loads other than those present in the block
diagram (see Fig.1) should be avoided.

5. As present at the mixer output (pin 5) in ‘BPFTILT’ test mode the actual VCO sensitivity is two times the given value
because of the divide-by-two circuit between VCO output and mixer.

6. The required 4 MHz crystal can be omitted if this frequency is already available in the application. This signal source
should be connected to pin 40, via a capacitor in series with a resistor R
50 µA, determined by the resistors R

and R

int

and the level of the 4 MHz AC voltage. The value of R

ext

. The minimum required AC current is

ext

is 700 Ω

int

and the signal shape of the signal is not important.

1996 Mar 11 24

Philips Semiconductors Preliminary specification

Satellite sound receiver with I2C-bus control

7. Maximum THD of 0.5%; 8 V < VP3< 13.2 V; 0 °C<T

<70°C. Measured at pins 34 and 30; NR = off;

amb

TDA8745

DEEM = flat.

8. Correction of output voltage is possible by correcting the volume level.

9. Measured at pins 37 and 27 with no electrolytic capacitors connected to these pins.

10. Input level of 0 dB; signal level in accordance with ∆fS1= ∆fS2= 50 kHz. At this input level, the NR response is equal
for high and low frequencies (see Fig.4).

11. J17 de-emphasis includes +6 dB amplification (see Fig.5).

12. Both PLLs locked.

INTERNAL CIRCUITRY

For description see Chapter “Pinning”.

SYMBOL PIN EQUIVALENT CIRCUIT

C

DC R

1

20 Ω

1

20 Ω

SLF 2

2 kΩ 1 kΩ

2 kΩ

1640 Ω

1640 Ω

2 kΩ

MLD094

275 Ω

2

MLD095

1996 Mar 11 25

Philips Semiconductors Preliminary specification

Satellite sound receiver with I2C-bus control

SYMBOL PIN EQUIVALENT CIRCUIT

BASEBAND IN 3

3

12.5 kΩ

2.5 V

V

P1

IF OUT 5

4

4V

TDA8745

MLD096

P1

MLD060

SYNGND 6

IN-5 7

5

MLD061

6

275 Ω

7

SYNGND

MLD062

MLD063

1996 Mar 11 26

Philips Semiconductors Preliminary specification

Satellite sound receiver with I2C-bus control

SYMBOL PIN EQUIVALENT CIRCUIT

IN-6 8

8

IN-1 9

275 Ω

275 Ω

9

TDA8745

MLD097

MLD064

HFGND 10

IN-2 11

ADD

sel

12

10

275 Ω

11

275 Ω

12

HFGND

MLD065

MLD066

MLD067

1996 Mar 11 27

Philips Semiconductors Preliminary specification

Satellite sound receiver with I2C-bus control

SYMBOL PIN EQUIVALENT CIRCUIT

IN-3 13

13

I2CGND 14

IN-4 15

275 Ω

14

2

I CGND

MLD068

TDA8745

MLD114

V

P2

16

SCL 17

SDA 18

15

18

275 Ω

MLD098

275 Ω

V

MLD069

P2

MLD070

16

275 Ω

17

1996 Mar 11 28

MLD071

Philips Semiconductors Preliminary specification

Satellite sound receiver with I2C-bus control

SYMBOL PIN EQUIVALENT CIRCUIT

V

ref

V

P3

19

20

275 Ω

25 Ω

19

20

40 kΩ

125 Ω

15.2 kΩ

MLD073

TDA8745

MLD072

V

P3

O

M

O

R

21

22

3.8 V

3.8 V

125 Ω

125 Ω

21

MLD074

22

MLD075

1996 Mar 11 29

Philips Semiconductors Preliminary specification

Satellite sound receiver with I2C-bus control

SYMBOL PIN EQUIVALENT CIRCUIT

O

L

EXT

R

23

24

125 Ω

3.8 V

transfer gate

24

20 Ω 103 kΩ

transfer gate

TDA8745

23

MLD076

I

O

I

O

EXT

L

C

ATT/RECR

25

26

47 kΩ

3.8 V 3.8 V

transfer gate

I

O

25

20 Ω 103 kΩ

I

O

transfer gate

47 kΩ

3.8 V 3.8 V

100 Ω

100 Ω

MLD077

MLD078

26

1996 Mar 11 30

3.8 V

MLD079

Philips Semiconductors Preliminary specification

Satellite sound receiver with I2C-bus control

SYMBOL PIN EQUIVALENT CIRCUIT

RECT

C

NR D R

R

27

28

27

28

4.7 kΩ

275 Ω

TDA8745

MLD080

AC signal current

7.5 kΩ

C

DR

29

DEEM OUT R 30

C

CL R

31

MLD081

transfer gate

I

O

125 Ω

I

29

31

20 Ω 103 kΩ

O

transfer gate

3.8 V

transfer gate

I

O

I

O

transfer gate

30

MLD082

1996 Mar 11 31

47 kΩ

3.8 V 3.8 V

MLD083

Philips Semiconductors Preliminary specification

Satellite sound receiver with I2C-bus control

SYMBOL PIN EQUIVALENT CIRCUIT

AFGND 32

AFGND

transfer gate

transfer gate

47 kΩ

C

CL L

33

32

33

20 Ω 103 kΩ

TDA8745

substrate

MLD084

I

O

I

O

DEEM OUT L 34
C

DL

C

NR D L

35

36

3.8 V 3.8 V

transfer gate

I

O

I

35

36

O

transfer gate

3.8 V

AC signal current

7.5 kΩ

275 Ω

MLD085

125 Ω

34

MLD086

1996 Mar 11 32

MLD224

Philips Semiconductors Preliminary specification

Satellite sound receiver with I2C-bus control

SYMBOL PIN EQUIVALENT CIRCUIT

RECT

C

ATT/RECL

L

37

38

37

4.7 kΩ

100 Ω

100 Ω

3.8 V

TDA8745

MLD088

38

PRES DET R 39

XTAL 40

MLD089

100 Ω

39

100 Ω

MLD090

40

MLD091

1996 Mar 11 33

Philips Semiconductors Preliminary specification

Satellite sound receiver with I2C-bus control

SYMBOL PIN EQUIVALENT CIRCUIT

PRES DET L 41

100 Ω

C

DC L

41

42

42

100 Ω

20 Ω

20 Ω

TDA8745

MLD092

1640 Ω

1640 Ω

MLD093

1996 Mar 11 34

Philips Semiconductors Preliminary specification

Satellite sound receiver with I2C-bus control

PACKAGE OUTLINES

SDIP42: plastic shrink dual in-line package; 42 leads (600 mil)

D

seating plane

L

Z

42

e

b

TDA8745

SOT270-1

M

E

A

2

A

A

1

w M

b

1

22

c

(e )

M

1

H

pin 1 index

1

0 5 10 mm

scale

DIMENSIONS (mm are the original dimensions)

A

A

A

UNIT b

mm

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

max.

5.08 0.51 4.0

OUTLINE
VERSION

SOT270-1

12

min.

max.

IEC JEDEC EIAJ

1.3

0.8

b

1

0.53

0.40

REFERENCES

0.32

0.23

cEe M

(1) (1)

D

38.9

38.4

14.0

13.7

E

21

(1)

Z

1

L

M

E

3.2

15.80

2.9

15.24

EUROPEAN

PROJECTION

17.15

15.90

e

w

H

0.181.778 15.24

ISSUE DATE

90-02-13
95-02-04

max.

1.73

1996 Mar 11 35

Philips Semiconductors Preliminary specification

Satellite sound receiver with I2C-bus control

QFP44: plastic quad flat package; 44 leads (lead length 1.3 mm); body 10 x 10 x 1.75 mm

c

y

X

A

33 23

34

pin 1 index

44

1

22

Z

E

e

H

E

E

w M

b

p

12

11

A

2

A

A

1

detail X

TDA8745

SOT307-2

Q

(A )

3

L

p

L

θ

w M

b

e

DIMENSIONS (mm are the original dimensions)

mm

OUTLINE

VERSION

SOT307-2

A

max.

2.10

0.25

0.05

1.85

1.65

UNIT A1A2A3b

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

p

D

H

D

cE

p

0.40

0.20

0.25

0.14

0.25

IEC JEDEC EIAJ

Z

D

B

0 2.5 5 mm

scale

(1)

(1) (1)(1)

D

10.1

9.9

REFERENCES

eH

10.1

9.9

12.9

0.8 1.3

12.3

1996 Mar 11 36

v M

H

v M

D

A

B

LLpQZywv θ

E

12.9

12.3

0.95

0.55

0.85

0.75

0.15 0.10.15

EUROPEAN

PROJECTION

Z

D

1.2

1.2

0.8

0.8

ISSUE DATE

92-11-17
95-02-04

E

o

10

o

0

Philips Semiconductors Preliminary specification

Satellite sound receiver with I2C-bus control

SOLDERING
Introduction

There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.

This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in

“IC Package Databook”

our

SDIP

SOLDERING BY DIPPING OR BY WA VE
The maximum permissible temperature of the solder is

260 °C; solder at this temperature must not be in contact
with the joint for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.

The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (T
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.

R

EPAIRING SOLDERED JOINTS

Apply a low voltage soldering iron (less than 24 V) to the
lead(s) of the package, below the seating plane or not
more than 2 mm above it. If the temperature of the
soldering iron bit is less than 300 °C it may remain in
contact for up to 10 seconds. If the bit temperature is
between 300 and 400 °C, contact may be up to 5 seconds.

QFP

REFLOW SOLDERING
Reflow soldering techniques are suitable for all QFP

packages.
The choice of heating method may be influenced by larger

plastic QFP packages (44 leads, or more). If infrared or
vapour phase heating is used and the large packages are
not absolutely dry (less than 0.1% moisture content by
weight), vaporization of the small amount of moisture in
them can cause cracking of the plastic body. For more
information, refer to the Drypack chapter in our

Reference Handbook”

(order code 9398 652 90011).

). If the

stg max

“Quality

(order code 9397 750 00192).

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.

Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary from
50 to 300 seconds depending on heating method. Typical
reflow temperatures range from 215 to 250 °C.

Preheating is necessary to dry the paste and evaporate
the binding agent. Preheat for 45 minutes at 45 °C.

W
Wave soldering is not recommended for QFP packages.

This is because of the likelihood of solder bridging due to
closely-spaced leads and the possibility of incomplete
solder penetration in multi-lead devices.

If wave soldering cannot be avoided, the following
conditions must be observed:

• A double-wave (a turbulent wave with high upward

• The footprint must be at an angle of 45° to the board

Even with these conditions, do not consider wave
soldering the following packages: QFP52 (SOT379-1),
QFP100 (SOT317-1), QFP100 (SOT317-2),
QFP100 (SOT382-1) or QFP160 (SOT322-1).

During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured. Maximum permissible solder
temperature is 260 °C, and maximum duration of package
immersion in solder is 10 seconds, if cooled to less than
150 °C within 6 seconds. Typical dwell time is 4 seconds
at 250 °C.

A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

R
Fix the component by first soldering two diagonally-

opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.

TDA8745

AVE SOLDERING

pressure followed by a smooth laminar wave)
soldering technique should be used.

direction and must incorporate solder thieves
downstream and at the side corners.

EPAIRING SOLDERED JOINTS

1996 Mar 11 37

Philips Semiconductors Preliminary specification

Satellite sound receiver with I2C-bus control

DEFINITIONS

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

TDA8745

PURCHASE OF PHILIPS I

Purchase of Philips I
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.

2

C COMPONENTS

2

C components conveys a license under the Philips’ I2C patent to use the

1996 Mar 11 38

Philips Semiconductors Preliminary specification

Satellite sound receiver with I2C-bus control

NOTES

TDA8745

1996 Mar 11 39

Philips Semiconductors – a worldwide company

Argentina: IEROD, Av. Juramento 1992 - 14.b, (1428)

BUENOS AIRES, Tel. [phone], Fax. [phone]

Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,

Tel. [phone], Fax. [phone]

Austria: Triester Str. 64, A-1101 WIEN, P.O. Box 213,

Tel. [phone], Fax. [phone]

Belgium: Postbus 90050, 5600 PB EINDHOVEN, The Netherlands,

Tel. [phone], Fax. [phone]

Brazil: Rua do Rocio 220 - 5

CEP: 04552-903-SÃO PAULO-SP, Brazil,
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77621 BOGOTA, Tel. [phone],
Fax. [phone]

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COPENHAGEN S, Tel. [phone], Fax. [phone]

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Dr. Annie Besant Rd. Worli, Bombay 400 018
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Indonesia: Philips House, Jalan H.R. Rasuna Said Kav. 3-4,

P.O. Box 4252, JAKARTA 12950,
Tel. [phone], Fax. [phone]

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Tel. [phone], Fax. [phone]

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Piazza IV Novembre 3, 20124 MILANO,
Tel. [phone], Fax. [phone]

Japan: Philips Bldg13-37, Kohnan 2-chome, Minato-ku, TOKYO 108,

Tel. [phone], Fax. [phone]

Korea: Philips House, 260-199 Itaewon-dong,

Yongsan-ku, SEOUL, Tel. [phone], Fax. [phone]

Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA,

SELANGOR, Tel. [phone], Fax. [phone]

Mexico: 5900 Gateway East, Suite 200, EL PASO, TX 79905,

Tel. [phone], Fax. [phone]

th

floor, Suite 51,

Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,

Tel. [phone], Fax. [phone]

New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,

Tel. [phone], Fax. [phone]

Norway: Box 1, Manglerud 0612, OSLO,

Tel. [phone], Fax. [phone]

Pakistan: Philips Electrical Industries of Pakistan Ltd.,

Exchange Bldg. ST-2/A, Block 9, KDA Scheme 5, Clifton,
KARACHI 75600, Tel. [phone],
Fax. [phone]

Philippines: PHILIPS SEMICONDUCTORS PHILIPPINES Inc.,

106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. [phone], Fax. [phone]

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Rua dr. António Loureiro Borges 5, Arquiparque - Miraflores,
Apartado 300, 2795 LINDA-A-VELHA,
Tel. [phone], Fax. [phone]

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Tel. [phone], Fax. [phone]

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195-215 Main Road Martindale, 2092 JOHANNESBURG,
P.O. Box 7430, Johannesburg 2000,
Tel. [phone], Fax. [phone]

Spain: Balmes 22, 08007 BARCELONA,

Tel. [phone], Fax. [phone]

Sweden: Kottbygatan 7, Akalla. S-164 85 STOCKHOLM,

Tel. [phone], Fax. [phone]

Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,

Tel. [phone], Fax. [phone]

Taiwan: PHILIPS TAIWAN Ltd., 23-30F, 66, Chung Hsiao West

Road, Sec. 1. Taipeh, Taiwan ROC, P.O. Box 22978,
TAIPEI 100, Tel. [phone], Fax. [phone]

Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,

209/2 Sanpavuth-Bangna Road Prakanong,
Bangkok 10260, THAILAND,
Tel. [phone], Fax. [phone]

Turkey:Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,

Tel. [phone], Fax. [phone]

Ukraine: Philips UKRAINE, 2A Akademika Koroleva str., Office 165,

252148 KIEV, Tel.[phone], Fax. [phone]

United Kingdom: Philips Semiconductors LTD.,

276 Bath Road, Hayes, MIDDLESEX UB3 5BX,
Tel. [phone], Fax. [phone]

United States:811 East Arques Avenue, SUNNYVALE,

CA 94088-3409, Tel. [phone], Fax. [phone]

Uruguay: Coronel Mora 433, MONTEVIDEO,

Tel. [phone], Fax. [phone]

Internet: http://www.semiconductors.philips.com/ps/
For all other countries apply to: Philips Semiconductors,

International Marketing and Sales, Building BE-p,
P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands,
Telex 35000 phtcnl, Fax. [phone]

SCDS47 © Philips Electronics N.V. 1996

All rights are reserved. Reproduction in whole or in part is prohibited without the
prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation
or contract, is believed to be accurate and reliable and may be changed without
notice. No liability will be accepted by the publisher for any consequence of its
use. Publication thereof does not convey nor imply any license under patent- or
other industrial or intellectual property rights.

Printed in The Netherlands

537021/1100/02/pp40 Date of release: 1996 Mar 11
Document order number: 9397 750 00723