Datasheet tda8718 DATASHEETS (Philips)

Download

Page 1

INTEGRATED CIRCUITS

DATA SH EET

TDA8718

8-bit high-speed analog-to-digital converter

Product speciﬁcation Supersedes data of April 1993 File under Integrated Circuits, IC02

Philips Semiconductors

June 1994

Page 2

Philips Semiconductors Product speciﬁcation

8-bit high-speed analog-to-digital converter TDA8718

FEATURES

• 8-bit resolution

• Sampling rate up to 600 MHz

• ECL (100K family) compatible for digital inputs and

outputs

• Overflow/Underflow output

GENERAL DESCRIPTION

The TDA8718 is an 8-bit analog-to-digital converter (ADC) designed for professional applications. The device converts the analog input signal into 8-bit binary coded digital words at a sampling rate of 600 MHz. It has an effective bandwidth capability up to 150 MHz full-scale sine wave. All digital outputs are ECL compatible.

• 50 Ω load drive capability

• Low input capacitance (5 pF typ.).

APPLICATIONS

• High speed analog-to-digital conversion

• Industrial instrumentation

• Data communication

• RF communication.

QUICK REFERENCE DATA

Measured over full voltage and temperature ranges, unless otherwise speciﬁed.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

EEA

EED

ref

EEA

EED

EEO(L)

EEO(H)

analog supply voltage −4.2 −4.5 −4.8 V digital supply voltage −4.2 −4.5 −4.8 V resistive ladder current R = 48 Ω 30 45 60 mA analog supply current 30 42 54 mA digital supply current 100 120 150 mA LOW level output supply current RL = 50 Ω 40 70 90 mA

HIGH level output supply current RL = 50 Ω 155 170 185 mA ILE DC integral linearity error −±0.7 ±1.0 LSB DLE DC differential linearity error −±0.3 ±0.5 LSB EB effective bits f

clk(max)

tot

maximum clock frequency 600 −−MHz

total power dissipation − 990 1250 mW

= 4.43 MHz; I

= 100 MHz

clk

= 4.43 MHz; I

= 100 MHz

clk

= 45 mA;

ref

= 45 mA;

ref

− 7.5 − bits

− 6.5 − bits

ORDERING INFORMATION

TYPE NUMBER

TDA8718K 28 PLCC28 plastic SOT261-2

June 1994 2

PACKAGE

PINS PIN POSITION MATERIAL CODE

Page 3

Philips Semiconductors Product speciﬁcation

8-bit high-speed analog-to-digital converter TDA8718

BLOCK DIAGRAM

handbook, full pagewidth

reference

voltage middle

reference

voltage TOP

analog

voltage input

reference

voltage BOTTOM

analog negative

supply voltage

VRM2

EEA

Ω

RESISTOR

LADDER

Ω

ANALOG SIGNAL

PROCESSING

Ω

27 AGND

analog ground digital ground

CLK CLK

CLOCK DRIVER

24 DGND

clock inputs

INPUT

AND

OUTPUT

LATCHES

DIGITAL

DECODING

digital negative

supply voltage

EED

2389

ECL OUTPUTS

OGND1

TDA8718

11 V

10 13 14 15 16 17 D2 19 20

MBB854 - 2

OGND2

OF D7

D6 D5 D4 D3

D1 D0

output ground

overflow

output

MSB

data outputs

LSB

underflow

output

June 1994 3

Fig.1 Block diagram.

Page 4

Philips Semiconductors Product speciﬁcation

8-bit high-speed analog-to-digital converter TDA8718

PINNING

SYMB

PIN DESCRIPTION

1 reference voltage BOTTOM 2 reference voltage MIDDLE decoupling

3 analog input voltage n.c. 4 not connected V

5 reference voltage TOP OF 6 overﬂow digital output n.c. 7 not connected CLK 8 clock input CLK 9 complementary clock input D7 10 digital output; bit 7 (MSB) V

11 ECL reference voltage OGND1 12 output ground 1 (0 V) D6 13 digital output; bit 6 D5 14 digital output; bit 5 D4 15 digital output; bit 4 D3 16 digital output; bit 3 D2 17 digital output; bit 2 OGND2 18 output ground 2 (0 V) D1 19 digital output; bit 1 D0 20 digital output; bit 0 (LSB) UF 21 underﬂow digital output n.c. 22 not connected V

EED

23 digital supply voltage (−4.5 V) DGND 24 digital ground n.c. 25 not connected n.c. 26 not connected AGND 27 analog ground V

EEA

28 analog supply voltage (−4.5 V)

handbook, halfpage

n.c.

CLK

n.c.

V 2

AGND

EEA

TDA8718

OGND1

D5D4D3

Fig.2 Pin configuration.

n.c. 26

MBB850 - 2

OGND2

n.c.

DGND V

EED

n.c.

22 21

UF D0

20 19

June 1994 4

Page 5

Philips Semiconductors Product speciﬁcation

8-bit high-speed analog-to-digital converter TDA8718

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

EEA

EED

∆V

clk(p-p)

stg

amb

analog supply voltage (pin 28) −7.0 +0.3 V digital supply voltage (pin 23) −7.0 +0.3 V supply voltage difference between V

and V

EED

EEA

input voltage (pin 3) referenced to AGND V clock input voltage difference between

CLK and CLK pin 8 to pin 9

referenced to V note 1

EED

;

−1.00 +1.0 V

EEA

− 2.0 V

(peak-to-peak value) output current for each digital output − 30 mA storage temperature −55 +150 °C operating ambient temperature 0 +70 °C junction temperature − +150 °C

Note

1. The circuit has two clock inputs CLK and

CLK. Sampling takes place on the falling edge of the clock input signal;

CLK and CLK are two complementary signals.

THERMAL CHARACTERISTICS

SYMBOL PARAMETER VALUE UNIT

th j-a

handbook, halfpage

∆

th j-a

(%)

thermal resistance from junction to ambient in free air 55 K/W

MBB851

Test conditions: PCB (2.24 ×2.24 ×0.062 inches). LFPM = Linear Foot Per Minute.

200 400 600 800

0 1000

Fig.3 Average effect of air flow on R

June 1994 5

airflow (LFPM)

th j-a

Page 6

Philips Semiconductors Product speciﬁcation

8-bit high-speed analog-to-digital converter TDA8718

CHARACTERISTICS

= −4.2 to −4.8 V; V

EEA

= 0 to +70 °C; typical values measured at V

amb

unless otherwise speciﬁed.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Supply

EEA

EED

EEA

EED

EEO(L)

EEO(H)

analog supply voltage (pin 28) −4.2 −4.5 −4.8 V digital supply voltage (pin 23) −4.2 −4.5 −4.8 V analog supply current (pin 28) 30 42 54 mA digital supply current (pin 23) 100 120 150 mA LOW level output supply current RL = 50 Ω 40 70 90 mA HIGH level output supply current RL = 50 Ω 155 170 185 mA

Reference voltages for the resistor ladder (see Table 1)

V V R TC

RB RT

LAD

RLAD

reference current (pin 5) R = 48 Ω 30 45 60 mA reference voltage BOTTOM (pin 1) − 48 Ω× IRT− V reference voltage TOP (pin 5) − 0 − V resistor ladder − 48 −Ω temperature coefﬁcient of the

resistor ladder

osB

osT

voltage offset BOTTOM note 1 − 8 Ω×IRT− mV voltage offset TOP note 1 − 8 Ω×IRT− mV

Inputs

= −4.2 to −4.8 V; V

EED

EEA

to V

EEA

= −0.1 to +0.1 V; AGND and DGND shorted together;

EED

= −4.5 V, V

= −4.5 V and T

EED

= 25 °C;

amb

− 175 − MΩ/K

CLK

INPUT (PIN 8); CLK INPUT (PIN 9)

∆V

clk(p-p)

LOW level input voltage −−1.8 − V HIGH level input voltage −−0.8 − V LOW level input current V HIGH level input current V input resistance f input capacitance f clock input voltage difference

between CLK and CLK pin 8 to

pin 9 (peak-to-peak value) ANALOG INPUT (PIN 3); NOTE 2 I

LOW level input current data output = 00 20 40 80 µA

HIGH level input current data output = FF 100 200 400 µA

input resistance − 10 − kΩ

input capacitance − 5 − pF

= −1.8 V − 0 −µA

clk

= −0.8 V − 120 −µA

clk

= 100 MHz − 1.5 − kΩ

clk

= 100 MHz − 3.5 − pF

clk

− 900 − mV

June 1994 6

Page 7

Philips Semiconductors Product speciﬁcation

8-bit high-speed analog-to-digital converter TDA8718

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Outputs (RL = 50 Ω)

IGITAL 100K ECL OUTPUTS (D0 TO D7; OF; UF)

ECL

Switching characteristics

clk(max)

; t

Analog signal processing (f

LOW level output voltage Tamb = 25 °C −−1770 −1650 mV

HIGH level output voltage Tamb = 25 °C −1300 −1150 − mV

ECL reference voltage −1550 −1450 −1350 mV

LOW level output current 4 6 8 mA

HIGH level output current 10 20 25 mA

maximum clock frequency

600 −−MHz

(pins 8 and 9)

rise and fall times fi = 100 MHz −− 750 ps

= 500 MHz)

clk

ARMONICS (FULL SCALE)

fundamental harmonics fi = 100 MHz − 0 − dB

second harmonics fi = 100 MHz −−54 − dB

third harmonics fi = 100 MHz −−50 − dB

Transfer function

ILE DC integral linearity error −±0.7 ±1.0 LSB DLE DC differential linearity error −±0.3 ±0.5 LSB AILE AC integral linearity error note 3 −±0.9 ±1.5 LSB EB effective bits f

BER bit error rate f

= 4.43 MHz, full scale;

= 45 mA; note 4;

ref

= 100 MHz; Fig.5

clk

= 100 MHz, full scale;

= 45 mA; note 4;

ref

= 500 MHz; Fig.6

clk

= 500 MHz;

clk

fi= 100 MHz;

− 7.5 − bits

− 6.5 − bits

− 10

−11

− times/

samples Vi= ±8 LSB at code 128; 50% clock duty cycle

Timing (f

= 500 MHz; RL = 50 Ω; CL = 5 pF) note 5

clk

sampling delay −− 300 ps output hold time 400 700 − ps output delay time − 1300 1500 ps

June 1994 7

Page 8

Philips Semiconductors Product speciﬁcation

8-bit high-speed analog-to-digital converter TDA8718

Notes to the “Characteristics”

1. Voltage offset BOTTOM (V and the reference voltage BOTTOM (VRB) at T reference voltage TOP (VRT) and the analog input which produces data outputs equal to FF, at T

2. The analog input is not internally biased. It should be externally biased between VRT and VRB levels.

3. Full-scale sine wave; fi = 4.43 MHz; f

4. Effective bits are obtained via a Fast Fourier Transform (FFT) treatment taking 4K acquisition points per period. The calculation takes into account all harmonics and noise up to half of the clock frequency (NYQUIST frequency).

Conversion to signal-to-noise ratio: S/N = EB × 6.02 + 1.76 dB.

5. TDA8718 can only withstand one or two 100K ECL loads in order to work out timings at the maximum sampling frequency. It is recommended to minimize the printed circuit-board load by implementing the load device as close as possible to the TDA8718.

Table 1 Output coding and input voltage (typical values; referenced to AGND.

) is the difference between the analog input which produces data outputs equal to 00

osB

= 100 MHz.

clk

= 25 °C. Voltage offset TOP (V

amb

) is the difference between

osT

=25°C.

amb

STEP V

Underﬂow <−40 Ω×I 0 −40 Ω×I

O/UF

D5 D4 D3 D2 D1 D0

1000000

0000000 1 . 0000001

. . .. ....

. . .......

254 . 0111110

BINARY OUTPUT BITS

255 −8 Ω×I Overﬂow >−8Ω×I

handbook, full pagewidth

CLK

0111111

1111111

50 %

sample N

sample N + 1

sample N + 2

June 1994 8

DATA OF/UF

DATA

N - 2

DATA

N - 1

DATA

Fig.4 Timing diagram.

DATA N + 1

50 %

MSA666

Page 9

Philips Semiconductors Product speciﬁcation

8-bit high-speed analog-to-digital converter TDA8718

amplitude

(dB)

100

120

0 6.27 12.5

Fig.5 Fast Fourier Transform (f

18.8

= 100 MHz; fi= 4.43 MHz).

clk

handbook, full pagewidth

Effective bits: 7.53; THD = −54.56dB. Harmonic levels (dB): 2nd =−77.28; 3rd = −54.76; 4th = −71.43; 5th = −71.85; 6th = −105.50.

MBD879

43.925.1 31.3 37.6 50.2 f (MHz)

amplitude

(dB)

100

120

0 31.2 62.4

Fig.6 Fast Fourier Transform (f

93.5

= 500 MHz; fi= 100 MHz).

clk

handbook, full pagewidth

Effective bits: 6.60; THD = −48.60 dB. Harmonic levels (dB): 2nd = −64.81; 3rd = −51.10; 4th = −65.05; 5th = −58.33; 6th = −54.07.

MBD880

218.0125.0 156.0 187.0 249.0 f (MHz)

June 1994 9

Page 10

Philips Semiconductors Product speciﬁcation

8-bit high-speed analog-to-digital converter TDA8718

APPLICATION INFORMATION

handbook, full pagewidth

n.c.

22 nF

EEA

AGND

22 nF

n.c.

CLK

22 nF

n.c.

4321

12 13 14 15

OGND1

D6 D5 D4 D3 D2 OGND2

TDA8718

27 26

17 18

22 nF

MBB852 - 2

n.c.

DGND

EED

–2 V

June 1994 10

Fig.7 Application diagram.

Page 11

Philips Semiconductors Product speciﬁcation

8-bit high-speed analog-to-digital converter TDA8718

PACKAGE OUTLINE

handbook, full pagewidth

seating plane

0.10 S

12.57

12.32

11.58

11.43

0.53

1.27

(24 x)

max

0.81 max

0.18 M

1.14

1826

0.64

10.92

9.91

2.16 max

11.58

11.43

12.57

12.32

Dimensions in mm.

1.22

1.07

0.51 max

Fig.8 Plastic leaded chip carrier, 28-leads; SOT261-2.

June 1994 11

(3x)

4.57 max

3.04 max

0.32 max

0.51 min

detail A

MBC654

Page 12

Philips Semiconductors Product speciﬁcation

8-bit high-speed analog-to-digital converter TDA8718

SOLDERING Plastic leaded chip carriers

YWAVE

B During placement and before soldering, the component

must be fixed with a droplet of adhesive. After curing the adhesive, the component can be soldered. The adhesive can be applied by screen printing, pin transfer or syringe dispensing.

Maximum permissible solder temperature is 260 °C, and maximum duration of package immersion in solder bath is 10 s, if allowed to cool to less than 150 °C within 6 s. Typical dwell time is 4 s at 250 °C.

A modified wave soldering technique is recommended using two solder waves (dual-wave), in which a turbulent wave with high upward pressure is followed by a smooth laminar wave. Using a mildly-activated flux eliminates the need for removal of corrosive residues in most applications.

Y SOLDER PASTE REFLOW

B Reflow soldering requires the solder paste (a suspension

of fine solder particles, flux and binding agent) to be

applied to the substrate by screen printing, stencilling or pressure-syringe dispensing before device placement.

Several techniques exist for reflowing; for example, thermal conduction by heated belt, infrared, and vapour-phase reflow. Dwell times vary between 50 and 300 s according to method. Typical reflow temperatures range from 215 to 250 °C.

Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 min at 45 °C.

EPAIRING SOLDERED JOINTS (BY HAND-HELD SOLDERING

IRON OR PULSE

-HEATED SOLDER TOOL)

Fix the component by first soldering two, diagonally opposite, end pins. Apply the heating tool to the flat part of the pin only. Contact time must be limited to 10 s at up to 300 °C. When using proper tools, all other pins can be soldered in one operation within 2 to 5 s at between 270 and 320 °C. (Pulse-heated soldering is not recommended for SO packages.)

For pulse-heated solder tool (resistance) soldering of VSO packages, solder is applied to the substrate by dipping or by an extra thick tin/lead plating before package placement.

DEFINITIONS

Data sheet status

Objective speciﬁcation This data sheet contains target or goal speciﬁcations for product development. Preliminary speciﬁcation This data sheet contains preliminary data; supplementary data may be published later. Product speciﬁcation This data sheet contains ﬁnal product speciﬁcations.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the speciﬁcation is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the speciﬁcation.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.

June 1994 12