Datasheet TDA8709AT Datasheet (Philips)

INTEGRATED CIRCUITS

DATA SH EET

TDA8709A

Video analog input interface

Product specification
Supersedes data of April 1993
File under Integrated Circuits, IC02

Philips Semiconductors

June 1994

Philips Semiconductors Product specification

Video analog input interface TDA8709A

FEATURES

• 8-bit resolution

• Sampling rate up to 32 MHz

• TTL-compatible digital inputs and outputs

• Internal reference voltage regulator

• Low-level AC clock inputs and outputs

• Clamp function with selection for ‘16’ or ‘128’

• No sample-and-hold circuit required

• Three selectable video inputs.

APPLICATIONS

• Video signal processing

• Digital picture processing

• Frame grabbing.

• Colour difference signals (U, V)

• R, G, B signals

• Chrominance signal (C).

QUICK REFERENCE DATA

GENERAL DESCRIPTION

The TDA8709A is an analog input interface for video signal
processing. It includes a an input selector
(one out-of-three video signals), video amplifier with clamp
and external gain control, an 8-bit analog-to-digital
converter (ADC) with a sampling rate of 32 MHz and an
input selector.

SYMBOL PARAMETER MIN. TYP. MAX. UNIT

V
V
V
I

CCA

I

CCD

I

CCO

CCA
CCD
CCO

analog supply voltage 4.5 5.0 5.5 V
digital supply voltage 4.5 5.0 5.5 V
TTL output supply voltage 4.2 5.0 5.5 V
analog supply current − 40 47 mA
digital supply current − 24 30 mA

TTL output supply current − 12 16 mA
ILE DC integral linearity error −−±1 LSB
DLE DC differential linearity error −−±0.5 LSB
f

clk(max)

maximum clock frequency 30 32 − MHz
B maximum −3 dB bandwidth (preamplifier) 12 18 − MHz
P

tot

total power dissipation − 380 512 mW

ORDERING INFORMATION

PACKAGE

TYPE NUMBER

PINS PIN POSITION MATERIAL CODE

TDA8709A 28 DIP plastic SOT117-1

TDA8709AT 28 SO28L plastic SOT136-1

June 1994 2

Philips Semiconductors Product specification

Video analog input interface TDA8709A

BLOCK DIAGRAM

handbook, full pagewidth

video input 0
video input 1
video input 2

clamp capacitor

connection

gain control

selection bit 0

input

video input

16
17

SELECTOR

18

24

25

selection

video input
selection bit 1

INPUT

CLAMP

27

clamp

level

LOGIC

VIDEO

AMPLIFIER

26

clamp

pulse

analog

voltage

output

digital V

(+ 5 V)

ADC
input

2014 15

19

AMP.

TDA8709A

CLAMP LEVEL "16"

DIGITAL COMPARATOR

CLAMP LEVEL "128"

DIGITAL COMPARATOR

6

CCD

8

digital

ground

clock
input

decoupling
input

5

8 - bit

ADC

22

analog V

(+ 5 V)

TTL outputs V (+ 5 V)

21 7

TTL

OUTPUTS

23

analog

CCA

ground

9
1

2
3

4
10
11
12
13

28

CCO

fast output

chip enable

D7
D6
D5
D4
D3
D2
D1
D0

output
format

selection

MBB951

Fig.1 Block diagram.

June 1994 3

Philips Semiconductors Product specification

Video analog input interface TDA8709A

PINNING

SYMBOL PIN DESCRIPTION

D7 1 data output; bit 7 (MSB)
D6 2 data output; bit 6
D5 3 data output; bit 5
D4 4 data output; bit 4
CLK 5 clock input
V
V

CCD
CCO

6 digital supply voltage (+5 V)

7 TTL outputs supply voltage (+5 V)
DGND 8 digital ground
FOEN 9 fast output chip enable
D3 10 data output; bit 3
D2 11 data output; bit 2
D1 12 data output; bit 1
D0 13 data output; bit 0 (LSB)
I0 14 video input selection bit 0
I1 15 video input selection bit 1
VIN0 16 video input 0
VIN1 17 video input 1
VIN2 18 video input 2
ANOUT 19 analog voltage output
ADCIN 20 analog-to-digital converter input
DEC 21 decoupling input
V

CCA

22 analog supply voltage (+5 V)
AGND 23 analog ground
CLAMP 24 clamp capacitor connection
GAIN 25 gain control input
CLP 26 clamping pulse
CLS 27 clamping level selection input
OFS 28 output format selection

handbook, halfpage

1

D7

2

D6

3

D5

4

D4

5

CLK

V

6

CCD

V

7

CCO

DGND

FOEN

D3
D2
D1
D0

I0

TDA8709A

8

9
10
11
12
13

MBB950

Fig.2 Pin configuration.

28
27
26
25
24
23
22
21

20
19
18
17
16
1514

OFS
CLS
CLP

GAIN
CLAMP

AGND

V

CCA

DEC
ADCIN
ANOUT
VIN2

VIN1
VIN0

I1

June 1994 4

Philips Semiconductors Product specification

Video analog input interface TDA8709A

FUNCTIONAL DESCRIPTION

TDA8709A is an 8-bit ADC with internal clamping and a
preamplifier with adjustable gain.

The clamping value is switched via pin 27 between

chrominance or colour difference signals). While clamping
pulse at pin 27 is logic 1, the device will adjust the
clamping level to the chosen value. The output format can
be selected between binary and two's complement at
pin 28.

digital 16 (for R, G, B signals) and digital 128 (for

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

SYMBOL PARAMETER MIN. MAX. UNIT

V
V
V
∆V

V
I

O

T
T
T

CCA
CCD
CCO

CC

I

stg
amb
j

analog supply voltage −0.3 +7.0 V
digital supply voltage −0.3 +7.0 V
TTL output supply voltage −0.3 +7.0 V
supply voltage difference between V
supply voltage difference between V
supply voltage difference between V

CCA
CCO
CCA

and V

and V

and V

CCD

CCD

CCO

−0.5 +0.5 V

−0.5 +0.5 V

−1.0 +1.0 V

input voltage −0.3 +7.0 V
output current − +10 mA
storage temperature −55 +150 °C
operating ambient temperature 0 +70 °C
junction temperature 0 +125 °C

THERMAL CHARACTERISTICS

SYMBOL PARAMETER VALUE UNIT

R

th j-a

thermal resistance from junction to ambient in free air

SOT117-1 55 K/W
SOT136-1 70 K/W

June 1994 5

Philips Semiconductors Product specification

Video analog input interface TDA8709A

CHARACTERISTICS

V

= V22to V23 = 4.5 to 5.5 V; V

CCA

shorted together; V

= 0 to +70 °C; typical readings taken at V

T

amb

CCA

to V

CCD

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Supplies

V
V
V
I

CCA

I

CCD

I

CCO

CCA
CCD
CCO

analog supply voltage 4.5 5.0 5.5 V
digital supply voltage 4.5 5.0 5.5 V
TTL output supply voltage 4.2 5.0 5.5 V
analog supply current − 40 47 mA
digital supply current − 24 30 mA
TTL output supply current TTL load (see Fig.7) − 12 16 mA

Preamplifier inputs

TO VIN2 INPUTS

VIN0
V

I(p-p)

| input impedance fi= 6 MHz 10 20 − kΩ

|Z

i

C

I

input voltage (peak-to-peak value) note 1 0.6 − 1.5 V

input capacitance fi = 6 MHz − 1 − pF
I0 AND I1 TTL INPUTS (SEE TABLE 1)
V

IL

V

IH

I

IL

I

IH

LOW level input voltage 0 − 0.8 V

HIGH level input voltage 2.0 − V

LOW level input current VI = 0.4 V −400 −−µA

HIGH level input current VI = 2.7 V −− 20 µA
CLS, OFS AND CLP TTL INPUTS (SEE FIG.5)
V

IL

V

IH

I

IL

I

IH

t

CLP

LOW level input voltage 0 − 0.8 V

HIGH level input voltage 2.0 − V

LOW level input current VI = 0.4 V −400 −−µA

HIGH level input current VI = 2.7 V −− 20 µA

clamp pulse width 2 −−µs
GAIN INPUT (PIN 25)
V

25(min)

V

25(max)

I

I

input voltage for minimum gain see Fig.9 − 1.8 − V

input voltage for maximum gain see Fig.9 − 3.8 − V

input current − 1.0 −µA
CLAMP INPUT (PIN 24)
V

24

I

24

clamp voltage for code 128 output − 3.5 − V

clamp output current see Table 2

= V6to V8 = 4.5 to 5.5 V; V

CCD

= −0.5 to +0.5 V; V

CCA

CCO

= V

to V

CCD

= V7to V8 = 4.2 to 5.5 V; AGND and DGND

CCO

= −0.5 to +0.5 V; V

CCD

= V

= 5 V and T

CCO

to V

CCA

= 25 °C; unless otherwise specified.

amb

= −0.5 to +0.5 V;

CCO

CCD

CCD

V

V

June 1994 6

Philips Semiconductors Product specification

Video analog input interface TDA8709A

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Video amplifier outputs

ANOUT OUTPUT (PIN 19)
V

19(p-p)

AC output voltage

(peak-to-peak value)
I

19

I

O(p-p)

V

19

V

19

Z

19

internal current source RL = ∞ 2.0 2.5 − mA

output current driven by the load V

DC output voltage for black level CLS = logic 1 − V

DC output voltage for black level CLS = logic 0 − V

output impedance − 20 −Ω

Preamplifier dynamic characteristics

α

ct

G

diff

ϕ

diff

crosstalk between VIN inputs V

differential gain V

differential phase V

B −3 dB bandwidth 12 −−MHz
S/N signal-to-noise ratio note 4 60 −−dB
SVRR1 supply voltage ripple rejection note 5 − 45 − dB
∆G gain range see Fig.9 −4.5 − +6.0 dB
G

stab

gain stability as a function of supply

voltage and temperature

VOF = 1.33 V (p-p);

− 1.33 − V

V25= 3.0 V

= 1.33 V (p-p);

ANOUT

−− 1.0 mA

note 2

− 2.02 − V

CCA

− 2.6 − V

CCA

= 4.75 to 5.25 V;

CCA

−−50 −45 dB

note 3

= 1.33 V (p-p);

VIN

− 2 − %

V25= 3.0 V

= 1.33 V (p-p);

VIN

− 0.8 − deg

V25= 3.0 V

see Fig.9 −− 5%

Analog-to-digital converter inputs

CLK

INPUT (PIN 5)

V

IL

V

IH

I

IL

I

IH

| input impedance f

|Z

i

C

I

LOW level input voltage 0 − 0.8 V

HIGH level input voltage 2.0 − V

LOW level input current V

HIGH level input current V

input capacitance f

= 0.4 V −400 −−µA

clk

= 2.7 V −− 100 µA

clk

= 10 MHz − 4 − kΩ

clk

= 10 MHz − 4.5 − pF

clk

FOEN INPUT (SEE TABLE 3)
V

IL

V

IH

I

IL

I

IH

LOW level input voltage 0 − 0.8 V

HIGH level input voltage 2.0 − V

LOW level input current V9= 0.4 V −400 −−µA

HIGH level input current V9= 2.7 V −− 20 µA

June 1994 7

CCD

CCD

V

V

Philips Semiconductors Product specification

Video analog input interface TDA8709A

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

ADCIN INPUT (PIN 20; SEE TABLE 4)
V

20

V

20

V

20(p-p)

input voltage digital output = 00 − V

input voltage digital output = 255 − V

input voltage amplitude

− 1.0 − V

(peak-to-peak value)
I

20

| input impedance fi= 6 MHz − 50 − MΩ

|Z

i

C

I

input current − 1.0 10 µA

input capacitance fi = 6 MHz − 1 − pF

Analog-to-digital converter outputs

D

IGITAL OUTPUTS D0 TO D7

V

OL

V

OH

I

OZ

LOW level output voltage IOL = 2 mA 0 − 0.6 V

HIGH level output voltage IOL = −0.4 mA 2.4 − V

output current in 3-state mode 0.4 V < VO< V

CCD

−20 − +20 µA

Switching characteristics

f

clk(max)

Analog signal processing (f

G

diff

maximum clock input frequency see Fig.5; note 6 30 32 − MHz

= 32 MHz; see Fig.7)

clk

differential gain V20 = 1.0 V (p-p);

− 2 − %

see Fig.6; note 7

ϕ

diff

f

1

f

all

differential phase see Fig.6; note 7 − 2 − deg

fundamental harmonics (full-scale) fi= 4.43 MHz; note 7 −− 0dB

harmonics (full-scale);

fi= 4.43 MHz; note 7 −−55 − dB

all components
SVRR2 supply voltage ripple rejection note 8 − 1 5 %/V

− 2.52 − V

CCA

− 1.52 − V

CCA

CCD

V

Transfer function

ILE DC integral linearity error −− ±1 LSB
DLE DC differential linearity error −− ±0.5 LSB
ILE AC integral linearity error note 9 −− ±2 LSB

Timing (f

IGITAL OUTPUTS (C

D
t

ds

t

h

t

d

t

dEZ

t

dDZ

= 32 MHz; see Figs 5, 6 and 7)

clk

= 15 pF; IOL= 2 mA; RL=2kΩ)

L

sampling delay time − 2 − ns

output hold time − 8 − ns

output delay time − 16 20 ns

3-state delay time; output enable − 16 25 ns

3-state delay time; output disable − 12 25 ns

June 1994 8

Philips Semiconductors Product specification

Video analog input interface TDA8709A

Notes to the “Characteristics”

1. 0 dB is obtained at the AGC amplifier when applying V

2. The output current at pin 19 should not exceed 1 mA. The load impedance RL should be referenced to V
defined as:

a) AC impedance ≥1kΩ and the DC impedance >2.7 kΩ.
b) The load impedance should be coupled directly to the output of the amplifier so that the DC voltage supplied by

the clamp is not disturbed.

3. Input signals with the same amplitude. Gain is adjusted to obtain ANOUT = 1.33 V (p-p).

4. Signal-to-noise ratio measured with 5 MHz bandwidth:

S

20 log

--- ­N

V

ANOUT p p–()

--------------------------------------------- ­V

ANOUT (RMSnoise)

at B = 5 MHz.=

5. The voltage ratio is expressed as:

SVRR1 20log

∆V

-----------------­V

CCA

CCA

G

×=

-------­∆ G

= 1 V (p-p), gain at 100 kHz = 1 and 1 V supply variation.

for V

I

6. It is recommended that the rise and fall times of the clock are ≥2 ns. In addition, a ‘good layout’ for the digital and
analog grounds is recommended.

7. These measurements are realized on analog signals after a digital-to-analog conversion (TDA8702 is used).

8. The supply voltage rejection is the relative variation of the analog signal (full-scale signal at input) for 1 V of supply
variation:

∆ V

SVRR2

I00()VIFF()

=

-----------------------------------------------------------------------------------------------------

9. Full-scale sine wave (f

–()V

∆V

CCA

= 4.4 MHz; f

i

–()+

I00()VIFF()

= 27 MHz).

clk

i(p-p)

= 1.33 V.

CCA

and

June 1994 9

Philips Semiconductors Product specification

Video analog input interface TDA8709A

Table 1 Video input selection (CVBS).

I1 I0 SELECTED INPUT

0 0 VIN0
0 1 VIN1
1 0 VIN2
1 1 VIN1

Table 2 CLAMP output current.

CLS CLP

DIGITAL

OUTPUT

I

CLAMP

1 1 output < 128 +50 µA

output > 128 −50 µA

(1)

X

0X 0µA

0 1 output < 16 +50 µA

16 < output −50 µA

Note

1. X = don't care.

Table 4 Output coding and input voltage (typical values).

Table 3 FOEN input coding.

FOEN D0 TO D7

0 active, two's complement
1 high impedance

STEP V

ADCIN

D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0

Underflow − 0000000010000000

BINARY OUTPUTS TWO'S COMPLEMENT

0V

− 2.52 V 0000000010000000

CCA

1 − 0000000110000001

. − ................

. − ................

254 − 1111111001111110
255 V

− 1.52 V 1111111101111111

CCA

Overflow − 1111111101111111

June 1994 10

Philips Semiconductors Product specification

Video analog input interface TDA8709A

handbook, full pagewidth

0.25 V

5 MHz sine wave

1.0 V

0.25 V

handbook, full pagewidth

digital
output

64 µs

MBB959

Fig.3 Test signal on the ADCIN pin for differential gain and phase measurements.

level

255

"128"

"16"

CLS = 1
CLS = 2

black-level

clamping

MBB960

0

CLP

Fig.4 Control mode selection.

June 1994 11

t

CLP

t

Philips Semiconductors Product specification

Video analog input interface TDA8709A

handbook, full pagewidth

CLK
input

analog
input
(ADCIN)

data
outputs
D0 to D7)

t

ds

sample
N 2

data N 1

sample
N

t

d

sample
N 1

t

h

Fig.5 Timing diagram.

clock input
reference level
(1.5 V)

sample
N 1

2.4 V

data N 1data Ndata N 2data N 3

0.4 V

MBB958

handbook, full pagewidth

FOEN
input

data
outputs
(D0 to D7)

2 V

0.8 V

active

t

dDZ

high impedance

Fig.6 Output format timing diagram.

June 1994 12

t

dEZ

2.4 V

active

0.4 V

MBB957

Philips Semiconductors Product specification

Video analog input interface TDA8709A

V

CCO

handbook, halfpage

2 kΩ

S1

D0 to D7

C5

MBB955

kΩ

DGND

IN3064

S2

IN916

or

Fig.7 Load circuit for timing measurement; data outputs (FOEN = LOW).

V

handbook, halfpage

CCO

2 kΩ

D0 to D7

15 pF

MBD865

Fig.8 Load circuit for timing measurement; 3-state outputs (FOEN: fi= 1 MHz; V

June 1994 13

DGND

IN916

or

IN3064

FOEN

= 3 V).

Philips Semiconductors Product specification

Video analog input interface TDA8709A

V (V)

25

= 25 °C).

MBB961 - 1

12

handbook, halfpage

G

(dB)

8

4

0

4

8

1.6 4.0

(1) Typical value (V
(2) Minimum and maximum values (temperature and supply).

2.4 3.2

= V

CCA

CCD

5 %

(1)
(2)

= 5 V; T

amb

Fig.9 Typical gain control curve as a function of

gain voltage.

June 1994 14

Philips Semiconductors Product specification

Video analog input interface TDA8709A

INTERNAL PIN CIRCUITRY

CCA

CCO

pin 6

V

CCD

pin 7

pin 22

V

V

pin 24

CLAMP

pin 8

DGND

pin 23

CLAMP

GAIN

pin 25

CCA

V

V

CCD

CCA

V

DGND

AGND

CCA

V

REF

2

I

1

I

1

I

CCA

V

AGND

CCA

V

CCA

V

top

mid

V

V

V

2.5

bottom

V

mA

AGND

AGND

AGND

MBB962

pin 21

pin 20

pin 19

DEC

ADCIN

handbook, full pagewidth

ANOUT

pins 26, 27 or 28

CLS or CLP or OFS

DGND

CCD

V

1.5 V

V

DGND

pin 5

clock input

CCO

V

pins 1 to 4

data outputs

and 10 to 13

June 1994 15

TDA8709A

CCD

pin 9

FOEN

CCA

V

V

DGND

CCA

20

kΩ

01

I ,I

pins 14 or 15

Fig.10 Internal pin configuration.

AGND

pins 16 to 18

VIN0, VIN1 and VIN2

AGND

Philips Semiconductors Product specification

Video analog input interface TDA8709A

APPLICATION INFORMATION

Additional information can be found in the laboratory report of TDA8708A

V

1

2

3

4

5

6

7

8

9

10

11

12

13

14

CCA

28

27

26

220 nF

25

18 nF

24

23

1 µF

22

TDA8709A

21

1 µF

20

19

18

17

4.7 µF

16

15

MBB954 - 1

handbook, full pagewidth

clock

5 V

data outputs

100 Ω

(1)

22 Ω

data outputs

33 pF

22 nF

22 nF

“FBL/AN9308”

horizontal clamp

10 nF

1 µH

5 V

LOW PASS

FILTER

4.7 µF

75Ω

.

5 V

(2)

4.7 µF

75Ω

75Ω

(1) It is recommended to decouple V

the output data of TDA8709A interfaces with a capacitive CMOS load device.

(2) See Figs 12, 14, 16 and 18 for examples of the low-pass filters.

through a 22 Ω resistor especially when

CCO

Fig.11 Application diagram.

June 1994 16

Philips Semiconductors Product specification

Video analog input interface TDA8709A

22 µH 22 µH

handbook, full pagewidth

ANOUT

(pin 19)

680 Ω

V

i

12 pF 12 pF

27 pF 68 pF 27 pF

MBB953 - 1

V

CCA

(pin 22)

2.2 kΩ

ADCIN

(pin 20)

V

o

This filter can be adapted to various applications with respect to performance requirements. An input and output impedance of at least 680 Ω and 2.2 kΩ
must in any event be applied.

Fig.12 Example of a low-pass filter for RGB and C signals.

Characteristics of Fig.13

• Order 5; adapted CHEBYSHEV

handbook, halfpage

0

α

(dB)

40

80

120

160

010 30

20

MSA682

f (MHz)

• Ripple ρ≤0.4 dB

• f = 6.5 MHz at −3dB

• f

= 9.65 MHz.

notch

Fig.13 Frequency response for filter shown in

Fig.12.

June 1994 17

Philips Semiconductors Product specification

Video analog input interface TDA8709A

handbook, full pagewidth

This filter can be adapted to various applications with respect to performance requirements. An input and output impedance of at least 680 Ω and 2.2 kΩ
must in any event be applied.

ADOUT
(pin 19)

680 Ω

V

i

82 µH

2.2 kΩ

15 pF 15 pF

V

CCA

(pin 22)

MSA678

ADCIN

(pin 20)

V

o

Fig.14 Example of an economical low-pass filter for RGB and C signals.

Characteristics of Fig.15

• Order 3; adapted CHEBYSHEV

handbook, halfpage

0

α

(dB)

MSA681

• Ripple ρ≤0.4 dB

• f = 6.5 MHz at −3dB.

10

20

30

40

010 30

20

f (MHz)

Fig.15 Frequency response for filter shown in

Fig.14.

June 1994 18

Philips Semiconductors Product specification

Video analog input interface TDA8709A

180 µH 180 µH

handbook, full pagewidth

ANOUT
(pin 19)

680 Ω

V

i

6.8 pF 6.8 pF

2.2 kΩ

22 pF 56 pF 22 pF

V

CCA

(pin 22)

MSA683

ADCIN

(pin 20)

V

o

This filter can be adapted to various applications with respect to performance requirements. An input and output impedance of at least 680 Ω and 2.2 kΩ
must in any event be applied.

Fig.16 Example of a low-pass filter for U and V signals.

Characteristics of Fig.17

• Order 5; adapted CHEBYSHEV

handbook, halfpage

0

α

(dB)

20

40

60

80

100

010 30

MSA680

20

f (MHz)

• Ripple ρ≤0.4 dB

• f = 2.3 MHz at −3dB

• f

= 4.5 MHz.

notch

Fig.17 Frequency response for filter shown in

Fig.16.

June 1994 19

Philips Semiconductors Product specification

Video analog input interface TDA8709A

180 µH

handbook, full pagewidth

ANOUT
(pin 19)

680 Ω

V

i

1 pF

2.2 kΩ

27 pF 27 pF

V

CCA

(pin 22)

MSA677

ADCIN

(pin 20)

V

o

This filter can be adapted to various applications with respect to performance requirements. An input and output impedance of at least 680 Ω and 2.2 kΩ
must in any event be applied.

Fig.18 Example of an economical low-pass filter for U and V signals.

Characteristics of Fig.19

• Order 3; adapted CHEBYSHEV

handbook, halfpage

0

α

(dB)

20

40

60

80

010 30

MSA679

20

f (MHz)

• Ripple ρ≤0.3 dB

• f = 2.8 MHz at −3dB

• f

= 11.9 MHz.

notch

Fig.19 Frequency response for filter shown in

Fig.18.

June 1994 20

Philips Semiconductors Product specification

Video analog input interface TDA8709A

PACKAGE OUTLINES

handbook, full pagewidth

seating plane

3.9

3.4

1.7

max

28

1

2.54

(13x)

36.0

35.0

1.7 max

0.53
max

15

14

0.51
min

14.1

13.7

max

0.254

4.0

15.80

15.24

5.1

max

M

0.32 max

15.24

17.15

15.90

MSA264

Dimensions in mm.

Fig.20 Plastic dual in-line package; 28 leads (600 mil) with internal heat spreader (SOT117-1).

June 1994 21

Philips Semiconductors Product specification

Video analog input interface TDA8709A

andbook, full pagewidth

S

pin 1

index

114

0.9

0.4

(4x)

18.1

17.7

1.27

0.49

0.36

0.1 S

1528

0.25 M

(28x)

2.45

2.25

0.3

0.1

7.6

7.4

10.65

10.00

detail A

1.1

0.5

1.1

1.0

0.32

0.23

0 to 8

MBC236 - 1

A

2.65

2.35

o

Dimensions in mm.

Fig.21 Plastic small outline package; 28 leads; large body (SOT136-1).

June 1994 22

Philips Semiconductors Product specification

Video analog input interface TDA8709A

SOLDERING
Plastic dual in-line packages

Y DIP OR WAVE

B
The maximum permissible temperature of the solder is

260 °C; this temperature must not be in contact with the
joint for more than 5 s. The total contact time of successive
solder waves must not exceed 5 s.

The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified storage maximum. If the printed-circuit board has
been pre-heated, forced cooling may be necessary
immediately after soldering to keep the temperature within
the permissible limit.

EPAIRING SOLDERED JOINTS

R
Apply a low voltage soldering iron below the seating plane

(or not more than 2 mm above it). If its temperature is
below 300 °C, it must not be in contact for more than 10 s;
if between 300 and 400 °C, for not more than 5 s.

Plastic small-outline packages

YWAVE

B
During placement and before soldering, the component

must be fixed with a droplet of adhesive. After curing the
adhesive, the component can be soldered. The adhesive
can be applied by screen printing, pin transfer or syringe
dispensing.

Y SOLDER PASTE REFLOW

B
Reflow soldering requires the solder paste (a suspension

of fine solder particles, flux and binding agent) to be
applied to the substrate by screen printing, stencilling or
pressure-syringe dispensing before device placement.

Several techniques exist for reflowing; for example,
thermal conduction by heated belt, infrared, and
vapour-phase reflow. Dwell times vary between 50 and
300 s according to method. Typical reflow temperatures
range from 215 to 250 °C.

Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 min at 45 °C.

EPAIRING SOLDERED JOINTS (BY HAND-HELD SOLDERING

R

IRON OR PULSE

-HEATED SOLDER TOOL)

Fix the component by first soldering two, diagonally
opposite, end pins. Apply the heating tool to the flat part of
the pin only. Contact time must be limited to 10 s at up to
300 °C. When using proper tools, all other pins can be
soldered in one operation within 2 to 5 s at between 270
and 320 °C. (Pulse-heated soldering is not recommended
for SO packages.)

For pulse-heated solder tool (resistance) soldering of VSO
packages, solder is applied to the substrate by dipping or
by an extra thick tin/lead plating before package
placement.

Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder bath is
10 s, if allowed to cool to less than 150 °C within 6 s.
Typical dwell time is 4 s at 250 °C.

A modified wave soldering technique is recommended
using two solder waves (dual-wave), in which a turbulent
wave with high upward pressure is followed by a smooth
laminar wave. Using a mildly-activated flux eliminates the
need for removal of corrosive residues in most
applications.

June 1994 23

Philips Semiconductors Product specification

Video analog input interface TDA8709A

DEFINITIONS

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

June 1994 24

Philips Semiconductors Product specification

Video analog input interface TDA8709A

NOTES

June 1994 25

Philips Semiconductors Product specification

Video analog input interface TDA8709A

NOTES

June 1994 26

Philips Semiconductors Product specification

Video analog input interface TDA8709A

NOTES

June 1994 27

Philips Semiconductors – a worldwide company

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th

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For all other countries apply to: Philips Semiconductors,
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Telex 35000 phtcnl, Fax. [phone]

SCD31 © Philips Electronics N.V. 1994

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533061/1500/03/pp28 Date of release: June 1994
Document order number: 9397 734 60011

Philips Semiconductors