Datasheet TDA8708AT, TDA8708A Datasheet (Philips)

INTEGRATED CIRCUITS

DATA SH EET

TDA8708A

Video analog input interface

Product specification
Supersedes data of April 1993
File under Integrated Circuits, IC02

Philips Semiconductors

June 1994

Philips Semiconductors Product specification

Video analog input interface TDA8708A

FEATURES

• 8-bit resolution

• Sampling rate up to 32 MHz

• Binary or two's complement 3-state TTL outputs

• TTL-compatible digital inputs and outputs

APPLICATIONS

• Video signal decoding

• Scrambled TV (encoding and decoding)

• Digital picture processing

• Frame grabbing.

• Internal reference voltage regulator

• Power dissipation of 365 mW (typical)

• Input selector circuit (one out of three video inputs)

• Clamp and Automatic Gain Control (AGC) functions for

CVBS and Y signals

• No sample-and-hold circuit required.

GENERAL DESCRIPTION

The TDA8708A is an analog input interface for video signal
processing. It includes a video amplifier with clamp and
gain control, an 8-bit analog-to-digital converter (ADC)
with a sampling rate of 32 MHz and an input selector.

• The TDA8708A has white peak control in modes 1 and
2 whereas the TDA8708B has control in mode 1 only.

QUICK REFERENCE DATA

SYMBOL PARAMETER MIN. TYP. MAX. UNIT

V
V
V
I

CCA

I

CCD

I

CCO

CCA
CCD
CCO

analog supply voltage 4.5 5.0 5.5 V
digital supply voltage 4.5 5.0 5.5 V
TTL output supply voltage 4.2 5.0 5.5 V
analog supply current − 37 45 mA
digital supply current − 24 30 mA

TTL output supply current − 12 16 mA
ILE DC integral linearity error −−±1 LSB
DLE DC differential linearity error −−±0.5 LSB
f

clk(max)

maximum clock frequency 30 32 − MHz
B maximum −3 dB bandwidth (AGC amplifier) 12 18 − MHz
P

tot

total power dissipation − 365 500 mW

ORDERING INFORMATION

PACKAGE

TYPE NUMBER

PINS PIN POSITION MATERIAL CODE

TDA8708A 28 DIP plastic SOT117-1

TDA8708AT 28 SO28L plastic SOT136-1

June 1994 2

Philips Semiconductors Product specification

Video analog input interface TDA8708A

BLOCK DIAGRAM

ndbook, full pagewidth

video input 0
video input 1
video input 2

clamp capacitor

connection

AGC capacitor

connection

peak level current

resistor input

video input

selection bit 0

16
17

SELECTOR

18

24

25

28

sync level

sync pulse

video input
selection bit 1

INPUT

AGC &

CLAMP

LOGIC

&

MODE

SELECTION

27 26

VIDEO

AMPLIFIER

black level
sync pulse

analog

voltage

output

digital V

(+ 5 V)

ADC
input

19 2014 15

AMP.

TDA8708A

PEAK LEVEL

DIGITAL COMPARATOR

BLACK LEVEL

DIGITAL COMPARATOR

SYNC LEVEL

DIGITAL COMPARATOR

6

CCD

8 22

digital

ground

clock

decoupling

input

input

521 7

8 - bit

ADC

analog V

CCA

(+ 5 V)

TTL outputs

TTL

OUTPUTS

23

analog
ground

V

CCO

9
1

2
3

4
10
11
12
13

(+ 5 V)

output format/

chip enable

(3-state input)

D7
D6
D5
D4
D3
D2
D1
D0

MBB965

Fig.1 Block diagram.

June 1994 3

Philips Semiconductors Product specification

Video analog input interface TDA8708A

PINNING

SYMBOL PIN DESCRIPTION

D7 1 data output; bit 7 (MSB)
D6 2 data output; bit 6
D5 3 data output; bit 5
D4 4 data output; bit 4
CLK 5 clock input
V
V

CCD
CCO

6 digital supply voltage (+5 V)

7 TTL outputs supply voltage (+5 V)
DGND 8 digital ground
OF 9 output format/chip enable

(3-state input)
D3 10 data output; bit 3
D2 11 data output; bit 2
D1 12 data output; bit 1
D0 13 data output; bit 0 (LSB)
I0 14 video input selection bit 0
I1 15 video input selection bit 1
VIN0 16 video input 0
VIN1 17 video input 1
VIN2 18 video input 2
ANOUT 19 analog voltage output
ADCIN 20 analog-to-digital converter input
DEC 21 decoupling input
V

CCA

22 analog supply voltage (+5 V)
AGND 23 analog ground
CLAMP 24 clamp capacitor connection
AGC 25 AGC capacitor connection
GATE B 26 black level synchronization pulse
GATE A 27 sync level synchronization pulse
RPEAK 28 peak level current resistor input

1

D7

2

D6

3

D5

4

D4

5

CLK

V

6

CCD

V

7

CCO

DGND

OF
D3
D2
D1
D0

I0

TDA8708A

8

9
10
11
12
13

MBB964

Fig.2 Pin configuration.

28
27
26
25
24
23
22
21
20
19
18
17
16
1514

RPEAK
GATE A
GATE B

AGC

CLAMP

AGND

V

CCA

DEC
ADCIN
ANOUT
VIN2

VIN1
VIN0

I1

June 1994 4

Philips Semiconductors Product specification

Video analog input interface TDA8708A

FUNCTIONAL DESCRIPTION

The TDA8708A provides a simple interface for decoding
video signals.

The TDA8708A operates in configuration mode 1 (see
Fig.4) when the video signals are weak (i.e. when the gain
of the AGC amplifier has not yet reached its optimum
value). This enables a fast recovery of the synchronization
pulses in the decoder circuit. When the pulses at the
GATE A and GATE B inputs become distinct (GATE A and
GATE B pulses are synchronization pulses occurring
during the sync period and rear porch respectively) the
TDA8708A automatically switches to configuration mode 2
(see Fig.5).

When the TDA8708A is in configuration mode 1, the gain
of the AGC amplifier will be roughly adjusted (sync level to
a digital output level of 0 and the peak level to a digital
output level of 255).

In configuration mode 2 the digital output of the ADC is
compared to internal digital reference levels. The resultant
outputs control the charge or discharge current of a
capacitor connected to the AGC pin. The voltage across
this capacitor controls the gain of the video amplifier. This
is the gain control loop.

The sync level comparator is active during a positive-going
pulse at the GATE A input. This means that the sync pulse
of the composite video signal is used as an amplitude
reference. The bottom of the sync pulse is adjusted to
obtain a digital output of logic 0 at the converter output. As
the black level is at digital level 64, the sync pulse will have
a digital amplitude of 64 LSBs.

The peak-white control loop is always active. If the video
signal tends to exceed the digital code of 248, the gain will
be limited to avoid any over-range of the converter.

The use of nominal signals will prevent the output from
exceeding a digital code of 213 and the peak-white control
loop will be non-active.

The clamp level control is accomplished by using the same
techniques as used for the gain control. The black-level
digital comparator is active during a positive-going pulse at
the GATE B input. The clamp capacitor will be charged or
discharged to adjust the digital output to code 64.

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

SYMBOL PARAMETER MIN. MAX. UNIT

V
V
V
∆V

V
I

O

T
T
T

CCA
CCD
CCO

CC

I

stg
amb
j

analog supply voltage −0.3 +7.0 V
digital supply voltage −0.3 +7.0 V
output supply voltage −0.3 +7.0 V
supply voltage difference between V
supply voltage difference between V
supply voltage difference between V
input voltage −0.3 V

CCA
CCO
CCA

and V

and V

and V

CCD

CCD

CCO

−1.0 +1.0 V

−1.0 +1.0 V

−1.0 +1.0 V

CCA

output current 0 +10 mA
storage temperature −55 +150 °C
operating ambient temperature 0 +70 °C
junction temperature 0 +125 °C

THERMAL CHARACTERISTICS

SYMBOL PARAMETER VALUE UNIT

R

th j-a

thermal resistance from junction to ambient in free air

SOT117-1 55 K/W
SOT136-1 70 K/W

V

June 1994 5

Philips Semiconductors Product specification

Video analog input interface TDA8708A

CHARACTERISTICS

V

= V22to V23 = 4.5 to 5.5 V; V

CCA

shorted together; V

= 0 to +70 °C; typical readings taken at V

T

amb

CCA

to V

CCD

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Supplies

V
V
V
I

CCA

I

CCD

I

CCO

CCA
CCD
CCO

analog supply voltage 4.5 5.0 5.5 V
digital supply voltage 4.5 5.0 5.5 V
TTL output supply voltage 4.2 5.0 5.5 V
analog supply current − 37 45 mA
digital supply current − 24 30 mA
TTL output supply current TTL load (see Fig.8) − 12 16 mA

Video amplifier inputs

TO 2) INPUTS

VIN(0
V

I(p-p)

| input impedance fi= 6 MHz 10 20 − kΩ

|Z

i

C

I

input voltage (peak-to-peak value) AGC load with external

input capacitance fi = 6 MHz − 1 − pF
I0 AND I1 TTL INPUTS (SEE TABLE 1)
V

IL

V

IH

I

IL

I

IH

LOW level input voltage 0 − 0.8 V

HIGH level input voltage 2.0 − V

LOW level input current VI = 0.4 V −400 −−µA

HIGH level input current VI = 2.7 V −− 20 µA
GATE A AND GATE B TTL INPUTS (SEE FIGS 4 AND 5)
V

IL

V

IH

I

IL

I

IH

t

W

LOW level input voltage 0 − 0.8 V

HIGH level input voltage 2.0 − V

LOW level input current VI = 0.4 V −400 −−µA

HIGH level input current VI = 2.7 V −− 20 µA

pulse width see Fig.5 2 −−µs
RPEAK INPUT (PIN 28)
I

28(min)

minimum peak level current R28 = 0 Ω−80 150 µA
AGC INPUT (PIN 25)
V

25(min)

V

25(max)

AGC voltage for minimum gain − 2.8 − V

AGC voltage for maximum gain − 4.0 − V

AGC output current see Table 2

24

INPUT (PIN 24)

clamp voltage for code 128 output − 3.5 − V

clamp output current see Table 3

CLAMP
V

I

24

= V6to V8 = 4.5 to 5.5 V; V

CCD

= −0.5 to +0.5 V; V

CCA

to V

CCO

= V

CCD

CCD

= V

CCO

capacitor; note 1

= V7to V8 = 4.2 to 5.5 V; AGND and DGND

CCO

= −0.5 to +0.5 V; V

= 5 V and T

amb

CCA

to V

= −0.5 to +0.5 V;

CCO

= 25 °C; unless otherwise specified.

0.6 − 1.5 V

CCD

CCD

V

V

June 1994 6

Philips Semiconductors Product specification

Video analog input interface TDA8708A

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Video amplifier outputs

ANOUT OUTPUT (PIN 19)
V

19(p-p)

AC output voltage

(peak-to-peak value)
I

19

I

O(p-p)

V

19

Z

19

internal current source RL = ∞ 2.0 2.5 − mA

output current driven by the load V

DC output voltage for black level note 3 − V

output impedance − 20 −Ω

Video amplifier dynamic characteristics

α

ct

G

diff

ϕ

diff

crosstalk between VIN inputs V

differential gain V

differential phase V

B −3 dB bandwidth 12 −−MHz
S/N signal-to-noise ratio note 4 60 −−dB
SVRR1 supply voltage ripple rejection note 5 − 45 − dB
∆G gain range see Fig.10 −4.5 − +6.0 dB
G

stab

gain stability as a function of supply

voltage and temperature

V

= 1.33 V (p-p);

VIN

− 1.33 − V

V25= 3.6 V

= 1.33 V (p-p);

ANOUT

−− 1.0 mA

note 2

− 2.24 − V

CCA

= 4.75 to 5.25 V −−50 −45 dB

CCA

= 1.33 V (p-p);

VIN

− 2 − %

V25= 3.6 V

= 1.33 V (p-p);

VIN

− 0.8 − deg

V25= 3.6 V

see Fig.10 −− 5%

Analog-to-digital converter inputs

INPUT (PIN 5)

CLK
V

IL

V

IH

I

IL

I

IH

| input impedance f

|Z

i

C

I

LOW level input voltage 0 − 0.8 V

HIGH level input voltage 2.0 − V

LOW level input current V

HIGH level input current V

input capacitance f
OF INPUT (3-STATE; SEE TABLE 4)
V

IL

V

IH

V

9

I

IL

I

IH

LOW level input voltage 0 − 0.2 V

HIGH level input voltage 2.6 − V

input voltage in high impedance state − 1.15 − V

LOW level input current −370 −300 −µA

HIGH level input current − 300 450 µA

CCD

= 0.4 V −400 −−µA

clk

= 2.7 V −− 100 µA

clk

= 10 MHz − 4 − kΩ

clk

= 10 MHz − 4.5 − pF

clk

CCD

V

V

June 1994 7

Philips Semiconductors Product specification

Video analog input interface TDA8708A

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

ADCIN INPUT (PIN 20; SEE TABLE 5)
V

20

V

20

V

20(p-p)

input voltage digital output = 00 − V

input voltage digital output = 255 − V

input voltage amplitude

− 1.0 − V

(peak-to-peak value)
I

20

| input impedance fi= 6 MHz − 50 − MΩ

|Z

i

C

I

input current − 1.0 10 µA

input capacitance fi = 6 MHz − 1 − pF

Analog-to-digital converter outputs

D

IGITAL OUTPUTS D0 TO D7

V

OL

V

OH

I

OZ

LOW level output voltage IOL = 2 mA 0 − 0.6 V

HIGH level output voltage IOL = −0.4 mA 2.4 − V

output current in 3-state mode 0.4 V < VO< V

CCD

−20 − +20 µA

Switching characteristics

f

clk(max)

Analog signal processing (f

G

diff

maximum clock input frequency see Fig.6; note 6 30 32 − MHz

= 32 MHz; see Fig.8)

clk

differential gain V20 = 1.0 V (p-p);

− 2 − %

see Fig.3; note 7

ϕ

diff

f

1

f

all

differential phase see Fig.3; note 7 − 2 − deg

fundamental harmonics (full-scale) fi= 4.43 MHz; note 7 −− 0dB

harmonics (full-scale);

fi= 4.43 MHz; note 7 −−55 − dB

all components
SVRR2 supply voltage ripple rejection note 8 − 1 5 %/V

− 2.42 − V

CCA

− 1.41 − V

CCA

CCD

V

Transfer function (see Fig.8)

ILE DC integral linearity error −− ±1 LSB
DLE DC differential linearity error −− ±0.5 LSB
ILE AC integral linearity error note 9 −− ±2 LSB

Timing (f

IGITAL OUTPUTS (C

D
t

ds

t

h

t

d

t

dEZ

t

dDZ

= 32 MHz; see Figs 6, 7 and 8)

clk

= 15 pF; IOL= 2 mA; RL=2kΩ)

L

sampling delay time − 2 − ns

output hold time 6 8 − ns

output delay time − 16 20 ns

3-state delay time; output enable − 19 25 ns

3-state delay time; output disable − 14 20 ns

June 1994 8

Philips Semiconductors Product specification

Video analog input interface TDA8708A

Notes

1. 0 dB is obtained at the AGC amplifier when applying V

2. The output current at pin 19 should not exceed 1 mA. The load impedance RL should be referenced to V
defined as:

a) AC impedance ≥1kΩ and the DC impedance >2.7 kΩ.
b) The load impedance should be coupled directly to the output of the amplifier so that the DC voltage supplied by

the clamp is not disturbed.

3. Control mode 2 is selected.

4. Signal-to-noise ratio measured with 5 MHz bandwidth:

S

20 log

--- ­N

V

ANOUTC p p–()

------------------------------------------------ ­V

ANOUTY (RMSnoise)

at B = 5 MHz.=

5. The voltage ratio is expressed as:

SVRR1 20log

∆V

CCA

-----------------­V

CCA

G

×=

-------­∆ G

= 1 V (p-p), gain at 100 kHz = 1 and 1 V supply variation.

for V

I

6. It is recommended that the rise and fall times of the clock are ≥2 ns. In addition, a ‘good layout’ for the digital and
analog grounds is recommended.

7. These measurements are realized on analog signals after a digital-to-analog conversion (TDA8702 is used).

8. The supply voltage rejection is the relative variation of the analog signal (full-scale signal at input) for 1 V of supply
variation:

∆ V

SVRR2

I00()VIFF()

=

-----------------------------------------------------------------------------------------------------

9. Full-scale sine wave (f

–()V

∆V

CCA

= 4.4 MHz; f

i

–()+

I00()VIFF()

= 27 MHz).

clk

i(p-p)

= 1.33 V.

CCA

and

June 1994 9

Philips Semiconductors Product specification

Video analog input interface TDA8708A

Table 1 Video input selection (CVBS).

I1 I0 SELECTED INPUT

0 0 VIN0
0 1 VIN1
1 0 VIN2
1 1 VIN2

Table 2 AGC output current.

GATE A GATE B

DIGITAL

OUTPUT

I

AGC

MODE

(2)

1 1 output < 255 −2.5 µA1

1

2

0X

(1)

output > 255 I

AGCM

output < 248 0 µA2
output > 248 I

AGCM

1 0 output < 0 +2.5 µA2

0 < output <

−2.5 µA2

248
output > 248 I

AGCM

2

Note

1. X = don't care.

2. Mode 2 can only be initialized with successive pulses
on GATE A and GATE B (see Fig.5).

Table 3 CLAMP output current.

GATE A GATE B

1 1 output < 0I

DIGITAL

OUTPUT

I

CLAMP

CLAMPM

output > 0 −2.5 µA1

(1)

X

0X

(1)

0 µA2

0 1 output < 64 +50 µA2

64 < output −50 µA2

Note

1. X = don't care.

Table 4 OF input coding.

OF D0 TO D7

0 active, two's complement
1 high impedance

(1)

open circuit

active, binary

Note

1. Use C ≥ 10 pF to DGND.

MODE

1

Table 5 Output coding and input voltage (typical values).

BINARY OUTPUTS TWO'S COMPLEMENT

STEP V

ADCIN

D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0

Underflow − 0000000010000000

0V

− 2.41 V 0000000010000000

CCA

1 − 0000000110000001

. − ................

. − ................

254 − 1111111001111110
255 V

− 1.41 V 1111111101111111

CCA

Overflow − 1111111101111111

June 1994 10

Philips Semiconductors Product specification

Video analog input interface TDA8708A

andbook, full pagewidth

0.25 V

5 MHz sine wave

1.0 V

0.25 V

dbook, full pagewidth

64 µs

MBB959

Fig.3 Test signal on the ADCIN pin for differential gain and phase measurements.

digital
output

level

255

sync-level gain control

0

GATE A

peak-level gain control

black-level

clamping

MBB969

time

GATE B

MODE 1

Fig.4 Control mode 1.

June 1994 11

Philips Semiconductors Product specification

Video analog input interface TDA8708A

handbook, full pagewidth

digital

output

level

248
213

64

MBB970

peak-level gain control

standard picture

black-level

clamping

sync-level control

0

GATE A

GATE B

MODE 2

t

W

t

W

level

safety

margin

time

Fig.5 Control mode 2.

handbook, full pagewidth

CLK
input

analog
input
(ADCIN)

data
outputs
D0 to D7)

t

ds

sample
N 2

sample
N 1

t

h

data N 1

Fig.6 Timing diagram for data output.

June 1994 12

sample
N

t

d

clock input
reference level
(1.5 V)

sample
N 1

2.4 V

data N 1data Ndata N 2data N 3

0.4 V

MBB958

Philips Semiconductors Product specification

Video analog input interface TDA8708A

handbook, full pagewidth

OF
input

data
outputs
(D0 to D7)

two's complement

Fig.7 Output format timing diagram.

handbook, halfpage

t

dDZ

high impedance

V

t

dEZ

CCO

open

2.4 V

binary

0.4 V

MBB968

2 kΩ

D0 to D7

15 pF

MBD865

Fig.8 Load circuit for timing measurement; data outputs (OF = LOW or open-circuit).

June 1994 13

DGND

IN916

or

IN3064

Philips Semiconductors Product specification

Video analog input interface TDA8708A

V

CCO

handbook, halfpage

2 kΩ

S1

D0 to D7

C5

kΩ

IN916

or

IN3064

S2

MBB955

DGND

Fig.9 Load circuit for timing measurement; 3-state outputs (OF: fi= 1 MHz; VOF = 3 V).

MSA676

G

(dB)

12

8

5 %

4

0

4

8

2.6 4.6

(1) Typical value (V
(2) Minimum and maximum values (temperature and supply).

CCA

= V

CCD

= 5 V; T

= 25 °C).

amb

3 3.4 3.8 4.2

Fig.10 Gain control curve.

June 1994 14

(1)
(2)

V (V)

25

Philips Semiconductors Product specification

Video analog input interface TDA8708A

INTERNAL PIN CIRCUITRY

CCA

CCO

CCD

pin 22

V

pin 7

V

pin 6

V

pin 24

CLAMP

pin 8

DGND

pin 23

AGND

CCA

V

CCD

V

AGC

pin 25

CCD

V

pins 26 or 27

GATE A or GATE B

CCD

V

RPEAK

I

DGND

AGND

DGND

CCA

V

2

I

1

I

1

I

TDA8708A

V

AGND

CCA

V

CCA

V

CCA

V

top

V

CCA

V

mid

V

REF

bottom

V

2.5

mA

AGND

AGND

AGND

MBB971

pin 21

pin 20

pin 19

DEC

ADCIN

handbook, full pagewidth

ANOUT

Fig.11 Internal pin configuration.

DGND

pin 28

RPEAK

V

CCO

pins 1 to 4

data outputs

and 10 to 13

V

DGND

CCD

1.5 V

DGND

pin 5

clock input

June 1994 15

CCD

V

BE

4 V

chip enable

binary/

OF

pin 9

two's complement

CCA

V

REF

V

DGND

20

kΩ

1
0

I , I

pins 14 and 15

AGND

pins 16 to 18

VIN0, VIN1 and VIN2

AGND

Philips Semiconductors Product specification

Video analog input interface TDA8708A

APPLICATION INFORMATION

Additional information can be found in the laboratory report

handbook, full pagewidth

clock

5 V

data outputs

100 Ω

(1)

22 Ω

data outputs

33 pF

22 nF

22 nF

10 pF

1

2

3

4

5

6

7

TDA8708A

8

9

10

11

12

13

14

MBB967 - 1

“FBL/AN9308”

330 Ω

28

27

26

25

24

23

22

21

20

19

18

17

16

15

horizontal sync

horizontal clamp

220 nF

18 nF

1 µF

1 µF

4.7 µF

.

10 nF

5 V

LOW PASS

FILTER

4.7 µF

75 Ω

1 µH

5 V

(2)

4.7 µF

75 Ω

75 Ω

(1) It is recommended to decouple V

the output data of TDA8708A interfaces with a capacitive CMOS load device.

(2) See Figs 13 and 15 for examples of the low-pass filters.

through a 22 Ω resistor especially when

CCO

Fig.12 Application diagram.

June 1994 16

Philips Semiconductors Product specification

Video analog input interface TDA8708A

22 µH

book, full pagewidth

ANOUT
(pin 19)

This filter can be adapted to various applications with respect to performance requirements. An input and output impedance of at least 680 Ω and 2.2 kΩ
must in any event be applied.

680 Ω

V

i

12 pF 12 pF

27 pF 68 pF 27 pF

22 µH

V

CCA

(pin 22)

2.2 kΩ

MBB966 - 1

ADCIN

(pin 20)

V

o

Fig.13 Example of a low-pass filter for CVBS and Y signals.

Characteristics of Fig. 13

• Order 5; adapted CHEBYSHEV

handbook, halfpage

0

α

(dB)

40

MSA682

• Ripple ρ≤0.4 dB

• f = 6.5 MHz at −3dB

• f

= 9.75 MHz.

notch

80

120

160

010 30

20

f (MHz)

Fig.14 Frequency response for filter shown in

Fig.13.

June 1994 17

Philips Semiconductors Product specification

Video analog input interface TDA8708A

handbook, full pagewidth

This filter can be adapted to various applications with respect to performance requirements. An input and output impedance of at least 680 Ω and 2.2 kΩ
must in any event be applied.

ADOUT
(pin 19)

680 Ω

V

i

82 µH

2.2 kΩ

15 pF 15 pF

V

CCA

(pin 22)

MSA678

ADCIN

(pin 20)

V

o

Fig.15 Example of an economical low-pass filter for CVBS and Y signals.

Characteristics of Fig. 15

• Order 5; adapted CHEBYSHEV

handbook, halfpage

0

α

(dB)

MSA681

• Ripple ρ≤0.4 dB

• f = 6.5 MHz at −3 dB.

10

20

30

40

010 30

20

f (MHz)

Fig.16 Frequency response for filter shown in Fig.15.

June 1994 18

Philips Semiconductors Product specification

Video analog input interface TDA8708A

PACKAGE OUTLINES

handbook, full pagewidth

seating plane

3.9

3.4

1.7

max

28

1

2.54

(13x)

36.0

35.0

1.7 max

0.53
max

15

14

0.51
min

14.1

13.7

max

0.254

4.0

15.80

15.24

5.1

max

M

0.32 max

15.24

17.15

15.90

MSA264

Dimensions in mm.

Fig.17 Plastic dual in-line package; 28 leads (600 mil) with internal heat spreader (SOT117-1).

June 1994 19

Philips Semiconductors Product specification

Video analog input interface TDA8708A

handbook, full pagewidth

S

pin 1
index

114

0.9

0.4

(4x)

18.1

17.7

1.27

0.49

0.36

0.1 S

1528

0.25 M

(28x)

2.45

2.25

0.3

0.1

7.6

7.4

10.65

10.00

detail A

1.1

0.5

1.1

1.0

0.32

0.23

0 to 8

MBC236 - 1

A

2.65

2.35

o

Dimensions in mm.

Fig.18 Plastic small outline package; 28 leads; large body (SOT136-1).

June 1994 20

Philips Semiconductors Product specification

Video analog input interface TDA8708A

SOLDERING
Plastic dual in-line packages

Y DIP OR WAVE

B
The maximum permissible temperature of the solder is

260 °C; this temperature must not be in contact with the
joint for more than 5 s. The total contact time of successive
solder waves must not exceed 5 s.

The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified storage maximum. If the printed-circuit board has
been pre-heated, forced cooling may be necessary
immediately after soldering to keep the temperature within
the permissible limit.

EPAIRING SOLDERED JOINTS

R
Apply a low voltage soldering iron below the seating plane

(or not more than 2 mm above it). If its temperature is
below 300 °C, it must not be in contact for more than 10 s;
if between 300 and 400 °C, for not more than 5 s.

Plastic small-outline packages

YWAVE

B
During placement and before soldering, the component

must be fixed with a droplet of adhesive. After curing the
adhesive, the component can be soldered. The adhesive
can be applied by screen printing, pin transfer or syringe
dispensing.

Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder bath is
10 s, if allowed to cool to less than 150 °C within 6 s.
Typical dwell time is 4 s at 250 °C.

A modified wave soldering technique is recommended
using two solder waves (dual-wave), in which a turbulent
wave with high upward pressure is followed by a smooth
laminar wave. Using a mildly-activated flux eliminates the
need for removal of corrosive residues in most
applications.

Y SOLDER PASTE REFLOW

B
Reflow soldering requires the solder paste (a suspension

of fine solder particles, flux and binding agent) to be
applied to the substrate by screen printing, stencilling or
pressure-syringe dispensing before device placement.

Several techniques exist for reflowing; for example,
thermal conduction by heated belt, infrared, and
vapour-phase reflow. Dwell times vary between 50 and
300 s according to method. Typical reflow temperatures
range from 215 to 250 °C.

Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 min at 45 °C.

EPAIRING SOLDERED JOINTS (BY HAND-HELD SOLDERING

R

IRON OR PULSE

-HEATED SOLDER TOOL)

Fix the component by first soldering two, diagonally
opposite, end pins. Apply the heating tool to the flat part of
the pin only. Contact time must be limited to 10 s at up to
300 °C. When using proper tools, all other pins can be
soldered in one operation within 2 to 5 s at between 270
and 320 °C. (Pulse-heated soldering is not recommended
for SO packages.)

For pulse-heated solder tool (resistance) soldering of VSO
packages, solder is applied to the substrate by dipping or
by an extra thick tin/lead plating before package
placement.

June 1994 21

Philips Semiconductors Product specification

Video analog input interface TDA8708A

DEFINITIONS

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

June 1994 22

Philips Semiconductors Product specification

Video analog input interface TDA8708A

NOTES

June 1994 23

Philips Semiconductors – a worldwide company

Argentina: IEROD, Av. Juramento 1992 - 14.b, (1428)

BUENOS AIRES, Tel. [phone], Fax. [phone]

Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,

Tel. [phone], Fax. [phone]

Austria: Triester Str. 64, A-1101 WIEN, P.O. Box 213,

Tel. [phone], Fax. [phone]

Belgium: Postbus 90050, 5600 PB EINDHOVEN, The Netherlands,

Tel. [phone], Fax. [phone]

Brazil: Rua do Rocio 220 - 5

CEP: 04552-903-SÃO PAULO-SP, Brazil.
P.O. Box 7383 (01064-970).
Tel. [phone], Fax. [phone]

Canada: INTEGRATED CIRCUITS:

Tel. [phone], Fax. [phone]
DISCRETE SEMICONDUCTORS: 601 Milner Ave,
SCARBOROUGH, ONTARIO, M1B 1M8,
Tel. [phone] ext. 2336, Fax. [phone]

Chile: Av. Santa Maria 0760, SANTIAGO,

Tel. [phone], Fax. [phone]

Colombia: IPRELENSO LTDA, Carrera 21 No. 56-17,

77621 BOGOTA, Tel. [phone],
Fax. [phone]

Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S,

Tel. [phone], Fax. [phone]

Finland: Sinikalliontie 3, FIN-02630 ESPOO,

Tel. [phone], Fax. [phone]

France: 4 Rue du Port-aux-Vins, BP317,

92156 SURESNES Cedex,
Tel. [phone], Fax. [phone]

Germany: PHILIPS COMPONENTS UB der Philips G.m.b.H.,

P.O. Box 10 63 23, 20043 HAMBURG,
Tel. [phone], Fax. [phone].

Greece: No. 15, 25th March Street, GR 17778 TAVROS,

Tel. [phone] 911, Fax. [phone]

Hong Kong: PHILIPS HONG KONG Ltd., Components Div.,

6/F Philips Ind. Bldg., 24-28 Kung Yip St., KWAI CHUNG, N.T.,
Tel. [phone], Fax. [phone]

India: Philips INDIA Ltd, Components Dept,

Shivsagar Estate, A Block ,
Dr. Annie Besant Rd. Worli, Bombay 400 018
Tel. [phone], Fax. [phone]

Indonesia: Philips House, Jalan H.R. Rasuna Said Kav. 3-4,

P.O. Box 4252, JAKARTA 12950,
Tel. [phone], Fax. [phone]

Ireland: Newstead, Clonskeagh, DUBLIN 14,

Tel. [phone], Fax. [phone]

Italy: PHILIPS COMPONENTS S.r.l.,

Viale F. Testi, 327, 20162 MILANO,
Tel. [phone], Fax. [phone].

Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108,

Tel. [phone], Fax. [phone]

Korea: (Republic of) Philips House, 260-199 Itaewon-dong,

Yongsan-ku, SEOUL, Tel. [phone], Fax. [phone]

Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA,

SELANGOR, Tel. [phone], Fax. [phone]

Mexico: Philips Components, 5900 Gateway East, Suite 200,

EL PASO, TX 79905, Tel. [phone], Fax. [phone]

Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB

Tel. [phone], Fax. [phone]

New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,

Tel. [phone], Fax. [phone]

th

floor, Suite 51,

Norway: Box 1, Manglerud 0612, OSLO,

Tel. [phone], Fax. [phone]

Pakistan: Philips Electrical Industries of Pakistan Ltd.,

Exchange Bldg. ST-2/A, Block 9, KDA Scheme 5, Clifton,
KARACHI 75600, Tel. [phone],
Fax. [phone].

Philippines: PHILIPS SEMICONDUCTORS PHILIPPINES Inc,

106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. [phone], Fax. [phone]

Portugal: PHILIPS PORTUGUESA, S.A.,

Rua dr. António Loureiro Borges 5, Arquiparque - Miraflores,
Apartado 300, 2795 LINDA-A-VELHA,
Tel. [phone], Fax. [phone].

Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231,

Tel. [phone], Fax. [phone]

South Africa: S.A. PHILIPS Pty Ltd., Components Division,

195-215 Main Road Martindale, 2092 JOHANNESBURG,
P.O. Box 7430 Johannesburg 2000,
Tel. [phone], Fax. [phone].

Spain: Balmes 22, 08007 BARCELONA,

Tel. [phone], Fax. [phone]

Sweden: Kottbygatan 7, Akalla. S-164 85 STOCKHOLM,

Tel. [phone], Fax. [phone]

Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,

Tel. [phone], Fax. [phone]

Taiwan: PHILIPS TAIWAN Ltd., 23-30F, 66, Chung Hsiao West

Road, Sec. 1. Taipeh, Taiwan ROC, P.O. Box 22978,
TAIPEI 100, Tel. [phone], Fax. [phone].

Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,

209/2 Sanpavuth-Bangna Road Prakanong,
Bangkok 10260, THAILAND,
Tel. [phone], Fax. [phone].

Turkey:Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,

Tel. [phone], Fax. [phone]

United Kingdom: Philips Semiconductors Limited, P.O. Box 65,

Philips House, Torrington Place, LONDON, WC1E 7HD,
Tel. [phone], Fax. [phone]

United States:INTEGRATED CIRCUITS:

811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. [phone], Fax. [phone]
DISCRETE SEMICONDUCTORS: 2001 West Blue Heron Blvd.,

P.O. Box 10330, RIVIERA BEACH, FLORIDA 33404,
Tel. [phone] and [phone], Fax. [phone]

Uruguay: Coronel Mora 433, MONTEVIDEO,

Tel. [phone], Fax. [phone]

For all other countries apply to: Philips Semiconductors,
International Marketing and Sales, Building BAF-1,
P.O. Box 218, 5600 MD, EINDHOVEN, The Netherlands,
Telex 35000 phtcnl, Fax. [phone]

SCD31 © Philips Electronics N.V. 1994

All rights are reserved. Reproduction in whole or in part is prohibited without the
prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation
or contract, is believed to be accurate and reliable and may be changed without
notice. No liability will be accepted by the publisher for any consequence of its
use. Publication thereof does not convey nor imply any license under patent- or
other industrial or intellectual property rights.

Printed in The Netherlands

533061/1500/05/pp24 Date of release: June 1994
Document order number: 9397 734 20011

Philips Semiconductors