Triple RGB 6-bit video
analog-to-digital interface
Product specification
Supersedes dat of March 1995
File under Integrated Circuits, IC02
1996 Feb 01
Page 2
Philips SemiconductorsProduct specification
Triple RGB 6-bit video analog-to-digital
interface
FEATURES
• Triple analog-to-digital converter (ADC)
• 6-bit resolution
• Sampling rate up to 35 MHz
• Power dissipation of 335 mW (typical)
• Internal clamping function
• TTL compatible digital inputs
•−40 to +85 °C operating temperature
• CMOS digital outputs.
APPLICATIONS
• High-speed analog-to-digital conversion for video
signals
• VGA signal treatment.
DESCRIPTION
The TDA8707 is a CMOS triple 6-bit video low-power
analog-to-digital converter (ADC) for RGB signals.
TDA8707
It converts the analog inputs into 6-bit binary coded digital
words at a sampling rate of 35 MHz. All analog signal
inputs are clamped.
Analog-to-digital converter
The TDA8707 implements 3 independent 6-bit
analog-to-digital converters in CMOS process. These
converters use a full-flash approach.
Clamping feature
An internal clamping circuit is provided in each of the
3 analog channels. The analog pins INR, ING and INB are
switched, through series capacitors, to on-chip clamping
levels during an active pulse on the clamp input CLP.
Clamping level in the R, G and B channels is Code 0.
Input buffers
Internal buffers are provided to drive the analog-to-digital
converter inputs. Their ratio can be adjusted externally at
1.5 or 2.0 with select input SLT.
QUICK REFERENCE DATA
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
V
DDA
V
DDD
I
DDA
I
DDD
INLintegral non-linearityf
DNLdifferential non-linearityf
analog supply voltage4.55.05.5V
digital supply voltage4.55.05.5V
analog supply current−6080mA
digital supply currentf
= 35 MHz−58mA
clk
= 35 MHz; ramp input;
clk
T
=25°C
amb
= 35 MHz; ramp input;
clk
=25°C
T
amb
−±0.35±0.6LSB
−±0.35±0.6LSB
EBeffective bitsnote 1−5.3−bits
f
clk
P
tot
maximum clock conversion rate35−−MHz
total power dissipationf
= 35 MHz; note 2−335485mW
clk
Notes
1. The number of effective bits is measured with a clock frequency of 35 MHz. This value is given for a 4.43 MHz
frequency on the R, G and B channels.
2. The external resistor (value 15 kΩ) between V
and CLREF, fixing internal static currents, influences P
DDA
.
tot
ORDERING INFORMATION
TYPE
NUMBER
NAMEDESCRIPTIONVERSION
PACKAGE
TDA8707HQFP44plastic quad flat package; 44 leads; lead length 1.3 mm; body 10× 10 × 1.75 mm SOT307-2
1996 Feb 012
Page 3
Philips SemiconductorsProduct specification
Triple RGB 6-bit video analog-to-digital
interface
BLOCK DIAGRAM
handbook, full pagewidth
V
V
V
V
DDA1
SSA1
INR
DDA2
SSA2
ING
33
35
34
30
32
31
BUFFER
BUFFER
CLREFCLPCLK
242310
CLAMPING
CIRCUIT
CLAMPING
CIRCUIT
6-BIT
ADC
6-BIT
ADC
38,
40-44
6
3-8
6
TDA8707
R0 to R5
G0 to G5
V
DDA3
V
SSA3
INB
CREFH
CREFL
27
29
28
26
25
BUFFER
36
SLT
TDA8707
CLAMPING
CIRCUIT
Fig.1 Block diagram.
6-BIT
ADC
V
DDD1VSSD1
14-16,
18-20
6
22
21
911
MGA919
B0 to B5
V
DDD2
V
SSD2
1996 Feb 013
Page 4
Philips SemiconductorsProduct specification
Triple RGB 6-bit video analog-to-digital
interface
PINNING
SYMBOLPINDESCRIPTION
n.c.1not connected
n.c.2not connected
G03GREEN data output; bit 0 (LSB)
G14GREEN data output; bit 1
G25GREEN data output; bit 2
G36GREEN data output; bit 3
G47GREEN data output; bit 4
G58GREEN data output; bit 5 (MSB)
V
SSD1
CLK10clock input
V
DDD1
n.c.12not connected
n.c.13not connected
B014BLUE data output; bit 0 (LSB)
B115BLUE data output; bit 1
B216BLUE data output; bit 2
n.c.17not connected
B318BLUE data output; bit 3
B419BLUE data output; bit 4
B520BLUE data output; bit 5 (MSB)
V
SSD2
V
DDD2
9digital supply ground 1
11digital supply voltage 1
21digital supply ground 2
22digital supply voltage 2
TDA8707
SYMBOLPINDESCRIPTION
CLP23clamping input
CLREF24ADCs current reference level input
CREFL25converter reference LOW level input
CREFH26converter reference HIGH level input
V
DDA3
INB28BLUE analog input
V
SSA3
V
DDA2
ING31GREEN analog input
V
SSA2
V
DDA1
INR34RED analog input
V
SSA1
SLT36select input buffer ratio
n.c.37not connected
R038RED data output; bit 0 (LSB)
n.c.39not connected
R140RED data output; bit 1
R241RED data output; bit 2
R342RED data output; bit 3
R443RED data output; bit 4
R544RED data output; bit 5 (MSB)
27analog supply voltage 3
29analog supply ground 3
30analog supply voltage 2
32analog supply ground 2
33analog supply voltage 1
35analog supply ground 1
1996 Feb 014
Page 5
Philips SemiconductorsProduct specification
Triple RGB 6-bit video analog-to-digital
interface
R5R4R3R2R1
V
SSD1
V
DDD1
index
corner
n.c.
n.c.
G0
G1
G2
G3
G4
G5
CLK
1
2
3
4
5
6
7
8
9
10
11
44
43
42
41
40
TDA8707
n.c.
39
R0
38
n.c.
37
SLT
36
SSA1
V
35
INR
34
33
32
31
30
29
28
27
26
25
24
23
V
DDA1
V
SSA2
ING
V
DDA2
V
SSA3
INB
V
DDA3
CREFH
CREFL
CLREF
CLP
TDA8707
20
21
B5
SSD2
V
22
DDD2
V
MGA920
12
n.c.
13
n.c.
14
B0
15
B1
16
B2
17
n.c.
B3
18
19
B4
Fig.2 Pin configuration.
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOLPARAMETERCONDITIONSMIN.MAX.UNIT
V
V
∆V
V
V
DDA
DDD
DD
I
i(p-p)
analog supply voltage (pins 27, 30 and 33)−0.3+6.5V
digital supply voltage (pins 11 and 22)−0.3+6.5V
supply voltage difference between V
input voltage (pins 28, 31 and 34)referenced to V
AC input voltage for switching
thermal resistance from junction to ambient in free air75K/W
1996 Feb 015
Page 6
Philips SemiconductorsProduct specification
Triple RGB 6-bit video analog-to-digital
TDA8707
interface
HANDLING
Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling integrated circuits.
analog input settling time LOW-to-HIGH full scale square wave−1316ns
analog input settling time HIGH-to-LOW full scale square wave−1114ns
fundamental harmonic−−0dB
harmonics, all components−−37−dB
differential gainPAL modulated ramp−3−%
differential phasePAL modulated ramp−2−deg
sampling delay time−3−ns
output hold time6−−ns
output delay timenote 8−−16ns
clock rise time35−ns
clock fall time35−ns
active clamping duration34−µs
1996 Feb 017
Page 8
Philips SemiconductorsProduct specification
Triple RGB 6-bit video analog-to-digital
TDA8707
interface
Notes to the characteristics
1. V
2. The analog supply current is directly proportional to the series resistance between V
3. CREFH and CREFL are connected respectively to the top and bottom reference ladders of the 3 analog-to-digital
4. V
5. Measurement carried out using video analyser VM700A, where the video analog signal is reconstructed through a
6. V
7. The analog input settling time is the minimum time required for the input signal to be stabilized after a sharp full-scale
8. Output data acquisition: output data is available after the maximum delay time of td.
Table 1 Typical output coding (V
DDA
and V
should be supplied from the same power supply and decoupled separately.
DDD
DDA
converters.
=(V
I(p-p)
active video signal amplitude V
REFL
− V
)/buffer gain factor. See Table for gain factor selection. When clamping at code 0 is used,
REFH
V
–()
REFHVREFL
should be:
ACT
V
ACT
=
---------------------------------------------- buffer gain factor
digital-to-analog converter.
= ∆REF with fi= 4.43 MHz.
I(p-p)
input (square-wave signal) in order to sample the signal and obtain correct output data.
T
amb
=25°C)
REFH
=2V; V
= 0.5 V referenced to V
REFL
, SLT = logic 0; buffer ratio = 1.5;
SSA
and CLREF.
STEPV
−
00.349000000
10.364000001
.......
621.317111110
631.333111111
−
Table 2 Mode selection
SLTBUFFER RATIOTYPICAL V
01.5
12.0
<0.333 =
>1.333 =
I(p-p)
V
REFL
----------------
1.5
V
REFH
-----------------
1.5
BINARY OUTPUT BITS
D5D4D3D2D1D0
000000
111111
FULL SCALE
I(p-p)
V
–
REFHVREFL
--------------------------------------- -
1.5
V
–
REFHVREFL
--------------------------------------- -
2.0
1996 Feb 018
Page 9
Philips SemiconductorsProduct specification
Triple RGB 6-bit video analog-to-digital
interface
TIMING DIAGRAMS
t
handbook, full pagewidth
CLK
IN R, G, B
DATA
D0 to D5
sample N
t
dS
DATA
N - 2
t
CPH
CPL
sample N + 1
DATA
N - 1
sample N + 2
t
d
DATA
N
TDA8707
1.4 V
t
h
DATA
N + 1
2.4 V
1.4 V
0.4 V
MLB759
handbook, full pagewidth
digital
output
level
Fig.3 Input timing.
63
black-level
clamping
0
CLP
t
CLP
time
MGA922
Fig.4 Clamp timing.
1996 Feb 019
Page 10
Philips SemiconductorsProduct specification
Triple RGB 6-bit video analog-to-digital
interface
t
handbook, full pagewidth
code 64
code 0
CLK
MLD208
V
I
STLH
50 %
2 ns
50 %
0.5 ns
2 ns
t
STHL
50 %
50 %
TDA8707
0.5 ns
Fig.5 Analog input settling-time diagram.
1996 Feb 0110
Page 11
Philips SemiconductorsProduct specification
Triple RGB 6-bit video analog-to-digital
interface
INTERNAL CIRCUITRY
V
DDD
V
SSD
V
DDA
V
SSAVSSA
TDA8707
(a)
V
SSA
V
SSA
(c)(d)
(a) Digital inputs; pins 10, 23 and 36.
(b) Analog inputs; pins 28, 31 and 34.
(c) Current reference; pin 24.
(d) Digital outputs; pins 3 to 8, 14 to 16, 18 to 20 and 40 to 44.
V
V
(b)
DDD
SSD
MGA925
Fig.6 Internal circuitry.
1996 Feb 0111
Page 12
Philips SemiconductorsProduct specification
Triple RGB 6-bit video analog-to-digital
interface
APPLICATION INFORMATION
handbook, full pagewidth
R5R4R3R2R1
n.c.
n.c.
G0
G1
G2
G3
G4
1
2
3
4
5
6
7
TDA8707
TDA8707
35363738394041424344
V
SSA1
RED
34
22 nF
INR
100 nF
V
DDA1
33
V
SSA2
32
22 nF
ING
31
V
DDA2
30
V
SSA3
29
INB
28
V
DDA3
27
22 nF
GREEN
BLUE
100 nF
100 nF
SLTn.c.R0n.c.
V
SSD1
V
DDD1
8
9
10
11
n.c.n.c.
B0B1
B2
n.c.
B3B4B5
100
nF
G5
CLK
5 V
Analog and digital supplies should be separated and decoupled.
Supplies are not connected internally; also applicable to grounds.
The internal reference currents are set by the series resistor between pin V
The resistor value should be in the range of 12 kΩ and 15 kΩ.
DDA
It is recommended, if possible, to connect pins 1, 2, 12, 13, 17, 37 and 39 to V
and CLREF.
.
SSD
2221201918171615141312
V
SSD2VDDD2
100
nF
MGA926
CREFH
26
CREFL
25
CLREF
24
23
CLP
15 k
2 V
2.2 nF
0.5 V
Ω
5 V
Fig.7 Application diagram.
1996 Feb 0112
Page 13
Philips SemiconductorsProduct specification
Triple RGB 6-bit video analog-to-digital
interface
PACKAGE OUTLINE
QFP44: plastic quad flat package; 44 leads (lead length 1.3 mm); body 10 x 10 x 1.75 mm
c
y
X
A
3323
34
22
Z
E
TDA8707
SOT307-2
e
w M
b
p
pin 1 index
44
1
w M
b
0.25
p
D
H
D
cE
p
0.40
0.25
0.20
0.14
D
10.1
9.9
e
DIMENSIONS (mm are the original dimensions)
mm
A
max.
2.10
0.25
0.05
1.85
1.65
UNITA1A2A3b
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
12
11
Z
D
B
v M
02.55 mm
scale
(1)
(1)(1)(1)
eH
H
D
10.1
9.9
12.9
0.81.3
12.3
v M
H
E
E
A
B
LLpQZywv θ
E
12.9
12.3
0.95
0.55
A
2
A
A
1
detail X
0.85
0.75
0.150.10.15
Q
(A )
3
θ
L
p
L
Z
E
D
1.2
0.8
1.2
0.8
o
10
o
0
OUTLINE
VERSION
SOT307-2
IEC JEDEC EIAJ
REFERENCES
1996 Feb 0113
EUROPEAN
PROJECTION
ISSUE DATE
92-11-17
95-02-04
Page 14
Philips SemiconductorsProduct specification
Triple RGB 6-bit video analog-to-digital
interface
SOLDERING
Introduction
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our
“IC Package Databook”
Reflow soldering
Reflow soldering techniques are suitable for all QFP
packages.
The choice of heating method may be influenced by larger
plastic QFP packages (44 leads, or more). If infrared or
vapour phase heating is used and the large packages are
not absolutely dry (less than 0.1% moisture content by
weight), vaporization of the small amount of moisture in
them can cause cracking of the plastic body. For more
information, refer to the Drypack chapter in our
Reference Handbook”
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.
(order code 9398 652 90011).
“Quality
(order code 9397 750 00192).
TDA8707
Wave soldering
Wave soldering is not recommended for QFP packages.
This is because of the likelihood of solder bridging due to
closely-spaced leads and the possibility of incomplete
solder penetration in multi-lead devices.
If wave soldering cannot be avoided, the following
conditions must be observed:
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave)
soldering technique should be used.
• The footprint must be at an angle of 45° to the board
direction and must incorporate solder thieves
downstream and at the side corners.
Even with these conditions, do not consider wave
soldering the following packages: QFP52 (SOT379-1),
QFP100 (SOT317-1), QFP100 (SOT317-2),
QFP100 (SOT382-1) or QFP160 (SOT322-1).
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Repairing soldered joints
Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.
1996 Feb 0114
Page 15
Philips SemiconductorsProduct specification
Triple RGB 6-bit video analog-to-digital
TDA8707
interface
DEFINITIONS
Data sheet status
Objective specificationThis data sheet contains target or goal specifications for product development.
Preliminary specificationThis data sheet contains preliminary data; supplementary data may be published later.
Product specificationThis data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1996 Feb 0115
Page 16
Philips Semiconductors – a worldwide company
Argentina: IEROD, Av. Juramento 1992 - 14.b, (1428)
BUENOS AIRES, Tel. (541)786 7633, Fax. (541)786 9367
Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,
Tel. (02)805 4455, Fax. (02)805 4466
Austria: Triester Str. 64, A-1101 WIEN, P.O. Box 213,
Tel. (01)60 101-1236, Fax. (01)60 101-1211
Belgium: Postbus 90050, 5600 PB EINDHOVEN, The Netherlands,
All rights are reserved. Reproduction in whole or in part is prohibited without the
prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation
or contract, is believed to be accurate and reliable and may be changed without
notice. No liability will be accepted by the publisher for any consequence of its
use. Publication thereof does not convey nor imply any license under patent- or
other industrial or intellectual property rights.
Printed in The Netherlands
537021/1100/03/pp16Date of release: 1996 Feb 01
Document order number:9397 750 00605
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