Datasheet TDA8706, TDA8706T Datasheet (Philips)

INTEGRATED CIRCUITS

DATA SH EET

TDA8706

6-bit analog-to-digital converter
with multiplexer and clamp

Preliminary specification
Supersedes data of February 1992
File under Integrated Circuits, IC02

1996 Aug 20

Philips Semiconductors Preliminary specification

6-bit analog-to-digital converter with
multiplexer and clamp

FEATURES

• 6-bit resolution

• Binary 3-state TTL outputs

• TTL compatible digital inputs

• 3 multiplexed video inputs

• Luminance and colour difference clamps

• Internal reference

• 300 mW power dissipation

• 20-pin plastic package.

APPLICATIONS

• General purpose video applications

• Y, U and V signals

• Colour Picture-in-Picture (PIPCO) for TV

• Videophone

• Frame grabber.

TDA8706

GENERAL DESCRIPTION

The TDA8706 is a monolithic bipolar 6-bit
Analog-to-Digital Converter (ADC) with a 3 analog input
multiplexer and a clamp. All digital inputs and outputs are
TTL compatible. Regulator with good temperature
compensation.

FUNCTIONAL DESCRIPTION

The TDA8706 is a ‘like-flash’ converter which produces an
output code in one clock period. The device can withstand
a duty clock cycle of 50 to 66.6% (clock HIGH).
Luminance clamping level is fitted with 00H code (output

000000). Chrominance clamping level is fitted with 20H
code (output 100000).

QUICK REFERENCE DATA

Measured over full voltage and temperature ranges.

SYMBOL PARAMETER MIN. TYP. MAX. UNIT

V
V
I

CCA

I

CCD

CCA
CCD

analog supply voltage (pin 2) 4.5 5.0 5.5 V
digital supply voltage (pin 10) 4.5 5.0 5.5 V
analog supply current (pin 20) − 32 39 mA

digital supply current (pin 10) − 28 37 mA
ILE integral linearity error −−±0.75 LSB
DLE DC differential linearity error −−±0.5 LSB
f

CLK

P
T

tot
amb

maximum clock frequency 20 −− MHz

total power dissipation − 300 418 mW

operating ambient temperature range 0 − +70 °C

ORDERING INFORMATION

TYPE

NUMBER

NAME DESCRIPTION VERSION

PACKAGE

TDA8706 DIP20 plastic dual in-line package; 20 leads (300 mil) SOT146-1
TDA8706T SO20 plastic small outline package; 20 leads; body width 7.5 mm SOT163-1

1996 Aug 20 2

Philips Semiconductors Preliminary specification

6-bit analog-to-digital converter with
multiplexer and clamp

BLOCK DIAGRAM

digital

voltage

17 D3

16 D4

15 D5

chip

enable

TTL

outputs

18 D2

OUTPUTS

19 D1

20 D0

TDA8706

MCD267

ground

input

clock

voltage

reference

CCD

CCA

BOTTOM

TOP

voltage

reference

select

inputs

handbook, full pagewidth

Fig.1 Block diagram.

13 14

ADC

6-BIT

REGULATOR

CBA

11 8 9 10 3 4 1

V

2

V

CLAMP

CHROMINANCE

5

MULTIPLEXER

CLAMP

CHROMINANCE

6

CLAMP

LUMINANCE

12

7

TDA8706

input

chrominance

input

chrominance

1996 Aug 20 3

input

luminance

input

clamp

Philips Semiconductors Preliminary specification

6-bit analog-to-digital converter with
multiplexer and clamp

PINNING

SYMBOL PIN DESCRIPTION

GND 1 ground
V

CCA

V

RT

V

RB

INC 5 chrominance input
INB 6 chrominance input
INA 7 luminance input
C 8 select input
B 9 select input
A 10 select input
V

CCD

CLAMP 12 damp pulse input (positive pulse)
CLK 13 clock input
CE 14 chip enable (active LOW)
D5 15 digital voltage output: most significant

D4 16 digital voltage output
D3 17 digital voltage output
D2 18 digital voltage output
D1 19 digital voltage output
D0 20 digital voltage output: significant bit

2 analog positive supply (+5 V)
3 reference voltage TOP decoupling
4 reference voltage BOTTOM

decoupling

11 digital positive supply voltage (+5 V)

bit (MSB)

(LSB)

handbook, halfpage

1

GND

V

2

CCA

V

3

RT

V

4

RB

INC

5
INB
INA

TDA8706

6

7

C

8

B

9

A

10

MCD266

Fig.2 Pin configuration.

TDA8706

D0

20

D1

19
18

D2
D3

17
16

D4
D5

15
14

CE
CLK

13

CLAMP

12

V

11

CCD

1996 Aug 20 4

Philips Semiconductors Preliminary specification

6-bit analog-to-digital converter with

TDA8706

multiplexer and clamp

LIMITING VALUES

In accordance with the Absolute Maximum System (IEC 134).

SYMBOL PARAMETER MIN. MAX. UNIT

V

CCA

V

CCD

− V

V
V
I
T
T

CCA
I

O

stg
amb

CCD

HANDLING

Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling integrated circuits.

analog supply voltage range (pin 2) −0.3 +7.0 V
digital supply voltage range (pin 10) −0.3 +7.0 V
supply voltage difference 1.0 − V
input voltage range −0.3 +7.0 V
output current − 10 mA
storage temperature range −55 +150 °C
operating ambient temperature range 0 +70 °C

1996 Aug 20 5

Philips Semiconductors Preliminary specification

6-bit analog-to-digital converter with

TDA8706

multiplexer and clamp

CHARACTERISTICS (see Tables 1 and 2)
V

= 4.5 to 5.5 V; V

CCA

at V

CCA=VCCD

= 5 V and T

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Supply

V
V
I

CCA

I

CCD

CCA
CCD

analog supply voltage (pin 2) 4.5 5.0 5.5 V
digital supply voltage (pin 10) 4.5 5.0 5.5 V
analog supply current (pin 2) − 32 39 mA
digital supply current (pin 10) all outputs at LOW level − 28 37 mA

Inputs

C

LOCK INPUT (PIN 13)

V

IL

V

IH

I

IL

I

IH

Z

I

C

i

LOW level input voltage 0 − 0.8 V
HIGH level input voltage 2.0 − V
LOW level input current V
HIGH level input current V
input impedance f

input capacitance f
A, B, C, CLAMP AND CEN INPUTS (PINS 8, 9, 10, 12 AND 14)
V

IL

V

IH

I

IL

I

IH

LOW level input voltage 0 − 0.8 V

HIGH level input voltage 2 − V

LOW level input current V

HIGH level input current V

Reference voltage (pins 3 and 4)

V

RT

V

RB

− VRBreference voltage TOP − BOTTOM decoupling 1.36 1.435 1.48 V

V

RT

reference voltage TOP decoupling 3.22 3.35 3.44 V

reference voltage BOTTOM decoupling 1.84 1.9 1.96 V

Analog inputs INA, INB, INC (pins 7, 6 and 5)

V

I(p-p)

Z

I

C

clamp

input voltage amplitude (peak-to-peak value) 840 900 940 mV

input impedance fi= 4.43 MHz 100 −−kΩ

coupling clamp capacitance 1 10 1000 nF

Analog signal processing (pins 5, 6 and 7) (f

f

1

f

all

G

diff

φ

diff

fundamental harmonics (full scale) fi= 4.43 MHz −−0dB

harmonics (full scale); all components fi= 4.43 MHz −−45 − dB

differential gain note 1 − 0.4 − %

differential phase note 1 − 1.0 − deg
SVRR supply voltage ripple rejection note 2 −−30 − dB

= 4.5 to 5.5 V = V

CCD

=25°C; unless otherwise specified.

amb

CCD

; T

= 0 to +70 °C; C

amb

= 20 MHz)

CLK

VRB=CVR1

= 0.4 V −400 −−µA

CLK

= 2.7 V −−100 µA

CLK

= 20 MHz − 4 − kΩ

CLK

= 20 MHz − 2 − pF

CLK

= 0.4 V −400 −−µA

CLK

= 2.7 V −−20 µA

CLK

= 100 nF; Typical values measured

CCD

CCD

V

V

1996 Aug 20 6

Philips Semiconductors Preliminary specification

6-bit analog-to-digital converter with

TDA8706

multiplexer and clamp

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Outputs

DIGITAL VOLTAGE OUTPUTS (PINS 15 TO 20) (see Table 2)
V

OL

V

OH

I

OZ

Switching characteristics

C

LOCK TIMING (see Fig.3)

f

CLK

f

mux

t

CLK

t

LOW

t

HIGH

t

CLR

t

CLF

Select signals, Clamp, Data (see Figs 4 and 5)
t

S

t

r

t

f

t

CLPS

t

CLPH

t

CLPP

t

d

t

DH

Transfer function

ILE DC integral linearity error −−±0.75 LSB
DLE DC differential linearity error −−±0.5 LSB
AILE AC integral linearity error note 3 −−±2 LSB
EB effective bits note 3 − 5.7 − bits

LOW level input voltage IO= 1 mA 0 − 0.4 V

HIGH level output voltage IO= 0.5 mA 2.7 − V

output current in 3-state mode 0.4 V < VO<V

CCD

−20 − +20 µA

CCD

V

maximum clock frequency 20 −−MHz

maximum multiplexing frequency 10 −−MHZ

period 50 −−ns

duty cycle CLK = V

IH

45 50 66.6 %
LOW time at 50% 16 −−ns
HIGH time at 50% 22.5 −−ns
rise time at 10 to 90% 4 6 − ns
fall time at 90 to 10% 4 6 − ns

set-up time select A, B and C 35 −−ns
rise time A, B and band C at 10 to 90% 4 6 − ns
fall time A, B and band C at 90 to 10% 4 6 − ns
set-up time clamp asynchronous 0 −−
hold time clamp asynchronous 0 −−
clamp pulse C

= 10 nF − 3 −µs

CLP

data output delay time − 15 24 ns
data hold time 12 −−ns

Timing

IGITAL OUTPUTS

D
T

dt

T

sto

3-state delay time see Fig.6 − 16 25 ns
sampling time offset − 2 − ns

1996 Aug 20 7

Philips Semiconductors Preliminary specification

6-bit analog-to-digital converter with

TDA8706

multiplexer and clamp

Notes to the characteristics

1. Low frequency ramp signal (V
and fi= 4.43 MHz) at the input.

2. Supply voltage ripple rejection (SVRR): variation of the input voltage produces output code 31 for a supply voltage
variation of 1 V.

∆V

SVRR 20 log

=

3. Full-scale sinewave; f

Vi 31()

---------------------- ­∆V

CCA

= 4.43 MHz, f

i

Table 1 Output coding

(1)

VI

STEP

(TYP. VALUE) D5 TO D0

Underflow <2.2 V 000000

0 2.2 V 000000
1 2.215 V 000001

. ......

. ......

. ......

62 3.072 V 111110
63 3.086 V 111111

Overflow >3.1 V 111111

= 1.8 V and fi= 15 kHz) combined with a sinewave input voltage (V

VI(p-p)

= 20 MHz.

CLK

Table 3 Clamp input A

BINARY

OUTPUTS

A CLAMP

01X

1102.2

Note

1. X = don’t care.

Table 4 Clamp input B and C

B/C CLAMP

01X
1 1 32 2.65

DIGITAL

OUTPUTS

(1)

DIGITAL

OUTPUTS

(1)

VI(p-p)

V

in

= 0.5 V

VinA

2.2

B/VinC

2.65

Note

1. With clamping capacitance.

Table 2 Mode selection

CEN D0 TO D5

1 high impedance
0 active; binary

Note

1. X = don’t care.

1996 Aug 20 8

Philips Semiconductors Preliminary specification

6-bit analog-to-digital converter with
multiplexer and clamp

handbook, full pagewidth

t

CLF

t

CLH

Fig.3 AC clock characteristics.

t

90%

CLP

10%

t

CLL

t

CLR

50%

V

V

MCD268

TDA8706

IH

IL

handbook, full pagewidth

CLK

CLAMP

OUTPUT

DATA

A

B

C

t

S

t

DH

t

d

DATA C DATA A DATA B DATA C

t

CLPS

t

CLPP

t

CLPH

MCD269 - 1

Fig.4 AC characteristics select signals; Clamp, Data.

1996 Aug 20 9

Philips Semiconductors Preliminary specification

6-bit analog-to-digital converter with
multiplexer and clamp

andbook, full pagewidth

– (B –Y)
(C input)

– (R –Y)
(B input)

Y

(A input)

digital outputs

= 100000

digital outputs

= 100000

digital outputs

= 000000

TDA8706

CLAMP

input

1

0

MCD270

Fig.5 AC characteristics select signals; Clamp, Data.

Table 5 Clamp characteristic related to TV signals

PARAMETER MIN. TYP. MAX. UNIT

Clamping time per line (signal active) 2.2 3.0 3.3 µs
Input signals clamped to correct level after − 3 10 lines

1996 Aug 20 10

Philips Semiconductors Preliminary specification

6-bit analog-to-digital converter with
multiplexer and clamp

handbook, full pagewidth

CE

input

data

outputs

t
t

dHZ
dLZ

t
t

dZH
dZL

reference
level
(1.3 V)

2.4 V

0.4 V

MGD690

TDA8706

Fig.6 Timing diagram of 3-state delay.

1996 Aug 20 11

Philips Semiconductors Preliminary specification

6-bit analog-to-digital converter with

TDA8706

multiplexer and clamp

APPLICATION INFORMATION

Additional application information will be supplied upon request (please quote reference number FTV/9112).

handbook, full pagewidth

20

19

18

17

16

15

14

13

12

11

MGA230

clock signal

C

INC

INB

INA

22 nF

22 nF

C

C

C

1

2

3

4

5

TDA8706

6

7

C

8

B

9

A

10

(1) ‘C’ capacitors must be determined on the output capacitance of the circuits driving A, B and C or CLK pins.
(2) VRB and VRT are decoupling pins for the internal reference ladder. Do not draw current from these pins in order to achieve good linearity.
(3) Analog and digital supplies should be separated and decoupled.

Fig.7 Application diagram.

1996 Aug 20 12

Philips Semiconductors Preliminary specification

6-bit analog-to-digital converter with
multiplexer and clamp

PACKAGE OUTLINES

DIP20: plastic dual in-line package; 20 leads (300 mil)

D

seating plane

L

Z

20

e

b

TDA8706

SOT146-1

M

E

A

2

A

A

1

w M

b

1

11

c

(e )

1

M

H

pin 1 index

1

0 5 10 mm

scale

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

A

A 

A 

UNIT

inches

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

max.

mm

OUTLINE

VERSION

SOT146-1

1 2

min.

max.

1.73

1.30

0.068

0.051

IEC JEDEC EIAJ

  SC603

b

b

1

0.53

0.38

0.021

0.015

0.36

0.23

0.014

0.009

REFERENCES

cD E e M

(1) (1)

26.92

26.54

1.060

1.045

6.40

6.22

0.25

0.24

E

10

(1)

M

e

L

1

3.60

8.25

3.05

7.80

0.14

0.32

0.12

0.31

EUROPEAN

PROJECTION

H

E

10.0

0.2542.54 7.62

8.3

0.39

0.010.10 0.30

0.33

ISSUE DATE

w

92-11-17
95-05-24

Z

max.

2.04.2 0.51 3.2

0.0780.17 0.020 0.13

1996 Aug 20 13

Philips Semiconductors Preliminary specification

6-bit analog-to-digital converter with
multiplexer and clamp

SO20: plastic small outline package; 20 leads; body width 7.5 mm

D

c

y

Z

20

11

TDA8706

SOT163-1

E

H

E

A

X

v M

A

pin 1 index

1

e

0 5 10 mm

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

mm

A

max.

2.65

0.10

A

1

0.30

0.10

0.012

0.004

A2A

2.45

2.25

0.096

0.089

0.25

0.01

b

0.49

0.36

p

cD

0.32

0.23

0.013

0.009

3

0.019

0.014

UNIT

inches

Note

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

10

w M

b

p

scale

(1)E(1) (1)

13.0

12.6

0.51

0.49

eHELLpQ

7.6

1.27

7.4

0.30

0.050

0.29

10.65

10.00

0.42

0.39

Q

A

2

A

1

1.4

0.055

1.1

0.4

0.043

0.016

detail X

1.1

1.0

0.043

0.039

(A )

L

p

L

0.25

0.01

A

3

θ

0.25 0.1

0.01

ywv θ

Z

0.9

0.4

8

0.004

0.035

0.016

0

o
o

OUTLINE
VERSION

SOT163-1

IEC JEDEC EIAJ

075E04 MS-013AC

REFERENCES

1996 Aug 20 14

EUROPEAN

PROJECTION

ISSUE DATE

92-11-17
95-01-24

Philips Semiconductors Preliminary specification

6-bit analog-to-digital converter with
multiplexer and clamp

SOLDERING
Introduction

There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.

This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our

“IC Package Databook”

DIP

OLDERING BY DIPPING OR BY WA VE

S
The maximum permissible temperature of the solder is

260 °C; solder at this temperature must not be in contact
with the joint for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.

The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (T
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.

EPAIRING SOLDERED JOINTS

R
Apply a low voltage soldering iron (less than 24 V) to the

lead(s) of the package, below the seating plane or not
more than 2 mm above it. If the temperature of the
soldering iron bit is less than 300 °C it may remain in
contact for up to 10 seconds. If the bit temperature is
between 300 and 400 °C, contact may be up to 5 seconds.

SO

REFLOW SOLDERING
Reflow soldering techniques are suitable for all SO

packages.

(order code 9398 652 90011).

). If the

stg max

TDA8706

Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.

Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.

AVE SOLDERING

W
Wave soldering techniques can be used for all SO

packages if the following conditions are observed:

• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.

• The longitudinal axis of the package footprint must be
parallel to the solder flow.

• The package footprint must incorporate solder thieves at
the downstream end.

During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.

A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

EPAIRING SOLDERED JOINTS

R
Fix the component by first soldering two diagonally-

opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.

1996 Aug 20 15

Philips Semiconductors Preliminary specification

6-bit analog-to-digital converter with

TDA8706

multiplexer and clamp

DEFINITIONS

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

1996 Aug 20 16