Datasheet TDA8702T, TDA8702 Datasheet (Philips)

Page 1
INTEGRATED CIRCUITS
DATA SH EET
TDA8702
8-bit video digital-to-analog converter
Product specification Supersedes data of April 1993 File under Integrated Circuits, IC02
1996 Aug 23
Page 2
Philips Semiconductors Product specification
8-bit video digital-to-analog converter TDA8702
FEATURES
8-bit resolution
Conversion rate up to 30 MHz
TTL input levels
Internal reference voltage generator
Two complementary analog voltage outputs
No deglitching circuit required
Internal input register
APPLICATIONS
High-speed digital-to-analog conversion
Digital TV including:
– field progressive scan – line progressive scan
Subscriber TV decoders
Satellite TV decoders
Digital VCRs.
Low power dissipation
Internal 75 output load (connected to the analog
supply)
Very few external components required.
GENERAL DESCRIPTION
The TDA8702 is an 8-bit Digital-to-Analog Converter (DAC) for video and other applications. It converts the digital input signal into an analog voltage output at a maximum conversion rate of 30 MHz. No external reference voltage is required and all digital inputs are TTL compatible.
QUICK REFERENCE DATA
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V V I
CCA
I
CCD
V
CCA CCD
OUT
V
analog supply voltage 4.5 5.0 5.5 V digital supply voltage 4.5 5.0 5.5 V analog supply current note 1 26 32 mA digital supply current note 1 23 30 mA full-scale analog output voltage
OUT
(peak-to-peak value)
note 2
=10kΩ−1.45 1.60 1.75 V
Z
L
=75kΩ−0.72 0.80 0.88 V
Z
L
ILE DC integral linearity error −−±1/2 LSB DLE DC differential linearity error −−±1/2 LSB f
CLK
B 3 dB analog bandwidth f P
tot
maximum conversion rate −−30 MHz
= 30 MHz; note 3 150 MHz
CLK
total power dissipation 250 340 mW
Note
1. D0 to D7 connected to V
2. The analog output voltages (V between V
and each of these outputs is typically 75 .
CCA
and CLK connected to DGND.
CCD
OUT
and V
) are negative with respect to V
OUT
(see Table 1). The output resistance
CCA
3. The 3 dB analog output bandwidth is determined by real time analysis of the output transient at a maximum input code transition (code 0 to 255).
1996 Aug 23 2
Page 3
Philips Semiconductors Product specification
8-bit video digital-to-analog converter TDA8702
ORDERING INFORMATION
TYPE
NUMBER
NAME DESCRIPTION VERSION
PACKAGE
TDA8702 DIP16 plastic dual in-line package; 16 leads (300 mil); long body SOT38-1 TDA8702T SO16 plastic small outline package; 16 leads; body width 7.5 mm SOT162-1
BLOCK DIAGRAM
CLK
1
REFERENCE
6 2
5
CLOCK INPUT
INTERFACE
BAND-GAP
CURRENT
REFERENCE
LOOP
CURRENT
GENERATORS
CURRENT
SWITCHES
16
V
CCA
75
75
15
V V
OUT OUT
14
handbook, full pagewidth
REF
100 nF
DGND AGND
TDA8702/
TDA8702T
D1 D2 D3 D4 D5 D6
12 11 3 4 10 9 8 7
(LSB) D0
(MSB) D7
Fig.1 Block diagram.
1996 Aug 23 3
REGISTERS
DATA
INPUT
INTERFACE
13
MSA659
V
CCD
Page 4
Philips Semiconductors Product specification
8-bit video digital-to-analog converter TDA8702
PINNING
SYMBOL PIN DESCRIPTION
REF 1 voltage reference (decoupling) AGND 2 analog ground D2 3 data input; bit 2 D3 4 data input; bit 3 CLK 5 clock input DGND 6 digital ground D7 7 data input; bit 7 D6 8 data input; bit 6 D5 9 data input; bit 5 D4 10 data input; bit 4 D1 11 data input; bit 1 D0 12 data input; bit 0 V
CCD
13 positive supply voltage for digital
circuits (+5 V) V V V
OUT OUT CCA
14 analog voltage output 15 complementary analog voltage output 16 positive supply voltage for analog
circuits (+5 V)
handbook, halfpage
1
REF
2
AGND
D2
3 4
D3
CLK
DGND
D7
D6
TDA8702/
TDA8702T
5 6 7 8
MSA658
Fig.2 Pin configuration.
V
16
CCA
V
15
OUT
V
14
OUT
V
13
CCD
D0
12
D1
11
D4
10
D5
9
1996 Aug 23 4
Page 5
Philips Semiconductors Product specification
8-bit video digital-to-analog converter TDA8702
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL PARAMETER MIN. MAX. UNIT
V
CCA
V
CCD
V
V
CCA
CCD
AGND DGND ground voltage differential 0.1 +0.1 V V
I
I
OUT/IOUT
T
stg
T
amb
T
j
HANDLING
analog supply voltage 0.3 +7.0 V digital supply voltage 0.3 +7.0 V supply voltage differential 0.5 +0.5 V
input voltage (pins 3 to 5 and 7 to 12) 0.3 V
CCD
V total output current (pins 14 and 15) 5 +26 mA storage temperature 55 +150 °C operating ambient temperature 0 +70 °C junction temperature +125 °C
Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling integrated circuits.
THERMAL RESISTANCE
SYMBOL PARAMETER VALUE UNIT
R
th j-a
from junction to ambient in free air
SOT38-1 70 K/W SOT162-1 90 K/W
1996 Aug 23 5
Page 6
Philips Semiconductors Product specification
8-bit video digital-to-analog converter TDA8702
CHARACTERISTICS
V
CCA=V16
AGND by a 100 nF capacitor; T (typical values measured at V
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Supply
V
CCA
V
CCD
I
CCA
I
CCD
AGND DGND ground voltage differential 0.1 +0.1 V
Inputs
IGITAL INPUTS (D7 TO D0) AND CLOCK INPUT (CLK)
D V
IL
V
IH
I
IL
I
IH
f
CLK
Outputs (note 2; referenced to V V
OUT
V
OS
V
OUT
V
OS
B 3 dB analog bandwidth note 3; f G
diff
Φ
diff
Z
O
Transfer function (f
ILE DC integral linearity error −−±1/2 LSB DLE DC differential linearity error −−±1/2 LSB
V2= 4.5 V to 5.5 V; V
amb
CCA=VCCD
CCD=V13
=0°C to +70 °C; AGND and DGND shorted together; unless otherwise specified
V6= 4.5 V to 5.5 V; V
= 5 V and T
analog supply voltage 4.5 5.0 5.5 V digital supply voltage 4.5 5.0 5.5 V analog supply current note 1 26 32 mA digital supply current note 1 23 30 mA
LOW level input voltage 0 0.8 V HIGH level input voltage 2.0 V LOW level input current VI= 0.4 V −−0.3 0.4 mA HIGH level input current VI= 2.7 V 0.01 20 µA maximum clock frequency −−30 MHz
)
CCA
V
OUT
full-scale analog output voltages (peak-to-peak value)
analog offset output voltage code = 0 −−325 mV
/TC full-scale analog output voltage
temperature coefficient
/TC analog offset output voltage
temperature coefficient
differential gain 0.6 % differential phase 1 deg output impedance 75 −Ω
= 30 MHz)
CLK
amb
=25°C).
CCA
V
= 0.5 V to +0.5 V; V
CCD
REF
ZL=10kΩ−1.45 1.60 1.75 V
=75Ω−0.72 0.80 0.88 V
Z
L
−−200 µV/K
−−20 µV/K
= 30 MHz 150 MHz
CLK
decoupled to
V
CCD
1996 Aug 23 6
Page 7
Philips Semiconductors Product specification
8-bit video digital-to-analog converter TDA8702
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Switching characteristics (f
t
SU;DAT
t
HD;DAT
t
PD
t
S1
data set-up time 0.3 −−ns data hold time 2.0 −−ns propagation delay time −−1.0 ns settling time 10% to 90% full-scale
= 30 MHz); notes 4 and 5; see Figs 3, 4 and 5
CLK
1.1 1.5 ns
change to ±1 LSB
t
S2
settling time 10% to 90% full-scale
6.5 8.0 ns
change to ±1 LSB
t
d
Output transients (glitches; (f
E
g
input to 50% output delay time 3.0 5.0 ns
= 30 MHz); note 6; see Fig.6
CLK
glitch energy from code transition 127 to 128 −−30 LSB.ns
Note
1. D0 to D7 are connected to V
2. The analog output voltages (V between V
and each of these outputs is 75 (typ.).
CCA
, CLK is connected to DGND.
CCD
OUT
and V
are negative with respect to V
OUT
(see Table 1). The output resistance
CCA
3. The 3 dB analog output bandwidth is determined by real time analysis of the output transient at a maximum input code transition (code 0 to 255).
4. The worst case characteristics are obtained at the transition from input code 0 to 255 and if an external load impedance greater than 75 is connected between V measured with an active probe between V
and AGND. No further load impedance between V
OUT
OUT
or V
OUT
and V
. The specified values have been
CCA
and AGND has
OUT
been applied. All input data is latched at the rising edge of the clock. The output voltage remains stable (independent of input data variations) during the HIGH level of the clock (CLK = HIGH). During a LOW-to-HIGH transition of the clock (CLK = LOW), the DAC operates in the transparent mode (input data will be directly transferred to their corresponding analog output voltages (see Fig.5).
5. The data set-up (t
) is the minimum period preceding the rising edge of the clock that the input data must be
SU;DAT
stable in order to be correctly registered. A negative set-up time indicates that the data may be initiated after the rising edge of the clock and still be recognized. The data hold time (t
) is the minimum period following the rising edge
HD;DAT
of the clock that the input data must be stable in order to be correctly registered. A negative hold time indicates that the data may be released prior to the rising edge of the clock and still be recognized.
6. The definition of glitch energy and the measurement set-up are shown in Fig.6. The glitch energy is measured at the input transition between code 127 to 128 and on the falling edge of the clock.
1996 Aug 23 7
Page 8
Philips Semiconductors Product specification
8-bit video digital-to-analog converter TDA8702
Table 1 Input coding and output voltages (typical values; referenced to V
, regardless of the offset voltage)
CCA
DAC OUTPUT VOLTAGES
CODE
INPUT DATA
(D7 TO D0)
V
OUT
Z
=10K ZL=75
L
V
OUT
V
OUT
0 000 00 00 0 1.6 0 0.8 1 000 000 01 0.006 1.594 0.003 0.797
. ........
128 100 000 00 0.8 0.8 0.4 0.4
. ........
254 111 111 10 1.594 0.006 0.797 0.003 255 111 111 11 1.6 0 0.8 0
handbook, full pagewidth
input data
t
SU; DAT
stable
t
HD; DAT
3.0 V
1.3 V 0 V
V
OUT
3.0 V
CLK
MBC912
The shaded areas indicate when the input data may change and be correctly registered. Data input update must be completed within 0.3 ns after the first rising edge of the clock (t
is negative; 0.3ns). Data must be held at least 2 ns after the rising edge (t
SU;DAT
HD;DAT
= +2ns).
1.3 V 0 V
Fig.3 Data set-up and hold times.
1996 Aug 23 8
Page 9
Philips Semiconductors Product specification
8-bit video digital-to-analog converter TDA8702
handbook, full pagewidth
input data (example of a full-scale input transition)
CLK
code 0
1.3 V
1 LSB
V
CCA
(code 0)
t
d
V
OUT
t
S1
t
PD
t
S2
Fig.4 Switching characteristics.
1.3 V
code 255
1 LSB
MBC913
10 %
50 %
90 %
V
1.6 V
CCA
(code 255)
handbook, full pagewidth
During the transparent mode (CLK =LOW), any change of input data will be seen at the output. During the latched mode (CLK = HIGH), the analog output remains stable regardless of any change at the input. A change of input data during the latched mode will be seen on the falling edge of the clock (beginning of the transparent mode).
CLK
input codes
analog output voltage
MBC914 - 1
V
OUT
transparent
mode
transparent
mode
latched
mode
latched mode
(stable output)
1.3 V
beginning of
transparent
mode
Fig.5 Latched and transparent mode.
1996 Aug 23 9
Page 10
Philips Semiconductors Product specification
8-bit video digital-to-analog converter TDA8702
handbook, full pagewidth
HP8082A
HP8082A
PULSE
GENERATOR
(SLAVE)
PULSE
GENERATOR
(SLAVE)
DIVIDER
( 10)
V
OUT
f
CLK/10
(2)
f
CLK/10
(1)
f
CLK
(3)
code 128
D7 MSB D6 D5
D4
TDA8702/
D3
TDA8702T
D2 D1 D0 (LSB)
PULSE
GENERATOR
(MASTER)
MODEL EH107
code 127
f
time
V V
CLK
OUT OUT
1 LSB
TEK P6201 TEK7104 and TEK7A26
clock
3
1
2
DYNAMIC
PROBE
R = 100 k C = 3 pF
timing diagram
OSCILLO-
SCOPE
bandwidth = 20 MHz
MSA660
The value of the glitch energy is the sum of the shaded area measured in LSB.ns.
Fig.6 Glitch energy measurement.
1996 Aug 23 10
Page 11
Philips Semiconductors Product specification
8-bit video digital-to-analog converter TDA8702
INTERNAL PIN CONFIGURATIONS
handbook, full pagewidth
V
CCA
REF
AGND
V
REF
regulation loop
MBC911 - 1
Fig.7 Reference voltage generator decoupling.
output current generators
handbook, halfpage
DGND
AGND
substrate
MBC908
Fig.8 AGND and DGND.
1996 Aug 23 11
handbook, halfpage
V
CCA
D0 to D7, CLK
AGND
Fig.9 D7 to D0 and CLK.
MBC910
Page 12
Philips Semiconductors Product specification
8-bit video digital-to-analog converter TDA8702
handbook, halfpage
V
CCA
75 75
V
handbook, halfpage
V
CCD
V
OUT
OUT
handbook, halfpage
DGND
MBC907
Fig.10 Digital supply.
V
CCA
AGND
MBC909 - 1
bit
n
switches and
current generators
Fig.11 Analog outputs.
bit n
AGND
MBC906
Fig.12 Analog supply.
1996 Aug 23 12
Page 13
Philips Semiconductors Product specification
8-bit video digital-to-analog converter TDA8702
APPLICATION INFORMATION
Additional application information will be supplied upon request (please quote number FTV/8901).
handbook, halfpage
(1) This is a recommended value for decoupling pin 1.
100 nF
AGND
Fig.13 Analog output voltage without external load (VO= V
(1)
REF
TDA8702/
TDA8702T
V
V
V
CCA
OUT
OUT
MSA661
V
O
; see Table 1, ZL=10kΩ).
OUT
handbook, full pagewidth
AGND
(1) This is a recommended value for decoupling pin 1.
100 nF
(1)
REF
TDA8702/
TDA8702T
V
V
CCA
OUT
Fig.14 Analog output voltage with external load (external load ZL=75to ).
1996 Aug 23 13
MSA662
()
VOZL/
Z
L
75Z
L
Page 14
Philips Semiconductors Product specification
8-bit video digital-to-analog converter TDA8702
handbook, halfpage
(1) This is a recommended value for decoupling pin 1.
100 nF
AGND
MSA663
Fig.15 Analog output with AGND as reference.
(1)
REF
TDA8702/
TDA8702
V
OUT
100 µF
75
V
CCA
AGND
V
O
2
handbook, full pagewidth
TDA8702
V
OUT
(pin 15)
or
V
OUT
(pin 14)
100 µF
390
Fig.16 Example of anti-aliasing filter (analog output referenced to AGND).
1996 Aug 23 14
10 µH 12 µH
27 pF 12 pF
39 pF 100 pF 56 pF
390
V
MSA665
o
[390/(780+75)]
Page 15
Philips Semiconductors Product specification
8-bit video digital-to-analog converter TDA8702
Characteristics
Order 5; adapted CHEBYSHEV. Ripple at 0.1 dB. f
= 6.7 MHz.
(3 dB)
f
= 9.7 MHz and 13.3 MHz.
(NOTCH)
30
MSA657
f (MHz)
i
handbook, halfpage
0
α
(dB)
20
40
60
80
100
01020 40
Fig.17 Frequency response for filter shown in Fig.16.
handbook, full pagewidth
AGND
(1) This is a recommended value for decoupling pin 1.
100 nF
(1)
REF
TDA8702/
TDA8702T
V
V
100 µF
OUT
OUT
100 µF
Fig.18 Differential mode (improved supply voltage ripple rejection).
1996 Aug 23 15
R1
R1
R2
R2
AGND
2 X V (R2/R1)
O
MSA664
Page 16
Philips Semiconductors Product specification
8-bit video digital-to-analog converter TDA8702
PACKAGE OUTLINES
DIP16: plastic dual in-line package; 16 leads (300 mil); long body
D
seating plane
L
Z
16
pin 1 index
e
b
b
1
9
A
1
w M
SOT38-1
M
E
A
2
A
c
(e )
1
M
H
E
1
0 5 10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
UNIT
mm
inches
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
A
max.
4.7 0.51 3.7
OUTLINE VERSION
SOT38-1
min.
A
1 2
max.
0.15
IEC JEDEC EIAJ
050G09 MO-001AE
b
1.40
1.14
0.055
0.045
b
0.53
0.38
0.021
0.015
1
cEe M
0.32
0.23
0.013
0.009
REFERENCES
(1) (1)
D
21.8
21.4
0.86
0.84
1996 Aug 23 16
8
6.48
6.20
0.26
0.24
e
0.30
1
0.15
0.13
M
L
3.9
3.4
E
8.25
7.80
0.32
0.31
EUROPEAN
PROJECTION
H
9.5
0.2542.54 7.62
8.3
0.37
0.010.100.0200.19
0.33
ISSUE DATE
w
92-10-02 95-01-19
Z
max.
2.2
0.087
(1)
Page 17
Philips Semiconductors Product specification
8-bit video digital-to-analog converter TDA8702
SO16: plastic small outline package; 16 leads; body width 7.5 mm
D
c
y
Z
16
pin 1 index
1
e
9
A
2
A
8
w M
b
p
SOT162-1
E
H
E
Q
1
L
p
L
detail X
(A )
A
X
v M
A
A
3
θ
0 5 10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
mm
OUTLINE VERSION
SOT162-1
A
max.
2.65
0.10
A
1
0.30
0.10
0.012
0.004
A2A
2.45
2.25
0.096
0.089
IEC JEDEC EIAJ
075E03 MS-013AA
0.25
0.01
b
3
p
0.49
0.32
0.36
0.23
0.019
0.013
0.014
0.009
UNIT
inches
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
(1)E(1) (1)
cD
10.5
7.6
7.4
0.30
0.29
1.27
0.050
10.1
0.41
0.40
REFERENCES
1996 Aug 23 17
eHELLpQ
10.65
10.00
0.42
0.39
1.4
0.055
1.1
0.4
0.043
0.016
1.1
1.0
0.043
0.039
PROJECTION
0.25
0.25 0.1
0.01
0.01
EUROPEAN
ywv θ
Z
0.9
0.4
0.035
0.004
0.016
ISSUE DATE
92-11-17
95-01-24
o
8
o
0
Page 18
Philips Semiconductors Product specification
8-bit video digital-to-analog converter TDA8702
SOLDERING Introduction
There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used.
This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our
“IC Package Databook”
(order code 9398 652 90011).
DIP
OLDERING BY DIPPING OR BY WA VE
S The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds.
The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (T
stg max
). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit.
EPAIRING SOLDERED JOINTS
R Apply a low voltage soldering iron (less than 24 V) to the
lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 °C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 °C, contact may be up to 5 seconds.
SO
REFLOW SOLDERING Reflow soldering techniques are suitable for all SO
packages.
Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 °C.
Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 °C.
AVE SOLDERING
W Wave soldering techniques can be used for all SO
packages if the following conditions are observed:
A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used.
The longitudinal axis of the package footprint must be parallel to the solder flow.
The package footprint must incorporate solder thieves at the downstream end.
During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured.
Maximum permissible solder temperature is 260 °C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 °C within 6 seconds. Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications.
EPAIRING SOLDERED JOINTS
R Fix the component by first soldering two diagonally-
opposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C.
Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement.
1996 Aug 23 18
Page 19
Philips Semiconductors Product specification
8-bit video digital-to-analog converter TDA8702
DEFINITIONS
Data sheet status
Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
1996 Aug 23 19
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