Datasheet TDA8576T Datasheet (Philips)

Page 1
INTEGRATED CIRCUITS
DATA SH EET
TDA8576T
Class-H high-output voltage level line driver
Product specification Supersedes data of 1997 Feb 26 File under Integrated Circuits, IC01
1998 Oct 16
Page 2
Philips Semiconductors Product specification
Class-H high-output voltage level line
TDA8576T
driver

FEATURES

Output voltage swing larger than supply voltage
High supply voltage ripple rejection
Low distortion
Low noise
ESD protected on all pins.

GENERAL DESCRIPTION

The TDA8576T is a two channel class-H high-output voltage line driver for use in car audio applications. The line driver operates as a non-inverting amplifier with a gain of 6 dB and a single-ended output. Due to the class-H voltage lifting principle the voltage swing over the load is more than the supply voltage.

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
CC
I
CC
G
v
V
o(rms)
supply voltage 6 9 12 V supply current VCC=9V 14 20 mA voltage gain 567dB
maximum output voltage (RMS value) THD = 0.1% 5.0 5.3 V SVRR supply voltage ripple rejection 40 65 dB THD total harmonic distortion V V
no
Z
output impedance −−10
o
noise output voltage 5 −µV
With a supply voltage of 9 V the output voltage swing over the load will be more than 14 V (peak-to-peak). The TDA8576T is available in a SO16 package.
Line drivers are necessary in car audio systems in which the power amplifiers are driven by long cables. The signal-to-noise ratio of these car audio systems is improved by using the TDA8576T class-H high-output level line driver. The high-output level of TDA8576T enables a reduction of the gain of the power amplifier resulting in an improvement of the power amplifier performance.
=3V; f=1kHz 0.005 %
o(rms)

ORDERING INFORMATION

TYPE
NUMBER
NAME DESCRIPTION VERSION
PACKAGE
TDA8576T SO16 plastic small outline package; 16 leads; body width 7.5 mm SOT162-1
1998 Oct 16 2
Page 3
Philips Semiconductors Product specification
Class-H high-output voltage level line driver

BLOCK DIAGRAM

handbook, full pagewidth
V
SVRL
CCL
1
3
REFERENCE
BUFFER
BUFFER
36 k
20 k
V
− +
+
V
36 k
CCL
CCL
LIFT
AMP.
SIGNAL
AMP.
TDA8576T
16
CL+
15
CL
13
OUTL
INL
INML
INMR
INR
SVRR
V
CCR
2 4
5 7
REFERENCE
6
8
BUFFER
BUFFER
TDA8576T
20 k
36 k
V
− +
+
V
36 k
CCR
CCR
5
SIGNAL
AMP.
LIFT
AMP.
14
11
12
10
MGE671
LGND
RGND
OUTR
CR
9
CR+
Fig.1 Block diagram.
1998 Oct 16 3
Page 4
Philips Semiconductors Product specification
Class-H high-output voltage level line driver

PINNING

SYMBOL PIN DESCRIPTION
V
CCL
INL 2 input voltage left channel SVRL 3 SVRR left channel INML 4 inverting input left channel INMR 5 inverting input right channel SVRR 6 SVRR right channel INR 7 input voltage right channel V
CCR
CR+ 9 lift capacitor (+) right channel CR 10 lift capacitor () right channel RGND 11 ground right channel OUTR 12 output voltage right channel OUTL 13 output voltage left channel LGND 14 ground left channel CL 15 lift capacitor () left channel CL+ 16 lift capacitor (+) left channel
1 supply voltage left channel
8 supply voltage right channel
handbook, halfpage
V
1
CCL
INL
2 3
SVRL
4
INML
INMR
SVRR
INR
V
CCR
TDA8576T
5 6 7 8
MGE670
Fig.2 Pin configuration.
TDA8576T
16
CL+
15
CL
14
LGND
13
OUTL
12
OUTR
11
RGND
10
CR
9
CR+
FUNCTIONAL DESCRIPTION Lift amplifier
The lift amplifier, referred to as LIFT AMP. in Fig.1, is used as a non-inverting amplifier with a voltage gain of 6 dB set by an internal feedback network. If the output voltage of the signal amplifier is low, the external lift capacitor is recharged by the lift amplifier. As soon as the output voltage of the signal amplifier increases above 0.87 × V
CC
the lift amplifier switches the voltage of the lift capacitor in series with the supply voltage V
The voltage at the
CC.
positive side of the lift capacitor is referred to as lifted supply voltage.
Signal amplifier
The signal amplifier, referred to as SIGNAL AMP. in Fig.1, is used as a non-inverting amplifier. The voltage gain G
is
v
set by the feedback resistors according to the formula:
R
G
v
2
1
+=
------ ­R
1
and should be set to 6 dB. The LIFT AMP. and SIGNAL AMP. must have equal voltage gain Gv.
The rail-to-rail output stage of the signal amplifier uses the lifted supply voltage to increase the output voltage swing. The DC output level is set to 0.87 × V
. The maximum
CC
peak-to-peak output voltage of the signal amplifier is calculated with the formula:
V
op p()max()
2 0.87V
CC
0.4()×

Buffers

The buffers prevent loading of the internal voltage divider network made by a series connection of resistors. For a good supply voltage ripple rejection this internal voltage divider network has to be decoupled by an external capacitor.

Reference

This circuit supplies all currents needed in the device.
1998 Oct 16 4
Page 5
Philips Semiconductors Product specification
Class-H high-output voltage level line
TDA8576T
driver

LIMITING VALUES

In accordance with the Maximum Rating System (IEC 134).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
CC
I
ORM
T
amb
T
stg
T
j

THERMAL CHARACTERISTICS

SYMBOL PARAMETER VALUE UNIT
R
th j-a
supply voltage operating 12 V
repetitive peak output current 20 mA
ambient temperature 40 +85 °C
storage temperature 55 +150 °C
junction temperature +150 °C
thermal resistance from junction to ambient in free air 110 K/W
1998 Oct 16 5
Page 6
Philips Semiconductors Product specification
Class-H high-output voltage level line
TDA8576T
driver

DC CHARACTERISTICS

VCC=9V; RL=10kΩ; T
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
CC
I
CC
V
O
supply voltage Vi=0V 6912V
supply current 14 20 mA
DC output voltage note 1 7.8 V
Note
1. The DC output voltage with respect to ground is 0.87 ×VCC.

AC CHARACTERISTICS

V
=9V; RL=10kΩ; f = 1 kHz; T
CC
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
G
v
∆G
channel unbalance −−0.5 dB
v
α
cs
f
Ir
f
hr
Z
input impedance 14 20 28 k
i
Z
output impedance −−10
o
V
o(max)(rms)
voltage gain 567dB
channel separation Rs= 600 ; V
low frequency roll-off 1 dB; note 2 −−5Hz
high frequency roll-off 1dB 20 −−kHz
maximum output voltage
(RMS value) V
no
noise input voltage unweighted; note 3 79µV
THD + N total harmonic distortion plus
noise SVRR supply voltage ripple
rejection
=25°C; in accordance with application diagram (see Fig.3).
amb
=25°C; in accordance with application diagram (see Fig.3); note 1.
amb
= 1 V; note 1 80 90 dB
o(rms)
THD+N=0.1% 5.0 5.3 V
A-weighted; note 4 5 −µV f = 1 kHz; V
=3V
O
; note 5 0.005 0.01 %
rms
f = 17 Hz to 20 kHz; note 6 0.01 % note 7 40 65 dB f = 20 Hz to 20 kHz; note 8 55 dB
Notes
1. The channel separation is determined by the parasitic capacitance between the inverting input left channel (pin 4) and the inverting input right channel (pin 5). The PCB layout has a major contribution to the parasitic capacitance. To obtain best results the PCB tracks to pin 4 and pin 5 should be separated as much as possible.
2. The frequency response is externally fixed by the input coupling capacitors.
3. Noise output voltage is measured in a bandwidth of 20 Hz to 20 kHz with a source resistor R
= 600 .
s
4. Noise output voltage is measured in a bandwidth of 20 Hz to 20 kHz with an A-weighted filter with a source resistor Rs= 600 .
5. Distortion is measured at a frequency of 1 kHz using an A-weighted filter.
6. Distortion is measured at an output voltage of 3.0 V (RMS) at frequencies between 17 Hz and 20 kHz.
7. Ripple rejection is measured at the output, using a source resistor Rs= 600 and a ripple amplitude of 100 mV (RMS) at a frequency of 1 kHz.
8. Ripple rejection is measured at the output, using a source resistor Rs= 600 and a ripple amplitude of 100 mV (RMS) at frequencies between 20 Hz and 20 kHz.
1998 Oct 16 6
Page 7
Philips Semiconductors Product specification
Class-H high-output voltage level line driver

APPLICATION INFORMATION

C6
100
nF
C1
22 µF
C1
22 µF
s
i(R)
C2
47 µF
36 k 36 k
(1)
R1
36 k 36 k
(1)
R1
R2
V
CCL
SVRL
INL
INML
INMR
INR
SVRR
V
CCR
R2
(1)
(1)
1
3
REFERENCE
2 4
5 7
REFERENCE
6
8
BUFFER
BUFFER
BUFFER
BUFFER
handbook, full pagewidth
R
V
s
i(L)
V
CC
R
V
36 k
20 k
TDA8576T
20 k
36 k
36 k
V
− +
+
V
V
− +
+
V
36 k
CCL
CCL
CCR
CCR
LIFT
AMP.
SIGNAL
AMP.
5
SIGNAL
AMP.
LIFT
AMP.
TDA8576T
V
CC
C5
1.5 nF
CL+
16
15
CL
13
OUTL
14
LGND
RGND
11
12
OUTR
10
CR
9
CR+
C4 100 µF
C3
22 µF
C3
22 µF
C5
1.5 nF
V
CC
C4
100
µF
MGE672
RL
10 k
RL 10 k
C5
1.5 nF
C5
1.5 nF
(1) R1and R2 should have a tolerance of 1%.
Fig.3 Application diagram.
1998 Oct 16 7
Page 8
Philips Semiconductors Product specification
Class-H high-output voltage level line driver

Printed Circuit Board (PCB) layout

handbook, full pagewidth
TDA8576T
64
46.08
22 µF 22 µF
OUTR
10 k
SGND
INR
Dimensions in mm. IC mounted on track side, additional components mounted on component side. Tracks viewed from component side.
22 µF
47 µF
36 k
RL
36 k
V
SO16
CC
GND
Fig.4 Recommended PCB-layout.
10 k
22 µF
36 k
36 k
OUTL
SGND
INL
MBH884
1998 Oct 16 8
Page 9
Philips Semiconductors Product specification
Class-H high-output voltage level line driver

Application characteristics

VCC= 9 V; RI=10kΩ; T
THD + N
(%)
10
10
10
1
2
3
1
handbook, halfpage
=25°C; 80 kHz filter.
amb
MGD912
f = 10 kHz
1 kHz
100 Hz
24
Vo (V)
60
THD + N
(%)
10
10
10
1
1
2
3
0
handbook, halfpage
TDA8576T
MGD913
Vo = 5 V
4 V 3 V 2 V
2
10
3
10
4
10
f (Hz)
5
10
Fig.5 Total harmonic distortion plus noise as a
function of Vo.
MGD914
5
10
f (Hz)
G
(dB)
8
6
4
2
0
10
handbook, halfpage
2
10
3
10
4
10
Fig.7 Total circuit gain as a function of frequency.
Fig.6 Total harmonic distortion plus noise as a
function of frequency.
40
handbook, halfpage
SVRR
(dB)
50
Rs = 600
60
70
6
10
80
0
10
2
10
3
10
MGD915
4
10
f (Hz)
5
10
Fig.8 Supply voltage ripple rejection as a function
of frequency.
1998 Oct 16 9
Page 10
Philips Semiconductors Product specification
Class-H high-output voltage level line driver
60
handbook, halfpage
α
cs
(dB)
80
100
120
0
f = 10 kHz
1 kHz
100 Hz
15
234
MGD916
Vo (V)
60
handbook, halfpage
α
cs
(dB)
80
100
120
10
TDA8576T
MGD917
1 V
3 V
5 V
2
10
3
10
4
10
f (Hz)
5
10
Fig.9 Channel separation as a function of Vo.
Fig.10 Channel separation as a function of
frequency.
1998 Oct 16 10
Page 11
Philips Semiconductors Product specification
Class-H high-output voltage level line driver

PACKAGE OUTLINE

SO16: plastic small outline package; 16 leads; body width 7.5 mm
D
c
y
Z
16
9
TDA8576T

SOT162-1

E
H
E
A
X
v M
A
pin 1 index
1
e
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
mm
A
max.
2.65
0.10
A
0.30
0.10
0.012
0.004
1
A2A
2.45
2.25
0.096
0.089
0.25
0.01
b
3
p
0.49
0.32
0.36
0.23
0.019
0.013
0.014
0.009
UNIT
inches
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
8
w M
b
p
0 5 10 mm
scale
(1)E(1) (1)
cD
10.5
10.1
0.41
0.40
eHELLpQ
7.6
1.27
7.4
0.30
0.050
0.29
A
2
10.65
10.00
0.419
0.394
A
1
1.4
0.055
1.1
0.4
0.043
0.016
detail X
0.043
0.039
1.1
1.0
Q
3
0.25 0.1
0.01
A
θ
ywv θ
0.004
Z
0.9
0.4
0.035
0.016
o
8
o
0
(A )
L
p
L
0.25
0.01
OUTLINE
VERSION
SOT162-1
IEC JEDEC EIAJ
075E03 MS-013AA
REFERENCES
1998 Oct 16 11
EUROPEAN
PROJECTION
ISSUE DATE
95-01-24 97-05-22
Page 12
Philips Semiconductors Product specification
Class-H high-output voltage level line driver
SOLDERING Introduction
There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used.
This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our
“Data Handbook IC26; Integrated Circuit Packages”
(order code 9398 652 90011).
Reflow soldering
Reflow soldering techniques are suitable for all SO packages.
Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement.
Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 °C.
Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 °C.
TDA8576T
Wave soldering
Wave soldering techniques can be used for all SO packages if the following conditions are observed:
A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used.
The longitudinal axis of the package footprint must be parallel to the solder flow.
The package footprint must incorporate solder thieves at the downstream end.
During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured.
Maximum permissible solder temperature is 260 °C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 °C within 6 seconds. Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications.
Repairing soldered joints
Fix the component by first soldering two diagonally­opposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C.
1998 Oct 16 12
Page 13
Philips Semiconductors Product specification
Class-H high-output voltage level line
TDA8576T
driver

DEFINITIONS

Data sheet status
Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
1998 Oct 16 13
Page 14
Philips Semiconductors Product specification
Class-H high-output voltage level line driver
NOTES
TDA8576T
1998 Oct 16 14
Page 15
Philips Semiconductors Product specification
Class-H high-output voltage level line driver
NOTES
TDA8576T
1998 Oct 16 15
Page 16
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© Philips Electronics N.V. 1998 SCA60 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
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Internet: http://www.semiconductors.philips.com
Printed in The Netherlands 545102/25/03/pp16 Date of release: 1998 Oct 16 Document order number: 9397 750 04394
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