Datasheet TDA8350Q-N6, TDA8350Q-N4 Datasheet (Philips)

DATA SH EET

Preliminary specification
Supersedes data of September 1991
File under Integrated Circuits, IC02

January 1995

INTEGRATED CIRCUITS

Philips Semiconductors

TDA8350Q

DC-coupled vertical deflection and
East-West output circuit

January 1995 2

Philips Semiconductors Preliminary specification

DC-coupled vertical deflection and
East-West output circuit

TDA8350Q

FEATURES

• Few external components

• Highly efficient fully DC-coupled vertical output bridge

circuit

• Vertical flyback switch

• Guard circuit

• Protection against:

– short-circuit of the output pins
– short-circuit of the output pins to V

P

• High EMC immunity due to common mode inputs

• Temperature (thermal) protection

• East-West output stage with one single conversion

resistor.

GENERAL DESCRIPTION

The TDA8350Q is a power circuit for use in 90° and 110°
colour deflection systems for field frequencies of 50
to 120 Hz. The circuit provides a DC driven vertical
deflection output circuit, operating as a highly efficient
class G system and an East-West driver for sinking the
diode modulator current.

QUICK REFERENCE DATA

Note

1. A flyback supply voltage of>50 V up to 60 V is allowed in application. A 220 nF capacitor in series with a 22 Ω resistor
(dependent on I

O

and the inductance of the coil) has to be connected between pin 7 and ground. The decoupling
capacitor of VFB has to be connected between pin 8 and pin 4. This supply voltage line must have a resistance of
33 Ω (see application circuit Fig.5).

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

DC supply

V

P

supply voltage 9 − 25 V

I

P

quiescent current − 30 − mA

Vertical circuit

I

O(p-p)

output current (peak-to-peak value) −−3A

I

diff(p-p)

differential input current
(peak-to-peak value)

− 600 −µA

V

diff(p-p)

differential input voltage
(peak-to-peak value)

− 1.5 1.8 V

Flyback switch

I

M

peak output current −−±1.5 A

V

FB

flyback supply voltage −−50 V

note 1 −−60 V

East-West amplifier

I

O(sink)

output current (sink only) −−500 mA

V

O(sink)

peak output voltage I

O(sink)

=10µA −−40 V

I

bias

input bias current −−1µA

Thermal data (in accordance with IEC 747-1)

T

stg

storage temperature −65 − 150 °C

T

amb

operating ambient temperature −25 − +75 °C

T

vj

virtual junction temperature −−150 °C

January 1995 3

Philips Semiconductors Preliminary specification

DC-coupled vertical deflection and
East-West output circuit

TDA8350Q

ORDERING INFORMATION

BLOCK DIAGRAM

TYPE NUMBER

PACKAGE

NAME DESCRIPTION VERSION

TDA8350Q DBS13P plastic DIL-bent-SIL power package; 13 leads (lead length 12 mm) SOT141-6

Fig.1 Block diagram.

handbook, full pagewidth

MBC229-1

7

13

V

3

9

5

GND

12

I

I(corr)

V

O(sink)

4

V

P

V

FB

8

1

2

I

drive(pos)

I

drive(neg)

TDA8350

I

I(set)

I

I(set)

I

S

I

S

V

P

I

T

I

T

V

P

11

V

O(A)

V

O(B)

V

O(B)

V

O(A)

V

I(fb)

V

P

V

O(guard)

10

CURRENT

SOURCE

January 1995 4

Philips Semiconductors Preliminary specification

DC-coupled vertical deflection and
East-West output circuit

TDA8350Q

PINNING

SYMBOL PIN DESCRIPTION

I

drive(pos)

1 input power-stage (positive);

includes I

I(sb)

signal bias

I

drive(neg)

2 input power-stage (negative);

includes I

I(sb)

signal bias

V

I(fb)

3 feedback voltage input

V

P

4 supply voltage

V

O(B)

5 output voltage B
n.c. 6 not connected
GND 7 ground
V

FB

8 flyback supply voltage
V

O(A)

9 output voltage A
V

O(guard)

10 guard output voltage

V

O(sink)

11 East-West amplifier driver (sink)

output voltage

I

I(corr)

12 East-West amplifier input

correction current (negative)

I

I(set)

13 East-West amplifier set input

current (positive)

Fig.2 Pin configuration.

book, halfpage

TDA8350

I

drive(pos)

V

I(fb)

V

P

V

O(B)

n.c.

GND

V

FB

V

O(A)

V

O(guard)
V

O(sink)

I

I(corr)
I

I(set)

I

drive(neg)

MBC226-1

1
2
3
4
5
6
7
8

9
10
11
12
13

FUNCTIONAL DESCRIPTION

The vertical driver circuit is a bridge configuration. The
deflection coil is connected between the output amplifiers,
which are driven in phase opposition. An external resistor
(RM) connected in series with the deflection coil provides
internal feed back information. The differential input circuit
is voltage driven. The input circuit has been adapted to
enable it to be used with the TDA9150, TDA9151B,
TDA9160A, TDA9162, TDA8366 and TDA8367 which
deliver symmetrical current signals. An external resistor
(R

CON

) connected between the differential input
determines the output current through the deflection coil.
The relationship between the differential input current and
the output current is defined by: I

diff

× R

CON=I(coil)

× RM.
The output current is adjustable from 0.5 A (p-p) to 3 A
(p-p) by varying RM. The maximum input differential
voltage is 1.8 V. In the application it is recommended that
V

diff

= 1.5 V (typ). This is recommended because of the
spread of input current and the spread in the value of
R

CON

.

The flyback voltage is determined by an additional supply
voltage VFB. The principle of operating with two supply
voltages (class G) makes it possible to fix the supply
voltage VP optimum for the scan voltage and the second
supply voltage VFB optimum for the flyback voltage. Using
this method, very high efficiency is achieved.

The supply voltage VFB is almost totally available as
flyback voltage across the coil, this being possible due to
the absence of a decoupling capacitor (not necessary, due
to the bridge configuration). The output circuit is fully
protected against the following:

• thermal protection

• short-circuit protection of the output pins (pins 5 and 9)

• short-circuit of the output pins to V

P.

A guard circuit V

O(guard)

is provided. The guard circuit is

activated at the following conditions:

• during flyback

• during various short-circuit possibilities at the output

pins

• during open loop

• when the thermal protection is activated.

This signal can be used for blanking the picture tube
screen.

An East-West amplifier is also provided. This amplifier is
an inverting amplifier which is current driven with sink
current only capabilities.

January 1995 5

Philips Semiconductors Preliminary specification

DC-coupled vertical deflection and
East-West output circuit

TDA8350Q

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

Notes

1. A flyback supply voltage of>50 V up to 60 V is allowed in application. A 220 nF capacitor in series with a 22 Ω resistor
(dependent on I

O

and the inductance of the coil) has to be connected between pin 7 and ground. The decoupling
capacitor of VFB has to be connected between pin 8 and pin 4. This supply voltage line must have a resistance of
33 Ω (see application circuit Fig.5).

2. IO maximum determined by current protection.

3. The operating area is limited by a straight line between the points V

O(sink)

= 40 V; I

O(sink)

=10µA and V

O(sink)

=2V;

I

O(sink)

= 500 mA.

4. Up to Vp=18V.

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

DC supply

V

P

supply voltage non-operating − 40 V

− 25 V

V

FB

flyback supply voltage − 50 V

note 1 60 V

Vertical circuit

I

O

output current (peak-to-peak value) note 2 − 3A

V

O(A)

output voltage (pin 9) − 52 V

note 1 62 V

Flyback switch

I

M

peak output current −±1.5 A

East-West amplifier

V

O(sink)

output voltage I

O(sink)

=10µA; note 3 − 40 V

I

O(sink)

output current V

O(sink)

= 2 V; note 3 − 500 mA

Thermal data (in accordance with IEC 747-1)

T

stg

storage temperature −65 150 °C

T

amb

operating ambient temperature −25 +75 °C

T

vj

virtual junction temperature − 150 °C

R

th vj-c

resistance vj-case − 4 K/W

R

th vj-a

resistance vj-ambient in free air − 40 K/W

t

sc

short-circuiting time note 4 − 1hr

January 1995 6

Philips Semiconductors Preliminary specification

DC-coupled vertical deflection and
East-West output circuit

TDA8350Q

CHARACTERISTICS

VP= 17.5 V; VFB= 45 V; V

O(sink)

= 20 V; fi= 50 Hz; I

I(sb)

= 400 µA; T

amb

=25°C; measured in test circuit of Fig.3; unless

otherwise specified.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

DC supply

V

P

operating supply voltage 9 − 25 V

V

FB

flyback supply voltage V

p

− 50 V

note 1 −−60 V

I

P

supply current no signal; no load − 30 55 mA

Vertical circuit

V

O

output voltage swing (scan) I

diff

= 0.6 mA (p-p);

V

diff

= 1.8 V (p-p);

IO= 3 A (p-p)

19.8 −−V

LE linearity error I

O

= 3 A (p-p); − 12%

I

O

= 50 mA (p-p); note 2 − 12%

V

O

output voltage swing (flyback)
V

O(A)-VO(B)

I

diff

= 0.3 mA;

IO= 1.5 A (M)

− 39 − V

V

DF

forward voltage of the internal
efficiency diode (V

O(A)-VFB

)

IO= −1.5 A (M);
I

diff

= 0.3 mA

−−1.5 V

|I

os

| output offset current I

diff

=0;

I

I(sb)

=50to500µA

−−30 mA

|V

os

| offset voltage at the input of the

feedback amplifier V

I(fb)-VO(B)

I

diff

=0;

I

I(sb)

=50to500µA

−−18 mV

∆V

os

T output offset voltage as a function

of temperature

I

diff

=0; −−72 µV/K

V

O(A)

DC output voltage I

diff

= 0; note 3 − 8 − V

G

v

open loop voltage gain (V

9-5/V1-2

) notes 4 and 5 − 80 − dB

open loop voltage gain (V

9-5/V3-5

;

V

1-2

=0)

note 4 − 80 − dB

V

R

voltage ratio V

1-2/V3-5

− 0 − dB

f

res

frequency response (−3 dB) note 6 − 40 − Hz

G

I

current gain (IO/I

diff

) − 5000 −

∆G

I

T current gain drift as a function of

temperature

−−10

−4

/K

I

I(sb)

signal bias current 50 400 500 µA

I

FB

flyback supply current during scan −−100 µA
PSRR power supply ripple rejection note 7 − 80 − dB
V

I(DC)

DC voltage at the input − 2.7 − V
V

I(CM)

common mode input voltage I

I(sb)

=0 0 − 1.6 V

I

bias

input bias current I

I(sb)

=0 − 0.1 0.5 µA

I

O(CM)

common mode output current ∆I

I(sb)

= 300 µA (p-p);

fi= 50 Hz; I

diff

=0

− 0.2 − mA

January 1995 7

Philips Semiconductors Preliminary specification

DC-coupled vertical deflection and
East-West output circuit

TDA8350Q

Notes

1. A flyback supply voltage of>50 V up to 60 V is allowed in application. A 220 nF capacitor in series with a 22 Ω resistor
(dependent on IO and the inductance of the coil) has to be connected between pin 7 and ground. The decoupling
capacitor of VFB has to be connected between pin 8 and pin 4. This supply voltage line must have a resistance of
33 Ω (see application circuit Fig.5).

2. The linearity error is measured without S-correction and based on the same measurement principle as performed on
the screen. The measuring method is as follows:
Divide the output signal I

5-I9(VRM

) into 22 equal parts ranging from 1 to 22 inclusive. Measure the value of two
succeeding parts called one block starting with part 2 and 3 (block 1) and ending with part 20 and 21 (block 10). Thus
part 1 and 22 are unused. The equations for linearity error for adjacent blocks (LEAB) and not adjacent blocks (NAB)
are given below;

;

3. Referenced to V

P

.

4. V values within formulae, relate to voltages at or between relative pin numbers, i.e. V

9-5/V1-2

= voltage value across

pins 9 and 5 divided by voltage value across pins 1 and 2.

5. V

3-5

AC short-circuited.

6. Frequency response V

9-5/V3-5

is equal to frequency response V

9-5/V1-2

.

7. At V

(ripple)

= 500 mV eff; measured across RM; fi= 50 Hz.

8. The output pin 11 requires a capacitor of minimum value 68 nF.

East-West amplifier

V

O(sink)

saturation voltage I

O(sink)

= 500 mA;

I

I(corr)

=0µA; note 8

− 2.0 2.5 V

G

v

open loop voltage gain (V11/V12) − 47 − dB

f

res

frequency response (−3 dB) − 4000 − Hz

LE linearity error V

O(sink)

=3V −−1%

V

O(sink)

= 10 V; note 2 −−0.5 %

I

bias

input bias current (pin 12) −−2µA

V

I(DC)

DC input voltage − 1 − V

I

set

offset voltage set current − 1 − mA

V

13-7

maximum allowed voltage at
pin 13

−−0.3 V

Guard circuit

I

O

output current not active;

V

O(guard)

=0V

−−50 µA

output current active; V

O(guard)

= 4.5 V 1 − 2.5 mA

V

O(guard)

output voltage IO= 100 µA −−5.5 V
allowable voltage on pin 10 maximum leakage

current = 10 µA

−−40 V

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

LEAB

a

kak1+()

–

a

avg

----------------------------- -

= NAB

a

maxamin

–

a

avg

----------------------------- -

=

January 1995 8

Philips Semiconductors Preliminary specification

DC-coupled vertical deflection and
East-West output circuit

TDA8350Q

Fig.3 Test circuit.

handbook, full pagewidth

MBC228

713

EAST WEST-AMPLIFIER

V

FEEDBACK

PULSE

3

9

5

68

nF

68 kΩ

GND

I

SET

12

I

I(corr)

V

O(sink)

R = 0.6 Ω

M

4

V

P

V

FB

V

O(guard)

10

8

I

diff

3 kΩ

CON

R

1

2

I

drive(pos)

I

drive(neg)

I

I(sb)

signal

bias

I

I(sb)

signal

bias

R = 6.2 Ω

36 Ω

TDA8350

January 1995 9

Philips Semiconductors Preliminary specification

DC-coupled vertical deflection and
East-West output circuit

TDA8350Q

APPLICATION INFORMATION

Fig.4 Application diagram.

VP= 14 V; I

O(p-p)

= 2.14 A; I

I(sb)

= 400 µA; I

diff(p-p)

= 500 µA; VFB= 42 V; tFB= 0.6 ms.

handbook, full pagewidth

MBC227

713

EAST WEST-AMPLIFIER

V

FEEDBACK

PULSE

3

V

100

nF

I(fb)

V

O(A)

V

O(B)

I

(coil)

9

5

68
nF

68 kΩ

GND

I

SET

12

I

I(corr)

V

O(sink)

to line

output stage

R = 0.7 Ω

M

deflection coil

AT6005/31

L = 8.63 mH

R = 5.0 Ω

4

V

P

V

FB

V

O(guard)

10

8

I

diff

3 kΩ

CON

R

1

2

I

drive(pos)

I

drive(neg)

I

I(sb)

signal

bias

I

I(sb)

signal

bias

TDA8350

January 1995 10

Philips Semiconductors Preliminary specification

DC-coupled vertical deflection and
East-West output circuit

TDA8350Q

Fig.5 Application circuit; 50 V ≤ VFB≤ 60 V.

VP= 14 V; I

O(p-p)

= 2.14 A; I

I(sb)

= 400 µA; I

diff(p-p)

= 500 µA; VFB= 60 V; tFB= 0.4 ms.

ok, full pagewidth

MGC054

713

EAST WEST-AMPLIFIER

V

FEEDBACK

PULSE

3

V

100

nF

I(fb)

V

O(A)

V

O(B)

I

(coil)

9

5

68
nF

68 kΩ

GND

I

SET

12

I

I(corr)

V

O(sink)

to line

output stage

R = 0.7 Ω

M

deflection coil

AT6005/31

L = 8.63 mH

R = 5.0 Ω

4

V

P

V

FB

V

O(guard)

10

8

I

diff

3 kΩ

CON

R

1

2

I

drive(pos)

I

drive(neg)

I

I(sb)

signal

bias

I

I(sb)

signal

bias

TDA8350

220

nF

20

Ω

January 1995 11

Philips Semiconductors Preliminary specification

DC-coupled vertical deflection and
East-West output circuit

TDA8350Q

PACKAGE OUTLINE

Fig.6 Plastic DIL-bent-SIL power package; 13 leads (lead length 12 mm); (DBS13P; SOT141-6).

Dimensions in mm.

handbook, full pagewidth

MBC369

13
11

0.05 convex

20.0

19.6

24.4

23.6

3.4

3.1

12.4

11.6

987654321

2.20

1.45

0.25

M

(13x)

0.75

0.60

1.7

2.1

1.8

6

10

4.7

4.1

(12x)

mounting
base

0.55

0.35

0.8

M

4.35.08

A

17.0

15.5

2.4

1.6

(13x)

A

seating plane

3.4

10111213

January 1995 12

Philips Semiconductors Preliminary specification

DC-coupled vertical deflection and
East-West output circuit

TDA8350Q

SOLDERING
Plastic DIL-bent-SIL packages

B

Y DIP OR WAVE

The maximum permissible temperature of the solder is
260 °C; this temperature must not be in contact with the
joint for more than 5 s. The total contact time of successive
solder waves must not exceed 5 s.

The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the

specified storage maximum. If the printed-circuit board has
been pre-heated, forced cooling may be necessary
immediately after soldering to keep the temperature within
the permissible limit.

R

EPAIRING SOLDERED JOINTS

Apply the soldering iron below the seating plane (or not
more than 2 mm above it). If its temperature is below
300 °C, it must not be in contact for more than 10 s; if
between 300 and 400 °C, for not more than 5 s.

DEFINITIONS

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

January 1995 13

Philips Semiconductors Preliminary specification

DC-coupled vertical deflection and
East-West output circuit

TDA8350Q

NOTES

January 1995 14

Philips Semiconductors Preliminary specification

DC-coupled vertical deflection and
East-West output circuit

TDA8350Q

NOTES

January 1995 15

Philips Semiconductors Preliminary specification

DC-coupled vertical deflection and
East-West output circuit

TDA8350Q

NOTES

Philips Semiconductors

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Sweden: Kottbygatan 7, Akalla. S-164 85 STOCKHOLM,

Tel. [phone], Fax. [phone]

Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,

Tel. [phone], Fax. [phone]

Taiwan: PHILIPS TAIWAN Ltd., 23-30F, 66, Chung Hsiao West

Road, Sec. 1. Taipeh, Taiwan ROC, P.O. Box 22978,
TAIPEI 100, Tel. [phone], Fax. [phone].

Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,

209/2 Sanpavuth-Bangna Road Prakanong,
Bangkok 10260, THAILAND,
Tel. [phone], Fax. [phone].

Turkey:Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,

Tel. [phone], Fax. [phone]

United Kingdom: Philips Semiconductors LTD.,

276 Bath Road, Hayes, MIDDLESEX UB3 5BX,
Tel. [phone], Fax. [phone]

United States:811 East Arques Avenue, SUNNYVALE,

CA 94088-3409, Tel. [phone], Fax. [phone]

Uruguay: Coronel Mora 433, MONTEVIDEO,

Tel. [phone], Fax. [phone]

For all other countries apply to: Philips Semiconductors,
International Marketing and Sales, Building BE-p,
P.O. Box 218, 5600 MD, EINDHOVEN, The Netherlands,
Telex 35000 phtcnl, Fax. [phone]

SCD36 © Philips Electronics N.V. 1994

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533061/1500/02/pp16 Date of release: January 1995
Document order number: 9397 744 70011