Datasheet TDA8350Q Datasheet (Philips)

INTEGRATED CIRCUITS

DATA SH EET

TDA8350Q

DC-coupled vertical deflection and
East-West output circuit

Preliminary specification
Supersedes data of September 1991
File under Integrated Circuits, IC02

Philips Semiconductors

January 1995

Philips Semiconductors Preliminary specification

DC-coupled vertical deflection and

TDA8350Q

East-West output circuit

FEATURES

• Few external components

• Highly efficient fully DC-coupled vertical output bridge

circuit

• Vertical flyback switch

• Guard circuit

• Protection against:

– short-circuit of the output pins
– short-circuit of the output pins to V

P

• High EMC immunity due to common mode inputs

• Temperature (thermal) protection

• East-West output stage with one single conversion

resistor.

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

DC supply

V

P

I

P

supply voltage 9 − 25 V
quiescent current − 30 − mA

Vertical circuit

I

O(p-p)

I

diff(p-p)

output current (peak-to-peak value) −−3A
differential input current

(peak-to-peak value)

V

diff(p-p)

differential input voltage
(peak-to-peak value)

GENERAL DESCRIPTION

The TDA8350Q is a power circuit for use in 90° and 110°
colour deflection systems for field frequencies of 50
to 120 Hz. The circuit provides a DC driven vertical
deflection output circuit, operating as a highly efficient
class G system and an East-West driver for sinking the
diode modulator current.

− 600 −µA

− 1.5 1.8 V

Flyback switch

I

M

V

FB

peak output current −−±1.5 A
flyback supply voltage −−50 V

note 1 −−60 V

East-West amplifier

I

O(sink)

V

O(sink)

I

bias

output current (sink only) −−500 mA
peak output voltage I

=10µA −−40 V

O(sink)

input bias current −−1µA

Thermal data (in accordance with IEC 747-1)

T

stg

T

amb

T

vj

storage temperature −65 − 150 °C
operating ambient temperature −25 − +75 °C
virtual junction temperature −−150 °C

Note

1. A flyback supply voltage of>50 V up to 60 V is allowed in application. A 220 nF capacitor in series with a 22 Ω resistor
(dependent on I

and the inductance of the coil) has to be connected between pin 7 and ground. The decoupling

O

capacitor of VFB has to be connected between pin 8 and pin 4. This supply voltage line must have a resistance of
33 Ω (see application circuit Fig.5).

January 1995 2

Philips Semiconductors Preliminary specification

DC-coupled vertical deflection and

TDA8350Q

East-West output circuit

ORDERING INFORMATION

SOURCE

PACKAGE

V

FB

8

V

V

O(A)

P

9

V

O(A)

TYPE NUMBER

NAME DESCRIPTION VERSION

TDA8350Q DBS13P plastic DIL-bent-SIL power package; 13 leads (lead length 12 mm) SOT141-6

BLOCK DIAGRAM

V

handbook, full pagewidth

V

P

4

V

P

TDA8350

O(guard)

10

CURRENT

I

drive(pos)

I

drive(neg)

I

I(set)

I

I(corr)

I

I

I(set)

S

I

S

I

T

I

T

V

P

V

O(B)

3

5

11

MBC229-1

V

I(fb)

V

O(B)

V

O(sink)

1

2

V

13

12

7

GND

Fig.1 Block diagram.

January 1995 3

Philips Semiconductors Preliminary specification

DC-coupled vertical deflection and
East-West output circuit

PINNING

SYMBOL PIN DESCRIPTION

I

drive(pos)

I

drive(neg)

V

I(fb)

V

P

V

O(B)

n.c. 6 not connected
GND 7 ground
V

FB

V

O(A)

V

O(guard)

V

O(sink)

I

I(corr)

I

I(set)

book, halfpage

1 input power-stage (positive);

includes I

signal bias

I(sb)

2 input power-stage (negative);

includes I

signal bias

I(sb)

3 feedback voltage input
4 supply voltage
5 output voltage B

8 flyback supply voltage

9 output voltage A
10 guard output voltage
11 East-West amplifier driver (sink)

output voltage

12 East-West amplifier input

correction current (negative)

13 East-West amplifier set input

current (positive)

I

drive(pos)

I

drive(neg)

V

V

O(guard)
V

O(sink)

I

V

I(fb)

V

O(B)

n.c.

GND

V

FB

V

O(A)

I(corr)
I

I(set)

1
2
3
4

P

5
6
7

TDA8350

8

9
10
11
12
13

MBC226-1

TDA8350Q

FUNCTIONAL DESCRIPTION

The vertical driver circuit is a bridge configuration. The
deflection coil is connected between the output amplifiers,
which are driven in phase opposition. An external resistor
(RM) connected in series with the deflection coil provides
internal feed back information. The differential input circuit
is voltage driven. The input circuit has been adapted to
enable it to be used with the TDA9150, TDA9151B,
TDA9160A, TDA9162, TDA8366 and TDA8367 which
deliver symmetrical current signals. An external resistor

) connected between the differential input

(R

CON

determines the output current through the deflection coil.
The relationship between the differential input current and
the output current is defined by: I
The output current is adjustable from 0.5 A (p-p) to 3 A
(p-p) by varying RM. The maximum input differential
voltage is 1.8 V. In the application it is recommended that
V

= 1.5 V (typ). This is recommended because of the

diff

spread of input current and the spread in the value of
R

.

CON

The flyback voltage is determined by an additional supply
voltage VFB. The principle of operating with two supply
voltages (class G) makes it possible to fix the supply
voltage VP optimum for the scan voltage and the second
supply voltage VFB optimum for the flyback voltage. Using
this method, very high efficiency is achieved.

The supply voltage VFB is almost totally available as
flyback voltage across the coil, this being possible due to
the absence of a decoupling capacitor (not necessary, due
to the bridge configuration). The output circuit is fully
protected against the following:

• thermal protection

• short-circuit protection of the output pins (pins 5 and 9)

• short-circuit of the output pins to V

A guard circuit V

is provided. The guard circuit is

O(guard)

activated at the following conditions:

• during flyback

• during various short-circuit possibilities at the output

pins

• during open loop

• when the thermal protection is activated.

This signal can be used for blanking the picture tube
screen.

diff

× R

CON=I(coil)

P.

× RM.

Fig.2 Pin configuration.

January 1995 4

An East-West amplifier is also provided. This amplifier is
an inverting amplifier which is current driven with sink
current only capabilities.

Philips Semiconductors Preliminary specification

DC-coupled vertical deflection and

TDA8350Q

East-West output circuit

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

DC supply

V

P

V

FB

Vertical circuit

I

O

V

O(A)

Flyback switch

I

M

East-West amplifier

V

O(sink)

I

O(sink)

Thermal data (in accordance with IEC 747-1)

T

stg

T

amb

T

vj

R

th vj-c

R

th vj-a

t

sc

supply voltage non-operating − 40 V

− 25 V

flyback supply voltage − 50 V

note 1 60 V

output current (peak-to-peak value) note 2 − 3A
output voltage (pin 9) − 52 V

note 1 62 V

peak output current −±1.5 A

output voltage I
output current V

=10µA; note 3 − 40 V

O(sink)

= 2 V; note 3 − 500 mA

O(sink)

storage temperature −65 150 °C
operating ambient temperature −25 +75 °C
virtual junction temperature − 150 °C
resistance vj-case − 4 K/W
resistance vj-ambient in free air − 40 K/W
short-circuiting time note 4 − 1hr

Notes

1. A flyback supply voltage of>50 V up to 60 V is allowed in application. A 220 nF capacitor in series with a 22 Ω resistor
(dependent on I

and the inductance of the coil) has to be connected between pin 7 and ground. The decoupling

O

capacitor of VFB has to be connected between pin 8 and pin 4. This supply voltage line must have a resistance of
33 Ω (see application circuit Fig.5).

2. IO maximum determined by current protection.

3. The operating area is limited by a straight line between the points V
I

= 500 mA.

O(sink)

O(sink)

= 40 V; I

=10µA and V

O(sink)

O(sink)

=2V;

4. Up to Vp=18V.

January 1995 5

Philips Semiconductors Preliminary specification

DC-coupled vertical deflection and

TDA8350Q

East-West output circuit

CHARACTERISTICS

VP= 17.5 V; VFB= 45 V; V
otherwise specified.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

DC supply

V

P

V

FB

I

P

operating supply voltage 9 − 25 V
flyback supply voltage V

supply current no signal; no load − 30 55 mA

Vertical circuit

V

O

output voltage swing (scan) I

LE linearity error I

V

O

V

DF

output voltage swing (flyback)
V

O(A)-VO(B)

forward voltage of the internal
efficiency diode (V

| output offset current I

|I

os

|V

| offset voltage at the input of the

os

feedback amplifier V

T output offset voltage as a function

∆V

os

of temperature
V
G

O(A)

v

DC output voltage I

open loop voltage gain (V

open loop voltage gain (V

V

=0)

1-2

V

R

f

res

G

I

T current gain drift as a function of

∆G

I

voltage ratio V

frequency response (−3 dB) note 6 − 40 − Hz

current gain (IO/I

temperature
I

I(sb)

I

FB

signal bias current 50 400 500 µA

flyback supply current during scan −−100 µA
PSRR power supply ripple rejection note 7 − 80 − dB
V

I(DC)

V

I(CM)

I

bias

I

O(CM)

DC voltage at the input − 2.7 − V

common mode input voltage I

input bias current I

common mode output current ∆I

= 20 V; fi= 50 Hz; I

O(sink)

= 400 µA; T

I(sb)

=25°C; measured in test circuit of Fig.3; unless

amb

p

note 1 −−60 V

= 0.6 mA (p-p);

diff

V

= 1.8 V (p-p);

diff

19.8 −−V

IO= 3 A (p-p)

= 3 A (p-p); − 12%

O

= 50 mA (p-p); note 2 − 12%

I

O

I

= 0.3 mA;

diff

− 39 − V

IO= 1.5 A (M)
IO= −1.5 A (M);

O(A)-VFB

1-2/V3-5

) − 5000 −

diff

)

I(fb)-VO(B)

9-5/V1-2
9-5/V3-5

I

= 0.3 mA

diff

=0;

diff

I

=50to500µA

I(sb)

I

=0;

diff

I

=50to500µA

I(sb)

I

=0; −−72 µV/K

diff

= 0; note 3 − 8 − V

diff

) notes 4 and 5 − 80 − dB
;

note 4 − 80 − dB

−−1.5 V

−−30 mA

−−18 mV

− 0 − dB

−−10

=0 0 − 1.6 V

I(sb)

=0 − 0.1 0.5 µA

I(sb)

= 300 µA (p-p);

I(sb)

fi= 50 Hz; I

diff

=0

− 0.2 − mA

− 50 V

−4

/K

January 1995 6

Philips Semiconductors Preliminary specification

DC-coupled vertical deflection and

TDA8350Q

East-West output circuit

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

East-West amplifier

V

O(sink)

G

v

f

res

saturation voltage I

open loop voltage gain (V11/V12) − 47 − dB

frequency response (−3 dB) − 4000 − Hz
LE linearity error V

I

bias

V

I(DC)

I

set

V

13-7

input bias current (pin 12) −−2µA

DC input voltage − 1 − V

offset voltage set current − 1 − mA

maximum allowed voltage at

pin 13

Guard circuit

I

O

output current not active;

output current active; V
V

O(guard)

output voltage IO= 100 µA −−5.5 V

allowable voltage on pin 10 maximum leakage

= 500 mA;

O(sink)

I

=0µA; note 8

I(corr)

=3V −−1%

O(sink)

V

V

= 10 V; note 2 −−0.5 %

O(sink)

O(guard)

=0V

O(guard)

current = 10 µA

− 2.0 2.5 V

−−0.3 V

−−50 µA

= 4.5 V 1 − 2.5 mA

−−40 V

Notes

1. A flyback supply voltage of>50 V up to 60 V is allowed in application. A 220 nF capacitor in series with a 22 Ω resistor
(dependent on IO and the inductance of the coil) has to be connected between pin 7 and ground. The decoupling
capacitor of VFB has to be connected between pin 8 and pin 4. This supply voltage line must have a resistance of
33 Ω (see application circuit Fig.5).

2. The linearity error is measured without S-correction and based on the same measurement principle as performed on
the screen. The measuring method is as follows:
Divide the output signal I

5-I9(VRM

) into 22 equal parts ranging from 1 to 22 inclusive. Measure the value of two
succeeding parts called one block starting with part 2 and 3 (block 1) and ending with part 20 and 21 (block 10). Thus
part 1 and 22 are unused. The equations for linearity error for adjacent blocks (LEAB) and not adjacent blocks (NAB)
are given below;

–

a

kak1+()

LEAB

= NAB

----------------------------- ­a

3. Referenced to V

avg

;

.

P

=

4. V values within formulae, relate to voltages at or between relative pin numbers, i.e. V

–

a

maxamin

----------------------------- ­a

avg

9-5/V1-2

= voltage value across

pins 9 and 5 divided by voltage value across pins 1 and 2.

5. V

6. Frequency response V

7. At V

AC short-circuited.

3-5

= 500 mV eff; measured across RM; fi= 50 Hz.

(ripple)

is equal to frequency response V

9-5/V3-5

9-5/V1-2

.

8. The output pin 11 requires a capacitor of minimum value 68 nF.

January 1995 7

Philips Semiconductors Preliminary specification

DC-coupled vertical deflection and
East-West output circuit

handbook, full pagewidth

I

I(sb)

signal

bias

I

drive(pos)

I

drive(neg)

signal

bias

I

I(sb)

R

CON

3 kΩ

V

O(guard)

TDA8350

1

I

diff

2

V

TDA8350Q

V

FB

10

8

FEEDBACK

PULSE

4

9

3

5

V

P

R = 6.2 Ω

R = 0.6 Ω

M

I

I(corr)

12

EAST WEST-AMPLIFIER

I

SET

68 kΩ

713

GND

nF

36 Ω

V

O(sink)

68

MBC228

Fig.3 Test circuit.

January 1995 8

Philips Semiconductors Preliminary specification

DC-coupled vertical deflection and
East-West output circuit

APPLICATION INFORMATION

handbook, full pagewidth

I

I(sb)

signal

bias

I

drive(pos)

I

drive(neg)

signal

bias

I

I(sb)

R

CON

3 kΩ

V

O(guard)

TDA8350

1

I

diff

2

V

TDA8350Q

V

FB

10

8

FEEDBACK

PULSE

4

100

nF

V

O(A)

9

I

(coil)

V

I(fb)

3

V

O(B)

5

V

P

deflection coil

AT6005/31

L = 8.63 mH

R = 5.0 Ω

R = 0.7 Ω

M

VP= 14 V; I

O(p-p)

= 2.14 A; I

= 400 µA; I

I(sb)

I

I(corr)

12

= 500 µA; VFB= 42 V; tFB= 0.6 ms.

diff(p-p)

EAST WEST-AMPLIFIER

I

SET

Fig.4 Application diagram.

68 kΩ

713

GND

to line

output stage

68
nF

MBC227

V

O(sink)

January 1995 9

Philips Semiconductors Preliminary specification

DC-coupled vertical deflection and
East-West output circuit

ok, full pagewidth

I

I(sb)

signal

bias

I

drive(pos)

I

drive(neg)

signal

bias

I

I(sb)

R

CON

3 kΩ

I

I(corr)

V

O(guard)

10

TDA8350

1

I

diff

2

V

12

I

SET

8

FEEDBACK

PULSE

EAST WEST-AMPLIFIER

4

100

V

9

V

3

5

V

nF

O(A)

I(fb)

R = 0.7 Ω

M

O(B)

output stage

68
nF

I

(coil)

to line

220

nF

20

Ω

V

O(sink)

V

P

V

FB

deflection coil

AT6005/31

L = 8.63 mH

R = 5.0 Ω

TDA8350Q

VP= 14 V; I

O(p-p)

= 2.14 A; I

= 400 µA; I

I(sb)

713

68 kΩ

= 500 µA; VFB= 60 V; tFB= 0.4 ms.

diff(p-p)

GND

Fig.5 Application circuit; 50 V ≤ VFB≤ 60 V.

MGC054

January 1995 10

Philips Semiconductors Preliminary specification

DC-coupled vertical deflection and
East-West output circuit

PACKAGE OUTLINE

24.4

handbook, full pagewidth

3.4

12.4

3.1

11.6

0.05 convex

10111213

23.6

20.0

19.6
10

987654321

mounting
base

6

seating plane

2.4

1.6

TDA8350Q

4.7

4.1

A

17.0

15.5

13
11

2.20

1.45

Dimensions in mm.

Fig.6 Plastic DIL-bent-SIL power package; 13 leads (lead length 12 mm); (DBS13P; SOT141-6).

0.75

0.60

0.25

(13x)

2.1

1.8

M

3.4

1.7

(12x)

0.55

0.35

4.35.08

0.8
(13x)

M

A

MBC369

January 1995 11

Philips Semiconductors Preliminary specification

DC-coupled vertical deflection and

TDA8350Q

East-West output circuit

SOLDERING
Plastic DIL-bent-SIL packages

Y DIP OR WAVE

B
The maximum permissible temperature of the solder is

260 °C; this temperature must not be in contact with the
joint for more than 5 s. The total contact time of successive
solder waves must not exceed 5 s.

The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the

DEFINITIONS

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

specified storage maximum. If the printed-circuit board has
been pre-heated, forced cooling may be necessary
immediately after soldering to keep the temperature within
the permissible limit.

EPAIRING SOLDERED JOINTS

R
Apply the soldering iron below the seating plane (or not

more than 2 mm above it). If its temperature is below
300 °C, it must not be in contact for more than 10 s; if
between 300 and 400 °C, for not more than 5 s.

Application information

Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

January 1995 12

Philips Semiconductors Preliminary specification

DC-coupled vertical deflection and
East-West output circuit

TDA8350Q

NOTES

January 1995 13

Philips Semiconductors Preliminary specification

DC-coupled vertical deflection and
East-West output circuit

TDA8350Q

NOTES

January 1995 14

Philips Semiconductors Preliminary specification

DC-coupled vertical deflection and
East-West output circuit

TDA8350Q

NOTES

January 1995 15

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Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,

Tel. [phone], Fax. [phone]

Taiwan: PHILIPS TAIWAN Ltd., 23-30F, 66, Chung Hsiao West

Road, Sec. 1. Taipeh, Taiwan ROC, P.O. Box 22978,
TAIPEI 100, Tel. [phone], Fax. [phone].

Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,

209/2 Sanpavuth-Bangna Road Prakanong,
Bangkok 10260, THAILAND,
Tel. [phone], Fax. [phone].

Turkey:Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,

Tel. [phone], Fax. [phone]

United Kingdom: Philips Semiconductors LTD.,

276 Bath Road, Hayes, MIDDLESEX UB3 5BX,
Tel. [phone], Fax. [phone]

United States:811 East Arques Avenue, SUNNYVALE,

CA 94088-3409, Tel. [phone], Fax. [phone]

Uruguay: Coronel Mora 433, MONTEVIDEO,

Tel. [phone], Fax. [phone]

For all other countries apply to: Philips Semiconductors,
International Marketing and Sales, Building BE-p,
P.O. Box 218, 5600 MD, EINDHOVEN, The Netherlands,
Telex 35000 phtcnl, Fax. [phone]

SCD36 © Philips Electronics N.V. 1994

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533061/1500/02/pp16 Date of release: January 1995
Document order number: 9397 744 70011

Philips Semiconductors