Preliminary specification
Supersedes data of 1998 Apr 07
File under Integrated Circuits, IC02
1998 Nov 17
Page 2
Philips SemiconductorsPreliminary specification
Satellite demodulator and decoderTDA8044; TDA8044A
FEATURES
• General features:
– One chip DVB compliant QPSK/BPSK demodulator
and concatenated Viterbi/Reed-Solomon decoder
with de-interleaver and de-randomizer
(ETS 300 421)
– 3.3 V supply voltage (input pads are 5 V tolerant)
– Stand-by mode for low power dissipation
– Internal clock PLL to allow low frequency crystal
– Internal convolutional de-interleaving (I = 12; using
internal memory)
– De-randomizer based on PRBS
– External indication of RS decoder sync lock
– External indication of uncorrectable error; (Transport
Error Indicator is set)
– External indication of corrected byte
– Indication of the number of lost blocks
– Indication of the number of corrected blocks.
• Interface:
–I2C-bus interface to initialize and monitor the
demodulator and FEC decoder. When no I2C usage,
default mode is defined
– Programmable interrupt facility
– Six bits I/O expander for flexible access to and from
the I2C-bus
– Switchable I2C loop-through to suppress I2C
crosstalk in the tuner
– DiSEqC level 1.X support for dish control applications
– 3-state mode for transport stream outputs.
APPLICATIONS
• Digital satellite TV: demodulation and forward error
correction (FEC).
1998 Nov 172
Page 3
Philips SemiconductorsPreliminary specification
Satellite demodulator and decoderTDA8044; TDA8044A
GENERAL DESCRIPTION
This document gives preliminary information about the
TDA8044 and TDA8044A, which are the successors of the
TDA8043. The TDA8044A is only specified where the
product deviates from the TDA8044, all other references
are the same. The TDA8044 is backwards compatible with
the TDA8043, regarding pinning and I2C software.
The TDA8044 is a DVB compliant demodulator and error
correction decoder IC for reception of QPSK and BPSK
modulated signals for satellite applications. It can handle
variable symbol rates in the range of 0.5 to 45 Msymbols/s
(0.5 to 30 Msymbols/s for TDA8044A) with a minimum
number of low cost and non-critical external components.
Typical applications for this device are MCPC (Multi
Channel Per Carrier), SCPC (Single Channel Per Carrier)
and Simulcast. In these applications one satellite
transponder contains respectively one broad
QPSK-carrier, several small QPSK-carriers and one small
QPSK-carrier together with one or two FM-carriers.
The TDA8044 has minimal interfaces with the tuner, it only
requires the demodulated analog I and Q baseband input
signals. Analog to digital conversion is done internally by
two matched 7-bit A-D converters. Since all the loops
(AGC, clock and carrier recovery) are internal, no
feedback to the tuner is needed. However for maximal
tuner flexibility, there is the possibility to close the AGC
and carrier recovery loop externally via the tuner.
The number of external components required for operation
of the TDA8044 is very low. Moreover the external
components are low cost and non-critical. This gives an
easy and low cost application. The TDA8044 runs on a low
frequency crystal which is upconverted to a clock
frequency by means of an internal PLL. With the PLL
different clock frequencies can be selected without
changing the crystal. This allows for maximal flexibility
concerning symbol rate range combined with minimal
power consumption.
Furthermore the TDA8044 has internal anti-alias filters,
which can cover a large range of symbol frequencies
(approximately one decade) without the need to switch
external (SAW) filters. To cover the whole range of
0.5 to 45 Msymbols/s switching of clock frequency
(internally) and filtering (externally) is necessary.
The TDA8044 has a double carrier loop configuration
which has excellent capabilities of tracking phase noise.
Synchronisation of the FEC-unit is done completely
internally, thereby minimizing I
The output of the TDA8044 is highly flexible, allowing
different output modes to interface to a
demultiplexer/descrambler/MPEG-2 decoder including a
3-state mode. For evaluation of the TDA8044,
demodulator and Viterbi outputs can be made available
externally.
The interfacing of the TDA8044 has been extended
compared to the TDA8043. Separate resets are available
for logic only, logic plus I2C and carrier loops. A power-on
reset module has been implemented which gives a reset
signal at power-up. This signal can be used to reset the
SDD in order to guarantee correct starting of the IC.
Two extra general purpose I/O pins (I/O expanders) have
been added. A switchable I2C loop-through to the tuner is
implemented to switch off the I2C connection to the tuner.
This reduces phase noise in the tuner in case of I2C
crosstalk. The transport stream outputs can be put in
3-state mode. Furthermore DiSEqC level 1.X support is
integrated for dish control applications. The power
consumption in stand-by mode has been decreased
considerably.
2
C communication.
1998 Nov 173
Page 4
Philips SemiconductorsPreliminary specification
Satellite demodulator and decoderTDA8044; TDA8044A
QUICK REFERENCE DATA
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
V
DD
I
DD
f
clk
f
sym
P
tot
ILimplementation lossnote 5−0.3−dB
SNRSNR for locking the SDD note 52−−dB
functional supply voltage3.053.33.55V
total supply currentVDD= 3.3 V
TDA8044note 1−320480mA
TDA8044Anotes 1 and 2−−350mA
internal clock frequencyCFS = 0 or CFS = 1; f
= 4 MHz
xtal
TDA8044note 110.7−96MHz
TDA8044Anotes 1 and 210.7−64MHz
symbol frequency rangenote 3
TDA80440.5−45Msymbols/s
TDA8044A0.5−30Msymbols/s
total power dissipationT
=70°C; note 4
amb
TDA8044−11501700mW
TDA8044A−−1250mW
Notes
1. Programmable internal frequencies possible:
a) Values 10.7, 16, 32, 64 MHz for CFS = 0.
b) Values 16, 24, 48, 96 MHz for CFS = 1.
2. CFS is set to logic 0.
3. Without switching internal clock frequencies, a range of 1 decade can be covered. To cover the full range of symbol
frequencies, internal clock frequencies and external (SAW) filters must be switched. Details can be found in the
application note.
4. Maximum value is specified for a symbol rate of 45 Msymbols/s, a puncturing rate of 7/8 and a clock frequency of
96 MHz and 3.55 V power supply. Typical value is specified for a symbol rate of 27.5 Msymbols/s, a puncture rate
of 3/4 and a clock frequency of 64 MHz.
5. Implementation loss at the demodulator output and minimum SNR to lock the TDA8044 are measured including tuner
in a laboratory environment at a symbol rate of 27.5 Msymbols/s and a clock frequency of 64 MHz.
PRESET20set device into default mode
P321quasi-bidirectional I/O port (bit 3)
P222quasi-bidirectional I/O port (bit 2)
P123quasi-bidirectional I/O port (bit 1)
P024quasi-bidirectional I/O port (bit 0)
V
DDD3
P526quasi-bidirectional I/O port (bit 5)
P427quasi-bidirectional I/O port (bit 4)
PDOCLK28output clock for transport stream bytes
PDO029parallel data output (bit 0)
PDO130parallel data output (bit 1)
PDO231parallel data output (bit 2)
V
SSD5
PDO333parallel data output (bit 3)
PDO434parallel data output (bit 4)
PDO535parallel data output (bit 5)
V
SSD6
V
SSD7
PDO638parallel data output (bit 6)
POR39Power-On Reset (can be connected to PRESET (20))
V
DDD4
3digital ground 1
5digital ground 2
10digital supply voltage 1
15digital ground 3
18digital ground 4
19digital supply voltage 2
25digital supply voltage 3
32digital ground 5
36digital ground 6
37digital ground 7
40digital supply voltage 4
1998 Nov 175
Page 6
Philips SemiconductorsPreliminary specification
Satellite demodulator and decoderTDA8044; TDA8044A
SYMBOLPINDESCRIPTION
V
DDD5
V
SSD8
V
DDD6
V
DDD7
PDO745parallel data output (bit 7)
n.c46not connected
V
SSD9
PDOERR48transport error indicator
PDOVAL49data valid indicator
PDOSYNC50transport packet synchronization signal
V
SSD10
SCL52serial clock of I
SDA53serial data of I
INT54interrupt output (active LOW)
A055 I
RSLOCK56Reed-Solomon lock indicator
VLOCK57Viterbi lock indicator
DLOCK58Demodulator lock indicator
V
DDD8
V
DDD9
TEST61test pin (normally connected to ground)
TRST62BST optional asynchronous reset (normally connected to ground)
TCK63BST dedicated test clock (normally connected to ground)
SCLT64serial clock of I
SDAT65serial data of I
V
DDD10
V
SSD11
V
SSD12
TMS69BST input control signal (normally connected to ground)
TDO70BST serial test data out
TDI71BST serial test data in (normally connected to ground)
V
DDD11
V
SSD13
V
SSD(AD)
V
DDD(AD)
V
)76bottom reference voltage for ADC
ref(B
V
SSA1
QA78analog input Q
V
ref(Q)
IA80analog input I
V
SSA2
41digital supply voltage 5
42digital ground 8
43digital supply voltage 6
44digital supply voltage 7
47digital ground 9
51digital ground 10
2
C-bus
2
C-bus
2
C hardware address
59digital supply voltage 8
60digital supply voltage 9
For compatibility in respect to the TDA8043 see Section “Pin compatibility”.
PDO4
PDO5
V
SSD6VSSD7
PDO6
POR
Fig.1 Pin configuration.
1998 Nov 178
DDD4VDDD5
V
SSD5
V
DDD6VDDD7
V
PDO7
n.c.
SSD9
V
PDOVAL
PDOERR
50
MGM606
PDOSYNC
Page 9
Philips SemiconductorsPreliminary specification
Satellite demodulator and decoderTDA8044; TDA8044A
Pin compatibility
The TDA8044 is backwards pin compatible with the TDA8043, this means that the functional pins of the TDA8043 have
been left unchanged on the TDA8044. However due to extra functionality of the TDA8044, some of the not connected
pins of the TDA8043 will become functional pins on the TDA8044. The following table lists the modified pins of the
TDA8044.
Table 1 Modified pins of the TDA8044
PINTDA8043 FUNCTIONTDA8043 SYMBOLTDA8044 FUNCTION
4not connectedCFSclock frequency selection
5not connectedV
SSD2
26not connectedP4I/O expander bit 4
27not connectedP5I/O expander bit 5
36not connectedV
37not connectedV
SSD6
SSD7
39not connectedPORpower-on reset
47not connectedV
SSD9
64not connectedSCLTserial clock of I
65not connectedSDATserial data of I
91not connectedD2222 kHz generation output
92not connectedV
93not connectedV
95not connectedV
SSD15
SSD16
SSD(test)
digital ground
digital ground
digital ground
digital ground
2
C-bus loop-through
2
C-bus loop-through
digital ground
digital ground
test pin, connect to ground
If you want to replace the TDA8043 with the TDA8044 and you do not want to use the pins with extra functionality, then
the following measures on the PCB layout must be taken to avoid I/O conflicts in the TDA8044:
• pin numbers 4, 5, 26, 27, 36, 37, 47, 65, 92, 93 and 95 must be put to ground
• pin numbers 39, 64 and 91 must be left not connected.
With this measures it is possible to use the TDA8043 and the TDA8044 on the same PCB without any problems. In order
to use pins with the extra functionality of the TDA8044, PCB-layout changes are necessary.
1998 Nov 179
Page 10
Philips SemiconductorsPreliminary specification
Satellite demodulator and decoderTDA8044; TDA8044A
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOLPARAMETERCONDITIONSMIN.MAX.UNIT
V
DD
V
max
P
tot
T
stg
T
amb
T
j
Notes
Maximum power dissipation is specified for 96 MHz clock frequency, 45 Msymbols/s and puncture rate of 7/8.
1.
2. Maximum power dissipation is specified for 64 MHz clock frequency, 30 Msymbols/s and puncture rate of 7/8.
supply voltage pins−0.33.55V
voltage on all pins0V
DD
V
total power dissipation
TDA8044T
TDA8044AT
=70°C; note 1−1700mW
amb
=70°C; note 2−1250mW
amb
IC storage temperature−55150°C
operating ambient temperatureT
=70°C070°C
amb
operating junction temperature0125°C
THERMAL CHARACTERISTICS
SYMBOLPARAMETERVALUEUNIT
R
th j-a
thermal resistance from junction to ambient in free air
TDA804434K/W
TDA8044A45K/W
HANDLING
Inputs and outputs are protected against electrostatic discharge in normal handling. However it is good practice to take
normal precautions appropriate to handling MOS devices (see
“Handling MOS devices”
).
1998 Nov 1710
Page 11
Philips SemiconductorsPreliminary specification
Satellite demodulator and decoderTDA8044; TDA8044A
APPLICATION INFORMATION
handbook, full pagewidth
RF-in
TDA8060
TSA5056
TUNER
smart card(s)
telco i/f
I
TDA8044
TDA8044A
Q
2
I
C-bus
MODEM
TDA8004
FRONT
PANEL
CONTROL
SDD
Vxx
2
C-bus
I
SAA7214
TMIPS
FLASH
AV
PES
16-Mbit
SDRAM
SAA7215
DRAM
(optional)
16-Mbit
SDRAM
(optional)
1394
L + PHY
BUFFERS
RGB
CVBS/YC
LR
ADAC
IEEE1394
IEEE1284
RS232
SWITCHING
SCART 1
SCART 2
SCART 3
MGM605
Fig.2 Satellite set-top decoder concept.
1998 Nov 1711
Page 12
Philips SemiconductorsPreliminary specification
Satellite demodulator and decoderTDA8044; TDA8044A
Satellite demodulator and decoderTDA8044; TDA8044A
PACKAGE OUTLINE
QFP100: plastic quad flat package; 100 leads (lead length 1.95 mm); body 14 x 20 x 2.8 mm
c
y
X
E
e
w M
p
A
A
H
E
E
2
A
A
1
8051
81
pin 1 index
100
1
50
Z
b
31
30
detail X
SOT317-2
L
p
L
(A )
3
θ
w M
b
e
p
Z
D
D
H
D
0510 mm
scale
DIMENSIONS (mm are the original dimensions)
A
UNITA1A2A3b
max.
0.25
mm
3.20
0.05
2.90
2.65
0.25
cE
p
0.40
0.25
0.25
0.14
(1)
(1)(1)(1)
D
20.1
19.9
eH
14.1
13.9
0.65
24.2
23.6
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
IEC JEDEC EIAJ
REFERENCES
SOT317-2
1998 Nov 1713
v M
A
B
v M
B
E
18.2
17.6
LL
p
1.0
0.6
0.150.10.21.95
H
D
EUROPEAN
PROJECTION
Z
D
0.8
0.4
Zywvθ
E
o
1.0
7
o
0.6
0
ISSUE DATE
95-02-04
97-08-01
Page 14
Philips SemiconductorsPreliminary specification
Satellite demodulator and decoderTDA8044; TDA8044A
SOLDERING
Introduction to soldering surface mount packages
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our
“Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering is not always suitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.
Reflow soldering
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
The footprint must incorporate solder thieves at the
downstream end.
• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Manual soldering
Wave soldering
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
To overcome these problems the double-wave soldering
method was specifically developed.
If wave soldering is used the following conditions must be
observed for optimal results:
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
1998 Nov 1714
Page 15
Philips SemiconductorsPreliminary specification
Satellite demodulator and decoderTDA8044; TDA8044A
Suitability of surface mount IC packages for wave and reflow soldering methods
PACKAGE
WAVEREFLOW
HLQFP, HSQFP, HSOP, SMSnot suitable
(3)
PLCC
, SOsuitablesuitable
(2)
LQFP, QFP, TQFPnot recommended
(3)(4)
suitable
suitable
(1)
SQFPnot suitablesuitable
SOLDERING METHOD
SSOP, TSSOP, VSOnot recommended
(5)
suitable
Notes
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the
2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
1998 Nov 1715
Page 16
Philips SemiconductorsPreliminary specification
Satellite demodulator and decoderTDA8044; TDA8044A
DEFINITIONS
Data sheet status
Objective specificationThis data sheet contains target or goal specifications for product development.
Preliminary specificationThis data sheet contains preliminary data; supplementary data may be published later.
Product specificationThis data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
PURCHASE OF PHILIPS I
2
C COMPONENTS
Purchase of Philips I
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.
2
C components conveys a license under the Philips’ I2C patent to use the
1998 Nov 1716
Page 17
Philips SemiconductorsPreliminary specification
Satellite demodulator and decoderTDA8044; TDA8044A
NOTES
1998 Nov 1717
Page 18
Philips SemiconductorsPreliminary specification
Satellite demodulator and decoderTDA8044; TDA8044A
NOTES
1998 Nov 1718
Page 19
Philips SemiconductorsPreliminary specification
Satellite demodulator and decoderTDA8044; TDA8044A
NOTES
1998 Nov 1719
Page 20
Philips Semiconductors – a worldwide company
Argentina: see South America
Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +1 800 234 7381
Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Tel. +381 11 625 344, Fax.+381 11 635 777
For all other countries apply to: Philips Semiconductors,
International Marketing & Sales Communications, Building BE-p, P.O. Box 218,
5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Internet: http://www.semiconductors.philips.com
Printed in The Netherlands545104/750/02/pp20 Date of release: 1998 Nov 17Document order number: 9397 750 04777
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