Datasheet TDA8002G-5-C2, TDA8002BT-3-C2, TDA8002AT-5-C2, TDA8002G-3-C2, TDA8002AT-3-C2 Datasheet (Philips)

INTEGRATED CIRCUITS

DATA SH EET

TDA8002

IC card interface

Product specification
Supersedes data of 1997 Mar 13
File under Integrated Circuits, IC02

1997 Nov 04

Philips Semiconductors Product specification

IC card interface TDA8002

FEATURES

• Single supply voltage interface (3.3 or 5 V environment)

• Low-power sleep mode

• Three specific protected half-duplex bidirectional

buffered I/O lines

• VCC regulation (5 V ±5%, ICC<65 mA at VDD= 5 V, with
controlled rise and fall times

• Thermal and short-circuit protections with current
limitations

• Automatic ISO 7816 activation and deactivation
sequences

• Enhanced ESD protections on card side (>6 kV)

• Clock generation for the card up to 12 MHz with

synchronous frequency changes

• Clock generation up to 20 MHz (auxiliary clock)

• Synchronous and asynchronous cards (memory and

smart cards)

• ISO 7816, GSM11.11 compatibility and EMV (Europay,
Mastercard, Visa) compliant

• Step-up converter for V

generation

CC

• Supply supervisor for spikes elimination and emergency
deactivation.

APPLICA TIONS

• IC card readers for:
– GSM applications
– banking
– electronic payment
– identification
– Pay TV
– road tolling.

GENERAL DESCRIPTION

The TDA8002 is a complete low-power, analog interface
for asynchronous and synchronous cards. It can be placed
between the card and the microcontroller. It performs all
supply, protection and control functions. It is directly
compatible with ISO 7816, GSM11.11 and EMV
specifications.

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Supply

V
I

DDA

DD

analog supply voltage 3.0 5 6.5 V
supply current sleep mode −−150 µA

idle mode; f
f

CLKOUT

= 10 MHz; VDD=5V

active mode; f
f

CLKOUT

= 10 MHz; VDD=5V

active mode; f
f

CLKOUT

= 10 MHz; VDD=3V

= 2.5 MHz;

CLK

CLK

CLK

= 2.5 MHz;

= 2.5 MHz;

−−6mA

−−9mA

−−12 mA

Card supply

V

CC(O)

I

CC(O)

output voltage DC load <65 mA 4.75 − 5.25 V
output current VCC short-circuited to GND −−100 mA

General

f

CLK

T
P

T

de
tot

amb

card clock frequency 0 − 12 MHz
deactivation cycle time 60 80 100 µs
continuous total power dissipation

TDA8002AT; TDA8002BT T
TDA8002G T

= −25 to +85 °C −−0.56 W

amb

= −25 to +85 °C −−0.46 W

amb

operating ambient temperature −25 − +85 °C

1997 Nov 04 2

Philips Semiconductors Product specification

IC card interface TDA8002

ORDERING INFORMATION

TYPE NUMBER

(1)

PACKAGE

MARKING NAME DESCRIPTION VERSION

TDA8002AT/3/C2
TDA8002AT/5/C2
TDA8002BT/3/C2
TDA8002BT/5/C2
TDA8002G/3/C2
TDA8002G/5/C2

TDA8002AT/3 SO28 plastic small outline package; 28 leads;

(3)

TDA8002AT/5

(2)

TDA8002BT/3

(3)

TDA8002BT/5

(2)

80023 LQFP32 plastic low profile quad flat package; 32 leads;

(3)

80025

body width 7.5 mm

body 5 × 5 × 1.4 mm

SOT136-1

SOT401-1

(2)

Notes

1. The /3 or /5 suffix indicates the voltage supervisor option.

2. The /3 version can be used with a 3 or 5 V power supply environment (see Chapter “Functional description”).

3. The /5 version can be used with a 5 V power supply environment.

1997 Nov 04 3

Philips Semiconductors Product specification

IC card interface TDA8002

BLOCK DIAGRAM

handbook, full pagewidth

ALARM
ALARM

OFF

RSTIN

CMDVCC

MODE

CLKDIV1

CLKDIV2

CLKSEL

STROBE
CLKOUT

4
3

26
25
24

27

6

7

5

8

9

V

DDD

100 nF

28

CLOCK

CIRCUITRY

SUPPLY

INTERNAL

REFERENCE

VOLTAGE SENSE

HORSEQ

CLK

V

REF

ALARM

V

DDA

100 nF

13

INTERNAL OSCILLATOR

EN1 CLKUP

SEQUENCER

100 nF

S1 S2
14 12

STEP-UP CONVERTER

f

INT

EN2

PV

EN5

EN4

CC

V

CC

GENERATOR

RST

BUFFER

CLOCK

BUFFER

VUP

15

100 nF

23

22

19
18

21

100

RST

PRES
PRES

CLK

nF

V

CC

XTAL1

XTAL2

AUX1UC

30
31

1

OSCILLATOR

EN3

TDA8002G

AUX2UC

I/OUC

All capacitors are mandatory.

2

32

29 11

10

DGND1

DGND2

AGND

Fig.1 Block diagram (TDA8002G).

1997 Nov 04 4

THERMAL

PROTECTION

TRANSCEIVER

TRANSCEIVER

TRANSCEIVER

I/O

I/O

I/O

20

17

16

MGE730

AUX1

AUX2

I/O

Philips Semiconductors Product specification

IC card interface TDA8002

PINNING

SYMBOL

I/O DESCRIPTION

TYPE A TYPE B TYPE G

XTAL1 1 1 30 I/O crystal connection or input for external clock
XTAL2 2 2 31 I/O crystal connection
I/OUC 3 3 32 I/O data I/O line to and from microcontroller
AUX1UC 4 4 1 I/O auxiliary line to and from microcontroller for synchronous

applications

AUX2UC 5 − 2 I/O auxiliary line to and from microcontroller for synchronous

applications
ALARM − 5 3 O open drain NMOS reset output for microcontroller (active LOW)
ALARM 6 6 4 O open drain PMOS reset output for microcontroller (active

HIGH)
CLKSEL 7 7 5 I control input signal for CLK (LOW = XTAL oscillator;

HIGH = STROBE input)
CLKDIV1 8 8 6 I control input with CLKDIV2 for choosing CLK frequency
CLKDIV2 9 9 7 I control input with CLKDIV1 for choosing CLK frequency
STROBE 10 10 8 I external clock input for synchronous applications
CLKOUT 11 11 9 O clock output (see Table 1)
DGND1 12 12 10 supply digital ground 1
AGND 13 13 11 supply analog ground
S2 14 14 12 I/O capacitance connection for voltage doubler

PIN

V

DDA

15 15 13 supply analog supply voltage
S1 16 16 14 I/O capacitance connection for voltage doubler
VUP 17 17 15 I/O output of voltage doubler (connect to 100 nF)
I/O 18 18 16 I/O data I/O line to and from card
AUX2 19 − 17 I/O auxiliary I/O line to and from card
PRES 20 19 18 I active LOW card input presence contact
PRES − 20 19 I active HIGH card input presence contact
AUX1 21 21 20 I/O auxiliary I/O line to and from card
CLK 22 22 21 O clock to card output (C3) (see Table 1)
RST 23 23 22 O card reset output (C2)
V

CC

24 24 23 O supply for card (C1) (decouple with 100 nF)
CMDVCC 25 25 24 I active LOW start activation sequence input from

microcontroller
RSTIN 26 26 25 I card reset input from microcontroller
OFF 27 27 26 O open drain NMOS interrupt output to microcontroller (active

LOW)
MODE 28 28 27 I operating mode selection input (HIGH = normal; LOW = sleep)
V

DDD

−−28 supply digital supply voltage

DGND2 −−29 supply digital ground 2

1997 Nov 04 5

Philips Semiconductors Product specification

IC card interface TDA8002

handbook, halfpage

Fig.2 Pin configuration (TDA8002A).

XTAL1
XTAL2

I/OUC
AUX1UC
AUX2UC

ALARM

CLKSEL
CLKDIV1
CLKDIV2
STROBE

CLKOUT

DGND1

AGND

S2

1
2
3
4
5
6
7

TDA8002A

8

9
10
11
12
13

MGE731

28
27
26
25
24
23
22
21
20
19
18
17
16
1514

MODE
OFF
RSTIN
CMDVCC
V

CC

RST
CLK
AUX1
PRES
AUX2
I/O
VUP
S1
V

DDA

handbook, halfpage

CLKDIV1
CLKDIV2
STROBE

Fig.3 Pin configuration (TDA8002B).

XTAL1
XTAL2

I/OUC

AUX1UC

ALARM
ALARM

CLKSEL

CLKOUT

DGND1

AGND

S2

1
2
3
4
5
6
7

TDA8002B

8

9
10
11
12
13

MGE732

28
27
26
25
24
23
22
21
20
19
18
17
16
1514

MODE
OFF
RSTIN
CMDVCC
V

CC

RST
CLK
AUX1
PRES
PRES
I/O
VUP
S1
V

DDA

handbook, full pagewidth

AUX1UC
AUX2UC

ALARM
ALARM

CLKSEL
CLKDIV1
CLKDIV2
STROBE

XTAL2

I/OUC
32

1
2
3
4

XTAL1

31

30

DGND2

29

DDD

V

28

MODE
27

OFF
26

TDA8002G

5
6
7
8

9

CLKOUT

10

DGND1

11

AGND

S2

12

13

14

15

S1

DDA

V

VUP

Fig.4 Pin configuration (TDA8002G).

RSTIN
25

16
I/O

CMDVCC

24

V

23

RST

22
21

CLK

20

AUX1

19

PRES

18

PRES

17

AUX2

MGE733

CC

1997 Nov 04 6

Philips Semiconductors Product specification

IC card interface TDA8002

FUNCTIONAL DESCRIPTION
Power supply

The supply pins for the chip are V
DGND1 and DGND2. V

DDA

and V

, V

DDA

DDD

, AGND,

DDD

(i.e. VDD) should be
in the range of 3.0 to 6.5 V. All card contacts remain
inactive during power-up or power-down.

On power-up, the logic is reset by an internal signal.
The sequencer is not activated until VDD reaches
V

th2+Vhys2

(see Fig.5). When VDD falls below V

th2

, an
automatic deactivation sequence of the contacts is
performed.

Supply voltage supervisor (V

This block surveys the V

DD

)

DD

supply. A defined reset pulse
of 10 ms minimum (tW) can be retriggered and is delivered
on the ALARM outputs during power-up or power-down of
VDD(see Fig.5). This signal is also used for eliminating the
spikes on card contacts during power-up or power-down.

When VDD reaches V

th2+Vhys2

, an internal delay is
started. The ALARM outputs are active until this delay has
expired. When VDD falls below V

, ALARM is activated

th2

and a deactivation sequence of the contacts is performed.
For 3 V supply, the supervisor option must be chosen at

3 V. For 5 V supply, both options (3 or 5 V) may be chosen
depending on the application.

Clock circuitry

The TDA8002 supports both synchronous and

2

asynchronous cards (I

C-bus memories requiring an
acknowledge signal from the master are not supported).
There are three methods to clock the circuitry:

• Apply a clock signal to pin STROBE

• Use of an internal RC oscillator

• Use of a quartz oscillator which should be connected

between pins XTAL1 and XTAL2.

When CLKSEL is HIGH, the clock should be applied on the
STROBE pin, and when CLKSEL is LOW, one of the
internal oscillators is used.

When an internal clock is used, the clock output is
available on pin CLKOUT. The RC oscillator is selected by
making CLKDIV1 HIGH and CLKDIV2 LOW. The clock
output to the card is available on pin CLK. The frequency
of the card clock can be the input frequency divided by
2 or 4, STOP LOW or 1.25 MHz, depending on the states
of CLKDIV1 or CLKDIV2 (see Table 1).

Do not change CLKSEL during activation. When in
low-power (sleep) mode, the internal oscillator frequency
which is available on pin CLKOUT is lowered to
approximately 16 kHz for power-economy purposes.

handbook, full pagewidth

V

DD

t

W

ALARM

ALARM

Fig.5 Alarm as a function of VDD (pulse width 10 ms).

1997 Nov 04 7

V

+ V

th2

hys2

V

th2

t

W

MGE734

Philips Semiconductors Product specification

IC card interface TDA8002

Table 1 Clock circuitry definition

MODE CLKSEL CLKDIV1 CLKDIV2

HIGH LOW HIGH LOW
HIGH LOW LOW LOW
HIGH LOW LOW HIGH

FREQUENCY

OF CLK

1

⁄2f

int

1

⁄4f

xtal

1

⁄2f

xtal

HIGH LOW HIGH HIGH STOP LOW f
HIGH HIGH X

LOW

(2)

(1)

X

(1)
(1)

X

(1)

X

(1)

X

STROBE f

STOP LOW

Notes

1. X = don’t care.

2. In low-power mode.
= 32 kHz in low-power mode.

3. f

int

I/O circuitry

The three I/O transceivers are identical. The state is HIGH
for all I/O pins (i.e. I/O, I/OUC, AUX1, AUX1UC, AUX2 and
AUX2UC). Pin I/O is referenced to VCC and pin I/OUC to
VDD, thus ensuring proper operation in case VCC≠ VDD.

The first side on which a falling edge is detected becomes
a master (input). An anti-latch circuitry first disables the
detection of the falling edge on the other side, which
becomes slave (output).

When the input is back to HIGH level, a current booster is
turned on during the delay t

on the output side and then

d

both sides are back to their idle state, ready to detect the
next logic 0 on any side.

In case of a conflict, both lines may remain LOW until the
software enables the lines to be HIGH. The anti-latch
circuitry ensures that the lines do not remain LOW if both
sides return HIGH, regardless of the prior conditions.
The maximum frequency on the lines is approximately

1 MHz.
After a delay time td (about 50 ns), the logic 0 present on
the master side is transferred on the slave side.

FREQUENCY

OF CLKOUT

1

⁄2f

int

f

xtal

f

xtal
xtal
xtal

1

(3)

⁄2f

int

handbook, full pagewidth

I/O

I/OUC

t

d

t

d

Fig.6 Master and slave signals.

1997 Nov 04 8

t

d

conflict idle

MGD703

Philips Semiconductors Product specification

IC card interface TDA8002

Logic circuitry

After power-up, the circuit has six possible states of
operation. Table 1 shows the sequence of these states.

I

DLE MODE

After reset, the circuit enters the idle mode.
A minimum number of functions in the circuit are active
while waiting for the microcontroller to start a session:

• All card contacts are inactive

• I/OUC, AUX1UC and AUX2UC are high-impedance

• Oscillator XTAL runs, delivering CLKOUT

• Voltage supervisor is active.

L

OW-POWER (SLEEP) MODE

When pin MODE goes LOW, the circuit enters the
low-power (sleep) mode. As long as pin MODE is LOW, no
activation is possible.

State diagram

If pin MODE goes LOW in the active mode, a normal

deactivation sequence is performed before entering

low-power mode. When pin MODE goes HIGH, the circuit

enters normal operation after a delay of at least 6 ms

(96 cycles of CLKOUT). During this time the CLKOUT

remains at 16 kHz.

• All card contacts are inactive

• Oscillator XTAL does not run

• The V

supervisor, ALARM output, card presence

DD

detection and OFF output remain functional

• Internal oscillator is slowed to 32 kHz, CLKOUT
providing 16 kHz.

A

CTIVE MODE

When the activation sequence is completed, the TDA8002
will be in the active mode. Data is exchanged between the
card and the microcontroller via the I/O lines.

handbook, full pagewidth

POWER

OFF

LOW-POWER

MODE

ACTIVATION

IDLE

MODE

FAULT

DEACTIVATION

Fig.7 State diagram.

ACTIVE

MODE

MGE735

1997 Nov 04 9

Philips Semiconductors Product specification

IC card interface TDA8002

ACTIVATION SEQUENCE
From idle mode, the circuit enters the activation mode

when the microcontroller sets the CMDVCC line LOW or
sets the MODE line HIGH when the CMDVCC line is
already LOW. The internal circuitry is then activated, the
internal clock is activated and an activation sequence is
executed. When RST is enabled, it becomes the inverse of
RSTIN.

handbook, full pagewidth

OSC_INT/64

t

act

CMDVCC

VUP

t

0

t

1

Figures 8 to 10 illustrate the activation sequence as
described below:

1. Step-up converter is started (t

1

≈ t0)

2. VCC rises from 0 to 5 V (t2=t1+11⁄2T)

3. I/O, AUX1, AUX2 are enabled and CLK is enabled

(t3=t1+ 4T); a special circuitry ensures that I/O
remains below VCC during falling slope of V

CC

4. CLK is set by setting RSTIN to HIGH (t4)

5. RST is enabled (t5=t1+ 7T); after t5, RSTIN has no

further action on CLK, but is only controlling RST.

T = 25 µs

V

CC

I/O

CLK

RSTIN

RST

t

2

high - Z

t

3

t

t

5

4

Fig.8 Activation sequence using RSTIN and CMDVCC.

MGE736

1997 Nov 04 10

Philips Semiconductors Product specification

IC card interface TDA8002

handbook, full pagewidth

OSC_INT/64

t

CLKDIV1

CLKDIV2

act

CMDVCC

VUP

V

CC

I/O

CLK

RSTIN

RST

Fig.9 Activation sequence using CMDVCC, CLKDIV1 and CLKDIV2 signals to enable CLK.

handbook, full pagewidth

OSC_INT/64

t

0

t

1

t

2

high - Z

t

3

MGE737

t

act

PRES, OFF

CMDVCC

V

CC

I/O

RSTIN

STROBE

RST

high - Z

Fig.10 Activation sequence for synchronous application.

1997 Nov 04 11

MGE738

Philips Semiconductors Product specification

IC card interface TDA8002

DEACTIVATION SEQUENCE
When a session is completed, the microcontroller sets the

CMDVCC line to HIGH state or MODE line to LOW state.
The circuit then executes an automatic deactivation
sequence by counting the sequencer down and ends in
idle mode.

handbook, full pagewidth

OSC_INT/64

t

CMDVCC

VUP

V

CC

I/O

CLK

10

t

t

13

t

high - Z

12

Figures 11 and 12 illustrate the deactivation sequence as
described below:

1. RST goes LOW (t

11

≈ t10)

2. CLK is stopped (t12=t11+1⁄2T)

3. I/O, AUX1, AUX2 are outputs into high-impedance

state (t13=t11+T)

4. VCC falls to zero (t14=t11+11⁄2T); a special circuitry

ensures that I/O remains below VCC during falling
slope of V

CC

5. VUP falls (t15=t11+ 5T).

t

de

t

15

14

RSTIN

RST

t

11

Fig.11 Deactivation sequence.

1997 Nov 04 12

MGE739

Philips Semiconductors Product specification

IC card interface TDA8002

Fault detection

The following fault conditions are monitored by the circuit:

• Short-circuit or high current on V

CC

• Removing card during transaction

• VDD dropping

• Overheating.

handbook, full pagewidth

OSC_INT/64

OFF

PRES

V

CC

I/O

CLK

t

10

t

12

When one or more of these faults are detected, the circuit
pulls the interrupt line

OFF to its active LOW state and a
deactivation sequence is initiated. In case the card is
present the interrupt line OFF is set to HIGH when the
microcontroller has reset the CMDVCC line HIGH (after
completion of the deactivation sequence). In case the card
is not present OFF remains LOW.

t

de

t

14

t

13

high - Z

RST

t

11

Fig.12 Emergency deactivation sequence.

MGE740

1997 Nov 04 13

Philips Semiconductors Product specification

IC card interface TDA8002

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134); note 1.

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

DD

V

i(CMOS)

V

i(card)

V

es

T

stg

P

tot

T

amb

T

j

supply voltage −0.3 +6.5 V
voltage on CMOS pins

XTAL1, XTAL2, ALARM,

ALARM,

−0.3 +6.5 V
MODE, RSTIN, CLKSEL, AUX2UC,
AUX1UC, CLKDIV1, CLKDIV2,
CLKOUT, STROBE, CMDVCC and
OFF

voltage on card contact pins

I/O, AUX2,
CLK, RST and V

PRES, PRES, AUX1,

CC

−0.3 +6.5 V

electrostatic handling

on pins I/O, RST, V

, CLK, AUX1,

CC

−6+6kV
AUX2, PRES and PRES

on all other pins −2+2kV

storage temperature −55 +125 °C
continuous total power dissipation

TDA8002T T
TDA8002G T

= −25 to +85 °C − 0.56 W

amb

= −25 to +85 °C − 0.46 W

amb

operating ambient temperature −25 +85 °C
junction temperature − 150 °C

Note

1. Stress beyond these levels may cause permanent damage to the device. This is a stress rating only and functional
operation of the device under this condition is not implied.

HANDLING

Every pin withstands the ESD test according to MIL-STD-883C class 3 for card contacts, class 2 for the remaining.
Method 3015 (HBM 1500 Ω, 100 pF) 3 positive pulses and 3 negative pulses on each pin referenced to ground.

THERMAL CHARACTERISTICS

SYMBOL PARAMETER VALUE UNIT

R

th(j-a)

thermal resistance from junction to ambient in free air

SOT136-1 70 K/W
SOT401-1 91 K/W

1997 Nov 04 14

Philips Semiconductors Product specification

IC card interface TDA8002

CHARACTERISTICS

V

= 5 V; T

DD

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Supply

V

DD

I

DD(sl)

I

DD(idle)

I

DD(active)

V

th2

V

hys2

CARD SUPPLY
V

CC(O)(idle)

V

CC(O)(active)

I

CC(O)

SR slew rate rising or falling slope 0.12 0.17 0.22 V/µs

=25°C; f

amb

positive supply voltage option 5 V power supply

= 10 MHz; unless otherwise specified.

xtal

4.5 5 6.5 V

(TDA8002xx/5)
option 3.3 V or 5 V power

3 5 6.5 V

supply (TDA8002xx/3)
supply current sleep mode; VDD=5V −−200 µA
supply current idle mode; VDD=5V;

f

= 2.5 MHz;

CLK

f

CLKOUT

= 10 MHz

−−6mA

supply current active mode

V

threshold voltage on VDDfor
voltage supervisor

=5V;

DD

f

= 2.5 MHz;

CLK

f

CLKOUT

V
f

CLK

f

CLKOUT

= 3.3 V;

DD

= 2.5 MHz;

=10MHz

=10MHz

falling

option 5 V power supply

−−9mA

−−12 mA

3.9 4.05 4.2 V

(TDA8002xx/5)
option 3.3 V or 5 V power

2.6 2.7 2.8 V

supply (TDA8002xx/3)

rising

option 5 V power supply

4 4.2 4.4 V

(TDA8002xx/5)
option 3.3 or 5 V power

2.7 2.85 2.99 V

supply (TDA8002xx/3)

hysteresis on V

th2

100 150 200 mV

output voltage idle mode −−0.4 V
output voltage active mode

I

< 20 mA: DC load

CC

4.75 − 5.25 V

with 3V<VDD< 3.3 V
I

< 65 mA: DC load

CC

4.75 − 5.25 V

with 3.3 V < VDD< 6.5 V
I

= 40 mA: AC load 4.6 − 5.4 V

CC

output current V

= from 0 to 5 V −−65 mA

CC(O)

V

short-circuited to

CC

−−100 mA

ground

1997 Nov 04 15

Philips Semiconductors Product specification

IC card interface TDA8002

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Crystal connections (XTAL1 and XTAL2)

C

ext

f

xtal

Data lines

G

ENERAL

t

edge

tr, t

f

DATA LINES I/O, AUX1 AND AUX2
V

OH(I/O)

V

OL(I/O)

V

IH(I/O)

V

IL(I/O)

V

I/O(idle)

R

pu

I

edge

I

IL(I/O)

I

IH(I/O)

DATA LINES I/OUC, AUX1UC AND AUX2UC
V

OH(I/OUC)

V

OL(I/OUC)

V

IH(I/OUC)

V

IL(I/OUC)

Z

I/OUC(idle)

external capacitors note 1 − 15 − pF
resonance frequency note 2 2 − 24 MHz

delay between falling edge of

− 200 − ns
I/O, AUX1, AUX2 and I/OUC,
AUX1UC, AUX2UC

delay between falling edge of

− 200 − ns
I/OUC, AUX1UC, AUX2UC and
I/O, AUX1, AUX2

rise and fall times Ci=Co=30pF −−0.5 µs

HIGH-level output voltage on
data lines

LOW-level output voltage on

IOH= −20 µAV
I

= −100 µA 3.5 −−V

OH

I

=1mA −−300 mV

I/O

− 0.5 − VCC+ 0.1 V

CC

data lines
HIGH-level input voltage on data

1.8 − V

CC

V

lines
LOW-level input voltage on data

0 − 0.8 V

lines
voltage on data lines outside a

−−0.4 V
session

internal pull-up resistance
between data lines and V

CC

current from data lines when

81012kΩ

− 1 − mA
active pull-up is active

LOW-level input current on data

VIL= 0.4 V −−−600 µA

lines
HIGH-level input current on data

VIH=V

CC

−−10 µA
lines

HIGH-level output voltage on

IOH= −20 µAV

− 1 − VDD+ 0.2 V

DD

data lines
LOW-level output voltage on

I

=1mA −−300 mV

I/OUC

data lines
HIGH-level input voltage on data

0.7V

DD

− V

DD

V

lines
LOW-level input voltage on data

0 − 0.3V

DD

V

lines
impedance on data lines outside

10 −−MΩ

a session

1997 Nov 04 16

Philips Semiconductors Product specification

IC card interface TDA8002

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

ALARM, ALARM and OFF when connected (open-drain outputs)

I

OH(ALARM)

HIGH-level output current on
pin ALARM

V

OL(ALARM)

LOW-level output voltage on
pin ALARM

I

OH(OFF)

HIGH-level output current on
pin OFF

V

OL(OFF)

I

OL(ALARM)

LOW-level output voltage on

OFF

pin
LOW-level output current on

pin ALARM

V

OH(ALARM)

HIGH-level output voltage on
pin ALARM

t

W

ALARM pulse width 6 − 20 ms

Clock output (CLKOUT; powered from V

f

CLKOUT

V

OL

V

OH

t

, t

r

f

frequency on CLKOUT 0 − 20 MHz

LOW-level output voltage IOL= 1 mA 0 − 0.5 V
HIGH-level output voltage IOH= −1mA VDD− 0.5 −−V
rise and fall times CL= 15 pF; notes 3 and 5 −−8ns

δ duty factor C

Internal oscillator

f

int

frequency of internal oscillator active mode 2.2 2.7 3.2 MHz

DD

V

I

V

I

V

I

)

OH(ALARM)

OL(ALARM)

OH(OFF)

OL(OFF)

OL(ALARM)

OH(ALARM)

=5V −−5µA

=2mA −−0.4 V

=5V −−5µA

=2mA −−0.4 V

=0V −−−5µA

= −2mA VDD− 1 −−V

low power − 16 − kHz

= 15 pF; notes 3 and 5 40 − 60 %

L

sleep mode − 32 − kHz

Card reset output (RST)

V

O(inact)

t

d(RST)

V

OL

V

OH

output voltage inactive modes 0 − 0.3 V
delay between RSTIN and RST RST enabled −−100 ns
LOW-level output voltage IOL= 200 µA0−0.3 V
HIGH-level output voltage IOH= −200 µA 4.3 − V

I

= −50 µAV

OH

− 0.5 − V

CC

CC
CC

V
V

Card clock output (CLK)

V

O(inact)

V

OL

V

OH

t

r

t

f

δ duty factor C

output voltage inactive modes 0 − 0.3 V
LOW-level output voltage IOL= 200 µA0−0.3 V
HIGH-level output voltage IOH= −50 µAV

− 0.5 − V

CC

CC

V
rise time CL= 30 pF; note 3 −−8ns
fall time CL= 30 pF; note 3 −−8ns

= 30 pF; note 3 45 − 55 %

L

SR slew rate (rise and fall) 0.2 −−V/ns

1997 Nov 04 17

Philips Semiconductors Product specification

IC card interface TDA8002

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Strobe input (STROBE)

f

STROBE

V

IL

V

IH

Logic inputs (CLKSEL, CLKDIV1, CLKDIV2, MODE,

V

IL

V

IH

Logic inputs (PRES,

V

IL

V

IH

I

IL(PRES)

I

IH(PRES)

frequency on STROBE 0 − 20 MHz
LOW-level input voltage 0 − 0.3V
HIGH-level input voltage 0.7V

DD

− V

DD

DD

V

V

CMDVCC and RSTIN); note 4

LOW-level input voltage 0 − 0.8 V
HIGH-level input voltage 1.8 − V

DD

V

PRES); note 4
LOW-level input voltage 0 − 0.3V
HIGH-level input voltage 0.7V
LOW-level input current on

VOL=0V −−−10 µA

DD

− V

DD

DD

V
V

pin PRES
HIGH-level input current on

−−10 µA

pin PRES

Protections

T

sd

I

CC(sd)

shut-down local temperature − 135 −°C
shut-down current at V

CC

−−90 mA

Timing

t

act

activation sequence duration see Fig.9; guaranteed by

− 180 220 µs

design

t

de

deactivation sequence duration see Fig.11; guaranteed by

50 70 90 µs

design

t

3

start of the window for sending

see Figs 8 and 9 −−130 µs

CLK to the card

t

5

end of the window for sending

see Fig.8 150 −−µs

CLK to the card

Notes

1. It may be necessary to put capacitors from XTAL1 and XTAL2 to ground depending on the choice of crystal or
resonator.

2. When the oscillator is stopped in mode 1, XTAL1 is set to HIGH.

t

3. The transition time and duty cycle definitions are shown in Fig.13;

δ

=

1

-------------- ­t1t2+

4. PRES and CMDVCC are active LOW; RSTIN and PRES are active HIGH.

5. CLKOUT transition time and duty cycle do not need to be tested.

1997 Nov 04 18

Philips Semiconductors Product specification

IC card interface TDA8002

handbook, full pagewidth

10%

t

f

t

2

t

r

90% 90%

10%

t

1

Fig.13 Definition of transition times.

V

OH

1/2 V

V

OL

MGE741

CC

1997 Nov 04 19

Philips Semiconductors Product specification

IC card interface TDA8002

APPLICATION INFORMATION

handbook, full pagewidth

33 pF 33 pF

f = 14.75 MHz

+5 V

CARD READ LM01

C5I

C1I

C6I

C2I

C7I

C3I

C8I

C4I

K1
K2

100

nF

MODE

OFF

RSTIN

CMDVCC

V

CC

RST
CLK

AUX1

PRES

AUX2

I/O

VUP

S1

V

DDA

100

nF

28
27
26
25
24
23

22

TDA8002A

21

20
19
18
17
16
15 14

1
2
3
4
5
6
7
8

9
10
11
12
13

XTAL1
XTAL2
I/OUC
AUX1UC
AUX2UC
ALARM
CLKSEL
CLKDIV1
CLKDIV2
STROBE
CLKOUT
DGND1
AGND
S2

100

nF

100

nF

µF

P1-0

P1-1
P1-2
P1-3
P1-4
P1-5
P1-6
P1-7
RST
P3-0

P3-1
P3-2
P3-3
P3-4
P3-5
P3-6
P3-7

XTAL2
XTAL1

10

V

80C51

SS

V

CC
P0-0
P0-1
P0-2
P0-3
P0-4
P0-5
P0-6
P0-7
EA
ALE
PSEN
P2-7
P2-6
P2-5
P2-4
P2-3
P2-2
P2-1
P2-0

MGE742

Fig.14 Application diagram (for more details, consult “

1997 Nov 04 20

Application Note AN96096

”).

Philips Semiconductors Product specification

IC card interface TDA8002

PACKAGE OUTLINES

SO28: plastic small outline package; 28 leads; body width 7.5 mm

D

c

y

Z

28

pin 1 index

1

e

15

14

w M

b

p

SOT136-1

E

H

E

Q

A

2

A

1

L

p

L

detail X

(A )

A

X

v M

A

A

3

θ

0 5 10 mm

scale

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

mm

OUTLINE
VERSION

SOT136-1

A

max.

2.65

0.10

A

1

0.30

0.10

0.012

0.004

A

A3b

2

2.45

0.25

2.25

0.096

0.01

0.089

IEC JEDEC EIAJ

075E06 MS-013AE

0.49

0.36

0.019

0.014

p

0.32

0.23

0.013

0.009

UNIT

inches

Note

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

(1)E(1) (1)

cD

18.1

7.6

7.4

0.30

0.29

1.27

0.050

17.7

0.71

0.69

REFERENCES

1997 Nov 04 21

eHELLpQ

10.65

10.00

0.419

0.394

1.4

0.055

1.1

0.4

0.043

0.016

1.1

1.0

0.043

0.039

PROJECTION

0.25

0.25 0.1

0.01

0.01

EUROPEAN

ywv θ

Z

0.9

0.4

8

0.004

ISSUE DATE

0.035

0.016

95-01-24
97-05-22

0

o
o

Philips Semiconductors Product specification

IC card interface TDA8002

LQFP32: plastic low profile quad flat package; 32 leads; body 5 x 5 x 1.4 mm

c

y

X

A

H

E

E

A

2

A

A

25

32

24

17

Z

16

E

e

pin 1 index

9

1

8

w M

b

p

SOT401-1

(A )

1

L

L

detail X

3

θ

p

Z

e

w M

b

p

D

H

D

D

B

v M

v M

0 2.5 5 mm

scale

DIMENSIONS (mm are the original dimensions)

UNIT

mm

A

max.

1.60

A

1A2A3bp

0.15

1.5

1.3

0.25

0.05

cE

0.27

0.18

0.17

0.12

(1)

(1) (1)(1)

D

5.1

4.9

eH

0.5

7.15

6.85

5.1

4.9

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

OUTLINE

VERSION

IEC JEDEC EIAJ

REFERENCES

SOT401-1

1997 Nov 04 22

A

B

E

7.15

6.85

LL

p

0.75

1.0

0.45

0.2

0.12 0.1

H

D

EUROPEAN

PROJECTION

Z

0.95

0.55

D

Zywv θ

E

0.95

0.55

o

7

o

0

ISSUE DATE

95-12-19
97-08-04

Philips Semiconductors Product specification

IC card interface TDA8002

SOLDERING
Introduction

There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.

This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our

“IC Package Databook”

Reflow soldering

Reflow soldering techniques are suitable for all LQFP and
SO packages.

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.

Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 50 and 300 seconds depending on heating
method. Typical reflow peak temperatures range from
215 to 250 °C.

(order code 9398 652 90011).

If wave soldering cannot be avoided, for LQFP
packages with a pitch (e) larger than 0.5 mm, the
following conditions must be observed:

• A double-wave (a turbulent wave with high upward

pressure followed by a smooth laminar wave)
soldering technique should be used.

• The footprint must be at an angle of 45° to the board

direction and must incorporate solder thieves
downstream and at the side corners.

SO
Wave soldering techniques can be used for all SO

packages if the following conditions are observed:

• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.

• The longitudinal axis of the package footprint must be
parallel to the solder flow.

• The package footprint must incorporate solder thieves at
the downstream end.

M

ETHOD (LQFP AND SO)

During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Wave soldering

LQFP
Wave soldering is not recommended for LQFP packages.

This is because of the likelihood of solder bridging due to
closely-spaced leads and the possibility of incomplete
solder penetration in multi-lead devices.

CAUTION

Wave soldering is NOT applicable for all LQFP
packages with a pitch (e) equal or less than 0.5 mm.

1997 Nov 04 23

Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.

A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

Repairing soldered joints

Fix the component by first soldering two diagonally­opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.

Philips Semiconductors Product specification

IC card interface TDA8002

DEFINITIONS

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

1997 Nov 04 24

Philips Semiconductors Product specification

IC card interface TDA8002

NOTES

1997 Nov 04 25

Philips Semiconductors Product specification

IC card interface TDA8002

NOTES

1997 Nov 04 26

Philips Semiconductors Product specification

IC card interface TDA8002

NOTES

1997 Nov 04 27

Philips Semiconductors – a worldwide company

Argentina: see South America
Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,

Tel. [phone], Fax. [phone]
Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. [phone],

Fax. [phone]
Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6,

220050 MINSK, Tel. [phone], Fax. [phone]

Belgium: see The Netherlands
Brazil: seeSouth America
Bulgaria: Philips Bulgaria Ltd., Energoproject, 15thfloor,

51 James Bourchier Blvd., 1407 SOFIA,
Tel. [phone], Fax. [phone]

Canada: PHILIPS SEMICONDUCTORS/COMPONENTS,
Tel. [phone]

China/Hong Kong: 501 Hong Kong Industrial Technology Centre,
72 Tat Chee Avenue, Kowloon Tong, HONG KONG,
Tel. [phone], Fax. [phone]

Colombia: see South America
Czech Republic: see Austria
Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S,

Tel. [phone], Fax. [phone]
Finland: Sinikalliontie 3, FIN-02630 ESPOO,

Tel. [phone], Fax. [phone]
France: 4 Rue du Port-aux-Vins, BP317, 92156 SURESNES Cedex,

Tel. [phone], Fax. [phone]
Germany: Hammerbrookstraße 69, D-20097 HAMBURG,

Tel. [phone], Fax. [phone]
Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS,

Tel. [phone], Fax. [phone]

Hungary: seeAustria
India: Philips INDIA Ltd, Band Box Building, 2nd floor,

254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025,
Tel. [phone], Fax. [phone]

Indonesia: see Singapore
Ireland: Newstead, Clonskeagh, DUBLIN 14,

Tel. [phone], Fax. [phone]
Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053,

TEL AVIV 61180, Tel. [phone], Fax. [phone]
Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3,

20124 MILANO, Tel. [phone], Fax. [phone]
Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108,

Tel. [phone], Fax. [phone]
Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,

Tel. [phone], Fax. [phone]
Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,

Tel. [phone], Fax. [phone]
Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,

Tel. [phone]

Middle East: see Italy

Netherlands: Postbus 90050, 5600PB EINDHOVEN, Bldg. VB,

Tel. [phone], Fax. [phone]
New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,

Tel. [phone], Fax. [phone]
Norway: Box 1, Manglerud 0612, OSLO,

Tel. [phone], Fax. [phone]
Philippines: Philips Semiconductors Philippines Inc.,

106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. [phone], Fax. [phone]

Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA,
Tel. [phone], Fax. [phone]

Portugal: see Spain
Romania: see Italy
Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,

Tel. [phone], Fax. [phone]
Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231,

Tel. [phone], Fax. [phone]

Slovakia: see Austria
Slovenia: see Italy
South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,

2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000,
Tel. [phone], Fax. [phone]

South America: Rua do Rocio 220, 5th floor, Suite 51,
04552-903 São Paulo, SÃO PAULO - SP, Brazil,
Tel. [phone], Fax. [phone]

Spain: Balmes 22, 08007 BARCELONA,
Tel. [phone], Fax. [phone]

Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,
Tel. [phone], Fax. [phone]

Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. [phone], Fax. [phone]

Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,
TAIPEI, Taiwan Tel. [phone], Fax. [phone]

Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,
Tel. [phone], Fax. [phone]

Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,
Tel. [phone], Fax. [phone]

Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. [phone], Fax. [phone]

United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. [phone], Fax. [phone]

United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. [phone]

Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,

Tel. [phone], Fax.[phone]

For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications,
Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. [phone]

© Philips Electronics N.V. 1997 SCA55
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.

Internet: http://www.semiconductors.philips.com

Printed in The Netherlands 547047/1200/03/pp28 Date of release: 1997Nov 04 Document order number: 9397 750 02454