Datasheet TDA8002CG-C1, TDA8002CT-C-C1, TDA8002CT-B-C1, TDA8002CT-A-C1 Datasheet (Philips)

INTEGRATED CIRCUITS

DATA SH EET

TDA8002C

IC card interface

Product specification
Supersedes data of 1999 Feb 24
File under Integrated Circuits, IC02

1999 Oct 12

Philips Semiconductors Product specification

IC card interface TDA8002C

FEATURES

• Single supply voltageinterface(3.3 or 5 V environment)

• Low-power sleep mode

• Three specific protected half-duplex bidirectional

buffered I/O lines

• VCC regulation 5 V ±5% or 3 V ±5%, ICC<55mAfor
VDD= 3.0 to 6.5 V, with controlled rise and fall times

• Thermal and short-circuit protections with current
limitations

• Automatic ISO 7816 activation and deactivation
sequences

• Enhanced ESD protections on card side (>6 kV)

• Clock generation for the card up to 12 MHz with

synchronous frequency changes

• Clock generation up to 20 MHz (external clock)

• Synchronous and asynchronous cards (memory and

smart cards)

• ISO 7816, GSM11.11 compatibility and EMV
(Europay, MasterCard and Visa) compliant

• Step-up converter for VCC generation

• Supplysupervisor for spikes eliminationand emergency

deactivation

• Chip select input for easy use of several TDA8002Cs in
parallel.

APPLICATIONS

IC card readers for:

• GSM applications

• Banking

• Electronic payment

• Identification

• Pay TV

• Road tolling.

GENERAL DESCRIPTION

The TDA8002C is a complete low-power analog interface
forasynchronous and synchronous cards.Itcan be placed
between the card and the microcontroller. It performs all
supply, protection and control functions. It is directly
compatible with ISO 7816, GSM11.11 and EMV
specifications.

ORDERING INFORMATION

TYPE NUMBER

TDA8002CT/A/C1 TDA8002CT/A SO28 plastic small outline package; 28 leads; body width
TDA8002CT/B/C1 TDA8002CT/B
TDA8002CT/C/C1 TDA8002CT/C
TDA8002CG/C1 TDA8002C LQFP32 plastic low profile quad flat package; 32 leads;

MARKING NAME DESCRIPTION VERSION

7.5 mm

body 5 × 5 × 1.4 mm

PACKAGE

SOT136-1

SOT401-1

1999 Oct 12 2

Philips Semiconductors Product specification

IC card interface TDA8002C

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Supplies

V

DD

I

DD(lp)

I

DD(idle)

I

DD(active)

Card supply

V

CC(O)

General

f

CLK

t

de

P

tot

T

amb

supply voltage 3.0 − 6.5 V
supply current low-power −−150 µA
supply current Idle mode; f

CLKOUT

supply current active mode; V

f

CLKOUT

=10MHz

= LOW; ICC= 100 µA −−8mA

f

CLK

f

= 5 MHz; ICC=10mA −−50 mA

CLK

f

= 5 MHz; ICC=55mA −−140 mA

CLK

active mode; V
f

CLKOUT

=10MHz

f

= LOW; ICC= 100 µA −−8mA

CLK

f

= 5 MHz; ICC=10mA −−50 mA

CLK

f

= 5 MHz; ICC=55mA −−140 mA

CLK

= 10 MHz −−5mA

=5V;

CC(O)

=3V;

CC(O)

output voltage active mode for VCC=5V

I

< 55 mA; DC load 4.6 − 5.4 V

CC

= 40 nAs; AC load 4.6 − 5.4 V

I

CC

active mode for V

I

< 55 mA; DC load 2.76 − 3.24 V

CC

= 40 nAs; AC load 2.76 − 3.24 V

I

CC

CC

=3V

card clock frequency 0 − 12 MHz
deactivation sequence duration 60 80 100 µs
continuous total power dissipation

TDA8002CT/x T
TDA8002CG T

= −25 to +85 °C −−0.56 W

amb

= −25 to +85 °C −−0.46 W

amb

ambient temperature −25 − +85 °C

1999 Oct 12 3

Philips Semiconductors Product specification

IC card interface TDA8002C

BLOCK DIAGRAM

handbook, full pagewidth

ALARM

CS

OFF

RSTIN

CMDVCC

MODE
CV/TV

CLKDIV1

CLKDIV2

CLKSEL

STROBE

V

DDD

100 nF

28

SUPPLY

INTERNAL

4

3

26

25
24
27
19

6
7
5

8

REFERENCE

VOLTAGE SENSE

ALARM

LATCH

CLOCK

CIRCUITRY

V

V

ref

SEQUENCER

DDA

S1 S2
14 12

2.5 MHz

EN2

PV

CC

EN5

EN4

470 nF

GENERATOR

100 nF

13

STEP-UP CONVERTER

INTERNAL OSCILLATOR

EN1 CLKUP

V

CC

RST

BUFFER

CLOCK

BUFFER

AGND

11

VUP

15

470 nF

V

100

nF

CC

23

100

nF

22

21

18

RST

CLK

PRES

CLKOUT

XTAL1

XTAL2

AUX1UC

9

CLK

30
31

1

OSCILLATOR

EN3

TDA8002CG

AUX2UC

I/OUC

2

32

10

DGND1

29

DGND2

Fig.1 Block diagram.

1999 Oct 12 4

THERMAL

PROTECTION

TRANSCEIVER

TRANSCEIVER

TRANSCEIVER

I/O

I/O

I/O

20

17

16

FCE246

AUX1

AUX2

I/O

Philips Semiconductors Product specification

IC card interface TDA8002C

PINNING

PIN

SYMBOL

TYPE

CT/A

TYPE

CT/B

TYPE

CT/C

TYPE

CG

XTAL1 1 1 1 30 I crystal connection or input for external clock
XTAL2 2 2 2 31 O crystal connection
I/OUC 3 3 3 32 I/O data I/O line to and from microcontroller
AUX1UC 4441I/Oauxiliary line 1 to and from microcontroller for synchronous

AUX2UC 5 −−2 I/O auxiliary line 2 to and from microcontroller for synchronous

CS − 5 5 3 I chip select control input for enabling pins I/OUC, AUX1UC,

ALARM 6664Oopen drain PMOS reset output for microcontroller (active

CLKSEL 7775Icontrol input signal for CLK (LOW = XTAL oscillator;

CLKDIV1 8886Icontrol input with CLKDIV2 for choosing CLK frequency
CLKDIV2 9997Icontrol input with CLKDIV1 for choosing CLK frequency
STROBE 10 10 10 8 I external clock input for synchronous applications
CLKOUT 11 11 11 9 O clock output (see Table 1)
DGND1 12 12 12 10 supply digital ground 1
AGND 13 13 13 11 supply analog ground
S2 14 14 14 12 I/O capacitance connection for voltage doubler
V

DDA

15 15 15 13 supply analog supply voltage
S1 16 16 16 14 I/O capacitance connection for voltage doubler
VUP 17 17 17 15 I/O output of voltage doubler
I/O 18 18 18 16 I/O data I/O line to and from card
AUX2 19 −−17 I/O auxiliary I/O line to and from card
PRES 20 19 19 18 I card input presence contact (active LOW)
PRES − 20 −−I active HIGH card input presence contact
CV/

TV −−20 19 I card voltage selection input line (high = 5 V, low = 3 V); note 1
AUX1 21 21 21 20 I/O auxiliary I/O line to and from card
CLK 22 22 22 21 O clock to card output (C3I) (see Table 1)
RST 23 23 23 22 O card reset output (C2I)
V

CC

24 24 24 23 O supply for card (C1I)

CMDVCC 25 25 25 24 I start activation sequence input from microcontroller (active

RSTIN 26 26 26 25 I card reset input from microcontroller
OFF 27 27 27 26 O open-drain NMOS interrupt output to microcontroller (active

I/O DESCRIPTION

applications

applications

AUX2UC, CLKSEL, CLKDIV1, CLKDIV2, STROBE, CV/
CMDVCC, RSTIN, OFF and MODE; note 1

HIGH)

HIGH = STROBE input)

LOW)

LOW)

TV,

1999 Oct 12 5

Philips Semiconductors Product specification

IC card interface TDA8002C

PIN

SYMBOL

TYPE

CT/A

TYPE

CT/B

TYPE

CT/C

TYPE

CG

MODE 28 28 28 27 I operating mode selection input (HIGH = normal; LOW = sleep)
V

DDD

−−−28 supply digital supply voltage

DGND2 −−−29 supply digital ground 2

Note

1. A pull-up resistor of 100 kΩ connected to VDD is integrated.

I/O DESCRIPTION

handbook, halfpage

AUX1UC
AUX2UC

CLKSEL
CLKDIV1
CLKDIV2

STROBE
CLKOUT

Fig.2 Pin configuration (TDA8002CT/A).

XTAL1
XTAL2

I/OUC

ALARM

DGND1

AGND

S2

1
2
3
4
5
6
7

TDA8002CT/A

8

9
10
11
12
13

FCE247

28
27
26
25
24
23
22
21
20
19
18
17
16
1514

MODE
OFF
RSTIN
CMDVCC
V

CC

RST
CLK
AUX1
PRES
AUX2
I/O
VUP
S1
V

DDA

handbook, halfpage

AUX1UC

CLKSEL
CLKDIV1
CLKDIV2
STROBE

CLKOUT

Fig.3 Pin configuration (TDA8002CT/B).

XTAL1
XTAL2

I/OUC

CS

ALARM

DGND1

AGND

S2

1
2
3
4
5
6
7

TDA8002CT/B

8

9
10
11
12
13

FCE248

28
27
26
25
24
23
22
21
20
19
18
17
16
1514

MODE
OFF
RSTIN
CMDVCC
V

CC

RST
CLK
AUX1
PRES
PRES
I/O
VUP
S1
V

DDA

1999 Oct 12 6

Philips Semiconductors Product specification

IC card interface TDA8002C

handbook, halfpage

AUX1UC

CLKSEL
CLKDIV1
CLKDIV2

STROBE
CLKOUT

Fig.4 Pin configuration (TDA8002CT/C).

Fig.4 Pin configuration (TDA8002CT/C).

XTAL1
XTAL2

I/OUC

CS

ALARM

DGND1

AGND

S2

1
2
3
4
5
6
7

TDA8002CT/C

8

9
10
11
12
13

FCE249

28
27
26
25
24
23
22
21
20
19
18
17
16
1514

MODE
OFF
RSTIN
CMDVCC
V

CC

RST
CLK
AUX1
CV/TV
PRES
I/O
VUP
S1
V

DDA

handbook, full pagewidth

AUX1UC
AUX2UC

CS

ALARM

CLKSEL
CLKDIV1
CLKDIV2

STROBE

XTAL2

I/OUC
32

1
2
3
4

XTAL1

31

30

V

DGND2
29

DDD

28

MODE

27

OFF
26

TDA8002CG

5
6
7
8

9

CLKOUT

10

DGND1

11

AGND

12
S2

13

DDA

V

14
S1

15

VUP

Fig.5 Pin configuration (TDA8002CG).

RSTIN

25

16

I/O

24
23
22
21
20
19
18
17

FCE250

CMDVCC
V

CC

RST
CLK
AUX1
CV/TV
PRES
AUX2

1999 Oct 12 7

Philips Semiconductors Product specification

IC card interface TDA8002C

FUNCTIONAL DESCRIPTION
Power supply

The supply pins for the chip are V
DGND1 and DGND2. V

DDA

and V

, V

DDA

DDD

, AGND,

DDD

(i.e. VDD) should be
in the range of 3.0 to 6.5 V. All card contacts remain
inactive during power-up or power-down.

On power-up, the logic is reset by an internal signal.
The sequencer is not activated until VDD reaches
V

th2+Vhys2

(see Fig.6). When VDD falls below V

th2

, an
automatic deactivation sequence of the contacts is
performed.

Chip selection

The chip select pin (CS) allows the use of several
TDA8002Cs in parallel.

When CS is HIGH, the pins RSTN, CMDVCC, MODE,
CV/TV, CLKDIV1, CLKDIV2, CLKSEL and STROBE
control the chip, pins I/OUC, AUX1UC and AUX2UC are
the copy of I/O, AUX1 and AUX2 when enabled (with
integrated 20 kΩ pull-up resistors connected to VDD) and
OFF is enabled.

When CS goes LOW, the levels on pins RSTIN,
CMDVCC, MODE, CV/TV, CLKDIV1, CLKDIV2 and
STROBE are internally latched, I/OUC, AUX1UC and
AUX2UC go to high-impedance with respect to I/O, AUX1
and AUX2 (with integrated 100 kΩ pull-up resistors
connected to VDD) and OFF is high-impedance.

Clock circuitry

The TDA8002C supports both synchronous and
asynchronouscards. There arethree methods to clockthe
circuitry:

• Apply a clock signal to pin STROBE

• Use of an internal RC oscillator

• Use of a quartz oscillator which should be connected

between pins XTAL1 and XTAL2 or an external clock
applied on XTAL1.

When CLKSEL is HIGH, the clock should be applied to the
STROBE pin. When CLKSEL is LOW, the internal
oscillators is used.

When an internal clock is used, the clock output is
availableon pin CLKOUT.The RC oscillator is selectedby
making CLKDIV1 HIGH and CLKDIV2 LOW. The clock
output to the card is available on pin CLK. The frequency
of the card clock can be the input frequency divided by
2 or 4, STOP low or 1.25 MHz, depending onthe states of
CLKDIV1 or CLKDIV2 (see Table 1).

When STROBE is used for entering the clock to a
synchronous card, STROBE should remain stable during
activation sequence otherwise the first pulse may be
omitted.

Do not change CLKSEL during activation. When in
low-power (sleep) mode, the internal oscillator frequency
which is available on pin CLKOUT is lowered to
approximately 16 kHz for power economy purposes.

Supply voltage supervisor (VDD)

This block surveys the V

supply. A defined retriggerable

DD

pulse of 10 ms minimum (tW) is delivered on the ALARM
output during power-up or power-down of VDD(see Fig.6).
This signal is also used for eliminating the spikes on card
contacts during power-up or power-down.

When VDD reaches V

th2+Vhys2

, an internal delay (tW) is
started. The ALARM output is active until this delay has
expired. When VDD falls below V

, ALARM is activated

th2

and a deactivation sequence of the contacts is performed.

1999 Oct 12 8

Philips Semiconductors Product specification

IC card interface TDA8002C

handbook, full pagewidth

V

+ V

th2

V

DD

hys2

V

th2

handbook, full pagewidth

OFF, I/OUC
AUX1UC, AUX2UC

ALARM

t

W

t

W

FCE272

Fig.6 ALARM as a function of VDD (tWpulse width minimum of 10 ms).

CS

t

SL

CS

INPUTS

t

t

IS

SI

Fig.7 Chip select.

1999 Oct 12 9

t

DZ

t

t

ID

DI

FCE245

Philips Semiconductors Product specification

IC card interface TDA8002C

Table 1 Clock circuitry definition

MODE CLKSEL CLKDIV1 CLKDIV2

HIGH LOW HIGH LOW
HIGH LOW LOW LOW
HIGH LOW LOW HIGH

FREQUENCYOF

CLK

1

⁄2f

int

1

⁄4f

xtal

1

⁄2f

xtal

HIGH LOW HIGH HIGH STOP low f
HIGH HIGH X

LOW

(2)

(1)

X

(1)
(1)

X

(1)

X

(1)

X

STROBE f

STOP low

Notes

1. X = don’t care.

2. In low-power mode.

3. f

= 32 kHz in low-power mode.

int

I/O circuitry

The three I/O transceiversare identical. The state isHIGH
forall I/O pins (i.e. I/O,I/OUC, AUX1, AUX1UC, AUX2 and
AUX2UC). Pin I/O is referenced to VCC and pin I/OUC to
VDD, thus ensuring proper operation in the event that
VCC≠ VDD.

The first side on which a falling edge is detected becomes
a master (input). An anti-latch circuitry first disables the
detection of the falling edge on the other side, which
becomes slave (output), see Fig.8.

In the event of a conflict, both lines may remain LOW until
the software enables the lines to be HIGH. The anti-latch
circuitry ensures that the lines do not remain LOW if both
sides return HIGH, regardless of the prior conditions.
The maximum frequency on the lines is approximately
200 kHz.

When CS is HIGH, I/OUC, AUX1UC and AUX2UC are
internally pulled-up to VDD with 20 kΩ resistors. When
CS is LOW, I/OUC, AUX1UC and AUX2UC are
permanently HIGH (with integrated 100 kΩ pull-up

resistors connected to VDD).
After a delay time td (between 50 and 400 ns), the logic 0
present on the master sideis transferred on the slave side.

FREQUENCYOF

CLKOUT

1

⁄2f

int

f

xtal

f

xtal
xtal
xtal

(3)

1

⁄2f

int

When the input is back to HIGH level, a current booster is
turned on during the delay td on the output side and then
both sides are back to their idle state, ready to detect the
next logic 0 on any side.

handbook, full pagewidth

I/O

I/OUC

t

d

t

d

Fig.8 Master and slave signals.

1999 Oct 12 10

t

d

conflict idle

MGD703

Philips Semiconductors Product specification

IC card interface TDA8002C

Logic circuitry

After power-up, the circuit has six possible states of
operation. Figure 9 shows the state diagram.

IDLE MODE
After reset, the circuit enters the idle mode. A minimum

number of functions in the circuit are active while waiting
for the microcontroller to start a session:

• All card contacts are inactive

• I/OUC, AUX1UC and AUX2UC are high-impedance

• Oscillator (XTAL) runs, delivering CLKOUT

• Voltage supervisor is active.

LOW-POWER MODE
When pin MODE goes LOW, the circuit enters the

low-power (sleep) mode. As long as pin MODE is LOW no
activation is possible.

If pin MODE goes LOW in the active mode, a normal

deactivation sequence is performed before entering the

low-power mode. When pin MODE goes HIGH, the circuit

enters the normal operating mode after a delay of at least

6 ms (96 cycles of CLKOUT). During this time the

CLKOUT remains at 16 kHz.

• All card contacts are inactive

• Oscillator (XTAL) does not operate

• The VDD supervisor, ALARM output, card presence

detection and OFF output remain functional

• Internal oscillator is slowed to 32 kHz, providing 16 kHz
on CLKOUT.

ACTIVE MODE
When the activation sequence is completed, the

TDA8002C will be in the active mode. Data is exchanged
between the card and the microcontroller via the I/O lines.

handbook, full pagewidth

POWER

OFF

LOW-POWER

MODE

ACTIVATION

IDLE

MODE

FAULT

DEACTIVATION

Fig.9 State diagram.

ACTIVE

MODE

MGE735

1999 Oct 12 11

Philips Semiconductors Product specification

IC card interface TDA8002C

ACTIVATION SEQUENCE
From Idle mode, the circuit enters the activation mode

when the microcontroller sets the CMDVCC line LOW or
sets the MODE line HIGH when the CMDVCC line is
already LOW. The internal circuitry is then activated, the
internal clock is activated and an activation sequence is
executed. When RST is enabledit becomes the inverse of
RSTIN.

Figures 10 to 12 illustrate the activation sequence as
follows:

1. Step-up converter is started (t1≈ t0)

handbook, full pagewidth

OSC_INT/64

t

act

CMDVCC

VUP

V

CC

I/O

t

0

t

1

t

2

LOW

t

3

2. VCCrises from 0 to 3 or 5 V (t2=t1+11⁄2T)(according

to the state on pin CV/TV)

3. I/O, AUX1 and AUX2 areenabled and CLKis enabled

(t3=t1+ 4T); I/O, AUX1 and AUX2 were forced LOW
until this time

4. CLK is set by setting RSTIN to HIGH (t4)

5. RST is enabled (t5=t1+ 7T); after t5, RSTIN has no

further action on CLK, but is only controlling RST.

The value of VCC (5 or 3 V) must be selected by the level
on pin CV/TV before the activation sequence.

T = 25 µs

t

5

CLK

RSTIN

RST

t

4

Fig.10 Activation sequence using RSTIN and CMDVCC.

FCE273

1999 Oct 12 12

Philips Semiconductors Product specification

IC card interface TDA8002C

handbook, full pagewidth

OSC_INT/64

t

CLKDIV1

CLKDIV2

act

CMDVCC

VUP

V

CC

I/O

CLK

RSTIN

RST

Fig.11 Activation sequence using CMDVCC, CLKDIV1 and CLKDIV2 signals to enable CLK.

handbook, full pagewidth

CMDVCC

V

CC

t

0

t

1

t

2

LOW

t

3

FCE274

I/O

AUX1UC

AUX1

RSTIN

t

RST

STROBE

CLK

act

Fig.12 Activation sequence for synchronous application.

1999 Oct 12 13

FCE251

Philips Semiconductors Product specification

IC card interface TDA8002C

DEACTIVATION SEQUENCE
When a session is completed, the microcontroller sets the

CMDVCC line to HIGH state or MODE line to LOW state.
The circuit then executes an automatic deactivation
sequence by counting the sequencer down and thus end
in the Idle mode.

Figures 13 and 14 illustrate the deactivation sequence as
follows:

handbook, full pagewidth

OSC_INT/64

t

CMDVCC

VUP

V

CC

I/O

CLK

10

t

t

13

t

LOW

12

1. RST goes LOW (t11≈ t10)

2. CLK is stopped (t12=t11+1⁄2T)

3. I/O, AUX1 and AUX2 fall to zero (t13=t11+T)

4. VCC falls to zero (t14=t11+11⁄2T); a special circuit

ensures that I/O remains below VCCduring the falling
slope of V

CC

5. VUP falls (t15=t11+ 5T).

t

de

t

15

14

RSTIN

RST

t

11

Fig.13 Deactivation sequence

FCE479

1999 Oct 12 14

Philips Semiconductors Product specification

IC card interface TDA8002C

Fault detection

The following fault conditions are monitored by the circuit:

• Short-circuit or high current on V

CC

• Removing card during transaction

• VDD dropping

• Overheating.

handbook, full pagewidth

OSC_INT/64

OFF

PRES

V

CC

I/O

CLK

t

10

t

12

When one or more of these faults are detected, the circuit
pulls the interrupt line OFF to its active LOW state and a
deactivation sequence is initiated. In the event that the
card is present the interrupt line OFF is set to HIGH state
when the microcontroller has reset the CMDVCC line
HIGH (after completion of the deactivation sequence).
In the event that the card is not present OFF remains
LOW.

t

de

t

14

t

13

LOW

RST

t

11

Fig.14 Emergency deactivation sequence.

FCE480

1999 Oct 12 15

Philips Semiconductors Product specification

IC card interface TDA8002C

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134); note 1.

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

DDD

V

DDA

V

CC

V

i(card)

V

es

T

stg

P

tot

T

amb

T

j

digital supply voltage −0.3 +6.5 V
analog supply voltage −0.3 +6.5 V
card supply voltage pins;

−0.3 +6.5 V
XTAL1, XTAL2, ALARM, CS, MODE,
RSTIN, CLKSEL, AUX2UC,AUX1UC,
CLKDIV1, CLKDIV2, CLKOUT,
STROBE, CMDVCC, CV/TV and OFF

input voltage on card contact pins;

−0.3 +6.5 V
I/O, AUX2,PRES, PRES, AUX1,CLK,
RST and V

CC

electrostatic handling voltage

on pins I/O, AUX2,
AUX1, CLK, RST and V

PRES, PRES,

CC

−6+6kV

on all other pins −2+2kV
storage temperature −55 +125 °C
continuous total power dissipation

TDA8002CT/x T

TDA8002CG T

= −25 to +85 °C − 0.56 W

amb

= −25 to +85 °C − 0.46 W

amb

ambient temperature −25 +85 °C
junction temperature − 150 °C

Note

1. Stress beyond these levels may cause permanent damage to the device. This is a stress rating only and functional
operation of the device under this condition is not implied.

HANDLING

Every pin withstands the ESD test according to MIL-STD-883C class 3 for card contacts, class 2 for the remaining.
Method 3015 (HBM 1500 Ω, 100 pF) 3 positive pulses and 3 negative pulses on each pin with respect to ground.

THERMAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS VALUE UNIT

R

th(j-a)

thermal resistance from junction to ambient in free air

SOT136-1 70 K/W
SOT401-1 91 K/W

1999 Oct 12 16

Philips Semiconductors Product specification

IC card interface TDA8002C

CHARACTERISTICS

VDD= 3.3 V; T

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Supplies

V

DD

I

DD(lp)

I

DD(idle)

I

DD(active)

V

th2

V

hys2

Card supply

V

CC(O)

I

CC(O)

SR slew rate rising or falling slope 0.10 0.15 0.20 V/µs

Crystal connections (XTAL1 and XTAL2)

C

ext

f

xtal

=25°C; f

amb

= 10 MHz; unless otherwise specified.

xtal

supply voltage 3 − 6.5 V
supply current low-power mode −−150 µA
supply current Idle mode; f

CLKOUT

supply current active mode; V

f

CLKOUT

=10MHz

f

= LOW; ICC= 100 µA −−8mA

CLK

f

= 5 MHz; ICC=10mA −−50 mA

CLK

= 5 MHz; ICC=55mA −−140 mA

f

CLK

active mode; V

threshold voltage on VDDfor

f

CLKOUT

falling 2.2 − 2.4 V

=10MHz

f

= LOW; ICC= 100 µA −−8mA

CLK

f

= 5 MHz; ICC=10mA −−50 mA

CLK

f

= 5 MHz; ICC=55mA −−140 mA

CLK

= 10 MHz −−5mA

=5V;

CC(O)

=3V;

CC(O)

voltage supervisor
hysteresis on V

th2

50 100 150 mV

output voltage Idle mode −−0.3 V

active mode

VCC=5V;ICC< 55 mA;

4.6 − 5.4 V

DC load
I

= 40 nAs; AC load 4.6 − 5.4 V

CC

V

= 3 V; ICC< 55 mA;

CC

2.76 − 3.24 V

DC load

= 24 nAs; AC load 2.76 − 3.24 V

I

CC

output current V

= from 0 to 5 or 3 V −−55 mA

CC(O)

V

short-circuited to ground − 200 − mA

CC

external capacitors note 1 − 15 − pF
resonance frequency note 2 2 − 24 MHz

1999 Oct 12 17

Philips Semiconductors Product specification

IC card interface TDA8002C

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Data lines

GENERAL
t

d(edge)

t

, t

r

f

f

I/O(max)

DATA LINES I/O, AUX1 AND AUX2 (WITH 10 KΩ PULL-UP RESISTOR CONNECTED TO VCC)
V

o

V

OH

V

OL

V

IH

V

IL

V

idle

R

pu

I

edge

I

IL

I

IH

DATA LINES I/OUC, AUX1UC AND AUX2UC (WITH 20 KΩ PULL-UP RESISTOR CONNECTED TO V
100 KΩ WHEN CS IS LOW)

V

OH

V

OL

V

IH

V

IL

Z

idle

ALARM and OFF when connected (open-drain outputs)

I

OH(OFF)

delay between falling edge

−−1 µs
of I/O, AUX1, AUX2, I/OUC,
AUX1UC and AUX2UC

rise and fall times Ci=Co=30pF −−0.5 µs
maximum frequency on

−−200 kHz
data lines

output voltage Idle and low-power modes 0 − 0.3 V
HIGH-level output voltage

IOH= −20 µA 0.8V

CC

− V

CC

V

on data lines
LOW-leveloutput voltage on

I

=1mA −−0.4 V

I/O

data lines
HIGH-level input voltage on

0.6V

CC

− V

CC

V

data lines
LOW-level input voltage on

0 − 0.5 V

data lines
voltage on data lines

−−0.4 V
outside a session

internal pull-up resistance
between data lines and V

current from data lines

CC

81012kΩ

− 1 − mA
when active pull-up is active

LOW-level input current on

VIL= 0.4 V −−−600 µA

data lines
HIGH-level input current on

VIH=V

CC

−−10 µA
data lines

WHEN CS IS HIGH AND

DD

HIGH-level output voltage

IOH= −20 µAV

− 1 − VDD+ 0.2 V

DD

on data lines
LOW-leveloutput voltage on

I

=1mA −−0.4 V

I/OUC

data lines
HIGH-level input voltage on

0.7V

DD

− V

DD

V

data lines
LOW-level input voltage on

0 − 0.3V

DD

V

data lines
impedance on data lines

10 −− MΩ

outside a session

HIGH-level output current

V

OH(OFF)

=5V −−5 µA

on pin OFF

1999 Oct 12 18

Philips Semiconductors Product specification

IC card interface TDA8002C

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

OL(OFF)

I

OL(ALARM)

V

OH(ALARM)

t

W

Clock output (CLKOUT; powered from VDD)

LOW-leveloutput voltage on

I

OL(OFF)

=2mA −−0.4 V

pin OFF
LOW-leveloutput current on

V

OL(ALARM)

=0V −−−5µA

pin ALARM
HIGH-level output voltage

I

OH(ALARM)

= −2mA VDD− 1 −− V

on pin ALARM
ALARM pulse width 6 − 20 ms

f

CLKOUT

frequency on CLKOUT 0 − 20 MHz

low power − 16 − kHz

V

OL

V

OH

, t

t

r

f

δ duty factor C

LOW-level output voltage IOL= 1 mA 0 − 0.5 V
HIGH-level output voltage IOH= −1mA VDD− 0.5 −− V
rise and fall times CL= 15 pF; notes 3 and 4 −−8ns

= 15 pF; notes 3 and 4 40 − 60 %

L

Internal oscillator

f

int

frequency of internal
oscillator

active mode 2 2.5 3 MHz
sleep mode − 32 − kHz

Card reset output (RST)

V

O(inact)

t

d(RST)

output voltage inactive modes 0 − 0.3 V
delay between RSTIN and

RST enabled −−100 ns

RST

V

OL

V

OH

t

, t

r

f

LOW-level output voltage IOL= 200 µA0−0.3 V
HIGH-level output voltage IOH= −200 µAV

− 0.5 − V

CC

CC

V

rise and fall times CL=30pF −−0.5 ns

Card clock output (CLK)

V

O(inact)

V

OL

V

OH

t

, t

r

f

δ duty factor C

output voltage inactive modes 0 − 0.3 V
LOW-level output voltage IOL= 200 µA0−0.3 V
HIGH-level output voltage IOH= −50 µAV

− 0.5 − V

CC

CC

V

rise and fall times CL= 30 pF; note 3 −−8ns

= 30 pF; note 3 45 − 55 %

L

SR slew rate (rise and fall) 0.2 −− V/ns

Strobe input (STROBE)

f

STROBE

V

IL

V

IH

frequency on STROBE 0 − 10 MHz
LOW-level input voltage 0 − 0.3V
HIGH-level input voltage 0.7V

DD

− V

DD

DD

V

V
Logic inputs (CLKSEL, CLKDIV1, CLKDIV2, MODE, CMDVCC and RSTIN); note 5
V

IL

V

IH

LOW-level input voltage 0 − 0.3V
HIGH-level input voltage 0.7V

DD

− V

DD

DD

V

V

1999 Oct 12 19

Philips Semiconductors Product specification

IC card interface TDA8002C

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

LOGIC INPUTS (CV/TV AND CS) (INTEGRATED 10 KΩ PULL-UP RESISTOR CONNECTED TO VDD); note 5
V

IL

V

IH

LOW-level input voltage 0 − 0.3V

HIGH-level input voltage 0.7V
Logic inputs PRES and PRES; note 5
V

IL

V

IH

I

IL(PRES)

LOW-level input voltage 0 − 0.3V

HIGH-level input voltage 0.7V

LOW-level input current on

pin PRES
I

IH(PRES)

HIGH-level input current on

pin PRES

Protections

T

sd

shut-down local

temperature
I

CC(sd)

shut-down current at V

CC

Timing

t

act

activation sequence

duration
t

de

deactivation sequence

duration
t

3

start of the window for

sending CLK to the card
t

5

end of the window for

sending CLK to the card
t

IS

t

SI

t

ID

t

DI

t

SL

time from input to select 100 −− ns

time from select to input 1000 −− ns

time from input to deselect 1000 −− ns

time from deselect to input 100 −− ns

time from select to low

impedance
t

DZ

time from deselect to high

impedance

t

r(max)

maximum rise time on pin

CS
t

f(max)

maximum fall time on pin

CS

DD

− V

DD

DD

− V

DD

DD

DD

VOL=0V −−−10 µA

−−10 µA

− 135 −°C

−−90 mA

guaranteed by design;

− 180 220 µs

see Fig.12
guaranteed by design;

50 70 100 µs

see Fig.14
see Figs 10 and 11 −−130 µs

see Fig.11 150 −− µs

−−40 ns

pull-up resistor at pin

−−6ns

OFF = 10 kΩ; 1 device
2 devices in parallel −−3ns

−−100 ns

−−100 ns

V
V

V
V

1999 Oct 12 20

Philips Semiconductors Product specification

IC card interface TDA8002C

Notes

1. It may be necessary to connect capacitors from XTAL1 and XTAL2 to ground depending on the choice of crystal or
resonator.

2. When the oscillator is stopped in mode 1, XTAL1 is set to HIGH.

3. The transition time and duty cycle definitions are shown in Fig.15;

4. CLKOUT transition time and duty cycle do not need to be tested.

5. PRES and CMDVCC are active LOW; RSTIN, PRES and CS are active HIGH.

t

=

1

-------------- ­t1t2+

δ

handbook, full pagewidth

10%

t

f

t

2

t

r

90% 90%

10%

t

1

Fig.15 Definition of transition times.

V

OH

1/2 V

V

OL

MGE741

CC

1999 Oct 12 21

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1999 Oct 12 22

ll pagewidth

APPLICATION INFORMATION

Philips Semiconductors Product specification

IC card interface TDA8002C

3.3 V or 5 V

ground

J1 1

C1

100 nF

J1 2

C4
C3

C2
C1
C5I
C6I
C7I
C8I

CARD READ

(1)

C8
C7

C6

C5
C1I
C2I
C3I
C4I

K1

K2

C6

470 nF

(4)

C5
470 nF

CMDVCC

(5)

MODE

28

OFF

27

RSTIN

26
25

V

CC

24

RST

23

CLK

22

AUX1

CV/TV

PRES

VUP

V

DDA

TDA8002CT/C

21
20

19

I/O

18
17

S1

16
15 14

IC1

33 pF 33 pF

XTAL1

1

XTAL2

2

I/OUC

3

AUX1UC

4

CS

5

ALARM

6

CLKSEL

7

CLKDIV1

8

CLKDIV2

9

STROBE

10

CLKOUT

11

DGND1

12

AGND

13

S2

C7

100 nF

14.745
MHz

C8
10 µF

V

DD

P1-0

1

P1-1

2

P1-2

3

P1-3

4

P1-4

5

P1-5

6

P1-6

7

P1-7

8

RST

9

P3-0

P3-1
P3-2
P3-3
P3-4
P3-5
P3-6
P3-7

XTAL2

XTAL1

V

SS

V

DD

IC2

10

80C51

11
12
13
14
15
16
17
18
19
20

40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21

FCE195

V

CC
P0-0
P0-1
P0-2
P0-3
P0-4
P0-5
P0-6
P0-7
EA
ALE
PSEN
P2-7
P2-6
P2-5
P2-4
P2-3
P2-2
P2-1
P2-0

V

DD

C2
10 µF

(2)

C3

100

nF

(3)

C4
100 nF

TDA8002C should be placed as close as possible to the card reader.
(1) Contact normally open.
(2) C3 close to pin VCC of TDA8002C.
(3) C4 close to C1 contact of card reader.
(4) C5 close to VUP pin of TDA8002C.
(5) C6 as close as possible to pins S1 and S2.

CLK line may be shielded with respect to other lines.
Decoupling capacitors C7 and C8 may be placed as close as possible to pin V
A good ground plane is recommended.

Fig.16 Application diagram.

DDA

.

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1999 Oct 12 23

V

DD

ground

J1 1

C1

100 nF

J1 2

C4
C3

C2
C1
C5I
C6I
C7I
C8I

CARD READ

C2
10 µF

C8
C7

C6

C5
C1I
C2I
C3I
C4I

(1)

K1

K2

C3

100 nF

C4
100 nF

(2)

(3)

100 nF

CMDVCC

V

RST
CLK

AUX1

CV/TV

PRES

AUX2

3.3 V or 5 V

TDA8002C should be placed as close as possible to the card reader.
(1) Contact normally open.
(2) C3 close to pin VCC of TDA8002C.
(3) C4 close to C1 contact of card reader.
(4) C5 close to VUP pin of TDA8002C.
(5) C6 as close as possible to pins S1 and S2.

C9

RSTIN

OFF

24

CC

23
22
21

20
19
18
17

I/O

VUP

(5)

C6

470 nF

(4)

C5
470 nF

CLK line may be shielded with respect to other lines.
Decoupling capacitors C7, C8 and C9 may be placed as close as possible to pin V
A good ground plane is recommended.

ook, full pagewidth

33 pF 33 pF

V

DD

DDD

V

MODE

IC1

DGND2

XTAL1

14.745 MHz

I/OUC

XTAL2

3231302928272625

TDA8002CG

910111213141516

S2

S1

DDA

V

AGND

DGND1

CLKOUT

C7

100 nF

AUX1UC

1

AUX2UC

2

CS

3

ALARM

4

CLKSEL

5

CLKDIV1

6

CLKDIV2

7

STROBE

8

C8
10 µF

FCE196

DDD

V

40

P0-0

39

P0-1

38

P0-2

37

P0-3

36

P0-4

35

P0-5

34

P0-6

33

P0-7

32

EA

31

ALE

30

PSEN

29

P2-7

28

P2-6

27

P2-5

26

P2-4

25

P2-3

24

P2-2

23

P2-1

22

P2-0

21

.

P1-0

1

P1-1

2

P1-2

3

P1-3

4

P1-4

5

P1-5

6

P1-6

7

P1-7

8

RST

9

P3-0

10

P3-1
P3-2
P3-3
P3-4
P3-5
P3-6
P3-7

XTAL2

XTAL1

V

SS

V

DD

IC2

80C51

11
12
13
14
15
16
17
18
19
20

and V

DDA

CC

Philips Semiconductors Product specification

IC card interface TDA8002C

V

DD

Fig.17 Application diagram (for more details, see

“Application note AN98054”

).

Philips Semiconductors Product specification

IC card interface TDA8002C

PACKAGE OUTLINES

SO28: plastic small outline package; 28 leads; body width 7.5 mm

SOT136-1

28

Z

1

y

pin 1 index

D

c

15

A

2

A

1

14

e

w M

b

p

E

H

E

detail X

A

X

v M

A

Q

(A )

L

p

L

A

3

θ

0 5 10 mm

scale

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

mm

OUTLINE

VERSION

SOT136-1

A

max.

2.65

0.10

A

0.30

0.10

0.012

0.004

A2A

1

2.45

2.25

0.096

0.089

IEC JEDEC EIAJ

075E06 MS-013AE

0.25

0.01

b

3

p

0.49

0.32

0.36

0.23

0.019

0.013

0.014

0.009

UNIT

inches

Note

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

(1)E(1) (1)

cD

18.1

7.6

7.4

0.30

0.29

1.27

0.050

17.7

0.71

0.69

REFERENCES

1999 Oct 12 24

eHELLpQ

10.65

10.00

0.419

0.394

1.4

0.055

1.1

0.4

0.043

0.016

1.1

1.0

0.043

0.039

PROJECTION

0.25

0.25 0.1

0.01

0.01

EUROPEAN

ywv θ

Z

0.9

0.4

0.035

0.004

0.016

ISSUE DATE

95-01-24
97-05-22

o

8

o

0

Philips Semiconductors Product specification

IC card interface TDA8002C

LQFP32: plastic low profile quad flat package; 32 leads; body 5 x 5 x 1.4 mm

c

y

X

A

H

E

E

A

2

A

A

25

32

24

17

Z

16

E

e

b

w M

p

pin 1 index

9

1

8

SOT401-1

(A )

1

L

L

detail X

3

θ

p

Z

e

w M

b

p

D

H

D

D

B

v M

v M

0 2.5 5 mm

scale

DIMENSIONS (mm are the original dimensions)

UNIT

mm

A

max.

1.60

A

1A2A3bp

0.15

1.5

1.3

0.25

0.05

cE

0.27

0.18

0.17

0.12

(1)

(1) (1)(1)

D

5.1

4.9

eH

5.1

4.9

0.5

7.15

6.85

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

OUTLINE
VERSION

IEC JEDEC EIAJ

REFERENCES

SOT401-1

1999 Oct 12 25

A

B

E

7.15

6.85

LL

p

0.75

1.0

0.45

0.2

0.12 0.1

H

D

EUROPEAN

PROJECTION

Z

D

0.95

0.55

Zywv θ

E

o

0.95

7

o

0.55

0

ISSUE DATE

95-12-19
97-08-04

Philips Semiconductors Product specification

IC card interface TDA8002C

SOLDERING
Introduction to soldering surface mount packages

Thistextgives a very brief insight toacomplextechnology.
A more in-depth account of soldering ICs can be found in
our

“Data Handbook IC26; Integrated Circuit Packages”

(document order number 9398 652 90011).
There is no soldering method that is ideal for all surface

mount IC packages. Wave soldering is not always suitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.

Reflow soldering

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
tothe printed-circuit board byscreenprinting, stencilling or
pressure-syringe dispensing before package placement.

Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating,soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.

Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.

Wave soldering

Conventional single wave soldering is not recommended
forsurfacemount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.

• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint

longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;

– smaller than 1.27 mm, the footprint longitudinal axis

must be parallel to the transport direction of the
printed-circuit board.

The footprint must incorporate solder thieves at the
downstream end.

• Forpackageswith leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.

During placement andbefore soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

Manual soldering

Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.

When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.

To overcome these problems the double-wave soldering
method was specifically developed.

If wave soldering is used the following conditions must be
observed for optimal results:

• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.

1999 Oct 12 26

Philips Semiconductors Product specification

IC card interface TDA8002C

Suitability of surface mount IC packages for wave and reflow soldering methods

PACKAGE

WAVE REFLOW

(1)

BGA, SQFP not suitable suitable

SOLDERING METHOD

HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS not suitable

(3)

PLCC

, SO, SOJ suitable suitable
LQFP, QFP, TQFP not recommended
SSOP, TSSOP, VSO not recommended

(2)

(3)(4)
(5)

suitable

suitable
suitable

Notes

1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the

“Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”

.

2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).

3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.

4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.

5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.

DEFINITIONS

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

1999 Oct 12 27

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Argentina: see South America
Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140,

Tel. [phone], Fax. [phone]
Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213,

Tel. [phone], Fax. [phone]
Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6,

220050 MINSK, Tel. [phone], Fax. [phone]

Belgium: see The Netherlands
Brazil: see South America
Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor,

51 James Bourchier Blvd., 1407 SOFIA,
Tel. [phone], Fax. [phone]

Canada: PHILIPS SEMICONDUCTORS/COMPONENTS,
Tel. [phone], Fax. [phone]

China/Hong Kong: 501 Hong Kong Industrial Technology Centre,
72 Tat Chee Avenue, Kowloon Tong, HONG KONG,
Tel. [phone], Fax. [phone]

Colombia: see South America
Czech Republic: see Austria
Denmark: Sydhavnsgade 23, 1780 COPENHAGEN V,

Tel. [phone], Fax. [phone]
Finland: Sinikalliontie 3, FIN-02630 ESPOO,

Tel. [phone], Fax. [phone]
France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex,

Tel. [phone], Fax. [phone]
Germany: Hammerbrookstraße 69, D-20097 HAMBURG,

Tel. [phone], Fax. [phone]

Hungary: see Austria
India: Philips INDIA Ltd, Band Box Building, 2nd floor,

254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025,
Tel. [phone], Fax. [phone]

Indonesia: PT Philips DevelopmentCorporation, Semiconductors Division,
Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510,
Tel. [phone] ext. 2501, Fax. [phone]

Ireland: Newstead, Clonskeagh, DUBLIN 14,
Tel. [phone], Fax. [phone]

Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053,
TEL AVIV 61180, Tel. [phone], Fax. [phone]

Italy: PHILIPS SEMICONDUCTORS, Via Casati, 23 - 20052 MONZA (MI),
Tel. [phone], Fax [phone]

Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku,
TOKYO 108-8507, Tel. [phone], Fax. [phone]

Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,
Tel. [phone], Fax. [phone]

Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,
Tel. [phone], Fax. [phone]

Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,
Tel. [phone], Fax [phone]

Middle East: see Italy

Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,

Tel. [phone], Fax. [phone]
New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,

Tel. [phone], Fax. [phone]
Norway: Box 1, Manglerud 0612, OSLO,

Tel. [phone], Fax. [phone]

Pakistan: see Singapore
Philippines: Philips Semiconductors Philippines Inc.,

106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. [phone], Fax. [phone]

Poland: Al.Jerozolimskie 195 B, 02-222 WARSAW,
Tel. [phone], Fax. [phone]

Portugal: see Spain
Romania: see Italy
Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,

Tel. [phone], Fax. [phone]
Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762,

Tel. [phone], Fax. [phone]

Slovakia: see Austria
Slovenia: see Italy
South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,

2092 JOHANNESBURG, P.O. Box 58088 Newville 2114,
Tel. [phone], Fax. [phone]

South America: Al. Vicente Pinzon, 173, 6th floor,
04547-130 SÃO PAULO, SP, Brazil,
Tel. [phone], Fax. [phone]

Spain: Balmes 22, 08007 BARCELONA,
Tel. [phone], Fax. [phone]

Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,
Tel. [phone], Fax. [phone]

Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. [phone] Fax. [phone]

Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,
TAIPEI, Taiwan Tel. [phone], Fax. [phone]

Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,
Tel. [phone], Fax. [phone]

Turkey: Yukari Dudullu, Org. San. Blg., 2.Cad. Nr. 28 81260 Umraniye,
ISTANBUL, Tel. [phone], Fax. [phone]

Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. [phone], Fax. [phone]

United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. [phone], Fax. [phone]

United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. [phone], Fax. [phone]

Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,

Tel. [phone], Fax.[phone]

For all other countries apply to: Philips Semiconductors,
International Marketing & Sales Communications, Building BE-p, P.O. Box 218,
5600 MD EINDHOVEN, The Netherlands, Fax. [phone]

© Philips Electronics N.V. SCA
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.

1999

Internet: http://www.semiconductors.philips.com

68

Printed in The Netherlands 545004/25/03/pp28 Date of release: 1999 Oct 12 Document order number: 9397 750 06149