Datasheet TDA8002 Datasheet (Philips)

INTEGRATED CIRCUITS

DATA SH EET

TDA8002

IC card interface

Preliminary specification
Supersedes data of 1996 Oct 23
File under Integrated Circuits, IC02

1997 Mar 13

Philips Semiconductors Preliminary specification

IC card interface TDA8002

FEATURES

• Single supply voltage interface (3.3 or 5 V environment)

• Low-power sleep mode

• Three specific protected half-duplex bidirectional

buffered I/O lines

• VCC regulation (5 V ±5%; ICC<65mAatVDD=5V,
with controlled rise and fall times

• Thermal and short-circuit protections with current
limitations

• Automatic ISO 7816 activation and deactivation
sequences

• Enhanced ESD protections on card side (>6 kV)

• Clock generation for the card up to 12 MHz with

synchronous frequency changes

• Clock generation up to 20 MHz (auxiliary clock)

• Synchronous and asynchronous cards (memory and

smart cards)

• ISO 7816, GSM11.11 compatibility and EMV (Europay,
Mastercard, Visa) compliant

• Step-up converter for V

generation

CC

• Supply supervisor for spikes elimination and emergency
deactivation.

APPLICA TIONS

• IC card readers for:
– GSM applications
– banking
– electronic payment
– identification
– Pay TV
– road tolling.

GENERAL DESCRIPTION

The TDA8002 is a complete low-power, analog interface
for asynchronous and synchronous cards. It can be placed
between the card and the microcontroller. It performs all
supply, protection and control functions. It is directly
compatible with ISO 7816, GSM11.11 and EMV
specifications.

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Supply

V
I

DDA

DD

analog supply voltage 3.0 5 6.5 V
supply current sleep mode −−150 µA

Idle mode; f
f

CLKOUT

CLK

= 10 MHz; VDD=5V

active mode; f
f

CLKOUT

= 10 MHz; VDD=5V

active mode; f
f

CLKOUT

= 10 MHz; VDD=3V

= 2.5 MHz;

= 2.5 MHz;

CLK

= 2.5 MHz;

CLK

−−5mA

−−9mA

−−12 mA

Card supply

V

CC(O)

I

CC(O)

output voltage DC load <65 mA 4.75 − 5.25 V
output current VCC short-circuited to GND −−100 mA

General

f

clk

T

de

P

tot

T

amb

card clock frequency 0 − 12 MHz
deactivation sequence duration 60 80 100 µs
continuous total power dissipation

TDA8002AT; TDA8002BT T
TDA8002G T

= −25 to +85 °C −−0.56 W

amb

= −25 to +85 °C −−0.46 W

amb

operating ambient temperature −25 − +85 °C

1997 Mar 13 2

Philips Semiconductors Preliminary specification

IC card interface TDA8002

ORDERING INFORMATION

TYPE NUMBER

(1)

PACKAGE

MARKING NAME DESCRIPTION VERSION

TDA8002AT/3/C2

TDA8002AT/3 SO28 plastic small outline package; 28 leads;

SOT136-1

(2)

body width 7.5 mm

TDA8002AT/5/C2

TDA8002AT/5 SO28 plastic small outline package; 28 leads;

SOT136-1

(3)

body width 7.5 mm

TDA8002BT/3/C2

TDA8002BT/3 SO28 plastic small outline package; 28 leads;

SOT136-1

(2)

body width 7.5 mm

TDA8002BT/5/C2

(3)

TDA8002BT/5 SO28 plastic small outline package; 28 leads;

SOT136-1

body width 7.5 mm

TDA8002G/3/C2

80023 LQFP32 plastic low profile quad flat pack; 32 leads;

SOT401-1

(2)

body 5 × 5 × 1.4 mm

TDA8002G/5/C2

80025 LQFP32 plastic low profile quad flat pack; 32 leads;

SOT401-1

(3)

body 5 × 5 × 1.4 mm

(2)

TDA8002U/3/C2
TDA8002U/5/C2

−−wafer −

(3)

−−wafer −

Notes

1. The /3 or /5 suffix indicates the voltage supervisor option.

2. The /3 version can be used with a 3 or 5 V power supply environment (see Chapter “Functional description”).

3. The /5 version can be used with a 5 V power supply environment.

1997 Mar 13 3

Philips Semiconductors Preliminary specification

IC card interface TDA8002

BLOCK DIAGRAM

handbook, full pagewidth

ALARM
ALARM

OFF

RSTIN

CMDVCC

MODE

CLKDIV1

CLKDIV2

CLKSEL

STROBE
CLKOUT

4
3

26
25
24

27

6

7

5

8

9

V

DDD

100 nF

28

CLOCK

CIRCUITRY

SUPPLY

INTERNAL

REFERENCE

VOLTAGE SENSE

HORSEQ

CLK

V

REF

ALARM

V

DDA

100 nF

13

INTERNAL OSCILLATOR

EN1 CLKUP

SEQUENCER

100 nF

S1 S2
14 12

STEP-UP CONVERTER

f

INT

EN2

PV

EN5

EN4

CC

V

CC

GENERATOR

RST

BUFFER

CLOCK

BUFFER

VUP

15

100 nF

23

22

19
18

21

100 

RST

PRES
PRES

CLK

nF

V

CC

XTAL1

XTAL2

AUX1UC

30
31

1

OSCILLATOR

EN3

TDA8002G

AUX2UC

I/OUC

All capacitors are mandatory.

2

32

29 11

10

DGND1

DGND2

AGND

Fig.1 Block diagram (TDA8002G in LQFP32 package).

1997 Mar 13 4

THERMAL

PROTECTION

TRANSCEIVER

TRANSCEIVER

TRANSCEIVER

I/O

I/O

I/O

20

17

16

MGE730

AUX1

AUX2

I/O

Philips Semiconductors Preliminary specification

IC card interface TDA8002

PINNING

PIN

SYMBOL

TYPE A

SO28

TYPE B

SO28

TYPE G
LQFP32

XTAL1 1 1 30 I/O crystal connection or input for external clock
XTAL2 2 2 31 I/O crystal connection
I/OUC 3 3 32 I/O data I/O line to and from microcontroller
AUX1UC 4 4 1 I/O auxiliary line to and from microcontroller for synchronous

AUX2UC 5 − 2 I/O auxiliary line to and from microcontroller for synchronous

ALARM − 5 3 O open drain NMOS reset for microcontroller (active LOW)
ALARM 6 6 4 O open drain PMOS reset for microcontroller (active HIGH)
CLKSEL 7 7 5 I control signal for CLK (LOW = XTAL oscillator;

CLKDIV1 8 8 6 I control with CLKDIV2 for choosing CLK frequency
CLKDIV2 9 9 7 I control with CLKDIV1 for choosing CLK frequency
STROBE 10 10 8 I external clock input for synchronous applications
CLKOUT 11 11 9 O clock output (see Table 1)
DGND1 12 12 10 supply digital ground 1
AGND 13 13 11 supply analog ground
S2 14 14 12 I/O capacitance connection for voltage doubler
V

DDA

15 15 13 supply analog supply voltage
S1 16 16 14 I/O capacitance connection for voltage doubler
VUP 17 17 15 I/O output of voltage doubler (connect to 100 nF)
I/O 18 18 16 I/O data I/O line to and from card
AUX2 19 − 17 I/O auxiliary I/O line to and from card
PRES 20 19 18 I active LOW card presence contact
PRES − 20 19 I active HIGH card presence contact
AUX1 21 21 20 I/O auxiliary I/O line to and from card
CLK 22 22 21 O clock to card (C3) (see Table 1)
RST 23 23 22 O card reset (C2)
V

CC

24 24 23 O supply for card (C1) (decouple with 100 nF)
CMDVCC 25 25 24 I active LOW start activation sequence from microcontroller
RSTIN 26 26 25 I card reset from microcontroller
OFF 27 27 26 O open drain NMOS interrupt to microcontroller

MODE 28 28 27 I operating mode selection

V

DDD

−−28 supply digital supply voltage

DGND2 −−29 supply digital ground 2

I/O DESCRIPTION

applications

applications

HIGH = STROBE input)

(active LOW)

(HIGH = normal; LOW = sleep)

1997 Mar 13 5

Philips Semiconductors Preliminary specification

IC card interface TDA8002

handbook, halfpage

XTAL1
XTAL2

I/OUC
AUX1UC
AUX2UC

ALARM

CLKSEL
CLKDIV1
CLKDIV2
STROBE

CLKOUT

DGND1

AGND

S2

1
2
3
4
5
6
7

TDA8002A

8

9
10
11
12
13

28
27
26
25
24
23
22
21
20
19
18
17
16
1514

MGE731

Fig.2 Pin configuration (TDA8002A; SO28).

MODE
OFF
RSTIN
CMDVCC
V

CC

RST
CLK
AUX1
PRES
AUX2
I/O
VUP
S1
V

DDA

handbook, halfpage

XTAL1
XTAL2

I/OUC

AUX1UC

ALARM
ALARM

CLKSEL
CLKDIV1
CLKDIV2
STROBE

CLKOUT

DGND1

AGND

S2

1
2
3
4
5
6
7

TDA8002B

8

9
10
11
12
13

28
27
26
25
24
23
22
21
20
19
18
17
16
1514

MGE732

Fig.3 Pin configuration (TDA8002B; SO28).

MODE
OFF
RSTIN
CMDVCC
V

CC

RST
CLK
AUX1
PRES
PRES
I/O
VUP
S1
V

DDA

handbook, full pagewidth

DGND2

29

12

S2

V

DDD

V
28

13

DDA

MODE
27

14
S1

AUX1UC
AUX2UC

ALARM
ALARM

CLKSEL
CLKDIV1
CLKDIV2
STROBE

XTAL2

I/OUC
32

1
2
3
4

XTAL1

31

30

TDA8002G

5
6
7
8

9

CLKOUT

11

10

AGND

DGND1

Fig.4 Pin configuration (TDA8002G; LQFP32).

OFF
26

15

VUP

RSTIN
25

16
I/O

24
23
22
21
20
19
18
17

MGE733

CMDVCC
V

CC

RST
CLK
AUX1
PRES
PRES
AUX2

1997 Mar 13 6

Philips Semiconductors Preliminary specification

IC card interface TDA8002

FUNCTIONAL DESCRIPTION
Power supply

The supply pins for the chip are V
DGND. V

DDA

and V

(i.e. VDD) should be in the range of

DDD

DDA

, V

DDD

, AGND and

3.0 to 6.5 V. All card contacts remain inactive during
power-up or power-down.

On power-up, the logic is reset by an internal signal.
The sequencer is not activated until VDD reaches
V

th2+Vhys2

(see Fig.5). When VDD falls below V

th2

, an
automatic deactivation sequence of the contacts is
performed.

Supply voltage supervisor (V

This block surveys the V

DD

)

DD

supply. A defined reset pulse
of 10 ms minimum (tW) is retriggerable and is delivered on
the ALARM outputs during power-up or power-down of
VDD (see Fig.5). This signal is also used for eliminating the
spikes on card contacts during power-up or power-down.

When VDD reaches V

th2+Vhys2

, an internal delay is
started. The ALARM outputs are active until this delay has
expired. When VDD falls below V

, ALARM is activated

th2

and a deactivation sequence of the contacts is performed.
For 3 V supply, the supervisor option must be chosen at

3 V. For 5 V supply, both options (3 or 5 V) may be chosen
depending on the application.

Clock circuitry

The TDA8002 supports both synchronous and

2

asynchronous cards (I

C-bus memories requiring an
acknowledge signal from the master are not supported).
There are three methods to clock the circuitry:

1. Apply a clock signal to pin STROBE

2. Use of an internal RC oscillator

3. Use of a quartz oscillator which should be connected

between pins XTAL1 and XTAL2.

When CLKSEL is HIGH, the clock should be applied on the
STROBE pin, and when CLKSEL is LOW, one of the
internal oscillators is used.

When an internal clock is used, the clock output is
available on pin CLKOUT. The RC oscillator is selected by
making CLKDIV1 HIGH and CLKDIV2 LOW. The clock
output to the card is available on pin CLK. The frequency
of the card clock can be the input frequency divided by
2 or 4, STOP LOW or 1.25 MHz, depending on the states
of CLKDIV1 or CLKDIV2 (see Table 1).

Do not change CLKSEL during activation. When in
low-power (sleep) mode, the internal oscillator frequency
which is available on pin CLKOUT is lowered to
approximately 16 kHz for power-economy purposes.

handbook, full pagewidth

V

DD

t

W

ALARM

ALARM

Fig.5 Alarm as a function of VDD (pulse width 10ms).

1997 Mar 13 7

V

+ V

th2

hys2

V

th2

t

W

MGE734

Philips Semiconductors Preliminary specification

IC card interface TDA8002

Table 1 Clock circuitry definition

MODE CLKSEL CLKDIV1 CLKDIV2 FREQUENCY OF CLK FREQUENCY OF CLKOUT

1

1

f
f

⁄2f

⁄2f

INT
XTAL
XTAL
XTAL
XTAL

INT

(3)

1

HIGH LOW HIGH LOW
HIGH LOW LOW LOW
HIGH LOW LOW HIGH

⁄2f

INT

1

⁄4f

XTAL

1

⁄2f

XTAL

HIGH LOW HIGH HIGH STOP LOW f
HIGH HIGH X

LOW

(2)

(1)

X

(1)
(1)

X

(1)

X

(1)

X

STROBE f

STOP LOW

Notes

1. X = don’t care.

2. In Low-Power Mode.

3. f

= 32 kHz in Low-Power Mode.

INT

I/O circuitry

The three I/O lines are identical. The Idle state is HIGH for
all I/O (i.e. I/O, I/OUC, AUX1, AUX1UC, AUX2, AUX2UC).
I/O is referenced to VCC, I/OUC to VDD, ensuring proper
operation in case VCC≠ VDD.

The first side on which a falling edge is detected becomes
a master (input). An anti-latch circuitry first disables the
detection of the falling edge on the other side, which
becomes slave (output).

After a delay time td (about 50 ns), the logic 0 present on
the master side is transferred on the slave side.

handbook, full pagewidth

I/O

I/OUC

When the input is back to HIGH level, a current booster is
turned on during the delay t

on the output side and then

d

both sides are back to their Idle state, ready to detect the
next logic 0 on any side.

In case of a conflict, both lines may remain LOW until the
software enables the lines to be HIGH. The anti-latch
circuitry ensures that the lines do not remain LOW if both
sides return HIGH, regardless of the prior conditions.
The maximum frequency on the lines is approximately
1 MHz.

t

d

t

d

Fig.6 Master and slave signals.

1997 Mar 13 8

t

d

conflict Idle

MGD703

Philips Semiconductors Preliminary specification

IC card interface TDA8002

Logic circuitry

After power-up, the circuit has six possible states of
operation. Table 1 “Clock circuitry definition” shows the
sequence of these states.

I

DLE MODE

After reset, the circuit enters the Idle mode.
A minimum number of functions in the circuit are active
while waiting for the microcontroller to start a session:

• All card contacts are inactive

• I/OUC, AUX1UC and AUX2UC are high-impedance

• Oscillator XTAL runs, delivering CLKOUT

• Voltage supervisor is active.

OW-POWER (SLEEP) MODE

L
When pin MODE goes LOW, the circuit enters the

low-power (sleep) mode. As long as pin MODE is LOW,
no activation is possible.

State diagram

If pin MODE goes LOW in the active mode, a normal
deactivation sequence is performed before entering
low-power mode. When pin MODE goes HIGH, the circuit
enters normal operation after a delay of at least 6 ms
(96 cycles of CLKOUT). During this time the CLKOUT
remains at 16 kHz.

• All card contacts are inactive

• Oscillator XTAL does not run

• The V

supervisor, ALARM output, card presence

DD

detection and OFF output remain functional

• Internal oscillator is slowed to 32 kHz, CLKOUT
providing 16 kHz.

A

CTIVE MODE

When the activation sequence is completed, the
TDA8002 will be in the ACTIVE mode. Data is exchanged
between the card and the microcontroller via the I/O lines.

handbook, full pagewidth

POWER

OFF

IDLE

MODE

LOW-POWER

MODE

DEACTIVATION

Fig.7 State diagram.

1997 Mar 13 9

ACTIVATION

FAULT

ACTIVE

MODE

MGE735

Philips Semiconductors Preliminary specification

IC card interface TDA8002

ACTIVATION SEQUENCE
From Idle mode, the circuit enters the activation mode

when the microcontroller sets the CMDVCC line LOW or
sets the MODE line HIGH when the CMDVCC line is
already LOW. The internal circuitry is then activated, the
internal clock is activated and an activation sequence is
performed. When RST is enabled, RST becomes the
inverse of RSTIN.

handbook, full pagewidth

OSC_INT/64

t

act

CMDVCC

t

0

• Step-up converter is started (t

1

≈ t0)

• VCC rises from 0 to 5 V (t2=t1+11⁄2T)

• I/O, AUX1, AUX2 are enabled and CLK is enabled

(t3=t1+ 4T); a special circuitry ensures that I/O remains

below VCC during falling slope of V

CC

• CLK is sent by setting RSTIN to HIGH (t4)

• RST is enabled (t5=t1+ 7T); after t5, RSTIN has no

further action on CLK, but is only controlling RST.

T = 25 µs

VUP

V

CC

I/O

CLK

RSTIN

RST

t

1

t

2

high - Z

t

3

t

t

5

4

Fig.8 Activation sequence using RSTIN and CMDVCC.

MGE736

1997 Mar 13 10

Philips Semiconductors Preliminary specification

IC card interface TDA8002

handbook, full pagewidth

OSC_INT/64

t

CLKDIV1

CLKDIV2

act

CMDVCC

VUP

V

CC

I/O

CLK

RSTIN

RST

Fig.9 Activation sequence using CMDVCC, CLKDIV1 and CLKDIV2 signals to enable CLK.

handbook, full pagewidth

OSC_INT/64

t

0

t

1

t

2

high - Z

t

t

act

3

MGE737

PRES, OFF

CMDVCC

V

CC

I/O

RSTIN

STROBE

RST

high - Z

Fig.10 Activation sequence for synchronous application.

1997 Mar 13 11

MGE738

Philips Semiconductors Preliminary specification

IC card interface TDA8002

DEACTIVATION SEQUENCE
When a session is completed, the microcontroller sets the

CMDVCC line to HIGH state or MODE line to LOW state.
The circuit then executes an automatic deactivation
sequence by counting the sequencer back and ends in
Idle mode.

• RST goes LOW (t11≈ t10)

handbook, full pagewidth

OSC_INT/64

t

CMDVCC

VUP

V

CC

I/O

CLK

10

t

t

13

t

high - Z

12

• CLK is stopped (t

12=t11

+1⁄2T)

• I/O, AUX1, AUX2 are outputs into high-impedance state
(t13=t11+T)

• VCC falls to zero (t14=t11+11⁄2T); a special circuitry

ensures that I/O remains below VCC during falling slope

of V

CC

• VUP falls (t15=t11+ 5T).

t

de

t

15

14

RSTIN

RST

t

11

Fig.11 Deactivation sequence.

MGE739

1997 Mar 13 12

Philips Semiconductors Preliminary specification

IC card interface TDA8002

Fault detection

The following fault conditions are monitored by the circuit:

1. Short-circuit or high current on V

CC

2. Removing the card during transaction

3. Overheating

4. VDD dropping.

handbook, full pagewidth

OSC_INT/64

OFF

PRES

V

CC

I/O

CLK

t

10

t

12

When fault 4 is detected, ALARM or

ALARM become
active, (see Supply Voltage Supervisor section) and an
automatic deactivation sequence is also initiated. There is
no change to OFF.

t

de

t

14

t

13

high - Z

RST

t

11

Fig.12 Emergency deactivation sequence.

MGE740

1997 Mar 13 13

Philips Semiconductors Preliminary specification

IC card interface TDA8002

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134); note 1.

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

DD

V

n1

V

n2

V

esd

T

stg

P

tot

T

j

supply voltage −0.3 +6.5 V
voltage on CMOS pins:

−0.3 +6.5 V
XTAL1, XTAL2, ALARM, ALARM,
MODE, RSTIN, CLKSEL, AUX2UC,
AUX1UC, CLKDIV1, CLKDIV2,
CLKOUT, STROBE, CMDVCC, OFF,
DELAY

voltage on card contact pins −0.3 +6.5 V
electrostatic voltage

on pins: I/O, RST, V

, CLK, AUX1,

CC

−6+6kV

AUX2, PRES, PRES

on all other pins −2+2kV
storage temperature −55 +125 °C
continuous total power dissipation

TDA8002T T

TDA8002G T

= −25 to +85 °C − 0.56 W

amb

= −25 to +85 °C − 0.46 W

amb

junction temperature − +150 °C

Note

1. Stress beyond these levels may cause permanent damage to the device. This is a stress rating only and functional
operation of the device under this condition is not implied.

HANDLING

Every pin withstands the ESD test according to MIL-STD-883C class 3 for card contacts, class 2 for the remaining.
Method 3015 (HBM 1500 Ω, 100 pF) 3 positive pulses and 3 negative pulses on each pin referenced to ground.

THERMAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS VALUE UNIT

R

th j-a

thermal resistance from junction to ambient

SOT136-1 in free air 70 K/W
SOT401-1 in free air 91 K/W

1997 Mar 13 14

Philips Semiconductors Preliminary specification

IC card interface TDA8002

CHARACTERISTICS

V

=5V; T

DD

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Temperature

T

amb

Supply

V

DD

I

DD

V

th2

V

hys2

CARD SUPPLY
V

CC(O)

I

CC(O)

SR slew rate up and down 0.12 0.17 0.22 V/µs

=25°C; f

amb

operating ambient

= 10 MHz; unless otherwise specified.

XTAL

−25 − +85 °C

temperature

positive supply voltage option 5 V power supply

4.5 5 6.5 V

(TDA8002XX/5)
option 3.3 or 5 V power supply

3 5 6.5 V

(TDA8002XX/3)

supply current sleep mode; VDD=5V −−200 µA

threshold voltage on V
(falling) for voltage
supervisor

Idle mode; V
f

= 2.5 MHz;

CLK

f

CLKOUT

DD

=10MHz

active mode; V
f

= 2.5 MHz;

CLK

f

CLKOUT

=10MHz

active mode; V
f

= 2.5 MHz;

CLK

f

CLKOUT

option 5 V power supply

DD

=10MHz

(TDA8002XX/5)
option 3.3 or 5 V power supply

=5V;

=5V;

DD

= 3.3 V;

DD

−−5mA

−−9mA

−−12 mA

3.9 4.05 4.2 V

2.6 2.7 2.8 V

(TDA8002XX/3)

hysteresis on V

th2

100 150 200 mV

output voltage Idle mode −−0.4 V

active mode; I

<20mA:

CC

4.75 − 5.25 V
DC load with
3V<VDD< 3.3 V

active mode; I

<65mA:

CC

4.75 − 5.25 V
DC load with

3.3 V < VDD< 6.5 V
active mode;

4.6 − 5.4 V
current spike of 40 nAs
charge; AC load; note 1

output current from 0 to 5 V −−65 mA

short-circuited to ground −−100 mA

V

CC

1997 Mar 13 15

Philips Semiconductors Preliminary specification

IC card interface TDA8002

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Crystal connections (XTAL1 and XTAL2)

C

ext

f

XTAL

Data lines (I/O, I/OUC, AUX1, AUX2, AUX1UC, AUX2UC)

V

OH

V

OL

V

OH

V

OL

V

IH

V

IL

V

IH

V

IL

V

I/O(idle)

Z

I/OUC(idle)

R

pu

I

edge

t

edge

I

IL

I

IH

, t

t

r

f

ALARM,

I

OH

V

OL

I

OH

external capacitors note 2 − 15 − pF
resonance frequency note 3 2 − 24 MHz

HIGH level output voltage
on I/O

LOW level output voltage

IOH= −20 µAV

= −100 µA 3.5 −− V

I

OH

I

=1mA −−300 mV

I/O

− 0.5 − VCC+ 0.1 V

CC

on I/O
HIGH level output voltage

IOH= −20 µAV

− 1 − VDD+ 0.2 V

DD

on I/OUC
LOW level output voltage

I

=1mA −−300 mV

I/OUC

on I/OUC
HIGH level input voltage on

1.8 − V

CC

I/O
LOW level input voltage on

0 − 0.8 V

I/O
HIGH level input voltage on

0.7V

DD

− V

DD

I/OUC
LOW level input voltage on

0 − 0.3V

DD

I/OUC
voltage on I/O outside a

−−0.4 V

session
impedance on I/OUC

10 −− MΩ

outside a session
internal pull-up resistance

between I/O and V

CC

current from I/O when

81012kΩ

− 1 − mA

active pull-up is active
delay between falling edge

− 200 − ns

on I/O and I/OUC
delay between falling edge

− 200 − ns

on I/OUC and I/O
LOW level current on I/O VIL= 0.4 V −−−600 µA
HIGH level current on I/O VIH=V

CC

−−10 µA

rise and fall times Ci=Co=30pF −−0.5 µs

ALARM, OFF (open-drain outputs) when connected

HIGH level output current

VOH=5V −−5µA

on pin ALARM
LOW level output voltage

IOL=2mA −−0.4 V

on pin ALARM
HIGH level output current

VOH=5V −−5µA

on pin OFF

V

V

V

1997 Mar 13 16

Philips Semiconductors Preliminary specification

IC card interface TDA8002

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

OL

I

OL

V

OH

t

W

Clock output (CLKOUT) (powered from V

f

CLKOUT

V

OL

V

OH

, t

t

r

f

δduty factor C

Internal oscillator

f

osc

LOW level output voltage

IOL=2mA −−0.4 V

on pin OFF
LOW level output current

VOL=0V −−−5µA

on pin ALARM
HIGH level output voltage

IOH= −2mA VDD− 1 −− V

on pin ALARM
ALARM pulse width 6 − 20 ms

)

DD

frequency on CLKOUT 0 − 20 MHz

LOW power − 16 − kHz

LOW level output voltage IOL= 1 mA 0 − 0.5 V
HIGH level output voltage IOH= −1mA VDD− 0.5 −− V
rise and fall times CL= 15 pF; notes 4 and 5 −−8ns

= 15 pF; note 4 40 − 60 %

L

frequency of internal
oscillator

active mode 2 2.5 3 MHz
sleep mode − 32 − kHz

Reset output to the card (RST)

V

O(inact)

t

d(RST)

output voltage inactive modes 0 − 0.3 V
delay between RSTIN and

RST enabled −−100 ns

RST

V

OL

V

OH

LOW level output voltage IOL= 200 µA0−0.3 V
HIGH level output voltage IOH= −200 µA 4.3 − V

= −50 µAV

I

OH

− 0.5 − V

CC

CC
CC

V
V

Clock output to the card (CLK)

V

O(inact)

V

OL

V

OH

t

r

t

f

δduty factor C

output voltage inactive modes 0 − 0.3 V
LOW level output voltage IOL= 200 µA0−0.3 V
HIGH level output voltage IOH= −50 µAV

− 0.5 − V

CC

CC

V
rise time CL= 30 pF; note 4 −−8ns
fall time CL= 30 pF; note 4 −−8ns

= 30 pF; note 4 45 − 55 %

L

SR slew rate (rise and fall) 0.2 −− V/ns

Strobe input (STROBE)

f

STROBE

V

IL

V

IH

Logic inputs (CLKSEL, CLKDIV1, CLKDIV2, MODE,

V

IL

V

IH

frequency on STROBE 0 − 20 MHz
LOW level input voltage 0 − 0.3V
HIGH level input voltage 0.7V

DD

− V

DD

DD

V

V

CMDVCC and RSTIN); note 6

LOW level input voltage 0 − 0.8 V
HIGH level input voltage 1.8 − V

DD

V

1997 Mar 13 17

Philips Semiconductors Preliminary specification

IC card interface TDA8002

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Logic inputs (PRES, PRES); note 6

V

IL

V

IH

I

IL(PRES)

I

IH(PRES)

Protections

T

sd

I

CC(sd)

Timing

t

act

T

de

t

3

t

5

LOW level input voltage 0 0.3V
HIGH level input voltage 0.7V
LOW level input voltage on

VOL=0V −−−10 µA

DD

V

DD

pin PRES
HIGH level input voltage on

−−10 µA

pin PRES

shut-down local

− 135 −°C

temperature
shut-down current at V

activation sequence
duration

deactivation sequence
duration

start of the window for

CC

see Fig.9; guaranteed by
design

see Fig.11; guaranteed by
design

−−90 mA

− 180 220 µs

50 70 90 µs

−−130 µs

sending CLK to the card
end of the window for

150 −− µs

sending CLK to the card

DD

V

V

Notes

1. The tests for dynamic response of VCC are done at 1 Hz, 10 kHz, 100 kHz and 1 MHz, with a capacitive load of
100 nF.

2. It may be necessary to put capacitors from XTAL1 and XTAL2 to ground depending on the choice of crystal or
resonator.

3. When the oscillator is stopped in mode 1, XTAL1 is set to HIGH.

t

4. The transition time and duty cycle definitions are shown in:

δ

=

1

-------------- ­t1t2+

5. CLKOUT transition time and duty cycle do not need to be tested.

6. PRES and CMDVCC are active LOW; RSTIN and PRES are active HIGH.

1997 Mar 13 18

Philips Semiconductors Preliminary specification

IC card interface TDA8002

handbook, full pagewidth

APPLICATION INFORMATION

handbook, full pagewidth

CARD READ LM01

C5I

C1I

C6I

C2I

C7I

C3I

C8I

C4I

K1
K2

t

r

90% 90%

10%

Fig.13 Definition of transition times.

MODE

OFF

RSTIN

CMDVCC

V

RST
CLK

AUX1

PRES

AUX2

VUP

V

DDA

100

100

nF

nF

10%

t

1

28
27
26
25

CC

24
23

22

TDA8002A

21
20

19

I/O

18
17

S1

16
15 14

t

f

t

2

33 pF 33 pF

f = 14.75 MHz

XTAL1

1

XTAL2

2

I/OUC

3

AUX1UC

4

AUX2UC

5

ALARM

6

CLKSEL

7

CLKDIV1

8

CLKDIV2

9

STROBE

10

CLKOUT

11

DGND1

12

AGND

13

S2

100

nF

100

nF

10
µF

V

OH

1/2 V

V

OL

MGE741

CC

P1-0

P1-1
P1-2
P1-3
P1-4
P1-5
P1-6
P1-7
RST
P3-0

P3-1
P3-2
P3-3
P3-4
P3-5
P3-6
P3-7

XTAL2

XTAL1

V

SS

80C51

V

CC
P0-0
P0-1
P0-2
P0-3
P0-4
P0-5
P0-6
P0-7
EA
ALE
PSEN
P2-7
P2-6
P2-5
P2-4
P2-3
P2-2
P2-1
P2-0

+5 V

Fig.14 Application diagram (for more details, consult Application Note AN96096).

1997 Mar 13 19

MGE742

Philips Semiconductors Preliminary specification

IC card interface TDA8002

PACKAGE OUTLINES

SO28: plastic small outline package; 28 leads; body width 7.5 mm

D

c

y

Z

28

pin 1 index

1

e

15

14

w M

b

p

SOT136-1

E

H

E

Q

A

2

A

1

L

p

L

detail X

(A )

A

X

v M

A

A

3

θ

0 5 10 mm

scale

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

UNIT

mm

inches

Note

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

A

max.

2.65

0.10

OUTLINE

VERSION

SOT136-1

A

1

0.30

0.10

0.012

0.004

A2A

2.45

2.25

0.096

0.089

IEC JEDEC EIAJ

075E06 MS-013AE

0.25

0.01

b

3

p

0.49

0.32

0.36

0.23

0.019

0.013

0.014

0.009

(1)E(1) (1)

cD

18.1

7.6

7.4

0.30

0.29

1.27

0.050

17.7

0.71

0.69

REFERENCES

1997 Mar 13 20

eHELLpQ

10.65

10.00

0.42

0.39

1.4

0.055

1.1

0.4

0.043

0.016

1.1

1.0

0.043

0.039

PROJECTION

0.25

0.25 0.1

0.01

0.01

EUROPEAN

ywv θ

Z

0.9

0.4

0.035

0.004

0.016

ISSUE DATE

91-08-13

95-01-24

o

8

o

0

Philips Semiconductors Preliminary specification

IC card interface TDA8002

LQFP32: plastic low profile quad flat package; 32 leads; body 5 x 5 x 1.4 mm

c

y

X

A

H

E

E

A

2

A

A

25

32

24

17

Z

16

E

e

b

w M

p

pin 1 index

9

1

8

SOT401-1

Q

(A )

1

L

L

detail X

3

θ

p

Z

e

w M

b

p

D

H

D

D

B

v M

v M

0 2.5 5 mm

scale

DIMENSIONS (mm are the original dimensions)

UNIT

mm

A

max.

1.60

A

1A2A3bp

0.15

1.5

1.3

0.25

0.05

cE

0.27

0.18

0.17

0.12

(1)

(1) (1)(1)

D

5.1

4.9

eH

0.5

7.15

6.85

5.1

4.9

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

OUTLINE
VERSION

IEC JEDEC EIAJ

REFERENCES

SOT401-1

1997 Mar 13 21

A

B

H

D

LLpQZywv θ

E

1.0

0.75

0.70

0.2

0.45



0.57

0.12 0.1

7.15

6.85

EUROPEAN

PROJECTION

Z

D

0.95

0.95

0.55

0.55

ISSUE DATE

E

o

7

o

0

94-04-25
95-12-19

Philips Semiconductors Preliminary specification

IC card interface TDA8002

SOLDERING
Introduction

There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.

This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our

“IC Package Databook”

Reflow soldering

Reflow soldering techniques are suitable for all LQFP and
SO packages.

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.

Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.

Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.

Wave soldering

LQFP
Wave soldering is not recommended for LQFP packages.

This is because of the likelihood of solder bridging due to
closely-spaced leads and the possibility of incomplete
solder penetration in multi-lead devices.

(order code 9398 652 90011).

SO
Wave soldering techniques can be used for all SO

packages if the following conditions are observed:

• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.

• The longitudinal axis of the package footprint must be
parallel to the solder flow.

• The package footprint must incorporate solder thieves at
the downstream end.

ETHOD (LQFP AND SO)

M
During placement and before soldering, the package must

be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.

A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

Repairing soldered joints

Fix the component by first soldering two diagonally­opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.

If wave soldering cannot be avoided, the following
conditions must be observed:

• A double-wave (a turbulent wave with high upward

pressure followed by a smooth laminar wave)
soldering technique should be used.

• The footprint must be at an angle of 45° to the board

direction and must incorporate solder thieves
downstream and at the side corners.

Even with these conditions, do not consider wave
soldering LQFP packages LQFP48 (SOT313-2),
LQFP64 (SOT314-2) or LQFP80 (SOT315-1).

1997 Mar 13 22

Philips Semiconductors Preliminary specification

IC card interface TDA8002

DEFINITIONS

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

1997 Mar 13 23

Philips Semiconductors – a worldwide company

Argentina: see South America
Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,

Tel. [phone], Fax. [phone]
Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213,

Tel. [phone], Fax. [phone]
Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6,

220050 MINSK, Tel. [phone], Fax. [phone]

Belgium: see The Netherlands
Brazil: seeSouth America
Bulgaria: Philips Bulgaria Ltd., Energoproject, 15thfloor,

51 James Bourchier Blvd., 1407 SOFIA,
Tel. [phone], Fax. [phone]

Canada: PHILIPS SEMICONDUCTORS/COMPONENTS,
Tel. [phone]

China/Hong Kong: 501 Hong Kong Industrial Technology Centre,
72 Tat Chee Avenue, Kowloon Tong, HONG KONG,
Tel. [phone], Fax. [phone]

Colombia: see South America
Czech Republic: see Austria
Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S,

Tel. [phone], Fax. [phone]
Finland: Sinikalliontie 3, FIN-02630 ESPOO,

Tel. [phone], Fax. [phone]/xxx
France: 4 Rue du Port-aux-Vins, BP317, 92156 SURESNES Cedex,

Tel. [phone], Fax. [phone]
Germany: Hammerbrookstraße 69, D-20097 HAMBURG,

Tel. [phone], Fax. [phone]
Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS,

Tel. [phone], Fax. [phone]

Hungary: seeAustria
India: Philips INDIA Ltd, Shivsagar Estate, A Block, Dr. Annie Besant Rd.

Worli, MUMBAI 400 018, Tel. [phone], Fax. [phone]

Indonesia: see Singapore
Ireland: Newstead, Clonskeagh, DUBLIN 14,

Tel. [phone], Fax. [phone]
Israel: RAPAC Electronics, 7 Kehilat Saloniki St, TEL AVIV 61180,

Tel. [phone], Fax. [phone]
Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3,

20124 MILANO, Tel. [phone], Fax. [phone]
Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108,

Tel. [phone], Fax. [phone]
Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,

Tel. [phone], Fax. [phone]
Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,

Tel. [phone], Fax. [phone]
Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,

Tel. [phone]

Middle East: see Italy

Netherlands: Postbus 90050, 5600PB EINDHOVEN, Bldg. VB,

Tel. [phone], Fax. [phone]
New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,

Tel. [phone], Fax. [phone]
Norway: Box 1, Manglerud 0612, OSLO,

Tel. [phone], Fax. [phone]
Philippines: Philips Semiconductors Philippines Inc.,

106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. [phone], Fax. [phone]

Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA,
Tel. [phone], Fax. [phone]

Portugal: see Spain
Romania: see Italy
Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,

Tel. [phone], Fax. [phone]
Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231,

Tel. [phone], Fax. [phone]

Slovakia: see Austria
Slovenia: see Italy
South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,

2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000,
Tel. [phone], Fax. [phone]

South America: Rua do Rocio 220, 5th floor, Suite 51,
04552-903 São Paulo, SÃO PAULO - SP, Brazil,
Tel. [phone], Fax. [phone]

Spain: Balmes 22, 08007 BARCELONA,
Tel. [phone], Fax. [phone]

Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,
Tel. [phone], Fax. [phone]

Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. [phone], Fax. [phone]

Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,
TAIPEI, Taiwan Tel. [phone], Fax. [phone]

Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,
Tel. [phone], Fax. [phone]

Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,
Tel. [phone], Fax. [phone]

Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. [phone], Fax. [phone]

United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. [phone], Fax. [phone]

United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. [phone]

Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,

Tel. [phone], Fax.[phone]

For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications,
Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. [phone]

© Philips Electronics N.V. 1997 SCA53
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.

Internet: http://www.semiconductors.philips.com

Printed in The Netherlands 547047/1200/02/pp24 Date of release: 1997 Mar 13 Document order number: 9397 750 01547