Product specification
Supersedes data of 1995 Feb 01
File under Integrated Circuits, IC02
1996 Dec 12
Page 2
Philips SemiconductorsProduct specification
Smart card interfaceTDA8000; TDA8000T
FEATURES
• Two protected I/O lines
• VCC regulation (5 V ±4%, 100 mA max. with controlled
rise and fall times)
• VPP generation (12.5, 15 or 21 V ±2.5%, 50 mA max.
APPLICATIONS
• Pay TV
• Telematics
• Cashless payment
• Multipurpose card-readers, etc.
programmable by two bits, with controlled rise and fall
times)
• Clock generation (up to 8 MHz)
• Short-circuit, thermal and card extraction protections
• Two voltage supervisors (digital and analog supplies)
• Automatic activation and deactivation sequences via an
independent internal clock
• Enhanced ESD protections on card connections
(4 kV min.)
• ISO 7816 approval.
GENERAL DESCRIPTION
The TDA8000 is a complete, low-cost analog interface
which can be positioned between a smart card or a
memory card (ISO 7816) and a microcontroller. It is
approved for banking, telecom and pay TV applications.
The complete supply, protection and control functions are
realized with only a few external components, which
makes the TDA8000 very attractive for consumer
applications. Application suggestions and support is
available on request (see examples in
Chapter “Application information”).
card supply voltage4.85.05.2V
card supply current−−−100mA
high voltage supply for V
PP
programming currentread mode; VPP=5V−−−50mA
write mode; V
>5V−−−50mA
PP
deactivation/activation cycle
4.5−4.68V
−−30V
−−500µs
duration
P
tot
continuous total power
dissipation
TDA8000; T
see Fig.10
TDA8000T; T
amb
amb
= +70 °C;
= +70 °C;
−−2W
−−0.92W
see Fig.11
T
amb
operating ambient temperature0−+70°C
ORDERING INFORMATION
TYPE
NUMBER
NAMEDESCRIPTIONVERSION
PACKAGE
TDA8000DIP28plastic dual in-line package; 28 leads (600 mil)SOT117-1
TDA8000TSO28plastic small outline package; 28 leads; body width 7.5 mmSOT136-1
1996 Dec 122
Page 3
Philips SemiconductorsProduct specification
Smart card interfaceTDA8000; TDA8000T
BLOCK DIAGRAM
handbook, full pagewidth
ALARM
ALARM
I/O1(µC)
I/O2(µC)
RSTIN
OFF
START
WRITE
CLKDIV
CLKOUT
17
18
28
27
26
19
20
21
23
25
AND
ENABLE
V
DD
MAIN
SUPPLY
V
SUP
SUPERVISOR
DELAY
15161312
VOLTAGE
PROTECTIONS
TDA8000
LOGIC
PROTECTIONS
INTERNAL
CLOCK
CLOCK
CIRCUITRY
GENERATOR
ENABLE
V
CC
CLOCK
GND
22
CVNC
3
I/O1
2
I/O2
4
RST
9
PRES
8
PRES
14
V
CC
5
CLK
PSEL1
PSEL2
6
7
OSCILLATOR
12411
XTAL
CLKIN
Fig.1 Block diagram.
1996 Dec 123
V
PP
GENERATOR
V
H
10
MBH810
V
PP
Page 4
Philips SemiconductorsProduct specification
Smart card interfaceTDA8000; TDA8000T
PINNING
SYMBOL PINDESCRIPTION
XTAL1crystal connection
I/O22data line to/from the card
I/O13data line to/from the card
RST4card reset output
CLK5clock output to the card
PSEL16programming voltage selection input (see Table 1)
PSEL27programming voltage selection input (see Table 1)
PRES8card presence contact input (active LOW)
PRES9card presence contact input (active HIGH)
V
PP
V
H
10card programming voltage output
11high voltage supply for VPP generation
GND12ground
V
V
V
DD
CC
SUP
13positive supply voltage
14card supply output voltage
15voltage supervisor input
DELAY16external capacitor connection for delayed reset timing
ALARM17open-collector reset output for the microcontroller (active
HIGH)
ALARM18open-collector reset output for the microcontroller (active
LOW)
OFF19interrupt output to the microcontroller (active LOW)
START20microcontroller input for starting session (active LOW)
WRITE21control input for applying programming voltage to the card
(active LOW)
CVNC22internally generated 5 V reference, present when V
DD
is
on; to be decoupled externally (47 nF)
CLKDIV23input for dividing/not dividing the CLKOUT frequency by
two (active LOW)
CLKIN24external clock signal input
CLKOUT25clock output to the microcontroller, or another TDA8000
RSTIN26card reset input from the microcontroller (active HIGH)
I/O2(µC)27data line to/from the microcontroller; must not be left
open-circuit, tie to CVNC if not used
I/O1(µC)28data line to/from the microcontroller; must not be left
open-circuit, tie to CVNC if not used
page
XTAL
I/O2
I/O1
RST
CLK
PSEL1
PSEL2
PRES
PRES
V
PP
V
GND
V
DD
V
CC
H
1
2
3
4
5
6
7
TDA8000T
8
9
10
11
12
13
14
TDA8000
Fig.2 Pin configuration.
MBH809
28
27
26
25
24
23
22
21
20
19
18
17
16
15
I/O1(µC)
I/O2(µC)
RSTIN
CLKOUT
CLKIN
CLKDIV
CVNC
WRITE
START
OFF
ALARM
ALARM
DELAY
V
SUP
1996 Dec 124
Page 5
Philips SemiconductorsProduct specification
Smart card interfaceTDA8000; TDA8000T
FUNCTIONAL DESCRIPTION
Power supply
The circuit operates within a supply voltage range of
6.7 to 18 V. V
and GND are the supply pins. All card
DD
contacts remain inactive during power-up or power-down,
provided VDD does not rise or fall too fast (0.5 V/ms typ.).
P
OWER-UP
The logic part is powered first and is in the reset condition
until VDD reaches V
reaches V
OWER-DOWN
P
th4+Vhys4
When VDD falls below V
. The sequencer is blocked until V
th1
.
, an automatic deactivation of
th4
DD
the contacts is performed.
Voltage supervisor
This block surveys the 5 V supply of the microcontroller
) in order to deliver a defined reset pulse and to avoid
(V
SUP
any transients on card contacts during power-up or
power-down of V
SUP
.
The voltage supervisor remains active even if VDD is
powered-down.
OWER-UP
P
As long as V
is below V
SUP
th2+Vhys2
the capacitor C
DEL
connected to the pin DELAY, will be discharged. When
V
rises to the threshold level, C
SUP
will be recharged.
DEL
ALARM and ALARM remain active, and the sequencer is
blocked until the voltage on the pin DELAY reaches V
OWER-DOWN (see Fig.3)
P
If V
falls below V
SUP
th2
, C
will be discharged, ALARM
DEL
th3
andALARM become active, and an automatic deactivation
of the contacts is performed.
Clock circuitry (see Fig.4)
The clock signal (CLK) can be applied to the card by two
different methods:
1. Generation by a crystal oscillator: the crystal
(3 to 11 MHz) is connected to pin XTAL. Its frequency
is divided by two.
2. Use of a signal frequency already present in the
system and connected to the pin CLKIN (up to 8 MHz).
Pin XTAL has to be connected to GND via a 1 kΩ
resistor. In this event, the CLKOUT signal remains
LOW.
In both events the signal is buffered and enabled.
Pin CLKOUT may be used to clock a microcontroller.
The signal (
1
⁄2f
or f
xtal
if CLKDIV is HIGH) is available
xtal
when the circuit is powered up.
State diagram
Once activated, the circuit has six possible modes of
operation:
• Idle
• Activation
• Read
• Write
• Deactivation
• Fault.
Figure 5 shows how these modes are accessible.
DLE MODE
I
After reset, the circuit enters the IDLE state. A minimum
number of circuits are active while waiting for the
microcontroller to start a session:
• All card contacts are inactive
• Voltage generators are stopped
• Oscillator is running, providing CLKOUT
• Voltage supervisor is active
,
• Pins I/O1(µC) and I/O2(µC) are high impedance.
The OFF line is HIGH if a card is present (PRES and
PRES active) and LOW if a card is not present.
.
CTIVATION SEQUENCE
A
From the IDLE mode, the circuit enters the ACTIVATION
mode when the microcontroller sets the START line
(active LOW). The I/O(µC) signals must not be LOW.
The internal circuitry is activated, the internal clock starts
and the following ISO 7816 sequence is performed:
1. VCC rises from 0 to 5 V
2. I/Os are enabled
3. VPP rises from 0 to 5 V
4. No change
5. CLK is enabled
6. RST is enabled.
The typical time interval between two steps is 32 µs for the
first two steps and 64 µs for the other three. Timing is
derived from the internal clock (see Fig.6).
1996 Dec 125
Page 6
Philips SemiconductorsProduct specification
Smart card interfaceTDA8000; TDA8000T
Between steps 3 and 5, a HIGH level on pin RSTIN allows
the CLK signal to be applied to the card. This feature
facilitates a precise count of CLK periods while waiting for
the card to respond to a reset.
After step 5, RSTIN has no further action on CLK.
After step 6, RST is set to the complementary value of
RSTIN.
EAD MODE
R
When the activation sequence is completed and, after the
card has replied to its Answer-to-Reset, theTDA8000
enters the READ mode. Data is exchanged between the
card and the microcontroller via the I/O lines.
When it is required to write to the internal memory of the
card, the circuit is set to the WRITE mode by the
microcontroller.
Cards with EPROM memory require a programming
voltage (V
GENERATION
V
PP
PP
).
The circuit supports cards with VPP of 12.5, 15 or 21 V.
The selection of P is achieved by PSEL1 and PSEL2
according to Table 1.
DEACTIVATION SEQUENCE (see Fig.8)
When the session is completed, the microcontroller sets
the START line to its HIGH state.
The circuit then executes an automatic deactivation
sequence by counting back the sequencer:
1. Card reset (RST falls to LOW)
2. CLK is stopped
3. No change
4. VPP falls to 0 V
5. I/O1(µC) and I/O2(µC) become high impedance
6. V
falls to 0 V.
CC
The circuit returns to the IDLE mode on the next rising
edge of the sequencer clock.
P
ROTECTIONS
Main fault conditions are monitored by the circuit:
• Short-circuit on V
• Short-circuit on V
CC
PP
• Over current on I/Os
• Card extraction during transaction
• Overheating problem.
Table 1Card programming voltage selection
PSEL1PSEL2
PROGRAMMING
VOLTAGE P
LOWLOW5
LOWHIGH12.5
HIGHLOW15
HIGHHIGH21
In order to respect the ISO7816 slopes, the circuit
generates V
by charging and discharging an internal
PP
capacitor. The voltage on this capacitor is then amplified
by a power stage gain of 5, powered via an external supply
[30 V (max.)].
pin V
H
RITE MODE (see Fig.7)
W
When the microcontroller sets the WRITE line (active
LOW), the circuit enters the WRITE mode. VPP rises from
5 V to the selected value with a typical slew rate of 1 V/µs.
When the write operation is completed, the microcontroller
returns the WRITE line to its HIGH state, and VPP falls
back to 5 V with the same slew rate.
When one of these fault conditions is detected, the circuit
pulls the interrupt line OFF to its active LOW state and
returns to the FAULT mode.
AULT MODE (see Fig.9)
F
When a fault condition is written to the microcontroller via
the OFF line, the circuit initiates a deactivation sequence.
After the deactivation sequence has been completed, the
OFF line is reset to its HIGH state when the microcontroller
has reset the START line HIGH, except if the fault
condition was due to a card extraction.
Note
The two other causes of emergency deactivation (Power
failure detected on V
DD
or V
) do not act upon OFF.
SUP
WRITE has no action outside a session.
1996 Dec 126
Page 7
Philips SemiconductorsProduct specification
Smart card interfaceTDA8000; TDA8000T
handbook, full pagewidth
V
V
DELAY
ALARM
handbook, full pagewidth
SUP
Fig.3 ALARM and DELAY as a function of V
CLKOUT
÷ 2
V
+ V
th2
hys2
V
th2
V
th3
t
d
MGG818
(C
SUP
fixes the pulse width).
DEL
ENABLE
ENCLK
CLK
handbook, full pagewidth
CLKDIV
INPUT
IDLE
OSCINPUT
XTALCLKIN
Fig.4 Clock circuitry.
ACTIVATION
FAULTREADWRITEPDOWN
DEACTIVATION
Fig.5 State diagram.
MGG819
MGG820
1996 Dec 127
Page 8
Philips SemiconductorsProduct specification
Smart card interfaceTDA8000; TDA8000T
handbook, full pagewidth
INTERNAL CLOCK
SEQUENCER CLOCK
ENABLE RESET
PRES
OFF
START
V
CC
I/O
V
PP
CLK
RSTIN
RST
INTERNAL
t
act
t
d(clk)
t
3
123456
t
5
Fig.6 Activation sequence.
t
RST
MGG821
handbook, full pagewidth
START (LOW)
VCC (+5 V)
WRITE
(P)
(+5 V)
VPP (0 V)
CLK
RST (HIGH)
Fig.7 Read/Write; Read mode.
1996 Dec 128
MGG822
Page 9
Philips SemiconductorsProduct specification
Smart card interfaceTDA8000; TDA8000T
t
handbook, full pagewidth
OFF (HIGH)
INTERNAL CLOCK
SEQUENCER CLOCK
ENABLE RESET
START
V
CC
I/O
VPP (+5 V)
CLK
RESET-IN
RST
INTERNAL
de
handbook, full pagewidth
INTERNAL CLOCK
SEQUENCER CLOCK
ENABLE RESET
RESET-IN
START
PRES
OFF
V
CC
I/O
V
PP
CLK
Fig.8 Deactivation sequence after a normal session.
INTERNAL
123456
MGG823
RST
Fig.9 Deactivation after a card extraction during write mode.
1996 Dec 129
123456
MGG824
Page 10
Philips SemiconductorsProduct specification
Smart card interfaceTDA8000; TDA8000T
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOLPARAMETERCONDITIONSMIN.MAX.UNIT
V
V
V
V
V
V
V
V
P
T
V
DD
x1
H
PP
SUP
x2
x3
x4
tot
stg
es
supply voltage−0.3+18V
voltage on pins PSEL1, PSEL2, PRES,
−0.3V
DD
V
PRES, WRITE, START, OFF,
ALARM and RSTIN
voltage on pin V
voltage on pin V
voltage on pin V
H
PP
SUP
voltage on pins ALARM and DELAY−0.3V
voltage on pins XTAL, I/O1(µC), I/O2(µC),
−0.3+30V
−0.3V
H
−0.3+12V
SUP
−0.3+6.0V
V
V
CLKIN, CLKOUT, CLKDIV and CVNC
voltage on pins I/O1, I/O2, RST,
CLK and V
CC
continuous total power dissipationTDA8000; T
duration < 1 ms−0.3+7.0V
amb
= +70 °C;
−2W
note 1; see Fig.10
TDA8000T; T
amb
= +70 °C;
−0.92W
note 1; see Fig.11
storage temperature−55+150°C
electrostatic voltage on pins I/O1, I/O2, VCC,
−4+4kV
VPP, RST and CLK
electrostatic voltage on other pins−2+2kV
Note
1. P
tot=VDD
+VH×I
× (I
DD(unloaded)
H(unloaded)+VSUP
+ ∑I
× I
)+ICC× (VDD− VCC) + max.{(VH− VPP) × I
signals
+(VDD− CVNC) × I
SUP
CVNC.
Where ‘signals’ means all signal pins used, excluding the supply pins.
PP(read)
+(VH−VPP) × I
PP(write)
}
1996 Dec 1210
Page 11
Philips SemiconductorsProduct specification
Smart card interfaceTDA8000; TDA8000T
handbook, halfpage
4
P
tot
(W)
3
2
1
0
50050100150
Fig.10 Power derating curve (DIP28).
HANDLING
MBE256
o
T ( C)
amb
P
(W)
3
tot
2
1
0
50
handbook, halfpage
Fig.11 Power derating curve (SO28).
MBE255
0
50100150
o
T ( C)
amb
Each pin withstands the ESD test according to MIL-STD-883C class 3 for card contacts, class 2 for the remaining.
Method 3015 (HBM 1500 Ω, 100 pF) 3 pulses positive and 3 pulses negative; on each pin referenced to ground.
THERMAL CHARACTERISTICS
SYMBOLPARAMETERVALUEUNIT
R
th j-a
thermal resistance from junction to ambient in free air
WRITE = 0
P=5V3−7mA
P = 12.5 V5−10mA
P=15V6−11mA
P=21V8−13mA
− V
V
H
voltage drop−−2.2V
PP
1996 Dec 1213
Page 14
Philips SemiconductorsProduct specification
Smart card interfaceTDA8000; TDA8000T
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
Card supply voltage (VCC)
V
CC
I
CC
output voltageidle mode−−0.4V
active mode;
< 100 mA
I
CC
4.80−5.20V
output current−−−100mA
V
connected to GND−−−400mA
CC
SRslew rateup or down0.801.01.20V/µs
5 V reference output (CVNC)
V
CVNC
output voltage at CVNCI
< −15 mA4.55.05.5V
CVNC
Crystal connection (XTAL)
R
xtal(neg)
negative resistance at crystal3 MHz < fi< 11 MHz;
−−−300Ω
note 4
V
xtal
f
xtal
DC voltage at crystal3−4V
crystal resonant frequency3−11MHz
External clock input (CLKIN)
f
ext
V
IL
V
IH
I
IL
I
IH
C
I
frequency at CLKINnote 20−8MHz
LOW level input voltage0−0.8V
HIGH level input voltage1.5−5V
LOW level input currentVIL=0V−−−20µA
HIGH level input currentVIH=2V−−20µA
input capacitance−−5pF
Clock output (CLKOUT)
f
CLKOUT
V
OL
V
OH
, t
t
r
f
δduty factor
frequency on CLKOUT1−8MHz
LOW level output voltageIOL=1mA−−0.4V
HIGH level output voltageVOH= −200 µA3−−V
= −10 µA4−−V
V
OH
rise and fall timesCL= 30 pF; note 2−−25ns
CLKDIV = 0;
45−55%
CL= 30 pF; note 2
CLKDIV = 1;
40−60%
CL= 30 pF; note 2
∆δ/∆θthermal drift on duty factorDIP and SO packages−−0.1−%/C
1996 Dec 1214
Page 15
Philips SemiconductorsProduct specification
Smart card interfaceTDA8000; TDA8000T
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
Data lines [I/O1, I/O2, I/O1(µC), I/O2(µC)]; note 5
V
OH
V
OL
I
IL
V
OH
V
OL
I
IL
V
IDLE
Z
IDLE
R
pu
, t
t
r
f
Protections
T
sd
I
CC(sd)
I
PP(sd)
I
I/O(sd)
Timing
t
act
t
de
t
3
HIGH level output voltage on I/O4.5 < V
4.5<V
IOH= −20 µA
4.5<V
4.5<V
IOH= −200 µA
LOW level output voltage on I/OI
I/O
= 1 mA;
I/O(µC) grounded
LOW level input current on I/O(µC) I/O(µC) grounded;
I
=0
I/O
I/O(µC) grounded;
I/O connected to V
HIGH level output voltage on
4.5<V
I/O(µC)
LOW level output voltage on
I/O(µC)
I
I/O(µC)
I/O grounded
LOW level input current on I/OI/O grounded; I
I/O grounded; I/O(µC)
connected to V
voltage on I/O outside a session−−0.4V
impedance on I/O(µC) outside a
session
internal pull-up resistance between
I/O and V
CC
rise and fall timesCi=Co=30pF−−1µs
shut-down local temperature−135−°C
shut-down current at V
shut-down current at V
CC
PP
shut-down current at I/Ofrom I/O to I/O(µC)3−5mA
activation sequence durationsee Fig.6250−500µs
deactivation sequence durationsee Fig.8250−500µs
start of the window for sending
see Fig.6−−140µs
CLK to the card
SUP
I/O(µC)
SUP
I/O(µC)
< 5.5;
< 5.5;
< 5.5;
< 5.5;
4−VCC+ 0.2V
2.4−−V
−−65mV
−−−500µA
−−−5mA
CC
< 5.54−V
I/O
= 1 mA;
I/O(µC)
−−70mV
=0 −−−500µA
−−−5mA
SUP
10−−MΩ
172023kΩ
−175−−230mA
−90−−140mA
SUP
+ 0.2V
1996 Dec 1215
Page 16
Philips SemiconductorsProduct specification
Smart card interfaceTDA8000; TDA8000T
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
t
5
t
st
t
d(clk)
Notes
1. START, WRITE, CLKDIV and PRES are active LOW; RSTIN and PRES are active HIGH.
2. The transition time and duty factor definitions are shown in Fig.12;.
3. P is the card programming voltage set by pins PSEL1 and PSEL2.
4. This condition ensures correct start-up of the oscillator with crystals having series resistance up to 100 Ω.
5. The path between I/O and I/O(µC) is as follows (see Fig.13):
a) Clamp to VCC.
b) 20 kΩ pull-up resistor to VCC; thus VOH on I/O.
c) Two opposite npn transistors with sensing pnp transistor.
d) Clamp to V
e) The base current of the npn transistor is decreasing when their collector current increases. This means the
end of the window for sending CLK
see Fig.6160−−µs
to the card
maximum pulse width on START
−−30µs
before VCC starts rising
delay between RSTIN and CLKsee Fig.6−−2µs
t
=
1
-------------- t1t2+
on I/O and I/O(µC),
OL
δ
; thus VOH on I/O(µC).
SUP
voltage drop is very low for small currents and becomes maximum for some mA. Thus V
current limits, and high impedance feature. The output current from I/O and I/O(µC) when the line is open-circuit
is the sum of the pull-up current and the base currents.
handbook, full pagewidth
t
r
10%
90%
t
1
t
f
90%
Fig.12 Definition of transition times.
1996 Dec 1216
10%
V
OH
1.5 V
V
OL
t
2
MBH856
Page 17
Philips SemiconductorsProduct specification
Smart card interfaceTDA8000; TDA8000T
INTERNAL PIN CONFIGURATION
handbook, full pagewidth
PSEL1
PSEL2
XTAL
I/O2
I/O1
RST
CLK
PRES
PRES
V
PP
V
GND
V
DD
V
CC
V
SUP
100
µA
100
µA
V
CC
5 kΩ
100 Ω
VCC
10 kΩ
50 Ω
20
µA
as PSEL1
as PSEL1
as PSEL1
2.5
H
kΩ
625
Ω
V
20 kΩ
1.25
kΩ
1.25
kΩ
CC
V
CC
V
CC
1.25 V
250
V
CC
100
µA
TDA8000
210
Ω
10 kΩ
10 k
V
DD
Ω
100
µA
V
H
2.5 V
Ω
1.25 V
20
µA
1350
650
V
SUP
1.5 V
Ω
Ω
V
100
5 V
7 kΩ
DD
µA
100
µA
5 V
2.5 V
100
µA
20 kΩ
400
as PSEL1
as PSEL1
as PSEL1
20
µA
µA
V
SUP
2.5
µA
4690
Ω
5310
Ω
I/O1(µC)
I/O2(µC)
RSTINas PSEL1
CLKOUT
CLKIN
CLKDIV
CVNC
WRITE
START
OFF
ALARM
ALARM
DELAY
V
SUP
Fig.13 Internal pin configuration.
1996 Dec 1217
MBE254
Page 18
Philips SemiconductorsProduct specification
Smart card interfaceTDA8000; TDA8000T
APPLICATION INFORMATION
handbook, full pagewidth
V
CC
RST
PORT 1
INT 1
80C51
MICRO-
CONTROLLER
5 V
10 µF
CVNG
ALARM
ALARM
I/O1(µC)
I/O2(µC)
RSTIN
OFF
START
WRITE
CLKDIV
CLKOUT
P
SEL1
P
SEL2
V
SUP
VOLTAGE
SUPERVISOR
PROTECTIONS
LOGIC
INTERNAL
CLOCK
CLOCK
CIRCUITRY
47 nF
DELAY
ENABLE
12 V
22 µF
V
DD
MAIN
SUPPLY
TDA8000
PROTECTIONS
V
CC
GENERATOR
CLOCK
ENABLE
V
PP
GENERATOR
GND
CVNC
I/O1
I/O2
RST
PRES
PRES
V
CC
CLK
V
PP
5.6 V
100 nF
C1
C5
C6
C2
C7
C3
C8
C4
CARD SOCKET
OSC
XTAL
1 kΩ
3.58 MHz
Fig.14 Typical application within a consumer product.
1996 Dec 1218
MGG825
V
H
25 VCLKIN
Page 19
Philips SemiconductorsProduct specification
Smart card interfaceTDA8000; TDA8000T
handbook, full pagewidth
2
I
C
COM
12 V
25 V
10
µF
10
µF
V
RST
DD
INT1
SDA
PORT
SCL
PORT
1
80C51
MICRO-
CONTROLLER
XTAL1
XTAL2
CVNC
ALARM
OFF
START
WRITE
RSTIN
I/O1(µC)
I/O2(µC)
P
SEL1
P
SEL2
CLKDIV
CLKOUT
100 nF
ALARM
V
SUP
TDA8000
CVNC
12 V 25 V
V
V
DD
PRES
PRES
V
RST
CLK
V
H
CC
PP
I/O1
(1)
C1
C2
C3
C4
C5
C6
C7
GND
DELAYGNDGNDCLKINXTAL
47 nF
(1) If pin VH is not connected to 25 V, it should be connected to VDD.
I/O2
7.16 MHz
CARD
SOCKET
MGG826
Fig.15 Application in a remote card reader; the microcontroller is clocked and powered by the TDA8000 interface
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
A
A
UNIT
inches
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
max.
mm
OUTLINE
VERSION
SOT117-1
12
min.
max.
0.066
0.051
IEC JEDEC EIAJ
051G05MO-015AH
1.7
1.3
b
b
1
0.53
0.38
0.020
0.014
0.32
0.23
0.013
0.009
REFERENCES
cD EweM
(1)(1)
36.0
35.0
1.41
1.34
1996 Dec 1220
14.1
13.7
0.56
0.54
(1)
92-11-17
95-01-14
Z
max.
1.75.10.514.0
0.0670.200.0200.16
L
3.9
3.4
EUROPEAN
PROJECTION
M
E
15.80
15.24
0.62
0.60
H
17.15
15.90
0.68
0.63
0.252.5415.24
0.010.100.60
ISSUE DATE
e
1
0.15
0.13
Page 21
Philips SemiconductorsProduct specification
Smart card interfaceTDA8000; TDA8000T
SO28: plastic small outline package; 28 leads; body width 7.5 mm
D
c
y
Z
28
pin 1 index
1
e
15
14
w M
b
p
SOT136-1
E
H
E
Q
A
2
A
1
L
p
L
detail X
(A )
A
X
v M
A
A
3
θ
0510 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
mm
inches
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
A
max.
2.65
0.10
OUTLINE
VERSION
SOT136-1
A
0.30
0.10
0.012
0.004
A2A
1
2.45
2.25
0.096
0.089
IEC JEDEC EIAJ
075E06 MS-013AE
0.25
0.01
b
3
p
0.49
0.32
0.36
0.23
0.019
0.013
0.014
0.009
(1)E(1)(1)
cD
18.1
7.6
7.4
0.30
0.29
1.27
0.050
17.7
0.71
0.69
REFERENCES
1996 Dec 1221
eHELLpQ
10.65
10.00
0.42
0.39
1.4
0.055
1.1
0.4
0.043
0.016
1.1
1.0
0.043
0.039
PROJECTION
0.25
0.250.1
0.01
0.01
EUROPEAN
ywvθ
Z
0.9
0.4
0.035
0.004
0.016
ISSUE DATE
91-08-13
95-01-24
o
8
o
0
Page 22
Philips SemiconductorsProduct specification
Smart card interfaceTDA8000; TDA8000T
SOLDERING
Plastic dual in-line packages
Y DIP OR WAVE
B
The maximum permissible temperature of the solder is
260 °C; this temperature must not be in contact with the
joint for more than 5 s. The total contact time of successive
solder waves must not exceed 5 s.
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified storage maximum. If the printed-circuit board has
been pre-heated, forced cooling may be necessary
immediately after soldering to keep the temperature within
the permissible limit.
EPAIRING SOLDERED JOINTS
R
Apply a low voltage soldering iron below the seating plane
(or not more than 2 mm above it). If its temperature is
below 300 °C, it must not be in contact for more than 10 s;
if between 300 and 400 °C, for not more than 5 s.
Plastic small outline packages
YWAVE
B
During placement and before soldering, the component
must be fixed with a droplet of adhesive. After curing the
adhesive, the component can be soldered. The adhesive
can be applied by screen printing, pin transfer or syringe
dispensing.
Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder bath is
10 s, if allowed to cool to less than 150 °C within 6 s.
Typical dwell time is 4 s at 250 °C.
A modified wave soldering technique is recommended
using two solder waves (dual-wave), in which a turbulent
wave with high upward pressure is followed by a smooth
laminar wave. Using a mildly-activated flux eliminates the
need for removal of corrosive residues in most
applications.
Y SOLDER PASTE REFLOW
B
Reflow soldering requires the solder paste (a suspension
of fine solder particles, flux and binding agent) to be
applied to the substrate by screen printing, stencilling or
pressure-syringe dispensing before device placement.
Several techniques exist for reflowing; for example,
thermal conduction by heated belt, infrared, and
vapour-phase reflow. Dwell times vary between 50 and
300 s according to method. Typical reflow temperatures
range from 215 to 250 °C.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 min at 45 °C.
EPAIRING SOLDERED JOINTS (BY HAND-HELD SOLDERING
R
IRON OR PULSE
-HEATED SOLDER TOOL)
Fix the component by first soldering two, diagonally
opposite, end pins. Apply the heating tool to the flat part of
the pin only. Contact time must be limited to 10 s at up to
300 °C. When using proper tools, all other pins can be
soldered in one operation within 2 to 5 s at between 270
and 320 °C. (Pulse-heated soldering is not recommended
for SO packages.)
For pulse-heated solder tool (resistance) soldering of VSO
packages, solder is applied to the substrate by dipping or
by an extra thick tin/lead plating before package
placement.
1996 Dec 1222
Page 23
Philips SemiconductorsProduct specification
Smart card interfaceTDA8000; TDA8000T
DEFINITIONS
Data sheet status
Objective specificationThis data sheet contains target or goal specifications for product development.
Preliminary specificationThis data sheet contains preliminary data; supplementary data may be published later.
Product specificationThis data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1996 Dec 1223
Page 24
Philips Semiconductors – a worldwide company
Argentina: see South America
Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +1 800 234 7381
Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Tel. +381 11 625 344, Fax.+381 11 635 777
For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications,
Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Internet: http://www.semiconductors.philips.com
Printed in The Netherlands537021/1200/04/pp24 Date of release: 1996 Dec 12Document order number: 9397 750 01383
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