Datasheet TDA4680WP, TDA4680 Datasheet (Philips)

INTEGRATED CIRCUITS

DATA SH EET

TDA4680

Video processor with automatic
cut-off and white level control

Product specification
Supersedes data of April 1993
File under Integrated Circuits, IC02

1996 Oct 25

Philips Semiconductors Product specification

Video processor with automatic cut-off
and white level control

FEATURES

• Operates from an 8 V DC supply

• Black level clamping of the colour difference, luminance

and RGB input signals with coupling-capacitor DC level
storage

• Two fully-controlled, analog RGB inputs, selected either
by fast switch signals or via I2C-bus

• Saturation, contrast and brightness adjustment via
I2C-bus

• Same RGB output black levels for Y/CD and RGB input
signals

• Timing pulse generation from either a 2 or 3-level
sandcastle pulse for clamping, horizontal and vertical
synchronization, cut-off and white level timing pulses

• Automatic cut-off control with picture tube leakage
current compensation

• Software-based automatic white level control or fixed
white levels via I

• Cut-off and white level measurement pulses in the last
4 lines of the vertical blanking interval (I2C-bus selection
for PAL, SECAM, or NTSC, PAL-M)

• Increased RGB signal bandwidths for progressive scan
and 100 Hz operation (selected via I2C-bus)

• Two switch-on delays to prevent discolouration before
steady-state operation

• Average beam current and peak drive limiting

• PAL/SECAM or NTSC matrix selection via I2C-bus

• Three adjustable reference voltage levels (via I2C-bus)

for automatic cut-off and white level control

• Emitter-follower RGB output stages to drive the video
output stages

• Hue control output for the TDA4555, TDA4650/T,
TDA4655/T or TDA4657.

2

C-bus

TDA4680

GENERAL DESCRIPTION

The TDA4680 is a monolithic integrated circuit with a
colour difference interface for video processing in TV
receivers. Its primary function is to process the luminance
and colour difference signals from multistandard colour
decoders, TDA4555, TDA4650/T, TDA4655/T or
TDA4657, Colour Transient Improvement (CTI) IC,
TDA4565, Picture Signal Improvement (PSI) IC,
TDA4670, or from a feature module.

The required input signals are:

• Luminance and negative colour difference signals

• 2 or 3-level sandcastle pulse for internal timing pulse

generation

• I2C-bus data and clock signals for microcontroller
control.

Two sets of analog RGB colour signals can also be
inserted, e.g. one from a peritelevision connector and the
other from an on-screen display generator; both inputs are
fully-controlled internally. The TDA4680 includes full
I2C-bus control of all parameters and functions with
automatic cut-off and white level control of the picture tube
cathode currents. It provides RGB output signals for the
video output stages.

There is a very similar IC TDA4681 available. The only
differences are in the NTSC matrix.

ORDERING INFORMATION

TYPE NUMBER

NAME DESCRIPTION VERSION

TDA4680 DIP28 plastic dual in-line package; 28 leads (600 mil) SOT117-1
TDA4680WP PLCC28 plastic leaded chip carrier; 28 leads SOT261-2

1996 Oct 25 2

PACKAGE

Philips Semiconductors Product specification

Video processor with automatic cut-off

TDA4680

and white level control

QUICK REFERENCE DATA

SYMBOL PARAMETER MIN. TYP. MAX. UNIT

V

P

I

P

V

8(p-p)

V

6(p-p)

V

7(p-p)

V

14

V

i(p-p)

V

o(b-w)

T

amb

supply voltage (pin 5) 7.2 8.0 8.8 V
supply current (pin 5) − 85 − mA
luminance input (peak-to-peak value) − 0.45 − V

−(B − Y) input (peak-to-peak value) − 1.33 − V

−(R − Y) input (peak-to-peak value) − 1.05 − V

3-level sandcastle pulse

H+V − 2.5 − V
H − 4.5 − V
BK − 8.0 − V

2-level sandcastle pulse

H+V − 2.5 − V

BK − 4.5 − V
RGB input signals at pins 2, 3, 4, 10, 11 and 12 (peak-to-peak value) − 0.7 − V
RGB outputs at pins 24, 22 and 20 (black-to-white value) − 2.0 − V
operating ambient temperature 0 − 70 °C

1996 Oct 25 3

Philips Semiconductors Product specification

Video processor with automatic cut-off and
white level control

BLOCK DIAGRAM

C

R

leakage,

cut-off and

white level

current

input

AND

3 x 2-BIT

REGISTERS

WHITE LEVEL

RAR

3 x 6-BIT

cut-off

white

level

PONRES

REGISTERS,

REFERENCE

D/A CONVERTER

control

W

R

control

19

WHITE LEVEL

AND CUT-OFF

leakage

storage

18

17

COMPARATORS

peak drive

limiting

storage

16

average

15

beam

current

BCOF

D/A

3 x 6-BIT

CONVERTERS

RGB

outputs

R

G

242220

OUTPUT

ADJUST,

CUT-OFF

R

G

POINT

WHITE

ADJUST

R

G

B

STAGES

B

B

TDA4680

MED693

cut-off storage

R

GB

21 23 25

9

hue control voltage

26

PONRES, CB0 and CB1,

CG0 and CG1, CR0 and CR1

A75 to A70, A85 to A80, A95 to A90

27

SDA

6-BIT D/A

CONVERTER

DELAYS

SWITCH-ON

1ST AND 2ND

BK

A45 to A40, A55 to A50, A65 to A60

AA5 to AA0

A05 to A00, A15 to A10, A25 to A20, A35 to A30

C-BUS

2

I

TRANSCEIVER

28

SCL

C-bus

2

I

TDA4680

BREN

SANDCASTLE

14

sandcastle

pulse

AND

PEAK DRIVE

TIMING

GENERATOR

(H)

H + V

PULSE

DETECTOR

BCOF, FSBL, FSWL, WPEN,

VBW2, VBW1, VBW0

SC5

DELOF

2 x 8-BIT

LIMITING

AVERAGE

BEAM CURRENT

timing

pulses

SATOF

FSDIS2, FSON2,

NMEN

CONTROL

REGISTERS

D/A

4 x 6-BIT

CONVERTERS

Y-MATRIX

FSDIS1, FSON1

101112

13

1

1

1

R

G

FSW

1

B

ADJUST,

BLANKING 2,

BRIGHTNESS

MEASUREMENT

B

R

G

ADJUST

SATURATION

AND CONTRAST

B

R

G

BLANKING 1

FAST SIGNAL

SOURCE SWITCH,

B

R

G

NTSC

MATRIX

PAL/SECAM,

8

7

6

Y

−(R − Y)

−(B − Y)

PULSES

1
2

FSW

handbook, full pagewidth

Fig.1 Block diagram.

5

SUPPLY

2

3

4

2

2

2

B

R

G

P

V = 8 V

C-bus data and

2

control signals

I

1996 Oct 25 4

Philips Semiconductors Product specification

Video processor with automatic cut-off
and white level control

PINNING

SYMBOL PIN DESCRIPTION

FSW

2

R

2

G

2

B

2

V

P

−(B − Y) 6 colour difference input −(B − Y)

−(R − Y) 7 colour difference input −(R −Y)

Y 8 luminance input
GND 9 ground
R

1

G

1

B

1

FSW

1

SC 14 sandcastle pulse input
BCL 15 average beam current limiting input

1 fast switch 2 input
2 red input 2
3 green input 2
4 blue input 2
5 supply voltage

10 red input 1
11 green input 1
12 blue input 1
13 fast switch 1 input

TDA4680

SYMBOL PIN DESCRIPTION

C

PDL

C

L

WI 18 white level measurement input
CI 19 cut-off measurement input
B

O

C

B

G

O

C

G

R

O

C

R

HUE 26 hue control output
SDA 27 I
SCL 28 I

storage capacitor for peak drive

16

limiting

17 storage capacitor for leakage current

20 blue output
21 blue cut-off storage capacitor
22 green output
23 green cut-off storage capacitor
24 red output
25 red cut-off storage capacitor

2

C-bus serial data input/output

2

C-bus serial clock input

handbook, halfpage

FSW

R
G

B

V

−(B − Y)

−(R − Y)

GND

R
G

B

FSW

SC

2
2
2
2

P

Y

1
1
1
1

1
2
3
4
5
6
7
8

9
10
11
12
13
14

TDA4680

MED694

SCL

28

SDA

27

HUE

26

V

5

−(B − Y)

−(R − Y)

GND

R
G

P

6
7

Y

8
9

10

1

11

1

C

25

R

R

24

O

C

23

G

G

22

O

C

21

B

B

20

O

CI

19

WI

18

C

17

L

C

16

PDL

BCL

15

B2G2R2FSW2SCL
4

3

2

1

28

TDA4680WP

12

13

14

15

1

1

B

SC

FSW

16

BCLCPDL

SDA
27

17

L

C

HUE
26

18
WI

MED695

C

25

R

R

24

O

C

23

G

G

22

O

C

21

B

B

20

O

CI

19

Fig.2 Pin configuration for DIP-version.

1996 Oct 25 5

Fig.3 Pin configuration for PLCC-version.

Philips Semiconductors Product specification

Video processor with automatic cut-off
and white level control

I2C-BUS
Control

2

The I

C-bus transmitter/receiver provides the data bytes to

select and adjust the following functions and parameters:

• Brightness adjust

• Saturation adjust

• Contrast adjust

• Hue control voltage

• RGB gain adjust

• RGB reference voltage levels

• Peak drive limiting

• Selection of the vertical blanking interval and

measurement lines for cut-off and white level control
according to transmission standard

• Selects either 3-level or 2-level (5 V) sandcastle pulse

• Enables/disables input clamping pulse delay

• Enables/disables white level control

• Enables cut-off control; enables output clamping

• Enables/disables full screen white level

• Enables/disables full screen black level

• Selects either PAL/SECAM or NTSC matrix

• Enables saturation adjust; enables nominal saturation

• Enables/disables synchronization of the execution of

I2C-bus commands with the vertical blanking interval

• Reads the result of the comparison of the nominal and
actual RGB signal levels for automatic white level
control.

TDA4680

2

C-BUS RECEIVER (MICROCONTROLLER WRITE MODE)

I
Each transmission to/from the I2C-bus transceiver

consists of at least three bytes following the START bit.
Each byte is acknowledged by an acknowledge bit
immediately following each byte. The first byte is the
Module Address (MAD) byte, also called slave address
byte. This consists of the module address, 1000100 for the
TDA4680, plus the R/W bit (see Fig.4). When the
TDA4680 is a slave receiver (R/W = 0) the module
address byte is 10001000 (88H). When the TDA4680 is a
slave transmitter (R/W = 1) the module address byte is
10001001 (89H).

The length of a data transmission is unrestricted, but the
module address and the correct sub-address must be
transmitted before the data byte(s). The order of data
transmission is shown in Figs 5 and 6.
Without auto-increment (BREN = 0 or 1) the module
address (MAD) byte is followed by a Sub-Address (SAD)
byte and one data byte only (see Fig.5).

2

C-bustransmitter/receiver and data transfer

I

2

I

C-BUS SPECIFICATION

The I2C-bus is a bidirectional, two-wire, serial data bus for
intercommunication between ICs in a system.
The microcontroller transmits/receives data from the
I2C-bus transceiver in the TDA4680 over the serial data
line SDA (pin 27) synchronized by the serial clock line SCL
(pin 28). Both lines are normally connected to a positive
voltage supply through pull-up resistors. Data is
transferred when the SCL line is LOW. When SCL is HIGH
the serial data line SDA must be stable. A HIGH-to-LOW
transition of the SDA line when SCL is HIGH is defined as
a START bit. A LOW-to-HIGH transition of the SDA line
when SCL is HIGH is defined as a STOP bit.
Each transmission must start with a START bit and end
with a STOP bit. The bus is busy after a START bit and is
only free again after a STOP bit has been transmitted.

1996 Oct 25 6

Philips Semiconductors Product specification

Video processor with automatic cut-off
and white level control

handbook, full pagewidth

MSB LSB

01

module address

Fig.4 The module address byte.

TDA4680

00100

ACKX

R/W

MED696

handbook, full pagewidth

handbook, full pagewidth

STOSAD

STOP

condition

MED697

START

condition

MADSTA

data byte

Fig.5 Data transmission without auto-increment (BREN = 0 or 1).

SAD

START

condition

MADSTA

data byte

data bytes

STO

STOP

condition

MED698

Fig.6 Data transmission with auto-increment (BREN = 0).

1996 Oct 25 7

Philips Semiconductors Product specification

Video processor with automatic cut-off
and white level control

AUTO-INCREMENT
The auto-increment format enables quick slave receiver

initialization by one transmission, when the I2C-bus control
bit BREN = 0 (see control register bits of Table 1).
If BREN = 1 auto-increment is not possible.

If the auto-increment format is selected, the MAD byte is
followed by a SAD byte and by the data bytes of
consecutive sub-addresses (Fig.6).

All sub-addresses from 00H to 0FH are automatically
incremented, the sub-address counter wraps round from
0FH to 00H. Reserved sub-addresses 0BH, 0EH and 0FH
are treated as legal but have no effect. Sub-addresses
outside the range 00H and 0FH are not acknowledged by
the device and neither auto-increment nor any other
internal operation takes place (for versions V1 to V5
sub-addresses outside the range 00H and 0FH are
acknowledged but neither auto-increment nor any other
internal operation takes place).

Sub-addresses are stored in the TDA4680 to address the
following parameters and functions (see Table 1):

• Brightness adjust

• Saturation adjust

• Contrast adjust

• Hue control voltage

• RGB gain adjust

• RGB reference voltage levels

• Peak drive limiting adjust

• Control register functions.

The data bytes D7 to D0 (see Table 1) provide the data of
the parameters and functions for video processing.

ONTROL REGISTER 1

C
VBWx (Vertical Blanking Window):

x = 0, 1 or 2. VBWx selects the vertical blanking interval
and positions the measurement lines for cut-off and
white level control.

TDA4680

WPEN (White Pulse Enable):

0 = white measuring pulse disabled
1 = white measuring pulse enabled.

BREN (Buffer Register Enable):

0 = new data is executed as soon as it is received
1 = data is stored in buffer registers and is transferred to

the data registers during the next vertical blanking
interval.

2

The I

C-bus transceiver does not accept any new data

until this data is transferred into the data registers.

DELOF (Delay Off) delays the leading edge of clamping
pulses:

0 = delay enabled
1 = delay disabled.

SC5 (SandCastle 5 V):

0 = 3-level sandcastle pulse
1 = 2-level (5 V) sandcastle pulse.

C

ONTROL REGISTER 2

FSON2 (Fast Switch 2 ON)
FSDIS2 (Fast Switch 2 Disable)
FSON1 (Fast Switch 1 ON)
FSDIS1 (Fast Switch 1 Disable)
The RGB input signals are selected by FSON2 and

FSON1 or FSW2 and FSW1:

• FSON2 has priority over FSON1

• FSW2 has priority over FSW

• FSDIS1 and FSDIS2 disable FSW1 and FSW

(see Table 3).

BCOF (Black level Control Off):

0 = automatic cut-off control enabled
1 = automatic cut-off control disabled; RGB outputs are

clamped to fixed DC levels.

1

2

The actual lines in the vertical blanking interval after the
start of the vertical pulses selected as measurement lines
for cut-off and white level control are shown in Table 2.

The standards marked with (*) are for progressive line
scan at double line frequency (2fL), i.e. approximately
31 kHz.

NMEN (NTSC Matrix Enable):

0 = PAL/SECAM matrix
1 = NTSC matrix.

1996 Oct 25 8

FSBL (Full Screen Black Level):

0 = normal mode
1 = full screen black level (cut-off measurement level

during full field).

FSWL (Full Screen White Level):

0 = normal mode
1 = full screen white level (white measurement level

during full field).

Philips Semiconductors Product specification

Video processor with automatic cut-off
and white level control

SATOF (Saturation control Off):

0 = saturation control enabled
1 = saturation control disabled, nominal saturation

enabled.

2

C-BUS TRANSMITTER (MICROCONTROLLER READ MODE)

I
As an I2C-bus transmitter, R/W = 1, the TDA4680 sends a

data byte from the status register to the microcontroller.
The data byte consists of following bits: PONRES, CB1,
CB0, CG1, CG0, CR1, CR0 and 0, where PONRES is the
most significant bit.

PONRES (Power On Reset) monitors the state of
TDA4680’s supply voltage:

0 = normal operation
1 = supply voltage has dropped below approximately

6.0 V (usually occurs when the TV receiver is switched
on or the supply voltage was interrupted).

When PONRES changes state from a logic LOW to a logic
HIGH all data and function bits are set to logic LOW.

TDA4680

2-

BIT WHITE LEVEL ERROR SIGNAL (see Table 4)

CB1, CB0 = 2-bit white level of the blue channel.
CG1, CG0 = 2-bit white level of the green channel.
CR1, CR0 = 2-bit white level of the red channel.

Table 1 Sub-address (SAD) and data bytes; note 1

FUNCTION

Brightness 00 0 0 A05 A04 A03 A02 A01 A00
Saturation 01 0 0 A15 A14 A13 A12 A11 A10
Contrast 02 0 0 A25 A24 A23 A22 A21 A20
Hue control voltage 03 0 0 A35 A34 A33 A32 A31 A30
Red gain 04 0 0 A45 A44 A43 A42 A41 A40
Green gain 05 0 0 A55 A54 A53 A52 A51 A50
Blue gain 06 0 0 A65 A64 A63 A62 A61 A60
Red level reference 07 0 0 A75 A74 A73 A72 A71 A70
Green level reference 08 0 0 A85 A84 A83 A82 A81 A80
Blue level reference 09 0 0 A95 A94 A93 A92 A91 A90
Peak drive limit 0A 0 0 AA5 AA4 AA3 AA2 AA1 AA0
Reserved 0B XXXXXXXX
Control register 1 0C SC5 DELOF BREN WPEN NMEN VBW2 VBW1 VBW0
Control register 2 0D SATOF FSWL FSBL BCOF FSDIS2 FSON2 FSDIS1 FSON1
Reserved 0E XXXXXXXX
Reserved 0F XXXXXXXX

SAD

(HEX)

MSB LSB

D7 D6 D5 D4 D3 D2 D1 D0

Note

1. X = don’t care.

1996 Oct 25 9

Philips Semiconductors Product specification

Video processor with automatic cut-off

TDA4680

and white level control

Table 2 Cut-off and white level measurement lines; notes 1 to 3

VBW2 VBW1 VBW0 R G B WHITE STANDARD

0 0 0 19 20 21 22 PAL/SECAM
0 0 1 16 17 18 19 NTSC/PAL M
0 1 0 22 23 24 25 PAL/SECAM (EB)
1 0 0 38, 39 40, 41 42, 43 44, 45 PAL*/SECAM*
1 0 1 32, 33 34, 35 36, 37 38, 39 NTSC*/PALM*
1 1 0 44, 45 46, 47 48, 49 50, 51 PAL*/SECAM* (EB)

Notes

1. The line numbers given are those of the horizontal pulse counts after the start of the vertical component of the

sandcastle pulse.

2. * line frequency of approximately 31 kHz.

3. (EB) is extended blanking.

Table 3 Signal input selection by the fast source switches; notes 1 to 4

2

C-BUS CONTROL BITS ANALOG SWITCH SIGNALS INPUT SELECTED

I

FSW

FSON2 FSDIS2 FSON1 FSDIS1

LLLL L L ON

LLLH L X ON

LLHX L X ON

LHLL X L ON

LHLH X X ON
LHHX X X ON

HXXX X X ON

Notes

1. H: logical HIGH implies that the voltage >0.9 V.

2. L: logical LOW implies that the voltage <0.4 V.

3. X = don’t care.

4. ON indicates the selected input signal.

2

(PIN 1)

LH ON

HXON

HXON

HXON

XH ON

FSW

1

(PIN 13)

RGB

2

RGB

1

Y/CD

1996 Oct 25 10

Philips Semiconductors Product specification

Video processor with automatic cut-off

TDA4680

and white level control

Table 4 2-bit white level error signals; bits CX1 and CX0

CX1 CX0 INTERPRETATION

0 0 RAR (Reset-After-Read): no new measurements since last read
1 0 actual (measured) white level less than the tolerance range
1 1 actual (measured) white level within the tolerance range
0 1 actual (measured) white level greater than the tolerance range

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

SYMBOL PARAMETER MIN. MAX. UNIT

V

P

V

i

I

av

I

M

I

18

I

26

T

stg

T

amb

P

tot

supply voltage (pin 5) − 8.8 V
input voltage (pins 1 to 8, 10 to 13, 16, 21, 23 and 25) −0.1 +V
input voltage (pins 14, 15, 18 and 19) −0.7 V

P

+ 0.7 V

P

input voltage (pins 27 and 28) −0.1 +8.8 V
average current (pins 20, 22 and 24) +4 −10 mA
peak current (pins 20, 22 and 24) +4 −20 mA
input current 0 2 mA
output current +0.5 −8mA
storage temperature −20 +150 °C
operating ambient temperature 0 70 °C
total power dissipation

SOT117-1 − 1.2 W
SOT261-2 − 1.0 W

V

1996 Oct 25 11

Philips Semiconductors Product specification

Video processor with automatic cut-off

TDA4680

and white level control

CHARACTERISTICS

All voltages are measured in test circuit of Fig.10 with respect to GND (pin 9); VP= 8.0 V; T
amplitudes (black-to-white) at output pins 24, 22 and 20; nominal settings of brightness, contrast, saturation and white
level control; without beam current or peak drive limiting; unless otherwise specified.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Supply (pin 5)

V

P

I

P

supply voltage 7.2 8.0 8.8 V
supply current − 85 110 mA

Colour difference inputs [−(B − Y): pin 6; −(R − Y): pin 7]

V

6(p-p)

V

7(p-p)

V

6,7

 input current during line scan −− 0.15 µA

I

6,7

−(B − Y) input (peak-to-peak value) notes 1 and 2 − 1.33 − V

−(R − Y) signal (peak-to-peak value) notes 1 and 2 − 1.05 − V

internal DC bias voltage at black level clamping − 3.1 − V

at black level clamping 100 −−µA

R

6,7

AC input resistance 10 −−MΩ

Luminance/sync (VBS; Y: pin 8)

V

i(p-p)

luminance input voltage at pin 8

note 2 − 0.45 − V

(peak-to-peak value)

V

8(bias)

 input current during line scan −− 0.15 µA

I

8

internal DC bias voltage at black level clamping − 3.1 − V

at black level clamping 100 −−µA

R

8

RGB input 1 (R

V

i(p-p)

AC input resistance 10 −−MΩ

: pin 10; G1: pin 11; B1: pin 12)

1

input voltage at pins 10, 11 and 12

note 2 − 0.7 − V

(peak-to-peak value)

V

10/11/12(bias)

I

10/11/12

internal DC bias voltage at black level clamping − 5.4 − V

 input current during line scan −− 0.15 µA

at black level clamping 100 −−µA

R

10/11/12

RGB input 2 (R

V

i(p-p)

AC input resistance 10 −−MΩ

: pin 2, G2: pin 3, B2: pin 4)

2

input voltage at pins 2, 3 and 4

note 2 − 0.7 − V

(peak-to-peak value)

V

2/3/4

 input current during line scan −− 0.15 µA

I

2/3/4

internal DC bias voltage at black level clamping − 5.4 − V

at black level clamping 100 −−µA

R

2/3/4

AC input resistance 10 −−MΩ

=25°C; nominal signal

amb

1996 Oct 25 12

Philips Semiconductors Product specification

Video processor with automatic cut-off

TDA4680

and white level control

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Fast signal switch FSW1 (pin 13) to select Y, CD or R1, G1, B1 inputs (control bits: see Table 3)

V

13

R

13

∆t difference between transit times for

Fast signal switch FSW2 (pin 1) to select Y, CD/R1, G1, B1 or R2, G2, B2 inputs (control bits: see Table 3)
V

1

R

1

∆t difference between transit times for

Saturation adjust [acts on internal RGB signals under I
of maximum saturation); data byte 3FH for maximum saturation, data byte 23H for nominal saturation and
data byte 00H for minimum saturation]

d

s

Contrast adjust [acts on internal RGB signals under I
maximum contrast); data byte 3FH for maximum contrast, data byte 2CH for nominal contrast and data byte
00H for minimum contrast]

d

c

Brightness adjust [acts on internal RGB signals under I
of brightness range); data byte 3FH for maximum brightness, data byte 27H for nominal brightness and data
byte 00H for minimum brightness]

d

br

White potentiometers [under I
3FH for maximum gain; data byte 22H for nominal gain and data byte 00H for minimum gain]; note 3

∆G

v

voltage to select Y and CD −− 0.4 V
voltage range to select R

, G1, B

1

1

0.9 − 5.0 V

internal resistance to ground − 4.0 − kΩ

−− 10 ns

signal switching and signal insertion

voltage to select Y, CD/R1, G1, B
voltage to select R

, G2, B

2

2

1

−− 0.4 V

0.9 − 5.0 V

internal resistance to ground − 4.0 − kΩ

−− 10 ns

signal switching and signal insertion

2

C-bus control; sub-address 01H (bit resolution 1.5%

saturation below maximum at 23H − 5 − dB

at 00H; f = 100 kHz − 50 − dB

2

C-bus control; sub-address 02H (bit resolution 1.5% of

contrast below maximum at 2CH − 3 − dB

at 00H − 22 − dB

2

C-bus control; sub-address 00H (bit resolution 1.5%

black level shift of nominal signal
amplitude referred to cut-off

at 3FH − 30 − %
at 00H −−50 − %

measurement level

2

C-bus control; sub-addresses 04H (red), 05H (green) and 06H (blue); data byte

relative to nominal gain

increase of AC gain at 3FH − 60 − %
decrease of AC gain at 00H − 60 − %

1996 Oct 25 13

Philips Semiconductors Product specification

Video processor with automatic cut-off

TDA4680

and white level control

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

RGB outputs (pins 24, 22 and 20; positive going output signals and no peak drive limitation;
sub-address 0AH = 3FH); note 4

V

o(b-w)

nominal output signals
(black-to-white value)

maximum output signals
(black-to-white value)

∆V

o

V

o

V

24,22,20

I

int

R

o

spread between RGB output signals −− 10 %
output voltages 6.8 − 0.8 V
voltage of cut-off measurement line output clamping

internal current sources − 5.0 − mA
output resistance − 65 110 Ω

Frequency response

d frequency response of Y path

(from pin 8 to pins 24, 22, 20)
frequency response of CD path

(from pins 7 to 24 and 6 to 20)
frequency response of RGB

(from pins 10 to 24, 11to 22 and
12 to 20)

frequency response of RGB
(from pins 2 to 24, 3 to 22 and 4 to 20)

path

1

path

2

(BCOF = 1)

f = 10 MHz −− 3dB

f = 8 MHz −− 3dB

f = 10 MHz −− 3dB

f = 10 MHz −− 3dB

− 2.0 − V

3.2 −−V

2.3 2.5 2.7 V

Sandcastle pulse detector (pin 14)

C

ONTROL BIT SC5 = 0; 3-LEVEL; notes 5 and 6

V

14

sandcastle pulse voltage

for horizontal and vertical blanking
pulses

for horizontal pulses (line count) 4.0 4.5 5.0 V

for burst key pulses 6.3 − V
CONTROL BIT SC5 = 1; 2-LEVEL; note 5
V

14

sandcastle pulse voltage

for horizontal and vertical blanking

pulses

for burst key pulses 4.0 4.5 V

2.0 2.5 3.0 V

+ 0.7 V

P

2.0 2.5 3.0 V

+ 0.7 V

P

1996 Oct 25 14

Philips Semiconductors Product specification

Video processor with automatic cut-off

TDA4680

and white level control

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

GENERAL
I

14

t

d

t

BK

n

pulse

Average beam current limiting (pin 15); note 7
V

c(15)

∆V

c(15)

V

br(15)

∆V

br(15)

input current V14< 0.5 V −100 −−µA
leading edge delay of the clamping

pulse
required burst key pulse time control bit DELOF = 0;

required horizontal or burst key pulses
during vertical blanking interval

control bit DELOF = 0 − 1.5 −µs
control bit DELOF = 1 − 0 −µs

3 −−µs

normally used with f
control bit DELOF = 1;

normally used with 2f
e.g. at interlace scan

L

1.5 −−µs

L

4 − 29 −

(VBW2 = 0)
e.g. at progressive line

8 − 57 −

scan (VBW2 = 1)

contrast reduction starting voltage − 4.0 − V
voltage difference for full contrast

−−2.0 − V

reduction
brightness reduction starting voltage − 2.5 − V
voltage difference for full brightness

−−1.6 − V

reduction

Peak drive limiting voltage [pin 16; internal peak drive limiting level (V
control; sub-address 0AH]; note 8

V

20/22/24

RGB output voltages at 00H −− 3.0 V

at 3FH 6.5 −−V

I

16

charge current −−1 −µA
discharge current during peak white − 5 − mA

V

16

V

c(16)

∆V

c(16)

internal voltage limitation 4.5 −−V
contrast reduction starting voltage − 4.0 − V
voltage difference for full contrast

reduction
V
∆V

br(16)

br(16)

brightness reduction starting voltage − 2.5 − V

voltage difference for full brightness

reduction

) acts on RGB outputs under I2C-bus

pdl

−−2.0 − V

−−1.6 − V

1996 Oct 25 15

Philips Semiconductors Product specification

Video processor with automatic cut-off

TDA4680

and white level control

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Automatic cut-off and white level control (pins 19 and 18); notes 9 to 11; see Fig.8

V

19

permissible voltage (also during

scanning period)
I

19

output current −− −140 µA

input current 150 −−µA

additional input current only during warming up − 0.5 − mA
V

24,22,20

warming up amplitude (under I2C-bus

switch-on delay 1 − V

control; sub-address 0AH)
V

19(th)

voltage threshold for picture tube

switch-on delay 1 − 5.0 − V

cathode warming up
V

ref

internally controlled voltage during leakage

measurement period

DATA BYTE 07H FOR RED REFERENCE LEVEL, DATA BYTE 08H FOR GREEN REFERENCE LEVEL AND DATA BYTE 09H FOR BLUE

REFERENCE LEVEL

∆V

19

I

18

R

18

∆V

19

difference between V

white level measurement voltage) and

V

ref

MEAS

(cut-off or

3FH (maximum V
20H (nominal V
00H (minimum V

MEAS

MEAS

MEAS

input current white level measurement −− 800 µA

internal resistance to V

white level register (measured value

; I18≤ 800 µA − 100 −Ω

ref

white level measurement − 250 − mV

within tolerance range)

−− V

− 0.7 − V

pdl

−1.4 V

P

− 3.0 − V

) 1.5 −−V

) − 1.0 − V

) −− 0.5 V

Storage of cut-off control voltage/output clamping voltage (pins 25, 23 and 21)

I

21/23/25

 charge and discharge currents during cut-off

− 0.3 − mA

measurement lines

input currents of storage inputs outside measurement

−− 0.1 µA

time

Storage of leakage information (pin 17)

 charge and discharge currents during leakage

I

17

− 0.4 − mA

measurement period

leakage current outside time LM −− 0.1 µA
V

17

Hue control (under I

voltage for reset to switch-on below −− 3.0 V

2

C-bus control; sub-address 03H; data byte 3FH for maximum voltage; data byte 20H for

nominal voltage and data byte 00H for minimum voltage); note 12

V

26

output voltage at 3FH 4.8 −−V

at 20H − 3.0 − V
at 00H −− 1.0 V

I

int

current of the internal current source

500 −−µA

at pin 26

1996 Oct 25 16

Philips Semiconductors Product specification

Video processor with automatic cut-off

TDA4680

and white level control

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

2

I

C-bus transceiver clock SCL (pin 28)

f

SCL

V

IL

V

IH

I

IL

I

IH

t

L

t

H

t

r

t

f

2

C-bus transceiver data input/output SDA (pin 27)

I

V

IL

V

IH

I

IL

I

IH

I

OL

t

r

t

f

t

SU;DAT

Notes to the characteristics

1. The values of the −(B − Y) and −(R − Y) colour difference input signals are for a 75% colour-bar signal.

2. The pins are capacitively coupled to a low ohmic source, with a recommended maximum output impedance of 600 Ω.

3. The white potentiometers affect the amplitudes of the RGB output signals including the white measurement pulses.

4. The RGB outputs at pins 24, 22 and 20 are emitter followers with current sources.

5. Sandcastle pulses are compared with internal threshold voltages independent of V
separate the components of the sandcastle pulse. The particular component is generated when the voltage on pin 14
exceeds the defined internal threshold voltage.
The internal threshold voltages (control bit SC5 = 0) are:

1.5 V for horizontal and vertical blanking pulses

3.5 V for horizontal pulses

6.0 V for the burst key pulse.

The internal threshold voltages (control bit SC5 = 1) are:

1.5 V for horizontal and vertical blanking pulses

3.5 V for the burst key pulse.

6. A sandcastle pulse with a maximum voltage equal to (VP+ 0.7 V) is obtained by limiting a 12 V sandcastle pulse.

7. Average beam current limiting reduces the contrast, at minimum contrast it reduces the brightness.

8. Peak drive limiting reduces the RGB outputs by reducing the contrast, at minimum contrast it reduces the brightness.
The maximum RGB outputs are determined via the I2C-bus under sub-address 0AH. When an RGB output exceeds
the maximum voltage, peak drive limiting is delayed by one horizontal line.

input frequency range 0 − 100 kHz
LOW level input voltage −− 1.5 V
HIGH level input voltage 3.0 − 6.0 V
LOW level input current V28= 0.4 V −10 −−µA
HIGH level input current −− 10 µA
clock pulse LOW 4.7 −−µs
clock pulse HIGH 4.0 −−µs
rise time −− 1.0 µs
fall time −− 0.3 µs

LOW level input voltage −− 1.5 V
HIGH level input voltage 3.0 − 6.0 V
LOW level input current V27= 0.4 V −10 −−µA
HIGH level input current −− 10 µA
LOW level output current V27= 0.4 V 3.0 −−mA
rise time −− 1.0 µs
fall time −− 0.3 µs
data set-up time 0.25 −−µs

. The threshold voltages

P

1996 Oct 25 17

Philips Semiconductors Product specification

Video processor with automatic cut-off and

TDA4680

white level control

9. The vertical blanking interval is defined by a vertical pulse which contains 4 (8) or more horizontal pulses; it begins
with the start of the vertical pulse and ends with the end of the white measuring line. If the vertical pulse is longer
than the selected vertical blanking window the blanking period ends with the end of the complete line after the end
of the vertical pulse. The counter cycle time is 31 (63) horizontal pulses. If the vertical pulse contains more than
29 (57) horizontal pulses, the black level storage capacitors will be discharged while all signals are blanked.
During leakage current measurement, the RGB channels are blanked to ultra-black level. During cut-off
measurement one channel is set to the measurement pulse level, the other channels are blanked to ultra-black.
Since the brightness adjust shifts the colour signal relative to the black level, the brightness adjust is disabled during
the vertical blanking interval (see Figs 7 and 8).

10. During picture cathode warming up (first switch-on delay) the RGB outputs (pins 24, 22 and 20) are blanked to the
ultra-black level during line scan. During the vertical blanking interval a white-level monitor pulse is fed out on the
RGB outputs and the cathode currents are measured. When the voltage threshold on pin 19 is greater than 5.0 V,
the monitor pulse is switched off and cut-off and white level control are activated (second switch-on delay). As soon
as cut-off control stabilizes, RGB output blanking is removed.

11. Range of cut-off measurement level at the RGB outputs is 1 to 5 V. The recommended value is 3 V.

12. The hue control output at pin 26 is an emitter follower with current source.

Table 5 Demodulator axes and amplification factors

PARAMETER NTSC PAL

(B − Y)* demodulator axis 0° 0°
(R − Y)* demodulator axis 115° 90°
(R − Y)* amplification factor 1.97 1.14
(B − Y)* amplification factor 2.03 2.03

Table 6 PAL/SECAM and NTSC matrix; notes 1 and 2

MATRIX NMEN

PAL/SECAM 0

NTSC 1

Notes

1. PAL/SECAM signals are matrixed by the equation: V

G − Y

= −0.51V

R − Y

− 0.19V

B − Y

NTSC signals are matrixed by the equations (hue phase shift of −5 degrees):
V

= 1.57V

R − Y*

In the matrix equations: V
the NTSC demodulator. V
to the demodulator axes and amplification factors shown in Table 5. V

R − Y

− 0.41V

B − Y
R − Y
G − Y*

; V

G − Y*

and V

, V

R − Y*

= −0.43V

are conventional PAL demodulation axes and amplitudes at the output of

B − Y

and V

B − Y*

R − Y

− 0.11V

B − Y

; V

B − Y*=VB−Y

are the NTSC-modified colour difference signals; this is equivalent

G − Y*

= −0.27V

R − Y*

− 0.22V

B − Y*

.

2. The vertical blanking interval is selected via the I2C-bus (see Table 2 and Fig.8). Vertical blanking is determined by
the vertical component of the sandcastle pulse; this vertical component has priority when it is longer than the vertical
blanking interval of the transmission standard.

1996 Oct 25 18

Philips Semiconductors Product specification

Video processor with automatic cut-off
and white level control

handbook, full pagewidth

white measurement level
for green signal

cut-off measurement level
for green signal

ultra-black level

(1) Maximum brightness.

(2) Nominal brightness.

Fig.7 Cut-off and white level measurement pulses.

TDA4680

MED701

(1)

(2)

621 622 623 624 625 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 2625 27 28

vertical flyback 850 µs

V component of the sandcastle pulse

PAL,
SECAM

NTSC,
PAL M

PAL,
SECAM
(with
increased
vertical
blanking
interval)

(leakage current measurement time)

vertical blanking interval, 22 complete lines

V component of the sandcastle pulse

vertical blanking interval, 19 complete lines

V component of the sandcastle pulse

LM

vertical blanking interval, 25 complete lines

LM

LM

MR MG MB WR

MR MG MB WR

WG
WB

MR MG MB WR

WG
WB

WG
WB

cut-off and
white level
measurement
pulses

MED702

Fig.8 Leakage current, cut-off and white level current measurement timing diagram.

1996 Oct 25 19

handbook, full pagewidth

Philips Semiconductors Product specification

Video processor with automatic cut-off and
white level control

INTERNAL PIN CONFIGURATION

16

17

LM

18

reference

WM

HE

TDA4680

TDA4680

MED699

MB

21

handbook, full pagewidth

MG

23

CL CL CL CL CL CLCL CL CL

24 22 2026 25

MR

28 27 1519

+

zener diode protection

for pins 27 and 28

(version V6)

+

ESD protection diode

on all pins except

pins 5, 9, 27 and 28

1234567891011121314

Fig.9 Internal circuits.

1996 Oct 25 20

Philips Semiconductors Product specification

Video processor with automatic cut-off and
white level control

TEST AND APPLICATION INFORMATION

5

220 nF

G

C

23

o

R

6

o

G

22

GoBoCI

8

7

220 nF

B

o

C

B

21

20

9

CI

19

SCL SDA hue

100 Ω

SCL

200 V

1

100 Ω

SDA

272826

+12 V

2

HUE

3

220 nF

R

C

25

GND

4

o

R

24

10

(2)

2.2 kΩ

1 nF

WI

18

CON2

BZX79

82

kΩ

300 nF

L

C

17

C6V2

1 µF

PDL

C

TDA4680

MED700

22 µF

10

BCL

16

15

kΩ

1

2

3

2

2

R

FSW

10 nF

2

R

FSW

handbook, full pagewidth

2

2

G

10 nF

2

G

2

B

10 nF

4

5

P

V

−(B − Y)

10 nF

10 nF

Ω

75

Ω

75

Ω

75

Ω

75

2

B

6

−(B − Y)

7

−(R − Y)

10 nF

−(R − Y)

TDA4680

8

9

Y

GND

47 nF

Y

10

1

1

R

G

10 nF

10 nF

1G1B1

R

11

12

13

14

1

B

10 nF

1

FSW

FSW

SC

4.7 kΩ

1

SC

1N4148

Ω

75

Ω

75

Ω

75

Ω

75

1N4148

22 µH

= 8 V
V

1N4148

3.9 kΩ

1N4148

P

(1)

BR1

3.9 kΩ

220 µF

beam

current

Fig.10 Test and application circuit.

1996 Oct 25 21

(1) Insert link BR1 if average beam current is not required.

(2) Value depends on video output current stages and picture tube.

Philips Semiconductors Product specification

Video processor with automatic cut-off
and white level control

PACKAGE OUTLINES

handbook, full pagewidth

DIP28: plastic dual in-line package; 28 leads (600 mil)

D

seating plane

L

Z

28

e

b

TDA4680

SOT117-1

M

E

A

2

A

A

1

w M

b

1

15

c

(e )

1

M

H

pin 1 index

1

0 5 10 mm

scale

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

A

A

A

UNIT

inches

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

max.

mm

1 2

min.

max.

b

1.7

1.3

0.066

0.051

b

0.53

0.38

0.020

0.014

cD E weM

1

0.32

0.23

0.013

0.009

(1) (1)

36.0

35.0

1.41

1.34

14.1

13.7

0.56

0.54

E

14

(1)

L

3.9

3.4

M

15.80

15.24

0.62

0.60

H

E

17.15

15.90

0.68

0.63

0.252.54 15.24

0.010.10 0.60

e

1

0.15

0.13

Z

max.

1.75.1 0.51 4.0

0.0670.20 0.020 0.16

OUTLINE

VERSION

SOT117-1

IEC JEDEC EIAJ

051G05 MO-015AH

REFERENCES

1996 Oct 25 22

EUROPEAN

PROJECTION

ISSUE DATE

92-11-17
95-01-14

Philips Semiconductors Product specification

Video processor with automatic cut-off
and white level control

PLCC28: plastic leaded chip carrier; 28 leads

e

y

25

26

28

1

pin 1 index

4

β

k

511

E

X

19

18

12

e

D

H

D

Z

D

B

Z

k

E

e

1

v M

v M

TDA4680

SOT261-2

e

E

A

H

E

E

A

A

1

A

4

A

B

w M

detail X

b

p

b

1

(A )

3

L

p

0 5 10 mm

scale

DIMENSIONS (millimetre dimensions are derived from the original inch dimensions)

UNIT A

mm

inches

A

1

min. max. max. max. max.

4.57

0.51

4.19

0.180

0.020

0.165

A

0.25

0.01

A

4

3

3.05

0.12

b

0.53

0.33

0.021

0.013

b

p

1

0.81

0.66

0.032

0.026

(1)

D

11.58

11.43

0.456

0.450

(1)

E

eH

11.58

1.27

11.43

0.456

0.05

0.450

e

10.92

9.91

0.430

0.390

e

E

D

10.92

9.91

0.430

0.390

Note

1. Plastic or metal protrusions of 0.01 inches maximum per side are not included.

OUTLINE
VERSION

IEC JEDEC EIAJ

REFERENCES

SOT261-2

1996 Oct 25 23

H

E

D

12.57

12.57

12.32

12.32

0.495

0.495

0.485

0.485

k

1.22

1.07

0.048

0.042

k

0.51

0.020

1

0.057

0.040

L

p

1.44

1.02

EUROPEAN

PROJECTION

(1) (1)

Z

Z

E

D

ywv β

0.18 0.100.18

0.007 0.0040.007

2.16

0.085

2.16

0.085

o

45

ISSUE DATE

92-11-17
95-02-25

Philips Semiconductors Product specification

Video processor with automatic cut-off
and white level control

SOLDERING
Introduction

There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.

This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our

“IC Package Databook”

DIP

OLDERING BY DIPPING OR BY WA VE

S
The maximum permissible temperature of the solder is

260 °C; solder at this temperature must not be in contact
with the joint for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.

The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (T
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.

EPAIRING SOLDERED JOINTS

R
Apply a low voltage soldering iron (less than 24 V) to the

lead(s) of the package, below the seating plane or not
more than 2 mm above it. If the temperature of the
soldering iron bit is less than 300 °C it may remain in
contact for up to 10 seconds. If the bit temperature is
between 300 and 400 °C, contact may be up to 5 seconds.

(order code 9398 652 90011).

). If the

stg max

TDA4680

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.

Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.

Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.

WAVE SOLDERING
Wave soldering techniques can be used for all PLCC

packages if the following conditions are observed:

• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.

• The longitudinal axis of the package footprint must be
parallel to the solder flow.

• The package footprint must incorporate solder thieves at
the downstream corners.

During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.

A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

PLCC

REFLOW SOLDERING
Reflow soldering techniques are suitable for all PLCC

packages.
The choice of heating method may be influenced by larger

PLCC packages (44 leads, or more). If infrared or vapour
phase heating is used and the large packages are not
absolutely dry (less than 0.1% moisture content by
weight), vaporization of the small amount of moisture in
them can cause cracking of the plastic body. For more
information, refer to the Drypack chapter in our

Reference Handbook”

1996 Oct 25 24

(order code 9397 750 00192).

“Quality

EPAIRING SOLDERED JOINTS

R
Fix the component by first soldering two diagonally-

opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.

Philips Semiconductors Product specification

Video processor with automatic cut-off

TDA4680

and white level control

DEFINITIONS

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

PURCHASE OF PHILIPS I

Purchase of Philips I
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.

2

C COMPONENTS

2

C components conveys a license under the Philips’ I2C patent to use the

1996 Oct 25 25

Philips Semiconductors Product specification

Video processor with automatic cut-off and
white level control

NOTES

TDA4680

1996 Oct 25 26

Philips Semiconductors Product specification

Video processor with automatic cut-off and
white level control

NOTES

TDA4680

1996 Oct 25 27

Philips Semiconductors – a worldwide company

Argentina: see South America
Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,

Tel. [phone], Fax. [phone]
Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213,

Tel. [phone], Fax. [phone]
Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6,

220050 MINSK, Tel. [phone], Fax. [phone]

Belgium: see The Netherlands
Brazil: see South America
Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor,

51 James Bourchier Blvd., 1407 SOFIA,
Tel. [phone], Fax. [phone]

Canada: PHILIPS SEMICONDUCTORS/COMPONENTS,
Tel. [phone]

China/Hong Kong: 501 Hong Kong Industrial Technology Centre,
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Tel. [phone], Fax. [phone]

Colombia: see South America
Czech Republic: see Austria
Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S,

Tel. [phone], Fax. [phone]
Finland: Sinikalliontie 3, FIN-02630 ESPOO,

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Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS,

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Hungary: see Austria
India: Philips INDIA Ltd, Shivsagar Estate, A Block, Dr. Annie Besant Rd.

Worli, MUMBAI 400 018, Tel. [phone], Fax. [phone]

Indonesia: see Singapore
Ireland: Newstead, Clonskeagh, DUBLIN 14,

Tel. [phone], Fax. [phone]
Israel: RAPAC Electronics, 7 Kehilat Saloniki St, TEL AVIV 61180,

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Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3,

20124 MILANO, Tel. [phone], Fax. [phone]
Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108,

Tel. [phone], Fax. [phone]
Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,

Tel. [phone], Fax. [phone]
Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,

Tel. [phone], Fax. [phone]
Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,

Tel. [phone]

Middle East: see Italy

Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,

Tel. [phone], Fax. [phone]
New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,

Tel. [phone], Fax. [phone]
Norway: Box 1, Manglerud 0612, OSLO,

Tel. [phone], Fax. [phone]
Philippines: Philips Semiconductors Philippines Inc.,

106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. [phone], Fax. [phone]

Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA,
Tel. [phone], Fax. [phone]

Portugal: see Spain
Romania: see Italy
Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,

Tel. [phone], Fax. [phone]
Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231,

Tel. [phone], Fax. [phone]

Slovakia: see Austria
Slovenia: see Italy
South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,

2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000,
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Spain: Balmes 22, 08007 BARCELONA,
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Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,
Tel. [phone], Fax. [phone]

Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. [phone], Fax. [phone]

Taiwan: PHILIPS TAIWAN Ltd., 23-30F, 66,
Chung Hsiao West Road, Sec. 1, P.O. Box 22978,
TAIPEI 100, Tel. [phone], Fax. [phone]

Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,
Tel. [phone], Fax. [phone]

Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,
Tel. [phone], Fax. [phone]

Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. [phone], Fax. [phone]

United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. [phone], Fax. [phone]

United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. [phone]

Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,

Tel. [phone], Fax.[phone]

For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications,
Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. [phone]

© Philips Electronics N.V. 1996 SCA52
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.

Internet: http://www.semiconductors.philips.com

Printed in The Netherlands 537021/1200/02/pp28 Date of release: 1996Oct 25 Document order number: 9397 750 00946