Datasheet tda3842 DATASHEETS (Philips)

INTEGRATED CIRCUITS

DATA SH EET

TDA3842

Multistandard TV IF amplifier and
demodulator with TV signal
identification

Preliminary specification
File under Integrated Circuits, IC02

April 1991

Philips Semiconductors Preliminary specification

Multistandard TV IF amplifier and

TDA3842

demodulator with TV signal identification

FEATURES

• Low supply voltage range, from 5.0 V to 8.0 V

• Low power dissipation, 200 mW at 5 V

• High supply ripple rejection

• Wide IF bandwidth of 80 MHz

• Synchronous demodulator with low differential phase

and gain

• Additional video buffer with a wide bandwidth of 10 MHz

• Video off switch

• Peak sync AGC for negative modulation, e.g. B/G

• Peak white AGC for positive modulation, e.g. L

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

P

I

P

V

1-20(rms)

supply voltage range (pin 15) 4.75 5.0 8.8 V
supply current (pin 15) VP= 5.0 V − 42 − mA
IF input signal for nominal video output

voltage at pin 14 (RMS value)
minimum IF input signal for TV signal

identification at pin 6 (RMS value)

V

o

G

v

video output signal (pin 12) buffered − 2.0 − V

IF voltage gain control range − 66 − dB
S/N signal-to-noise ratio V
V
S

8
AFC

AFC output voltage swing − 4.0 − V

AFC steepness (pin 8) − 2 −µA/kHz
RR supply voltage ripple rejection (pin 12) 30 35 − dB

• Adjustable take-over point (TOP); positive AGC slope

• Switching to fast AGC dependent on TV identification

• Alignment free AFC detector with integrated phase shift

• ESD protection

• TV signal identification

• Options: tracking of reference circuit, suitable for

MAC-on-cable

GENERAL DESCRIPTION

The TDA3842 is a bipolar integrated circuit for vision
IF-signal processing in multistandard TV and VTRs,
designed for a supply voltage range from 5.0 V to 8.0 V.

f = 38.9 MHz − 70 −µV

maximum G

=10mV 55 60 − dB

1-20

− 20 40 µV

v

ORDERING INFORMATION

EXTENDED

TYPE NUMBER

TDA3842 20 DIL plastic SOT146
TDA3842T 20 mini-pack plastic SO20L; SOT163A

Notes

1. SOT146-1; 1997 January 08.

2. SOT163-1; 1997 January 08

April 1991 2

PACKAGE

PINS PIN POSITION MATERIAL CODE

(1)

(2)

Philips Semiconductors Preliminary specification

Multistandard TV IF amplifier and
demodulator with TV signal identification

TDA3842

PIN CONFIGURATION

Fig.2 Pin configuration.

Fig.1 Block diagram.

PINNING

SYMBOL PIN DESCRIPTION

v

I IF

TOP
v

BL

V

SYNC

C

IDENT

TV
C

AFC

V

AFC

TV
L

REF

L

REF

v

O BUF

v

I

v

O

v

P

C

STAB

ADJ

IDENT

SEL

1 IF input (balanced)
2 tuner AGC take-over point adjustment
3 black level voltage
4 sync pulse amplitude voltage
5 identification capacitor
6 video identification output
7 AFC capacitor
8 AFC output signal
9 video standard selection switch
10 LC reference tuned circuit
11 LC reference tuned circuit
12 buffered video output signal
13 video input signal for buffer
14 video output signal with intercarrier signal
15 supply voltage

16 supply voltage stabilization
GND 17 ground
C

AGC

I

O AGC

v

I IF

18 AGC capacitor

19 tuner AGC output signal

20 IF input (balanced)

April 1991 3

Philips Semiconductors Preliminary specification

Multistandard TV IF amplifier and
demodulator with TV signal identification

FUNCTIONAL DESCRIPTION

The complete circuit consists of the
following functional blocks as shown
in Fig.1:

1. 3-stage gain controlled IF
amplifier

2. Overload detector

3. Reference amplifier

4. Carrier signal reference limiter

5. Video demodulator

6. Video amplifier

7. Video buffer amplifier

8. AGC detector

9. IF and tuner AGC (with
adjustable TOP)

10. Sync pulse separator

11. Video identification

12. 90°phase shift and AFC
demodulator

13. AFC gating, AFC amplifier and
AFC switch

14. Voltage stabilizer

15. Standard switch

1. 3-stage gain controlled IF
amplifier (pins 1 and 20)

The vision IF amplifier consists of
three AC-coupled differential
amplifier stages. Gain control is
achieved by current divider stages.
The emitter feedback resistors are
optimized for low noise and signal
handling capability.

2. Overload detector

The overload detector is fed from the
output of the third IF amplifier. As
soon as the IF voltage exceeds the
overload threshold in the detector, its
output current reduces the IF
amplification by discharging the AGC
capacitor.

3. Reference amplifier

For passive video carrier
regeneration an integrated differential
amplifier with resistive load allows

capacitive coupling of the resonant
circuit for notch and tracking
functions.

4. Carrier signal reference limiter

A limiter stage after the reference
amplifier eliminates amplitude
modulation. Its output is fed to the
video demodulator.

5. Video demodulator

The video demodulator receives both
the limited reference carrier signal
and the IF signal. The video signal
polarity is switched according to the
TV standard selected. The video
signal can also be switched off.

6. Video amplifier

The video amplifier is an operational
amplifier with internal feedback and
wide bandwidth. The DC level is
shifted according to the TV standard
to provide the same sync level for
positive and negative IF modulation.

7. Video buffer amplifier

The video buffer amplifier is an
operational amplifier with internal
feedback, wide bandwidth and
frequency compensation; gain and
input impedance are adapted to
operate with a ceramic sound trap.
The load for the sound trap is an
integrated resistive divider.

8. AGC detector

With negative modulation

peak sync AGC detector generates a
fast current pulse to discharge the
AGC capacitor (gain reduction). This
minimizes the video signal distortion.

Positive modulation

white AGC detector.
To filter out the sound carrier the

video signal is fed through low pass
filters. After the low pass filters the
video signal with attenuated sound
carrier, is fed to the AGC detector.

(B/G) a

(L) uses a peak

TDA3842

The charging current of the AGC
capacitor is optimized for minimum
distortion of the video signal. With
positive modulation the charging
current is very low and consequently
the AGC time constant is large. When
the video identification circuit does
not detect a video signal, the charging
current is increased.

9. IF and tuner AGC

The voltage on the AGC capacitor is
used to control the gain of the three IF
amplifier stages and to supply the
tuner AGC current (open-collector).
The tuner AGC TOP potentiometer at
pin 2 adjusts the IF signal level from
the tuner. To stabilize the IF output
voltage of the tuner, IF slip
(= variation of IF gain over the total
tuner range) is kept at a minimum.

10. Sync pulse separator

The sync pulse separator supplies
two internally-used pulses using the
bandwidth limited video signal. These
are the composite sync for the AFC
detector and the vertical sync for the
video identification output. The
bandwidth is limited to reduce the
noise and increase the ident
sensitivity.

11. Video identification

An analog integrator monitors the
duty cycle of the vertical sync pulses
to identify the video signal. The
integrator output is fed to a window
comparator which has an open
collector output stage to provide the
video ident signal. The complete
circuit operates in combination with
the sync separator and is optimized
for high sensitivity.

12. 90° phase shift and AFC
demodulator

The AFC demodulator needs a 90°
phase-shifted carrier. The output of
the carrier signal reference limiter is

April 1991 4

Philips Semiconductors Preliminary specification

Multistandard TV IF amplifier and
demodulator with TV signal identification

fed to an active 90° phase-shift circuit.
The 90° (lead) phase-shifted carrier
and the IF signal are fed to the AFC
demodulator. The demodulated
signal is fed to the AFC gating stage.

13. AFC gating, AFC amplifier and
AFC switch

With negative modulated video IF
signals the output of the AFC detector
is gated by composite sync pulses to
prevent video modulation on the AFC

output. The gated signal is integrated
by an AFC capacitor. The AFC
amplifier converts the capacitor
voltage to an AFC current (open
collector sink/source output). At
positive modulation the AFC operates
continuously.
AFC function can be externally
switched off for test purposes. For
high-performance signal handling the
AFC signal can be used to track the
resonant circuit as shown in Fig.11.

TDA3842

14. Voltage stabilizer

An integrated bandgap voltage
stabilizer generates an internal
supply voltage of 4 V. A decoupling
capacitor reduces noise and supply
voltage ripple.

15. Standard switch

The operating mode of the AGC
detector and video IF demodulator for
positive and negative IF modulation is
selected by the logic level on pin 9.

April 1991 5

Fig.3 Internal circuits.

Philips Semiconductors Preliminary specification

Multistandard TV IF amplifier and

TDA3842

demodulator with TV signal identification

LIMITING VALUES

In accordance with the Absolute Maximum System (IEC 134)

SYMBOL PARAMETER MIN. MAX. UNIT

v

p

v

19

v

8

I

15

T

stg

T

amb

v

ESD

CHARACTERISTICS

= 5 V and T

V

P

Fig.4.; unless otherwise specified.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

P

I

P

RR ripple rejection (pin 12) 30 35 − dB

supply voltage at pin 15: SOT146 − 8.8 V

SOT163A − 6.0 V
tuner AGC voltage − 13.2 V
permissible voltage at AFC output − V

P

V
supply current − 55 mA
storage temperature range −25 + 150 °C
operating ambient temperature range 0 + 70 °C
ESD sensitivity −±300 V

=25°C; fVC= 38.9 MHz; all voltages are measured to GND (pin 17); measured in test circuit of

amb

supply voltage range (pin 15) DIL-package 4.75 5.0 8.8 V

SO-package 4.75 5.0 6.0 V

supply current (pin 15) VP= 5.0 V − 42 − mA

IF amplifier

B bandwidth −3dB − 80 − MHz
R

I

C

I

V

1-20(rms)

G

v

input resistance (pins 1 and 20) − 2 − kΩ
input capacitance (pins 1 and 20) − 1.5 − pF
IF input signal (RMS value) video output −1dB − 70 −µV
maximum IF input signal minimum G

; note 1 100 −−mV

v

gain control range 63 66 − dB

IF AGC: negative modulation

I

18

leakage current AGC capacitor −−1µA
charging current AGC capacitor with video identification − 13 −µA
charging current AGC capacitor without video identification − 35 −µA

I

18M

t

1

discharging peak current capacitor − 2 − mA
response time of IF input signal

change

50 dB increasing step − 1 − ms

50 dB decreasing step − 150 − ms
IF AGC: standard L (note 2)
I

18

leakage current AGC capacitor −−20 nA
charging current AGC capacitor with video identification − 280 − nA

without video identification − 22 −µA
I

18M

t

2

discharging peak current capacitor − 2 − mA
response time of IF input signal

change

50 dB increasing step − 1 − ms

50 dB decreasing step − 300 − ms

April 1991 6

Philips Semiconductors Preliminary specification

Multistandard TV IF amplifier and

TDA3842

demodulator with TV signal identification

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Tuner AGC (note 3)

V

1-20(rms)

lower IF input signal for starting
point of tuner take-over;
see Fig.5 (RMS value)

upper IF input signal for starting
point of tuner take-over;
see Fig.5 (RMS value)

TOP variation 60 K temperature range − 23dB

I

19

tuner AGC output current V19= 0.5 V 1 2 − mA
Sync demodulator and video amplifier (note 4)
V

14

composite video output signal 0.9 1.0 1.1 V

sync level voltage standard B/G − 1.5 − V

zero carrier level voltage negative modulation − 2.6 − V

I

14

R

14

output current DC and AC −−±1.0 mA

output resistance − 75 −Ω
B video bandwidth at −1 dB (pin 14) C
V

14

upper video clipping level − 3.6 − V

lower video clipping level − 0.3 − V

R2=22kΩ−−1mV

R2 = 0 Ω 50 −−mV

positive modulation − 1.47 − V

≤ 20 pF 7 8 − MHz

load

Buffered video output signal (see Fig.6)

G gain of video buffer 6.5 7.0 − dB
V

12

sync level clamping voltage − 1.35 − V

upper video clipping level − 4.25 − V

lower video clipping level − 0.3 − V
I

12

R

12

B video bandwidth at −1 dB (pin 12) C
R

I

C

I

output current DC and AC −−±1.0 mA

output resistance −−10 Ω

≤ 20 pF − 10 − MHz

load

input resistance (pin 13) − 3.3 − kΩ

input capacitance (pin 13) − 2 − pF

Overall video performance (see Fig.6)

V

o

video output signal (pin 12) negative modulation − 2 − V

positive modulation;

− 2 − V

note 4
B video bandwidth at −2 dB (pin 12) C
S/N signal to noise ratio (see Fig.7) V

α

1

intermodulation for blue (note 6) f = 1.1 MHz 56 58 − dB

≤ 20 F 7 8 − MHz

load

= 10 mV; note 5 55 60 − dB

1-20

f = 3.3 MHz 62 −−dB

α

2

intermodulation for yellow (note 6) f = 1.1 MHz 53 56 − dB

f = 3.3 MHz 60 −−dB

α

3

signal harmonic suppression − 26 − dB

April 1991 7

Philips Semiconductors Preliminary specification

Multistandard TV IF amplifier and

TDA3842

demodulator with TV signal identification

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

5

α

4

∆G differential gain EBU test line 330 − 2 − %
∆Φ differential phase EBU test line 330 − 2 − deg
∆V/V variation of video output signal

V

res1

V

res2

Video identification

V

1-20(rms)

V

6

T

sync/Tfield

C/N carrier-to-noise ratio

I

5

α

5

t

d

AFC (see Fig.9 and Fig.10); note 9
I

8

V

8

S control steepness QB= 40;

I

7

Standard switch

V

9

video switch off voltage note 7 −−1V
attenuation of video signal (pin 14) video signal switched off 50 60 − dB

−−0.5 dB

(pin 14)

gain control 50 dB;

V

1-20(rms)

= 0.3 to 100 mV
residual vision carrier (pin 12) − 1 − mV
residual second harmonic of the

− 1 − mV

vision carrier (pin 12)

minimum IF input signal for TV

maximum G

v

− 20 40 µV

identification at pin 14 (RMS value)
video identification voltage

(signal unidentified)
video identification voltage

(signal identified)

V

1-20(rms)

I6= 0.5 mA
V

1-20(rms)

I6= −1 µA

= < 40 µV

= ≥ 40 µV

−−0.4 V

4.5 −−V

vertical pulse duty cycle 4.5 8 16 × 10

note 8 − 8 − dB

(pin 1 and pin 20)
allowed leakage current −−3µA
sync pulse suppression for

−−70 %

correct TV signal identification
delay time of mute output signal − 100 150 ms

AFC source current output 0.16 0.19 0.22 mA
AFC sink current output 0.16 0.19 0.22 mA
upper output voltage 4.3 − 4.7 V
lower output voltage 0.3 − 0.7 V

− 2 −µA/kHz

V

1-20(rms)

=10mV
leakage current at AFC gating −−±1µA

voltage for negative modulation standard switch open 2.5 n.c. V

V

P

voltage for positive modulation (L) standard switch closed 0 − 0.8 V

−3

April 1991 8

Philips Semiconductors Preliminary specification

Multistandard TV IF amplifier and

TDA3842

demodulator with TV signal identification

Notes to the characteristics

1. The video signal is still gain-controlled, V

2. In multi-standard applications the capacitor at pin 18 must be a low-leakage (foil) type.

3. The starting point of tuner AGC can be adjusted by the resistor at pin 2. Fig.5 shows the AGC characteristic.

4. IF input signals are RMS values measured at TOP sync (standard B/G) and with a vision carrier of 38.9 MHz
(see Fig.4). The IF input signal is fed from 50 Ω via a 1:1 transformer, DSB, to pins 1 and 20. With a 10 mV
input signal, the residual vision carrier is: = 10% for white (standard B/G), = 3% for sync (standard L).

5. In the test circuit of Fig.4, measured and weighted according to CCIR Recommendation 567:

V

SN⁄

14 black to white()

=

------------------------------------------------------------ ­V

14 noise

RMS, black()

6. Intermodulation figures are defined as follows:

V

at 4.4 MHz

α

and

7. When V

20

2

< 1 V (short-circuited identification capacitor at pin 5) the video output signal at pin 14 is switched off.

5

o

-------------------------------------log×=
V

at 3.3 MHz

o

V14 shifts to “zero carrier level” (“ultra white” (2.6V) for negative modulation or “top sync” (1.5 V) for positive
modulation). During normal operation the capacitor at pin 5 should not be loaded (I5≤3µA).

8. The C/N at the IF input (pins 1 and 20) for TV identification is defined as the RMS sync level of the vision IF signal
input, relative to the RMS value of a superimposed white noise signal, with a bandwidth limited to 5 MHz.

9. The values for the AFC measurements depend on the QB of the reference circuit at pins 10 and 11. The internal
phase shift is matched to a vision carrier of 38.9 MHz. The AFC function can be switched off for test purposes when
pin 7 is connected to ground (V7= 0 V).

= 1 V, but intermodulation figures are degraded.

14(p-p)

V

at 4.4 MHz

α

20

1

o

-------------------------------------log× + 3.6 dB=
V

at 1.1 MHz

o

RMS

IF

April 1991 9

Philips Semiconductors Preliminary specification

Multistandard TV IF amplifier and
demodulator with TV signal identification

TDA3842

April 1991 10

Fig.4 Test circuit.

Philips Semiconductors Preliminary specification

Multistandard TV IF amplifier and
demodulator with TV signal identification

TDA3842

Fig.5 AGC characteristics with different values of R2.

Fig.6 Video waveforms at intercarrier (pin 14) and buffered video (pin 12) outputs.

April 1991 11

Philips Semiconductors Preliminary specification

Multistandard TV IF amplifier and
demodulator with TV signal identification

TDA3842

Fig.7 Signal-to-noise ratio as a function of IF input voltage (RMS value) at pins 1 and 20.

SC = sound carrier level; with respect to TOP sync level
CC = chrominance carrier level; with respect to TOP sync level

PC = picture carrier level; with respect to TOP sync level

April 1991 12

Sound trap attenuation: 17 dB

Fig.8 Input conditions for intermodulation measurements.

Philips Semiconductors Preliminary specification

Multistandard TV IF amplifier and
demodulator with TV signal identification

APPLICATION INFORMATION

TDA3842

Fig.9 AFC interfacing for analog tuning systems and AFC characteristic.

April 1991 13

Fig.10 AFC interfacing for µP controlled systems.

Philips Semiconductors Preliminary specification

Multistandard TV IF amplifier and
demodulator with TV signal identification

TDA3842

(1) Without automatic tracking

delete dashed lines with
components. C
increased to 68 pF.

must be

p

Fig.11 Application circuit with automatic tracking function and notch filter (dashed lines).

Fig.12 Reference circuit with notch filter for improved pulse response and better signal linearity.

April 1991 14

Philips Semiconductors Preliminary specification

Multistandard TV IF amplifier and

TDA3842

demodulator with TV signal identification

Note to Fig.12
Recommended for reception of data signals e.g. in Teletext and D2-MAC. Values in combination with

SAW filter OFW G 1956 (Siemens). Curve shows combined frequency response of SAW filter and reference circuit.

f2



PC

For different standards C

and Cp are calculated as follows:

s

=

Cs2C



p



------------

f2

N

1–

Fig.13 Modification of Fig.11 for MAC/D2-MAC application.

Note to Fig.13
When the TDA3842 is used in a MAC/D2-MAC receiver the voltage at pin 5 must be stabilized between 1.8 and 2.9 V

by zener diode D1 and resistor R1. Standard switch at pin 9 must be in position ‘standard L’ to activate the peak-related
slow AGC mode.

April 1991 15

Philips Semiconductors Preliminary specification

Multistandard TV IF amplifier and
demodulator with TV signal identification

PACKAGE OUTLINES

DIP20: plastic dual in-line package; 20 leads (300 mil)

D

seating plane

L

Z

20

e

b

TDA3842

SOT146-1

M

E

A

2

A

A

1

w M

b

1

11

c

(e )

1

M

H

pin 1 index

1

0 5 10 mm

scale

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

A

A 

A 

UNIT

inches

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

max.

mm

OUTLINE
VERSION

SOT146-1

1 2

min.

max.

1.73

1.30

0.068

0.051

IEC JEDEC EIAJ

  SC603

b

b

1

0.53

0.38

0.021

0.015

0.36

0.23

0.014

0.009

REFERENCES

cD E e M

(1) (1)

26.92

26.54

1.060

1.045

6.40

6.22

0.25

0.24

E

10

(1)

M

e

L

1

3.60

8.25

3.05

7.80

0.14

0.32

0.12

0.31

EUROPEAN

PROJECTION

H

E

10.0

0.2542.54 7.62

8.3

0.39

0.010.10 0.30

0.33

ISSUE DATE

w

92-11-17
95-05-24

Z

max.

2.04.2 0.51 3.2

0.0780.17 0.020 0.13

April 1991 16

Philips Semiconductors Preliminary specification

Multistandard TV IF amplifier and
demodulator with TV signal identification

SO20: plastic small outline package; 20 leads; body width 7.5 mm

D

c

y

Z

20

11

TDA3842

SOT163-1

E

H

E

A

X

v M

A

pin 1 index

1

e

0 5 10 mm

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

mm

A

max.

2.65

0.10

A

1

0.30

0.10

0.012

0.004

A2A

2.45

2.25

0.096

0.089

0.25

0.01

b

0.49

0.36

p

cD

0.32

0.23

0.013

0.009

3

0.019

0.014

UNIT

inches

Note

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

10

w M

b

p

scale

(1)E(1) (1)

13.0

12.6

0.51

0.49

eHELLpQ

7.6

1.27

7.4

0.30

0.050

0.29

10.65

10.00

0.42

0.39

Q

A

2

A

1

1.4

0.055

1.1

0.4

0.043

0.016

detail X

1.1

1.0

0.043

0.039

(A )

L

p

L

0.25

0.01

A

3

θ

0.25 0.1

0.01

ywv θ

Z

0.9

0.4

8

0.004

0.035

0.016

0

o
o

OUTLINE
VERSION

SOT163-1

April 1991 17

REFERENCES

IEC JEDEC EIAJ

075E04 MS-013AC

EUROPEAN

PROJECTION

ISSUE DATE

92-11-17
95-01-24

Philips Semiconductors Preliminary specification

Multistandard TV IF amplifier and

TDA3842

demodulator with TV signal identification

SOLDERING
Introduction

There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and
surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for
surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often
used.

This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our

“IC Package Databook”

Soldering by dipping or by wave

The maximum permissible temperature of the solder is 260 °C; solder at this temperature must not be in contact with the
joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds.

The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the
specified maximum storage temperature (T
be necessary immediately after soldering to keep the temperature within the permissible limit.

Repairing soldered joints

Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more
than 2 mm above it. If the temperature of the soldering iron bit is less than 300 °C it may remain in contact for up to
10 seconds. If the bit temperature is between 300 and 400 °C, contact may be up to 5 seconds.

(order code 9398 652 90011).

). If the printed-circuit board has been pre-heated, forced cooling may

stg max

DEFINITIONS

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

April 1991 18