Datasheet TDA3615J-N1 Datasheet (Philips)

DATA SH EET

Preliminary specification
File under Integrated Circuits, IC01

1998 Jun 23

INTEGRATED CIRCUITS

TDA3615J

Multiple voltage regulator

1998 Jun 23 2

Philips Semiconductors Preliminary specification

Multiple voltage regulator TDA3615J

FEATURES
General

• Six voltage regulators

• Five microprocessor controlled regulators

(regulators 2 to 6)

• Regulator 1 and reset operate during load dump and
thermal shutdown

• Low reverse current of regulator 1

• Very low quiescent current when regulators 2 to 6 and

power switches are switched off (V

I(ig)

=0V)

• Reset output

• Adjustable display regulator

• High ripple rejection

• Three power switches

• Low noise for regulators 2 to 6.

Protections

• Reverse polarity safe (down to −18 V without high
reverse current)

• Able to withstand voltages up to 18 V at the output
(supply line may be short-circuited)

• ESD protected on all pins

• Thermal protection

• Load dump protection

• Foldback current limit protection (except for regulator 2)

• The regulator outputs and the power switches are DC

short-circuited safe to ground and V

bat

.

GENERAL DESCRIPTION

The TDA3615J is a multiple output voltage regulator with
power switches, intended for use in car radios with or
without a microprocessor. It contains:

• One fixed voltage regulator (regulator 1) intended to
supply a microprocessor, that also operates during load
dump and thermal shutdown

• 5 power regulators supplied by V

I(ig)

• 3 power switches with protections

• 3 enable inputs for selecting regulators 2 to 6 and the

three power switches

• Very low quiescent current of typical 110 µA.

ORDERING INFORMATION

TYPE

NUMBER

PACKAGE

NAME DESCRIPTION VERSION

TDA3615J DBS17P plastic DIL-bent-SIL power package; 17 leads (lead length 12 mm) SOT243-1

1998 Jun 23 3

Philips Semiconductors Preliminary specification

Multiple voltage regulator TDA3615J

QUICK REFERENCE DATA

Note

1. The quiescent current is measured when R

L

= ∞.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Supply

V

bat/I(ig)

supply voltage

operating regulators on 11 14.4 18 V
operating regulator 1 on 3.5 14.4 18 V
jump start t ≤ 10 minutes −−30 V
load dump protection t ≤ 50 ms; t

r

≥ 2.5 ms −−50 V

I

q

quiescent supply current V

bat

= 14.4 V; V

I(ig)

<1V;

note 1

− 110 250 µA

V

bat=VI(ig)

= 14.4 V;
selector inputs 0,0,0
(state 3 in Table 1); note 1

− 125 −µA

Voltage regulators

V

O(REG1)

output voltage regulator 1 (5 V standby) 0.5 mA ≤ I

REG1

≤ 50 mA 4.75 5.0 5.25 V

V

O(REG2)

output voltage regulator 2 (filament) 0.5 mA ≤ I

REG2

≤ 300 mA 2.7 2.85 3.0 V

V

O(REG3)

output voltage regulator 3 (5 V logic) 0.5mA≤I

REG3

≤ 450 mA 4.75 5.0 5.25 V

V

O(REG4)

output voltage regulator 4 (synthesizer) 0.5 mA ≤ I

REG4

≤ 100 mA 9.0 9.5 10.0 V

V

O(REG5)

output voltage regulator 5 (AM) 0.5 mA ≤ I

REG5

≤ 150 mA 9.0 9.5 10.0 V

V

O(REG6)

output voltage regulator 6 (FM) 0.5 mA ≤ I

REG6

≤ 150 mA 9.0 9.5 10.0 V

Power switches

V

d1

drop-out voltage switch 1 (antenna) I

SW1

= 0.55 A 0.1 0.45 1.6 V

I

M

peak current switch 1 t < 1 s 1.7 1.9 − A

V

d2

drop-out voltage switch 2 (media) I

SW2

=1A − 0.5 1.0 V

V

clamp2

clamping voltage switch 2 − 15.0 16 V

V

d3

drop-out voltage switch 3 (display) I

SW3

= 0.35 A − 0.5 1.0 V

V

clamp3

clamping voltage switch 3 − 15.2 16 V

1998 Jun 23 4

Philips Semiconductors Preliminary specification

Multiple voltage regulator TDA3615J

BLOCK DIAGRAM

Fig.1 Block diagram.

handbook, full pagewidth

MGR099

REGULATOR 6

(FM)

REG6
(9.5 V/150 mA)

4

REGULATOR 5

(AM)

REG5
(9.5 V/150 mA)

8

REG4
(9.5 V/100 mA)

REGULATOR 4

(SYNTHESIZER)

6

REG3
(5 V/450 mA)

REGULATOR 3

(5 V LOGIC)

5

REG1
(5 V/50 mA)

REGULATOR 1
(5 V STANDBY)

REFERENCE

14

RES

16

REGULATOR 2

(FILAMENT)

SELECTOR

TEMPERATURE

AND

LOAD DUMP

PROTECTION

REG2

10

FILADJ

13

DISPLAY SWITCH

SW3

SW2

SW1

12

EN1

1

V

I(ig)

9

V

bat

15

EN2

2

EN3

3

GND

17

MEDIA SWITCH

11

ANTENNA SWITCH

7

Schmitt
trigger 4

Schmitt
trigger 3

Schmitt
trigger 2

Schmitt
trigger 1

LOAD DUMP

PROTECTION

Schmitt
trigger 5

4.7 kΩ

TDA3615J

1998 Jun 23 5

Philips Semiconductors Preliminary specification

Multiple voltage regulator TDA3615J

PINNING

SYMBOL PIN DESCRIPTION

EN1 1 enable input 1
EN2 2 enable input 2
EN3 3 enable input 3
REG6 4 regulator 6 output, FM
REG3 5 regulator 3 output, 5 V logic
REG4 6 regulator 4 output, synthesizer
SW1 7 switch 1 output, antenna
REG5 8 regulator 5 output, AM
V

I(ig)

9 ignition input voltage
REG2 10 regulator 2 output, filament
SW2 11 switch 2 output, media
SW3 12 switch 3 output, display
FILADJ 13 filament adjustment
REG1 14 regulator 1 output, 5 V standby
V

bat

15 battery input voltage
RES 16 reset output
GND 17 ground

handbook, halfpage

TDA3615J

MGR100

EN1
EN2

EN3
REG6
REG3
REG4

SW1

REG5

V

I(ig)

REG2

SW2
SW3

FILADJ

REG1

V

bat

RES

GND

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17

Fig.2 Pin configuration.

FUNCTIONAL DESCRIPTION

The TDA3615J is a multiple voltage regulator intended to
supply a microprocessor (e.g. in car radio applications).
Because of low-voltage operation of the application,
a low-voltage drop regulator is used in the TDA3615J.

Regulator 1 (5 V standby) will switch on when the supply
voltage exceeds 7.2 V for the first time and will switch off
again when the output voltage of the regulator drops below

3.5 V.
Reset is used to indicate that the regulator output voltage

is within its voltage range. This start-up feature is built-in to
secure a smooth start-up of the microprocessor at first
connection, without uncontrolled switching of the standby
regulator during the start-up sequence.

All other regulators and switches can be switched on and
off by using the three control input pins. This is only
possible when both supply voltages (V

bat

and V

I(ig)

) are

within their voltage range. Table 1 shows all possible
states.

The filament regulator output voltage of the TDA3615J can
be adjusted with pin FILADJ.

All output pins are fully protected. The regulators are
protected against load dump and short-circuit (foldback
current protection, except the filament regulator output).
At load dump all regulator outputs will go LOW except the
5 V standby regulator output.

The antenna switch and the media switch can withstand
‘loss of ground’. This means that the ground pin is
disconnected and the switch output is connected to ground
(V

bat

and V

I(ig)

are normally connected to the right pin).

1998 Jun 23 6

Philips Semiconductors Preliminary specification

Multiple voltage regulator TDA3615J

Selector settings
Table 1 Possible states of outputs depending on inputs

Note

1. X = don’t care.

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

THERMAL CHARACTERISTICS

QUALITY SPECIFICATION

Quality specification is in accordance with

“SNW-FQ-611E”

.

STATE

INPUTS OUTPUTS

V

bat

V

I(ig)

EN1 EN2 EN3 REG1 REG2 REG3 REG4 REG5 REG6 SW1 SW2 SW3

10X

(1)

X

(1)X(1)X(1)

000000000

210X

(1)X(1)X(1)

100000000
3 11000100000000
4 11001111101101
5 11010111110101
6 11011111000011
7 11100111000001
8 11101111101111
9 11110111110111

10 11111111100111

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

bat/I(ig)

supply voltage

operating regulators on − 18 V
jump start t ≤ 10 minutes − 30 V
load dump protection t ≤ 50 ms; t

r

≥ 2.5 ms − 50 V

V

rp

reverse polarity voltage non-operating −−18 V

P

tot

total power dissipation T

amb

=25°C − 62.5 W

T

stg

storage temperature non-operating −55 +150 °C

T

amb

ambient temperature operating −40 +85 °C

T

j

junction temperature operating −40 +150 °C

SYMBOL PARAMETER CONDITIONS VALUE UNIT

R

th(j-c)

thermal resistance from junction to case 2 K/W

R

th(j-a)

thermal resistance from junction to ambient in free air 40 K/W

1998 Jun 23 7

Philips Semiconductors Preliminary specification

Multiple voltage regulator TDA3615J

CHARACTERISTICS

V

bat=VI(ig)

= 14.4 V; T

amb

=25°C; see Fig.4; unless otherwise specified.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Supply

V

bat/I(ig)

supply voltage

operating regulators on 11 14.4 18 V
jump start t ≤ 10 minutes −− 30 V
load dump protection t ≤ 50 ms; t

r

≥ 2.5 ms −− 50 V

I

q

quiescent supply current V

bat

= 14.4 V; V

I(ig)

< 1 V; note 1 − 110 250 µA

V

bat=VI(ig)

= 14.4 V;

selector inputs 0,0,0; note 1

− 125 −µA

Reset buffer

I

sink(L)

LOW-level sink current 2 15 − mA

R

pu(int)

internal pull-up resistance 3.7 4.7 5.7 kΩ

Selector control inputs

V

IL

LOW-level input voltage −0.5 − +0.8 V

V

IH

HIGH-level input voltage 2.0 −−V

I

IH

HIGH-level input current VIH>2V −− 1.0 mA

I

IL

LOW-level input current VIL< 0.8 V −1.0 −−mA

Regulator 1 for 5 V standby (I

REG1

= 1 mA unless otherwise specified)

V

O(REG1)

output voltage 0.5 mA ≤ I

REG1

≤ 50 mA 4.75 5.0 5.25 V

6.5 V ≤ V

bat

≤ 18 V; note 2 4.75 5.0 5.25 V

18 V ≤ V

bat

≤ 50 V; load dump;

I

REG1

=30mA

4.75 5.0 5.25 V

∆V

LN

line voltage regulation 7 V ≤ V

bat

≤ 18 V − 350mV

∆V

L

load voltage regulation 0.5 mA ≤ I

REG1

≤ 50 mA −− 60 mV

SVRR supply voltage ripple rejection f

i

= 120 Hz; V

i(p-p)

=2V 60 72 − dB

V

d

drop-out voltage V

bat

= 5 V; note 3 − 0.27 1 V

I

l

current limit V

REG1

> 4.5 V 60 170 − mA

I

sc

short-circuit current RL≤ 0.5 Ω; note 5 15 60 − mA

Regulator 2 for filament (I

REG2

= 5 mA unless otherwise specified)

V

O(REG2)

output voltage 0.5 mA ≤ I

REG2

≤ 300 mA 2.7 2.85 3.0 V

7.5 V ≤ V

bat

≤ 16.9 V 2.7 2.85 3.0 V

adjust control 1.1 adjust V

I(ig)

V

∆V

LN

line voltage regulation 7.5 V ≤ V

bat

≤ 16.9 V −− 50 mV

∆V

L

load voltage regulation 5 mA ≤ I

REG2

≤ 300 mA −− 70 mV

SVRR supply voltage ripple rejection f

i

= 120 Hz; V

i(p-p)

=2V 60 80 − dB

I

sc

short-circuit current RL≤ 0.5 Ω 0.35 0.66 − A

1998 Jun 23 8

Philips Semiconductors Preliminary specification

Multiple voltage regulator TDA3615J

Regulator 3 for 5 V logic (I

REG3

= 5 mA unless otherwise specified)

V

O(REG3)

output voltage 0.5 mA ≤ I

REG3

≤ 450 mA 4.75 5.0 5.25 V

7.5 V ≤ V

bat

≤ 16.9 V 4.75 5.0 5.25 V

∆V

LN

line voltage regulation 7.5 V ≤ V

bat

≤ 16.9 V −− 50 mV

∆V

L

load voltage regulation 5 mA ≤ I

REG3

≤ 450 mA −− 60 mV

SVRR supply voltage ripple rejection f

i

= 120 Hz; V

i(p-p)

=2V 60 80 − dB

I

l

current limit V

REG3

> 3.5 V 0.5 0.85 − A

I

sc

short-circuit current RL≤ 0.5 Ω; note 5 20 125 − mA

Regulator 4 for synthesizer (I

REG4

= 5 mA unless otherwise specified)

V

O(REG4)

output voltage 0.5 mA ≤ I

REG4

≤ 100 mA 9.0 9.5 10.0 V

10.75 V ≤ V

bat

≤ 16.9 V 9.0 9.5 10.0 V

∆V

LN

line voltage regulation 10.75 V ≤ V

bat

≤ 16.9 V −− 50 mV

∆V

L

load voltage regulation 5 mA ≤ I

REG4

≤ 100 mA −− 70 mV

SVRR supply voltage ripple rejection f

i

= 120 Hz; V

i(p-p)

=2V 60 70 − dB

V

d

drop-out voltage I

REG4

= 0.1 A; V

bat

= 9 V; note 4 − 0.18 0.5 V

I

l

current limit V

REG4

> 7 V 0.35 0.57 − A

I

sc

short-circuit current RL≤ 0.5 Ω; note 5 20 160 − mA

Regulator 5 for AM (I

REG5

= 5 mA unless otherwise specified)

V

O(REG5)

output voltage 0.5 mA ≤ I

REG5

≤ 150 mA 9.0 9.5 10.0 V

10.75 V ≤ V

bat

≤ 16.9 V 9.0 9.5 10.0 V

∆V

LN

line voltage regulation 10.75 V ≤ V

bat

≤ 16.9 V −− 50 mV

∆V

L

load voltage regulation 5 mA ≤ I

REG5

≤ 150 mA −− 70 mV

SVRR supply voltage ripple rejection f

i

= 120 Hz; V

i(p-p)

=2V 60 70 − dB

V

d

drop-out voltage I

REG5

= 0.15 A; V

bat

= 9 V; note 4 − 0.35 1 V

I

l

current limit V

REG5

> 7 V 0.2 0.37 − A

I

sc

short-circuit current RL≤ 0.5 Ω; note 5 50 130 − mA

Regulator 6 for FM (I

REG6

= 5 mA unless otherwise specified)

V

O(REG6)

output voltage 0.5 mA ≤ I

REG6

≤ 150 mA 9.0 9.5 10.0 V

10.75 V ≤ V

bat

≤ 16.9 V 9.0 9.5 10.0 V

∆V

LN

line voltage regulation 10.75 V ≤ V

bat

≤ 16.9 V −− 50 mV

∆V

L

load voltage regulation 5 mA ≤ I

REG6

≤ 150 mA −− 70 mV

SVRR supply voltage ripple rejection f

i

= 120 Hz; V

i(p-p)

=2V 60 70 − dB

V

d

drop-out voltage I

REG6

= 0.15 A; V

bat

= 9 V; note 4 − 0.4 1 V

I

l

current limit V

REG6

> 7 V 0.2 0.37 − A

I

sc

short-circuit current RL≤ 0.5 Ω; note 5 50 125 − mA

Power switch 1 (antenna)

V

d1

drop-out voltage I

SW1

= 0.55 A; note 4 0.1 0.45 1.6 V

V

clamp1

clamping voltage − 15.2 16 V

I

M

peak current t < 1 s 1.7 1.9 − A

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

1998 Jun 23 9

Philips Semiconductors Preliminary specification

Multiple voltage regulator TDA3615J

Notes

1. The quiescent current is measured when RL= ∞.

2. Only if V

bat

has exceeded 7.2 V.

3. The drop-out voltage of regulator 1 is measured between V

bat

and V

REGx

.

4. The drop-out voltage of regulators 2 to 6 and power switches 1, 2 and 3 are measured between V

I(ig)

and V

REGx

or

between V

I(ig)

and V

SWx

.

5. The foldback current protection limits the dissipation power at short-circuit.

6. The voltage of regulator 1 sinks as a result of a supply voltage drop.

7. Only when one of the control pins is HIGH.

Power switch 2 (media)

V

d2

drop-out voltage I

SW2

= 1 A; note 4 − 0.5 1.0 V

V

clamp2

clamping voltage − 15.0 16 V

Power switch 3 (display)

V

d3

drop-out voltage I

SW3

= 0.35 A; note 4 − 0.5 1.0 V

V

clamp3

clamping voltage − 15.2 16 V

Schmitt trigger 1 for regulator

V

thr

rising threshold voltage selector inputs 0,0,0 (state 3 in

Table 1); I

REG1

=10mA

6.2 7.2 7.8 V

V

thf

falling threshold voltage selector inputs 0,0,0 (state 3 in

Table 1); I

REG1

=10mA

3.2 3.5 3.7 V

V

hys

hysteresis voltage − 3.7 − V
Schmitt trigger 2 for reset; note 6
V

thr

rising threshold voltage I

REG1

= 10 mA 4.28 4.45 4.73 V

V

thf

falling threshold voltage I

REG1

= 10 mA 4.2 4.35 4.5 V

V

hys

hysteresis voltage − 0.1 − V

Schmitt trigger 3 for battery sense

V

thr

rising threshold voltage V

I(ig)

= 14.4 V; RL=1kΩ 6.8 7.35 7.9 V

V

thf

falling threshold voltage V

I(ig)

= 14.4 V; RL=1kΩ 5.5 5.95 6.4 V

V

hys

hysteresis voltage − 1.4 − V

Schmitt trigger 4 for ignition sense

V

thr

rising threshold voltage V

bat

= 14.4 V; RL= 100 Ω 7.2 7.6 8.0 V

V

thf

falling threshold voltage V

bat

= 14.4 V; RL= 100 Ω 6.0 6.3 6.8 V

V

hys

hysteresis voltage − 1.3 − V

Schmitt trigger 5 for load dump

V

thr

rising threshold voltage selector inputs 1,0,1 (state 8 in

Table 1); note 7

17.5 18.5 19.5 V

V

thf

falling threshold voltage selector inputs 1,0,1 (state 8 in

Table 1); note 7

17 V

thr

− 0.3 V

thr

− 0.1 V

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

1998 Jun 23 10

Philips Semiconductors Preliminary specification

Multiple voltage regulator TDA3615J

Fig.3 Typical foldback current protection behaviour.

handbook, full pagewidth

MGR101

V

O(REG1)

V

O(REG3)

V

O(REG4)

V

O(REG2)

5.0

1.6

500 100 150 200

I

REG1

(mA)

2.8

2500 500 750 1000

I

REG2

(mA)

5.0

1.6

2500 500 750 1000

I

REG3

(mA)

1.6

9.5

2000 400 600 800

I

REG4

(mA)

1998 Jun 23 11

Philips Semiconductors Preliminary specification

Multiple voltage regulator TDA3615J

TEST AND APPLICATION INFORMATION

Fig.4 Typical application circuit.

handbook, full pagewidth

MGR102

regulator 6

output FM

C6
10 µF
(16 V)

R1
63 Ω

9

15

7

11

13

10

14

4

5

6

2

1

TDA3615J

ground

enable input 1

enable input 3

enable input 2

3

16

8

17

+5 V

regulator 1
output 5 V standby

C11
10 µF
(16 V)

R5
100 Ω

regulator 2
output filament

filament
adjustment

C10
10 µF
(16 V)

R6

9.5 Ω

switch 2
output media

C5
10 µF
(16 V)

R9
16 Ω

12

switch 3
output display

C12
47 nF

R10
45 Ω

ignition input voltage

L1

0451707

C1
4400 µF
(16 V)

C2

0.1 µF
(50 V)

regulator 3

output 5 V logic

C7
10 µF
(16 V)

R2
11 Ω

regulator 4

output synthesizer

C8
10 µF
(16 V)

R3
95 Ω

regulator 5

output AM

C9
10 µF
(16 V)

R4
63 Ω

reset output

R11
47 kΩ

D1
DRXSF401XT

battery input voltage

C3
47 µF
(16 V)

DRF3F201XT

D2

R13
620 Ω

R7
470 Ω

switch 1
output antenna

C4
10 µF
(16 V)

R12

12.5 Ω

R8
31 Ω

1998 Jun 23 12

Philips Semiconductors Preliminary specification

Multiple voltage regulator TDA3615J

Application information

N

OISE

Table 2 Noise figures

Note

1. Measured at a bandwidth of 1 MHz.

The regulator outputs for regulators 2 to 6 are designed in
such a way that the noise is very low and the stability is
very good. The noise output voltages are depending on
the output capacitors. Table 2 describes the influence of
the output capacitors on the output noise.

S

TABILITY

The regulators are made stable with the external
connected output capacitors.

REGULATOR

NOISE FIGURE (µV)

(1)

Co=10µFCo=47µFCo= 100 µF

1 175 145 100
2 125 98 85
3 180 150 125
4 290 260 190
5 290 260 190
6 290 260 190

With almost any output capacitor, stability can be
guaranteed (see Figs 5, 6 and 7).

When only an electrolytic capacitor is used, the
temperature behaviour of this output capacitor can cause
oscillations at extreme low temperature. The next
2 examples show how an output capacitor value is
selected. Oscillation problems can be avoided by adding a
47 nF capacitor in parallel with the electrolytic capacitor.

Example 1 (regulator 1)

Regulator 1 is made stable with an electrolytic output
capacitor of 10 µF (ESR = 3.1 Ω). At −30 °C the capacitor
value is decreased to 3 µF and the ESR is increased to
22 Ω. The regulator will remain stable at −30 °C (see
Fig.5).

Example 2 (regulator 5)

Regulator 5 is made stable with a 2.2 µF electrolytic
capacitor (ESR = 8 Ω). At −30 °C the capacitor value is
decreased to 0.8 µF and the ESR is increased to 56 Ω.
Using Fig.6, the regulator will be instable at −30 °C.

Even when only a small MKT capacitor of 47 nF is used as
output capacitor, regulator 5 will remain stable over all
temperatures.

Fig.5 Stability curve of regulator 1 (5 V standby).

handbook, halfpage

MGR103

ESR

(Ω)

C (µF)

20

1 10 1000.1

40

60

80

minimum ESR

maximum ESR

stable region

Fig.6 Stability curve of regulator 5 (AM).

handbook, halfpage

MGR104

ESR

(Ω)

C (µF)

25

0.1 1 100.022

50

75

100

maximum ESR

stable region

1998 Jun 23 13

Philips Semiconductors Preliminary specification

Multiple voltage regulator TDA3615J

Fig.7 Stability curve of regulator 3 (5 V logic).

handbook, halfpage

MGR105

ESR

(Ω)

C (µF)

25

0.1 1 100.022

50

75

100

maximum ESR

stable region

Fig.8 Loss of ground test circuit.

handbook, halfpage

MGR106

TDA3615J

911

17

15

V

I(ig)

V

SW2

= 0 V

SW2

V

bat

C2
220 nF

C1

1000 µF

GND

battery
16 V (max)

LOSS OF GROUND PROTECTION
Two power switches (media and antenna) are protected

for loss of ground. The loss of ground situation is depicted
in Fig.8. The ground terminal of the battery is connected to
the output of the media switch. Two problems occur:

1. At first connection a high charge current will flow
through C1 to the ground terminal (pin 17) of the
TDA3615J and out of the switch output (pin 11).
The media and antenna switches are protected to limit
this current.

1. When the switch is enabled, a short-circuit current will
flow out of the power switch output (pin 11) because
the output of the switch is shortened below substrate
potential.

A special protection is built-in to avoid the media and
antenna switches from being damaged during a loss of
ground condition.

In practice, this condition can occur when the ground
terminal of the total application is connected to the switch
output due to a bad wiring.

CAPACITIVE LOADS ON POWER SWITCHES
Power switches can deliver a large current to the

connected loads. When a supply voltage ripple is applied,
large load currents will flow when capacitive loads are
used in parallel with normal loads.

When the output of a power switch is forced above V

I(ig)

an
internal protection is activated to switch off the switch as
long as the fault is present.

The display switch in particular is sensitive to capacitive
loads.

We therefore strongly advise:

• Use only a 47 nF output capacitor on the display switch

• Use a 10 µF capacitor on the outputs of the antenna and

media switch.

On the outputs of regulators 2 to 6 a capacitor of 47 nF can
be used; larger values are possible but not necessary to
guarantee stability (see Figs 5, 6 and 7).

1998 Jun 23 14

Philips Semiconductors Preliminary specification

Multiple voltage regulator TDA3615J

PACKAGE OUTLINE

REFERENCES

OUTLINE
VERSION

EUROPEAN

PROJECTION

ISSUE DATE

IEC JEDEC EIAJ

DIMENSIONS (mm are the original dimensions)

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

SOT243-1

0 5 10 mm

scale

D

L

E

A

c

A

2

L

3

Q

w M

b

p

1

d

D

Z

e

e

x

h

117

j

E

h

non-concave

95-03-11
97-12-16

DBS17P: plastic DIL-bent-SIL power package; 17 leads (lead length 12 mm)

SOT243-1

view B: mounting base side

m

2

e

v M

B

UNIT A e

1

A2bpcD

(1)

E

(1)

Z

(1)

deD

h

LL3m

mm

17.0

15.5

4.6

4.2

0.75

0.60

0.48

0.38

24.0

23.6

20.0

19.6

10 2.54

v

0.8

12.2

11.8

1.27

e

2

5.08

2.4

1.6

E

h

6

2.00

1.45

2.1

1.8

3.4

3.1

4.3

12.4

11.0

Qj

0.4w0.03

x

1998 Jun 23 15

Philips Semiconductors Preliminary specification

Multiple voltage regulator TDA3615J

SOLDERING
Introduction

There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.

This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our

“Data Handbook IC26; Integrated Circuit Packages”

(order code 9398 652 90011).

Soldering by dipping or by wave

The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joint for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.

The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (T

stg max

). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.

Repairing soldered joints

Apply a low voltage soldering iron (less than 24 V) to the
lead(s) of the package, below the seating plane or not
more than 2 mm above it. If the temperature of the
soldering iron bit is less than 300 °C it may remain in
contact for up to 10 seconds. If the bit temperature is
between 300 and 400 °C, contact may be up to 5 seconds.

DEFINITIONS

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

Internet: http://www.semiconductors.philips.com

Philips Semiconductors – a worldwide company

© Philips Electronics N.V. 1998 SCA60
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.

Middle East: see Italy
Netherlands: Postbus 90050, 5600PB EINDHOVEN, Bldg. VB,

Tel. [phone], Fax. [phone]
New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,

Tel. [phone], Fax. [phone]
Norway: Box 1, Manglerud 0612, OSLO,

Tel. [phone], Fax. [phone]

Pakistan: see Singapore
Philippines: Philips Semiconductors Philippines Inc.,

106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. [phone], Fax. [phone]

Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA,
Tel. [phone], Fax. [phone]

Portugal: see Spain
Romania: see Italy
Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,

Tel. [phone], Fax. [phone]
Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762,

Tel. [phone], Fax. [phone]

Slovakia: see Austria
Slovenia: see Italy
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2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000,
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Spain: Balmes 22, 08007 BARCELONA,
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Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,
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Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
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Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,
TAIPEI, Taiwan Tel. [phone], Fax. [phone]

Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
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Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,
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Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. [phone], Fax. [phone]

United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. [phone], Fax. [phone]

United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. [phone]

Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,

Tel. [phone], Fax.[phone]

For all other countries apply to: Philips Semiconductors,
International Marketing & Sales Communications, Building BE-p, P.O. Box 218,
5600 MD EINDHOVEN, The Netherlands, Fax. [phone]

Argentina: see South America
Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,

Tel. [phone], Fax. [phone]
Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. [phone],

Fax. [phone]
Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6,

220050 MINSK, Tel. [phone], Fax. [phone]

Belgium: see The Netherlands
Brazil: see South America
Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor,

51 James Bourchier Blvd., 1407 SOFIA,
Tel. [phone], Fax. [phone]

Canada: PHILIPS SEMICONDUCTORS/COMPONENTS,
Tel. [phone]

China/Hong Kong: 501 Hong Kong Industrial Technology Centre,
72 Tat Chee Avenue, Kowloon Tong, HONG KONG,
Tel. [phone], Fax. [phone]

Colombia: see South America
Czech Republic: see Austria
Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S,

Tel. [phone], Fax. [phone]
Finland: Sinikalliontie 3, FIN-02630 ESPOO,

Tel. [phone], Fax. [phone]
France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex,

Tel. [phone], Fax. [phone]
Germany: Hammerbrookstraße 69, D-20097 HAMBURG,

Tel. [phone], Fax. [phone]
Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS,

Tel. [phone], Fax. [phone]

Hungary: see Austria
India: Philips INDIA Ltd, Band Box Building, 2nd floor,

254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025,
Tel. [phone], Fax. [phone]

Indonesia: PT Philips Development Corporation, Semiconductors Division,
Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510,
Tel. [phone] ext. 2501, Fax. [phone]

Ireland: Newstead, Clonskeagh, DUBLIN 14,
Tel. [phone], Fax. [phone]

Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053,
TEL AVIV 61180, Tel. [phone], Fax. [phone]

Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3,
20124 MILANO, Tel. [phone], Fax. [phone]

Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku,
TOKYO 108-8507, Tel. [phone], Fax. [phone]

Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,
Tel. [phone], Fax. [phone]

Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,
Tel. [phone], Fax. [phone]

Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,
Tel. [phone]

Printed in The Netherlands 545102/1200/01/pp16 Date of release: 1998Jun 23 Document order number: 9397 750 03721