Preliminary specification
Supersedes data of June 1993
File under Integrated Circuits, IC01
1996 May 31
Page 2
Philips SemiconductorsPreliminary specification
PLL stereo decoder and noise blankerTDA1592
FEATURES
• Adjustment-free voltage controlled PLL oscillator for
ceramic resonator (f = 456 kHz)
• Pilot signal dependent mono/stereo switching
• Analog control of mono/stereo change over
[stereo blend, Stereo Noise Controller (SNC)]
• Adjacent channel noise suppression (114 kHz)
• Pilot canceller
• Analog control of de-emphasis; High Cut Control (HCC)
• Reduced and controlled de-emphasis for AM operation
(pin 7 to GND)
• Applicable as source selector for AM/FM/cassette
switching
• Soft mute for silent tuning
• Separate interference noise detector
• Integrated input low-pass filter for delayed noise
blanking
• Noise blanking at MPX-demodulator outputs.
QUICK REFERENCE DATA
GENERAL DESCRIPTION
The TDA1592 is a monolithic bipolar integrated circuit
providing the stereo decoder function and noise blanking
for FM car radio applications.
The device operates in a power supply range of
7.5 to 12 V.
SYMBOLPARAMETERMIN.TYP.MAX.UNIT
V
P
I
P
V
o(rms)
supply voltage (pin 5)7.51012V
supply current−1520mA
audio output signal (RMS value)8009001000mV
THDtotal harmonic distortion−0.10.3%
S/Nsignal-to-noise ratio−82−dB
α
cs
V
trigg
channel separation3040−dB
interference voltage trigger level−10−mV
ORDERING INFORMATION
TYPE
NUMBER
NAMEDESCRIPTIONVERSION
PACKAGE
TDA1592DIP20plastic dual in-line package; 20 leads (300 mil)SOT146-1
TDA1592TSO20plastic small outline package; 20 leads; body width 7.5 mmSOT163-1
1996 May 312
Page 3
Philips SemiconductorsPreliminary specification
PLL stereo decoder and noise blankerTDA1592
BLOCK DIAGRAM
out
R
input
auxiliary
HCC
V
SNC
V
ref
andbook, full pagewidth
V
out R
R
6.8
6.8
nF
nF
11
(120 kHz)
ref
V
DETECTOR
NOISE AND AGC
AGC
kΩ
6.8
TDA1592
SNC
ref
V
AND
HCC
GATE
7.4 kΩ
7.4 kΩ
FILTER
2-POLE
(30 kHz)
MUTE
6.8 kΩ
PULSE
DETECTOR
INTERFERENCE
AMPLIFIER
HIGH-PASS
ref
V
FORMER
47 kΩ
15 14 13 12
10987654321
out L
47 kΩ
R
BC548
820
33 kΩ
47
68
pF
off
VCO
47 kΩ
27 kΩ
27 kΩ
kΩ
nF
33 pF
out
L
MED724
input
auxiliary
mute
input
interference
P
V
mono
in
R
164 kΩ
1817 16
SWITCH
PILOT
CANCEL
19
PILOT
DETECTOR
PHASE
ref
V
20
75
kΩ
FILTER
4-POLE
(80 kHz)
pilot
indicator
MPX input
kΩ
750
100 nF
100 nF
1996 May 313
19 19 19 38
DETECTOR
LOGIC
ref
I
ref
V
POWER
SUPPLY
100 kΩ
100 nF
Fig.1 Block diagram with external components, also used as test circuit.
CSB
VCO
456 F11
10 nF
68 kΩ
100 nF
Page 4
Philips SemiconductorsPreliminary specification
PLL stereo decoder and noise blankerTDA1592
PINNING
SYMBOLPINDESCRIPTION
PLL1phase locked loop filter
OSC
GND3ground (0 V)
I
ref
V
P
INFI6interference signal input
PUFO
NDET
FB-L
V
oL
V
oR
FB-R
C
DEEL
C
DEER
HCC15HCC input for de-emphasis control
SNC16stereo blend input
V
ref
IDENT
PILOT
V
i MPX
oscillator input/output pin for
2
ceramic resonator
4reference current
5supply voltage (+10 V)
pulse former time constant; VCO
7
off
noise detector time constant; mute
8
on
AF feedback input for left audio
9
signal
10AF output signal left
11AF output signal right
AF feedback input for right audio
12
signal
de-emphasis capacitor for left
13
channel
de-emphasis capacitor for right
14
channel
externally applied reference
17
voltage of 1 to 5 V
identification output (HIGH = pilot
18
existing; stereo)
pilot detector level (forced mono
19
input)
MPX input signal from IF
20
demodulator
handbook, halfpage
PLL
1
OSC
2
GND
3
I
4
ref
V
5
P
6
7
8
9
10
TDA1592
MED726
INFI
PUFO
NDET
FB-L
V
oL
Fig.2 Pin configuration.
V
20
i MPX
19
PILOT
18
IDENT
17
V
ref
16
SNC
HCC
15
C
14
DEER
C
13
DEEL
FB-R
12
V
11
oR
1996 May 314
Page 5
Philips SemiconductorsPreliminary specification
PLL stereo decoder and noise blankerTDA1592
FUNCTIONAL DESCRIPTION
The MPX input of the TDA1592 (pin 20) is the null-node of
an operational amplifier with internal feedback resistor.
Adapting the stereo decoder input to the level of the FM
demodulator output is realized by the value of input
resistor Rin (see Fig.3). The total gain of the stereo
decoder is applicable by varying the feedback resistors
R
(pins 9, 10, 11 and 12) of the output operational
out
amplifiers (see Fig.4).
The input amplifier is followed by an integrated 4th order
Bessel low-pass filter with a cut-off frequency of 80 kHz.
It provides necessary signal delay for noise blanking and
damping of high frequency interferences at the stereo
decoder input.
The soft mute facility (pin 8) provides silent tuning for RDS
processing. The mute time constant may be adjusted from
pin 8. In mute position and the VCO switched off (pin 7),
the output amplifiers can be used for cassette playback,
AM stereo purpose or other signal sources.
The voltage to current converted MPX signal is fed to
phase detector, pilot detector and pilot canceller circuits.
The oscillator is alignment-free with an external ceramic
resonator at 456 kHz as reference (pin 2). The required
19 kHz and 38 kHz signals are generated by division of the
oscillator output signal in a logical circuit. For regeneration
of the 38 kHz subcarrier, a PLL is used. The 19 kHz
quadrature phase signal is fed to the 19 kHz
phase detector, where it is compared with the incoming
pilot tone. The DC output signal of the phase detector
(pin 1) controls the oscillator (PLL).
The pilot presence detector is driven by internally
generated in-phase 19 kHz. Its pilot-dependent DC output
voltage (pin 19) is fed to a threshold switch, which
activates the pilot indicator logic output (pin 18) and turns
the stereo decoder to stereo operation. The same
DC voltage is used to control the amplitude of an
anti-phase internally generated 19 kHz signal. In the
pilot canceller, the pilot tone is compensated by this
anti-phase 19 kHz signal.
The pilot cancelled signal is fed to the multiplex decoder.
There, the side signal is demodulated and combined with
the main signal in a matrix to left and right audio channel.
Compensation for roll-off in the incoming MPX signal
caused by IF filters and FM demodulator is realized by
corresponding side signal amplification.
A smooth mono to stereo take-over, which is controlled by
the level detector voltage of the IF part, is achieved by the
SNC (pins 16 and 17; see Fig.6).
From the output of the MPX demodulator the signals are
fed to 2-pole low-pass filters with a cut-off frequency of
30 kHz to provide additional signal delay for noise blanking
and attenuation of the subcarrier and its harmonics.
These filters are followed by the noise suppression gates,
which are combined with de-emphasis and HCC. The
de-emphasis is defined by internal resistors (aligned by an
external current) and external capacitors (pins 13 and 14).
For HCC, the de-emphasis time constant can be changed
to higher values (pins 15 and 17; see Figs 7 to 9). This
function is controlled by an analog input signal, derived
from the level detector voltage of the IF part. When the
VCO is turned off (pin 7 to GND), de-emphasis is reduced
to 20 µs for full frequency response when AM-AF is fed
through the stereo decoder. De-emphasis remains
controllable.
From the gate circuits audio is fed through internal series
resistors to the inverting inputs of the output operational
amplifiers (pins 9 and 12), which can also be used as
signal inputs for cassette playback or other sources when
the mute is activated. The gain of these amplifiers is
defined by external feedback resistors R
(pins 9, 10, 11 and 12).
The input of the ignition noise blanker is the null node of an
operational amplifier (pin 6). It can be driven by the level
detector output of the FM-IF limiter and/or the MPX signal.
Its sensitivity is dependent on the value of the series input
resistor at pin 6.
The operational amplifier output signal is fed through an
integrated 120 kHz high-pass filter, becomes amplified
and is then fed in parallel to the noise detector and the
interference detector. The noise detector is a negative
peak detector. Its output (pin 8) controls the trigger
sensitivity (prevention to false triggering at noisy input
signals) and the attenuation of the input operational
amplifier. The output of the interference detector, when
receiving a steep pulse, triggers a mono flip-flop, which is
a part of the pulse former circuit. The time constant of the
mono flip-flop is defined by an external capacitor (pin 7)
and its output activates the blanking gates in the audio.
out
1996 May 315
Page 6
Philips SemiconductorsPreliminary specification
PLL stereo decoder and noise blankerTDA1592
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOLPARAMETERMIN.MAX.UNIT
V
P
P
tot
T
stg
T
amb
V
es
Note
1. Equivalent to discharging a 200 pF capacitor through a 0 Ω series resistor.
CHARACTERISTICS
= 10 V; T
V
P
amb
and series resistor at input R1= 164 kΩ; measurements taken in Fig.1; unless otherwise specified.
supply voltage (pin 5)013.2V
total power dissipation00.25W
storage temperature−55+150°C
operating ambient temperature−40+85°C
electrostatic handling for all pins; note 1−400+400V
=25°C; input signal V
i MPX(p-p)
= 1.7 V; m = 100% (∆f=±75 kHz, f
= 1 kHz); de-emphasis of 50 µs
mod
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX. UNIT
V
P
I
P
supply voltage (pin 5)7.51012V
supply current−1520mA
Stereo decoder
V
i MPX(p-p)
∆V
i MPX(p-p)
V
o(rms)
MPX input signal−1.7−V
overdrive margin of MPX input signalTHD = 1%6−−dB
AF mono output signal at pins 10 and 11
without pilot8009001000 mV
(RMS value)
∆V
o
V
10-11/Vo
V
o 10,11
R
o 10,11
I
o
R
2,3
V
4,3
α
cs
overdrive margin of output signalTHD = 1%6−−dB
difference of output voltage levels−−1dB
DC output voltage (pins 10 and 11)3.23.74.2V
output resistance−150−Ω
output current330400−µA
maximum feedback resistor−−68kΩ
reference voltage3.73.83.9V
channel separationpin 16 open-circuit;
3040−dB
see Fig.6
THDtotal harmonic distortion−0.10.3%
S/Nsignal-to-noise ratiof = 20 to 16000 Hz7782−dB
α
19
α
38
α
57
α
76
IM2intermodulation for f
IM3f
α
57 VF
α
67
pilot signal suppressionf = 19 kHz4050−dB
subcarrier suppressionf = 38 kHz3550−dB
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
A
A
UNIT
inches
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
max.
mm
OUTLINE
VERSION
SOT146-1
12
min.
max.
1.73
1.30
0.068
0.051
IEC JEDEC EIAJ
SC603
b
b
1
0.53
0.38
0.021
0.015
0.36
0.23
0.014
0.009
REFERENCES
cD E eM
(1)(1)
26.92
26.54
1.060
1.045
1996 May 3114
6.40
6.22
0.25
0.24
10
(1)
1
3.60
8.25
3.05
7.80
0.14
0.32
0.12
0.31
EUROPEAN
PROJECTION
H
E
10.0
0.2542.547.62
8.3
0.39
0.010.100.30
0.33
ISSUE DATE
M
L
e
w
92-11-17
95-05-24
Z
max.
2.04.20.513.2
0.0780.170.0200.13
Page 15
Philips SemiconductorsPreliminary specification
PLL stereo decoder and noise blankerTDA1592
SO20: plastic small outline package; 20 leads; body width 7.5 mm
D
c
y
Z
20
pin 1 index
1
e
11
A
2
10
w M
b
p
SOT163-1
E
H
E
Q
A
1
L
p
L
detail X
(A )
A
X
v M
A
A
3
θ
0510 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
mm
OUTLINE
VERSION
SOT163-1
A
max.
2.65
0.10
A
1
0.30
0.10
0.012
0.004
A2A
2.45
2.25
0.096
0.089
IEC JEDEC EIAJ
075E04 MS-013AC
0.25
0.01
b
3
p
0.49
0.32
0.36
0.23
0.019
0.013
0.014
0.009
UNIT
inches
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
(1)E(1)(1)
cD
13.0
7.6
7.4
0.30
0.29
1.27
0.050
12.6
0.51
0.49
REFERENCES
1996 May 3115
eHELLpQ
10.65
10.00
0.42
0.39
1.4
0.055
1.1
0.4
0.043
0.016
1.1
1.0
0.043
0.039
PROJECTION
0.25
0.250.1
0.01
0.01
EUROPEAN
ywvθ
Z
0.9
0.4
8
0.004
ISSUE DATE
0.035
0.016
92-11-17
95-01-24
0
o
o
Page 16
Philips SemiconductorsPreliminary specification
PLL stereo decoder and noise blankerTDA1592
SOLDERING
Introduction
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our
“IC Package Databook”
(order code 9398 652 90011).
DIP
OLDERING BY DIPPING OR BY WA VE
S
The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joint for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (T
stg max
). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.
EPAIRING SOLDERED JOINTS
R
Apply a low voltage soldering iron (less than 24 V) to the
lead(s) of the package, below the seating plane or not
more than 2 mm above it. If the temperature of the
soldering iron bit is less than 300 °C it may remain in
contact for up to 10 seconds. If the bit temperature is
between 300 and 400 °C, contact may be up to 5 seconds.
SO
REFLOW SOLDERING
Reflow soldering techniques are suitable for all SO
packages.
Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.
AVE SOLDERING
W
Wave soldering techniques can be used for all SO
packages if the following conditions are observed:
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.
• The longitudinal axis of the package footprint must be
parallel to the solder flow.
• The package footprint must incorporate solder thieves at
the downstream end.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
EPAIRING SOLDERED JOINTS
R
Fix the component by first soldering two diagonally-
opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
1996 May 3116
Page 17
Philips SemiconductorsPreliminary specification
PLL stereo decoder and noise blankerTDA1592
DEFINITIONS
Data sheet status
Objective specificationThis data sheet contains target or goal specifications for product development.
Preliminary specificationThis data sheet contains preliminary data; supplementary data may be published later.
Product specificationThis data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1996 May 3117
Page 18
Philips SemiconductorsPreliminary specification
PLL stereo decoder and noise blankerTDA1592
NOTES
1996 May 3118
Page 19
Philips SemiconductorsPreliminary specification
PLL stereo decoder and noise blankerTDA1592
NOTES
1996 May 3119
Page 20
Philips Semiconductors – a worldwide company
Argentina: see South America
Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +1 800 234 7381, Fax. +1 708 296 8556
Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Tel. +381 11 825 344, Fax.+381 11 635 777
For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications,
Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands517021/1200/02/pp20 Date of release: 1996 May 31Document order number: 9397 750 00875
Internet: http://www.semiconductors.philips.com/ps/
(1)ADDRESS CONTENT SOURCE May 31, 1996
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