Datasheet TDA1545A-N2 Datasheet (Philips)

DATA SH EET

Preliminary specification
Supersedes data of March 1993
File under Integrated Circuits, IC01

1997 Sep 04

INTEGRATED CIRCUITS

TDA1545A

Stereo continuous calibration DAC

1997 Sep 04 2

Philips Semiconductors Preliminary specification

Stereo continuous calibration DAC TDA1545A

FEATURES

• Space saving packages

• Low power consumption

• Low total harmonic distortion

• Wide dynamic range (16-bit resolution)

• Continuous calibration concept

• Easy application: single 3 to 5.5 V rail power supply and

output- and bias current are proportional to the supply
voltage

• Fast settling time permits 2×, 4× and 8× oversampling
(serial input) or double speed operation at 4×
oversampling

• Internal bias current ensures maximum dynamic range

• Wide operating temperature range of −40 to +85 °C

• Compatible with most of the Japanese input formats:

time multiplexed, two's complement and TTL

• No zero crossing distortion.

GENERAL DESCRIPTION

The TDA1545A is the first device of a new generation of
the digital-to-analog converters which embodies the
innovative technique of continuous calibration. The largest
bit-currents are repeatedly generated by one single
current reference source. This duplication is based upon
an internal charge storage principle having an accuracy
insensitive to ageing, temperature and process variations.

The device is fabricated in a 1.0 µm CMOS process and
features an extremely low power dissipation, small
package size and easy application. Furthermore, the
accuracy of the high coarse current combined with the
implemented symmetrical offset decoding method
preclude zero-crossing distortion and ensures high quality
audio reproduction. Therefore, the continuous calibration
digital-to-analog converter is eminently suitable for use in
(portable) digital audio equipment.

ORDERING INFORMATION

TYPE

NUMBER

PACKAGE

NAME DESCRIPTION VERSION

TDA1545A DIP8 plastic dual in-line package; 8 leads (300 mil) SOT97-1
TDA1545AT SO8 plastic small outline package; 8 leads; body width 3.9 mm SOT96-1
TDA1545ATT TSSOP14 plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1

1997 Sep 04 3

Philips Semiconductors Preliminary specification

Stereo continuous calibration DAC TDA1545A

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

DD

supply voltage 3 5 5.5 V

I

DD

supply current VDD=5V;

at code 0000H

− 3.0 4.0 mA

I

FS

full-scale output current VDD= 5 V 0.9 1.0 1.1 mA

V

DD

=3V − 0.6 − mA

THD total harmonic distortion including noise

at 0 dB −−88 −78 dB
at 0 dB − 0.004 0.01 %
at −60 dB −−33 −24 dB
at −60 dB − 2.2 6 %
at −60 dB; −−35 − dB
A-weighting
at −60 dB; − 1.7 − %
A-weighting
at −60 dB; − 1.4 − %
A-weighting;
R3=R4=11kΩ;
I

FS

=2mA

S/N signal-to-noise ratio at bipolar zero

A-weighting;
at code 0000H

86 98 − dB

R3=R4=11kΩ;
I

FS

=2mA

− 101 − dB

t

cs

current settling time to ±1 LSB − 0.2 −µs
BR input bit rate at data input −−18.4 Mbits/s
f

BCK

clock frequency at clock input −−18.4 MHz
TC

FS

full-scale temperature coefficient at

analog outputs (IOL; IOR)

−±400 − ppm

P

tot

total power dissipation at code 0000H

V

DD

=5V − 15 20 mW

V

DD

=3V − 6 − mW

T

amb

operating ambient temperature −40 − +85 °C

1997 Sep 04 4

Philips Semiconductors Preliminary specification

Stereo continuous calibration DAC TDA1545A

, full pagewidth

BCK

WS

DATA

MCD287 - 1

LEFT INPUT LATCH

LEFT BIT SWITCHES

LEFT OUTPUT LATCH

RIGHT INPUT LATCH

RIGHT BIT SWITCHES

RIGHT OUTPUT LATCH

1 CALIBRATED

SPARE

SOURCE

32 (5-BIT)

CALIBRATED

CURRENT

SOURCES

11-BIT

PASSIVE

DIVIDER

11-BIT

PASSIVE

DIVIDER

CONTROL

AND

TIMING

I

BR

I

BL

REFERENCE

SOURCE

I

BL

I

BR

3.9 kΩ

1 nF

C1

R1

IOL

V

REF

3.9 kΩ

1 nF

C2

R2

IOR

V

REF

OP1

OP2

V

out

right

V

out

left

33 kΩ

R4

22 kΩ

R3

V

REF

V

DD

100 nF

C3

ground

(9) 5

(7) 4

(10) 6

(14) 8

(13) 7

1 (1)

2 (2)

3 (6)

TDA1545A

I

REF

R

REF

11 kΩ

I

REF

(E24)

(E24)

C4

1 µF

AND AND

1 CALIBRATED

SPARE

SOURCE

32 (5-BIT)

CALIBRATED

CURRENT

SOURCES

I

REF

I

REF

Fig.1 Block diagram.

The numbers given in parenthesis refer to the TDA1545ATT (SOT402-1) version.

1997 Sep 04 5

Philips Semiconductors Preliminary specification

Stereo continuous calibration DAC TDA1545A

PINNING

SYMBOL

PIN

DESCRIPTION

SOT96-1;

SOT97-1

SOT402-1

BCK 1 1 bit clock input
WS 2 2 word select input
DATA 3 6 data input
GND 4 7 ground
V

DD

5 9 positive supply voltage
IOL 6 10 left channel output
I

REF

7 13 reference current input
IOR 8 14 right channel output
n.c. − 3, 4, 5, 8, 11, 12 not connected

Fig.2 Pin configuration (SOT96-1; SOT97-1).

handbook, halfpage

1
2
3
4

8
7
6
5

MCD288 - 1

BCK

WS

DATA

GND

IOR
I

REF

IOL

DD

V

TDA1545A

Fig.3 Pin configuration (SOT402-1).

handbook, halfpage

TDA1545ATT

MBK230

1BCK IOR

WS I

REF

n.c. n.c.
n.c. n.c.
n.c. IOL

DATA V

DD

GND n.c.

2
3
4
5
6
7

14
13
12
11
10

9
8

1997 Sep 04 6

Philips Semiconductors Preliminary specification

Stereo continuous calibration DAC TDA1545A

FUNCTIONAL DESCRIPTION

The basic operation of the continuous calibration DAC is
illustrated in Fig.4. The figure shows the calibration
principle (Fig.4a) and operation principle (Fig.4b). During
calibration of the MOS current source (Fig.4a) transistor
M1 is connected as a diode by applying a reference
current. The voltage Vgs on the intrinsic gate-source
capacitance Cgs of M1 is then determined by the transistor
characteristics. After calibration of the drain current to the
reference value I

REF

, the switch S1 is opened and S2 is
switched to the other position (Fig.4b). The gate-to-source
voltage V

gs

of M1 is not changed because the charge on
Cgs is preserved. Therefore the drain current of M1 will still
be equal to I

REF

and this exact duplicate of I

REF

is now

available at the I

out

terminal. The 32 current sources and
the spare current source of the TDA1545A are
continuously calibrated (see Fig.1).

The spare current is included to allow for continuous
convertor operation. The output of one calibrated source is
connected to an 11-bit binary current divider consisting of
2048 transistors. A symmetrical offset decoding principle
is incorporated and arranges the bit switching in such a
way that the zero-crossing is performed only by the LSB
currents.

The TDA1545A accepts input serial data formats of 16-bit
word length. Left and right data words are time
multiplexed. The most significant bit (bit 1) must always be
first. The format of data input is shown in Figs 5 and 6.
With a LOW level on the word select input (WS) input data
is placed in the right input register and with a HIGH level
on the WS input data is placed in the left input register.

The data in the input registers is simultaneously latched in
the output registers which control the bit switches.
An internal bias current I

bias

(see IBL and IBR in Fig.1) is
added to the full-scale output current IFS in order to
achieve the maximum dynamic range at the outputs of
OP1 and OP2 (see Fig.1). The reference input current I

REF

controls with gain AFS the current IFS which is a sink
current and with gain A

bias

the I

bias

which is a source

current (note 1). The current I

REF

is proportional to VDD so

the IFS and I

bias

will also be proportional to VDD (note 2)

because AFS and A

bias

are constant.

The reference output voltage V

REF

in Fig.1 is2⁄3VDD. In this
way the maximum dynamic range is achieved over the
entire power supply range. The tolerance of the reference
input current in Fig.1 depends on the tolerance of the
resistors R3, R4 and R

REF

(note 3).

Notes to the functional description

1. I

FS=AFS

× I

REF

and I

bias=Abias

× I

REF

2.

3.

V

DD1

V

DD2

-------------

I

FS1

I

FS2

----------

I

bias1

I

bias2

------------- -

==

∆I

REF

I=

REF

V

DD

R3 ∆R3 R4 ∆R4 R

REF

∆R

REF

++++ +

---------------------------------------------------------------------------------------------------------

–

1997 Sep 04 7

Philips Semiconductors Preliminary specification

Stereo continuous calibration DAC TDA1545A

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

Notes

1. Equivalent to discharging a 100 pF capacitor via a 1.5 kΩ series resistor.

2. Machine model; C = 200 pF, L = 0.5 µH, R = 10 Ω, 3 zaps positive and negative.

THERMAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

P

positive supply voltage − 6V

T

xtal(max)

maximum crystal temperature − +150 °C

T

stg

storage temperature −55 +150 °C

T

amb

operating ambient temperature −40 +85 °C

V

es

electrostatic handling note 1 −2000 +2000 V

note 2 −200 +200 V

SYMBOL PARAMETER VALUE UNIT

R

th j-a

thermal resistance from junction to ambient in free air

SOT97-1 100 K/W
SOT96-1 160 K/W
SOT402-1 155 K/W

Fig.4 Calibration principle; (a) calibration, (b) operation.

handbook, full pagewidth

S2

S1

M1

C

gs

V

gs

I

REF

(a)

S2

S1

M1

C

gs

V

gs

I

REF

(b)

I

REF

MCD289 - 1

out out

1997 Sep 04 8

Philips Semiconductors Preliminary specification

Stereo continuous calibration DAC TDA1545A

CHARACTERISTICS

V

DD

=5V; T

amb

=25°C; measured in the circuit of Fig.1; unless otherwise specified.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

DD

supply voltage 3.0 5.0 5.5 V

I

DD

supply current note 1 − 3.0 4.0 mA

RR ripple rejection note 2 − 30 − dB

Digital inputs (WS; BCK; DATA)

|I

IL

| input leakage current LOW VI= 0.8 V −−10 µA

|I

IH

| input leakage current HIGH VI= 2.4 V −−10 µA

f

BCK

bit clock input frequency −−18.4 MHz
BR bit rate data input −−18.4 Mbits/s
f

WS

word select input −−384 kHz
Timing (see Fig.5)
t

r

rise time −−12 ns
t

f

fall time −−12 ns
t

CY

bit clock cycle time 54 −−ns
t

HB

bit clock HIGH time 15 −−ns
t

LB

bit clock LOW time 15 −−ns
t

SU;DAT

data set-up time 12 −−ns
t

HD;DAT

data hold time 2 −−ns
t

HD;WS

word select hold time 2 −−ns
t

SU;WS

word select set-up time 12 −−ns

Analog input (I

REF

)

R

REF

reference resistor see Fig.1 7.4 11.0 14.6 kΩ

Analog outputs (IOL and IOR)

RES resolution −−16 bit
V

DCC

DC output voltage compliance 2.0 − VDD− 1V
I

FS

full-scale current 0.9 1.0 1.1 mA
T

CFS

full-scale temperature coefficient −±400 − ppm
I

bias

bias current 643 714 785 µA
A

FS

reference input current to

full-scale output current gain

− 13.2 −

A

bias

reference input current to bias

current gain

− 9.42 −

1997 Sep 04 9

Philips Semiconductors Preliminary specification

Stereo continuous calibration DAC TDA1545A

Notes

1. At code 0000H.

2. V

ripple

= 1% of supply voltage and f

ripple

= 100 Hz.

3. Measured with 1 kHz sinewave generated at a sampling rate of 192 kHz.

4. Measured with 1 kHz sinewave over a 20 Hz to 20 kHz bandwidth generated at a sampling rate of 192 kHz.

5. R3 = R4 = 11 kΩ; see Fig.1; IFS= 2 mA.

THD total harmonic distortion including noise at 0 dB; −−88 −78 dB

note 3; see Fig.7 − 0.004 0.01 %
including noise at −60 dB; −−33 −24 dB
note 3; Fig.7 − 2.2 6 %
including noise at −60 dB, −−35 − dB
A-weighting − 1.8 − %
R3=R4=11kΩ see Fig.1;

I

FS

=2mA

− 1.4 − %

including noise at 0 dB; note 4 −−84 −70 dB

− 0.006 0.03 %

t

cs

settling time ±1 LSB − 0.2 −µs
α channel separation 86 95 − dB
|dIO| unbalance between outputs note 3 − 0.2 0.3 dB
|t

d

| delay time between outputs −±0.2 −µs

S/N signal-to-noise ratio

(A-weighting)

at bipolar zero

note 1 86 98 − dB
note 5 − 101 − dB

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

1997 Sep 04 10

Philips Semiconductors Preliminary specification

Stereo continuous calibration DAC TDA1545A

TEST AND APPLICATION INFORMATION

Fig.5 Timing and input signals.

handbook, full pagewidth

MLB001

MSB

DATA

BCK

WS

LEFT

RIGHT

LSB

t

r

t

HB

12

15

tf12

t

LB

15

t

HD;WS

2

t

SU;WS

12

t

HD;DAT

2

t

SU;DAT

12

tCY54

SAMPLE OUT

1997 Sep 04 11

Philips Semiconductors Preliminary specification

Stereo continuous calibration DAC TDA1545A

handbook, full pagewidth

MLB002

LSB LSB

MSBDATA

BCK

WS LEFT

RIGHT

MSB

SAMPLE OUT

Fig.6 Format of input signals.

1997 Sep 04 12

Philips Semiconductors Preliminary specification

Stereo continuous calibration DAC TDA1545A

APPLICATION INFORMATION

full pagewidth

0.01

1

0.1

10

MGA054

THD

(%)

frequency (Hz)

10 10

3

90

70

20

THD

(dB)

10

2

10

4

50

80

40

60

30

(1)

(2)

Fig.7 Total harmonic distortion as a function of frequency (4FS).

(1) Measured including all distortion plus noise at a level of −60 dB.
(2) Measured including all distortion plus noise at a level of −0 dB.

The sample frequency 4FS: 176.4 kHz.
The graphs are constructed from average values of a small amount of engineering samples therefore no guarantee for typical values

is implied.

1997 Sep 04 13

Philips Semiconductors Preliminary specification

Stereo continuous calibration DAC TDA1545A

Fig.8 Total harmonic distortion as a function of

signal level (4FS).

The sample frequency 4FS: 176.4 kHz.
The graphs are constructed from average values of a small amount

of engineering samples therefore no guarantee for typical values is
implied.

handbook, halfpage

100 0

100

0

20

MGA055

40

60

80

80 60 40 20

THD
(dB)

signal level (dB)

Fig.9 Total harmonic distortion as a function of

supply voltage VDD (4FS).

(1) Measured within the specified operating supply voltage range.
(2) Measured outside the specified operating supply voltage range.

The sample frequency 4FS: 176.4 kHz.
The graphs are constructed from average values of a small

amount of engineering samples therefore no guarantee for
typical values is implied.

handbook, halfpage

16

50

100

90

MGA056

80

70

60

2345

V (V)

DD

THD
(dB)

(2)

(1)

1997 Sep 04 14

Philips Semiconductors Preliminary specification

Stereo continuous calibration DAC TDA1545A

PACKAGE OUTLINES

REFERENCES

OUTLINE
VERSION

EUROPEAN

PROJECTION

ISSUE DATE

IEC JEDEC EIAJ

SOT97-1

92-11-17
95-02-04

UNIT

A

max.

12

b

1

(1) (1)

(1)

b

2

cD E e M

Z

H

L

mm

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

A

min.

A

max.

b

max.

w

M

E

e

1

1.73

1.14

0.53

0.38

0.36

0.23

9.8

9.2

6.48

6.20

3.60

3.05

0.2542.54 7.62

8.25

7.80

10.0

8.3

1.154.2 0.51 3.2

inches

0.068

0.045

0.021

0.015

0.014

0.009

1.07

0.89

0.042

0.035

0.39

0.36

0.26

0.24

0.14

0.12

0.010.10 0.30

0.32

0.31

0.39

0.33

0.0450.17 0.020 0.13

b

2

050G01 MO-001AN

M

H

c

(e )

1

M

E

A

L

seating plane

A

1

w M

b

1

e

D

A

2

Z

8

1

5

4

b

E

0 5 10 mm

scale

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

pin 1 index

DIP8: plastic dual in-line package; 8 leads (300 mil)

SOT97-1

1997 Sep 04 15

Philips Semiconductors Preliminary specification

Stereo continuous calibration DAC TDA1545A

UNIT

A

max.

A1A

2

A3b

p

cD

(1)E(2)

(1)

eHELLpQZywv θ

REFERENCES

OUTLINE
VERSION

EUROPEAN

PROJECTION

ISSUE DATE

IEC JEDEC EIAJ

mm

inches

1.75

0.25

0.10

1.45

1.25

0.25

0.49

0.36

0.25

0.19

5.0

4.8

4.0

3.8

1.27

6.2

5.8

1.05

0.7

0.6

0.7

0.3

8
0

o
o

0.25 0.10.25

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

Notes

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

1.0

0.4

SOT96-1

X

w M

θ

A

A

1

A

2

b

p

D

H

E

L

p

Q

detail X

E

Z

e

c

L

v M

A

(A )

3

A

4

5

pin 1 index

1

8

y

076E03S MS-012AA

0.069

0.010

0.004

0.057

0.049

0.01

0.019

0.014

0.0100

0.0075

0.20

0.19

0.16

0.15

0.050

0.244

0.228

0.028

0.024

0.028

0.012

0.010.010.041 0.004

0.039

0.016

0 2.5 5 mm

scale

SO8: plastic small outline package; 8 leads; body width 3.9 mm

SOT96-1

95-02-04
97-05-22

1997 Sep 04 16

Philips Semiconductors Preliminary specification

Stereo continuous calibration DAC TDA1545A

UNIT A

1

A2A

3

b

p

cD

(1)E(2) (1)

eHELLpQZywv θ

REFERENCES

OUTLINE

VERSION

EUROPEAN

PROJECTION

ISSUE DATE

IEC JEDEC EIAJ

mm

0.15

0.05

0.95

0.80

0.30

0.19

0.2

0.1

5.1

4.9

4.5

4.3

0.65

6.6

6.2

0.4

0.3

0.72

0.38

8
0

o
o

0.13 0.10.21.0

DIMENSIONS (mm are the original dimensions)

Notes

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.

0.75

0.50

SOT402-1 MO-153

94-07-12
95-04-04

w M

b

p

D

Z

e

0.25

17

14

8

θ

A

A

1

A

2

L

p

Q

detail X

L

(A )

3

H

E

E

c

v M

A

X

A

y

0 2.5 5 mm

scale

TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm

SOT402-1

A

max.

1.10

pin 1 index

1997 Sep 04 17

Philips Semiconductors Preliminary specification

Stereo continuous calibration DAC TDA1545A

SOLDERING
Introduction

There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.

This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our

“IC Package Databook”

(order code 9398 652 90011).

DIP

SOLDERING BY DIPPING OR BY WA VE
The maximum permissible temperature of the solder is

260 °C; solder at this temperature must not be in contact
with the joint for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.

The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (T

stg max

). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.

R

EPAIRING SOLDERED JOINTS

Apply a low voltage soldering iron (less than 24 V) to the
lead(s) of the package, below the seating plane or not
more than 2 mm above it. If the temperature of the
soldering iron bit is less than 300 °C it may remain in
contact for up to 10 seconds. If the bit temperature is
between 300 and 400 °C, contact may be up to 5 seconds.

SO and TSSOP

REFLOW SOLDERING
Reflow soldering techniques are suitable for all SO and

TSSOP packages.
Reflow soldering requires solder paste (a suspension of

fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.

Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method.

Typical reflow temperatures range from 215 to 250 °C.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.

W

AVE SOLDERING

Wave soldering can be used for all SO packages. Wave
soldering is not recommended for TSSOP packages,
because of the likelihood of solder bridging due to
closely-spaced leads and the possibility of incomplete
solder penetration in multi-lead devices.

If wave soldering is used - and cannot be avoided for
TSSOP packages - the following conditions must be
observed:

• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.

• The longitudinal axis of the package footprint must be
parallel to the solder flow and must incorporate solder
thieves at the downstream end.

Even with these conditions, do not consider wave
soldering TSSOP packages with 48 leads or more, that
is TSSOP48 (SOT362-1) and TSSOP56 (SOT364-1).

During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.

A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

R

EPAIRING SOLDERED JOINTS

Fix the component by first soldering two diagonally­opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.

1997 Sep 04 18

Philips Semiconductors Preliminary specification

Stereo continuous calibration DAC TDA1545A

DEFINITIONS

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

1997 Sep 04 19

Philips Semiconductors Preliminary specification

Stereo continuous calibration DAC TDA1545A

NOTES

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Printed in The Netherlands 547027/1200/03/pp20 Date of release: 1997 Sep 04 Document order number: 9397 750 02703