Analog-to-Digital Converter with Bar Graph Display Output
Features
• Bipolar A/D Conversion
• 2.5% Resolution
• Direct LCD Display Drive
• ‘Thermometer’ BAR or DOT Display
• 40 Data Segments Plus Zero
• Over Range Plus Polarity Indication
• PrecisionOn-Chip Reference: 35ppm/°C
• Differential Analog Input
• Low Input Leakage: 10pA
• Display Flashes on Over Range
• Display HOLD Mode
• Auto-Zero Cycle Eliminates Zero Adjust
Potentiometer
• 9V Battery Operation
• Low Power Consumption: 1.1mW
• 20mV to 2.0V Full Scale Operation
• Non-Multiplexed LCD Drive for Maximum
Viewing Angle
Device Selection Table
Part NumberPackageTemperature Range
TC826CBU64-Pin PQFP0°Cto+70°C
General Description
In many applications, a graphical display is preferred
over a digital display. Knowing a process or system
operates,forexample,within design limitsismorevaluable than a direct system variable read out. A bar or
moving dot display supplies informationprecisely without requiringfurther interpretation by the viewer.
The TC826 is a complete analog-to-digital converter
with direct liquid crystal (LCD) display drive. The 40
LCD data segments plus zero driver give a 2.5% resolution bar display. Full scale differential input voltage
range extendsfrom 20mV to2V.TheTC826 sensitivity
is 500µV. A low drift35ppm/°C internal reference,LCD
backplane oscillator and driver, input polarity LCD
driver, and over rangeLCD driver make designs simple
and low cost. The CMOS design required only 125µA
from a 9V battery.In +5V systems, a TC7660DC to DC
converter can supply the -5V supply. The differential
analog input leakage is a low 10pA.
Two display formats are possible. The BAR mode display is like a ‘thermometer’ scale. The LCD segment
driver that equals the input, plus allbelow it are on. The
DOT mode activates only the segment equal to the
input. In either mode, t he polarity signal is active for
negative input signals. An over range input signal
causesthedisplayt o flashandactivates the over range
annunciator. A HOLD mode can be selected that
freezes the display and prevents updating.
The dual slope integrating conversion method with
auto-zero phase maximizes noise immunity and eliminates zero scale adjustmentpotentiometers. Zero
scale drift is a low 5µV/°C. Conversion rate is typically
5 per second and is adjustable by a single external
resistor.
A compact, 0.5" s quare, flat package minimizes PC
board area. The high pin count LSI package makes
multiplexed LCD displays unnecessary. Low cost,
directdriveLCD displays offer the widest viewing angle
and are readily available. A standard display is available now for TC826 prototypingwork.
2002 Microchip TechnologyInc.DS21477B-page 1
TC826
Package Type
64-Pin PQFP
ANALOG
COMMON
REF IN
C
C
OSC2
BAR 0
Typical Application
NC
+IN
REF
REF
V
V
BUF
C
V
INT
V
OSC1
NC
1
2
3
-IN
4
5
+
6
-
7
DD
8
9
AZ
10
11
SS
12
13
14
BP
15
16
NC
BAR/DOT
HOLD
TEST
61
62636449
19
BAR 3
BAR 2
BAR 1
OR
POL-
5818591760
TC826CBU
BAR 5
BAR 4
BAR 40
BAR 6
BAR 39
BAR 7
BAR 38
26
BAR 8
BAR 37
27
BAR 9
BAR 36
BAR 10
BAR 34
BAR 35
BAR 12
BAR 11
BAR 33
302928
BAR 13
BAR 32
5051255224532354225521562057
31
BAR 14
BAR 31
32
BAR 15
48
NC
47
BAR 30
46
BAR 29
45
BAR 28
44
BAR 27
43
BAR 26
42
BAR 25
41
BAR 24
40
BAR 23
39
BAR 22
38
BAR 21
37
BAR 20
36
BAR 19
35
BAR 18
34
BAR 17
33
BAR 16
1MΩ
1MΩ
1MΩ
Component
R
INT
C
INT
C
REF
C
AZ
C
INT
C
AZ
V
61
62
BAR/DOT
HOLD
R
INT
V
BUFCAZ
TC826
63
TEST
12
V
SS
V
DD
9V
2V
Full Scale
2MΩ20kΩ20kΩ
0.033mf0.033mf0.033mf
1mf1mf1mf
0.068mf0.068mf0.014mfR1 + R2 = 250kΩ
R
1
200mV
Full Scale
REFINANALOG
COMMON -IN +IN
5824360
R
2
-IN +IN
20mV
Full Scale
11109
INT
BAR 0-
BAR 40 POL-
6
C
+
REF
7
C
-
REF
13
OSC1
14
OSC2
15
BP
59
OR
Segment Drive
–OR
C
REF
1.0mf
R
OSC
430kΩ
Backplane
41 Segment LCD
Bar Graph
DS21477B-page 2
2002 Microchip TechnologyInc.
TC826
1.0ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings*
Supply Voltage (V+ to V-).......................................15V
*Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device. These
are stress ratings only and functional operation of the device
at these or any other conditions above those indicated in the
operation sections of the specifications is not implied.
Exposure to Absolute Maximum Rating conditions for
extended periods may affectdevice reliability.
Analog Input Voltage(Either Input) (Note 1)... V+ to VPower Dissipation (T
Commercial Package (C)........................ 0°C to +70°C
StorageTemperature Range..............-65°C to +150°C
TC826 ELECTRICAL SP EC IFICATIONS
Electrical Characteristics: V
SymbolParameterMinTypMaxUnitTest Conditions
Zero Input-0±0+0Display V
Zero Reading Dri ft—0.21µV/°CV
NLLinearity Error-10.5+1CountMax Deviation from Best Straight Line
R/ORollover Error-10+1Count-V
ENNoise—60—µV
ILKInputLeakage Current—1020pAV
CMRRComm on Mode Rejection Ratio—5 0—µV/VVCM = ±1V
Scale Factor Temperature Coefficient—1—ppm/°C 0 ≤ T
V
CTC
V
COM
VSDLCD Segment Drive Voltage456V
VBDLCD Backplane DriveVoltage456V
I
DD
Note 1: Input voltagesmay exceedthe supplyvoltages when the input currentis limited to 100µA.
Analog Common Temperature
Coefficient
Analog Common Voltage2.72.93.35V250kΩ betweenCommonand V
Power Supply Current—125175µA
2: Static sensitivedevice. Unused devicesshould be stored in conductive material to protect devices from staticdischarge
and static fields.
3: Backplane drive is in phase with segmentdrive for ‘off’ segment and 180°C out of phase for ‘on’ segment. Frequency is
10 times conversion rate.
4: Logic input pins 58, 59, and 60 should be connected through 1MΩ series resistors to V
=9V;R
S
=430kΩ;TA= 25°C; Full Scale = 20mV, unless otherwise stated.
OSC
=0.0V
IN
=0.0V
IN
0°C ≤ T
=+V
IN
P-PVIN
—35100ppm/°C 250kΩ between Common and
P-P
P-P
=0V
=0V
IN
=0V
V
IN
A
External Ref. Temperature
Coefficient = 0ppm/°C
V+, 0°C ≤ T
SS
≤ +70°C
A
IN
≤ 7+0°C
≤ +70°C
A
for logic 0.
DD
2002 Microchip TechnologyInc.DS21477B-page 3
TC826
2.0PIN DESCRIPTION
ThedescriptionsofthepinsarelistedinTable2-1.
TABLE 2-1:PIN FUNCTION TABLE
Pin Number
(64-Pin PQFP)
1NCPositive analog signal input.
2ANALOG
3+INPositive analog signal input.
4-INNegative analog signal input.
5REF INReference voltage positiveinput. Measured relative to analog common.
6C
7C
8V
9V
10C
11V
12V
13OSC1Oscillator resistor (R
14OSC2Oscillator resistor (R
15BPLCDBackplane driver.
16BAR 0LCD Segment driver: Bar 0.
17NCNo connection.
18BAR 1LCD Segment driver: Bar 1.
19BAR 2LCD Segment driver: Bar 2.
20BAR 3LCD Segment driver: Bar 3.
21BAR 4LCD Segment driver: Bar 4.
22BAR 5LCD Segment driver: Bar 5.
23BAR 6LCD Segment driver: Bar 6.
24BAR 7LCD Segment driver: Bar 7.
25BAR 8LCD Segment driver: Bar 8.
26BAR 9LCD Segment driver: Bar 9.
27BAR10LCD Segment driver: Bar 10.
28BAR 11LCD Segment driver: Bar 11.
29BAR12LCD Segment driver: Bar 12.
30BAR13LCD Segment driver: Bar 13.
31BAR14LCD Segment driver: Bar 14.
32BAR15LCD Segment driver: Bar 15.
33BAR16LCD Segment driver: Bar 16.
34BAR17LCD Segment driver: Bar 17.
35BAR18LCD Segment driver: Bar 18.
36BAR19LCD Segment driver: Bar 19.
37BAR20LCD Segment driver: Bar 20.
38BAR21LCD Segment driver: Bar 21.
39BAR22LCD Segment driver: Bar 22.
40BAR23LCD Segment driver: Bar 23.
SymbolDescription
COMMON
+Reference capacitor connection.
REF
-Reference capacitor connection.
REF
DD
BUF
AZ
INT
SS
Establishesthe internal analog ground point.A nalog common is set to 2.9V belowthe
positivesupply COMMON by an internalzener reference circuit. The voltage difference
betweenV
inputatREFIN(Pin5).
and analogcommoncan be used to supply the TC826 voltagereference
) connection.
OSC
) connection.
OSC
DS21477B-page 4
2002 Microchip TechnologyInc.
TABLE 2-1:PIN FUNCTION TABLE (CONTINUED)
Pin Number
(64-Pin PQFP)
41BAR24LCD Segment driver: Bar 24.
42BAR25LCD Segment driver: Bar 25.
43BAR26LCD Segment driver: Bar 26.
44BAR27LCD Segment driver: Bar 27.
45BAR28LCD Segment driver: Bar 28.
46BAR29LCD Segment driver: Bar 29.
47BAR30LCD Segment driver: Bar 30.
48NCNo connection.
49BAR31LCD Segment driver: Bar 31.
50BAR32LCD Segment driver: Bar 32.
51BAR33LCD Segment driver: Bar 33.
52BAR34LCD Segment driver: Bar 34.
53BAR35LCD Segment driver: Bar 35.
54BAR36LCD Segment driver: Bar 36.
55BAR37LCD Segment driver: Bar 37.
56BAR38LCD Segment driver: Bar 38.
57BAR39LCD Segment driver: Bar 39.
58BAR40LCD Segment driver: Bar 40.
59ORLCDsegment driver thatindicated input out-of-rangecondition.
60POL-LCD segment driver that indicates input signal is negative.
61BAR/DOT
62HOLD
63TEST
64NCNo connection.
SymbolDescription
Inputlogic signalthatselectsBARorDOTdisplay format.Normally in BAR mode.Connect
to V
through 1MΩ resistorforDOT format.
SS
Inputlogicsignal that preventsdisplay from changing.P ulled high internally to inactive
state.Connect to V
Input logic signal. Sets TC826 to BAR Display mode. BAR 0 to 40, plus OR flash on and
off.ThePOL-LCDdriver is on. Pulled high internally to inactivestate. Connectto V
1MΩ series resistor to activate.
through 1MΩ series resistor for HOLD mode operation.
SS
TC826
with
SS
2002 Microchip TechnologyInc.DS21477B-page 5
TC826
3.0DETAILED DESCRIPTION
3.1Dual Slope Conversion Principles
The TC826 is a dualslope,integratinganalog-to-digital
converter. The conventionaldual slope converter measurement cycle has two distinct phases:
• Input Signal Integration
• Reference VoltageIntegration (De-integration)
The input signal being converted is integrated for a
fixed time period (T
clock pulses. An opposite polarity constant reference
voltage is then i ntegrated until the integrator output
voltage returns to zero. The reference integration time
is directly proportional to the input signal (T
(Figure3-1).
In a simple dual slope converter, a complete conversion requires the integrator output to ‘ramp-up’ and
‘ramp-down’.
FIGURE 3-1:BASIC DUAL SLOPE CONVERTER
). Time is measured by counting
SI
)
RI
C
A simple mathematicalequation relates the input signal
reference voltage and integration time:
EQUATION 3-1:
t
1
INT
V
IN
∫
0
RC
Where:
= Ref erence Voltage
V
R
= Si gnal Integration Time (Fixed)
V
SI
= Ref erence Voltage I ntegration Time
T
RI
(Variable)
(t)dt =
V
RTRI
RC
Analog Input
Signal
Output
Integrator
+/–
REF
Voltage
Fixed Signal
Integrate
Time
R
Switch Driver
Polarity Control
Variable
Reference
Integrate
Time
Integrator
–
+
VIN ≈ 1/2 V
VIN ≈ 1/4 V
Comparator
–
+
Phase Control
FULL SCALE
FULL SCALE
Control
Logic
Clock
Counter
Display
DS21477B-page 6
2002 Microchip TechnologyInc.
TC826
T
y
For a constant VIN:
EQUATION 3-2:
T
VIN=V
The dual slope converter accuracy is unrelated t o the
integrating resistor and capacitor values, as long as
they are stable during a measurement cycle. An inherent benefit is noise immunity. Noise spikes are integrated or averaged to zero during the integration
periods.IntegratingADCs areimmunetothe largeconversion errors that plague successive approximation
converters in high noise environments. Interfering signals with frequency components at multiples of the
averaging period will be attenuated (Figure 3-2).
The TC826 converter i mproves the conventional dual
slope conversion technique by incorporating an autozero phase. This phase eliminates zero scale offset
errors and drift. A potentiometer is not required to
obtain a zero output for zero input.
RI
R
T
SI
FIGURE 3-2:NORMAL MODE
REJECTION OF DUAL
SLOPE CONVERTER
30
T = Measurement
Period
20
10
Normal Mode Rejection (dB)
0
0.1/T1/T10/
Input Frequenc
2002 Microchip TechnologyInc.DS21477B-page 7
TC826
4.0THEORY OF OPERATION
4.1Analog Section
In addition to the basic signal integrate and deintegrate cycles discussed above, the TC826 incorporates an auto-zero cycle.This cycle removes buffer
amplifier, integrator, and comparator offset voltage
error terms from the conversion. A t rue digital zero
reading results without external adjusting potentiometers. A complete conversion consists of three cycles:
an auto-zero, signal integrate and reference cycle
(Figure 4-1 and Figure 4-2).
4.1.1AUTO-ZERO CYCLE
During the auto-zero cycle, the differential input signal
is disconnected from the circuit by opening internal
analog gates. The internalnodesare shorted to analog
common (internal analog ground) to establish a zero
input condition. Additional analog gates close a feedbacklooparoundtheoffsetvoltageerrorcompensation.
The voltage level established on C
device offset voltages.
FIGURE 4-1:TC826 ANALOG SECTION
compensates for
AZ
The auto-zero cycle length is 19 counts minimum.
Unused time in the de-integrate cycle is added to the
auto-zero cycle.
4.1.2SIGNAL INTEGRATION CYCLE
The auto-zero loop is opened and the internal differential inputs connect to +IN and -IN. The differentialinput
signal is integrated for a fixed time period. The TC826
signal integration period is 20 clock periods or counts.
The externally set clock frequency is divided by 32
before clocking the internal counters. The integration
time period is:
EQUATION 4-1:
Where:
T
= External Clock Frequency
F
OSC
32
=
SI
F
OSC
x20
+Input
Analog
Common
-INPUT
R
INT
INT
C
AZ
Integrator
–
+
V
DD
1µA
C
INT
11
+
–
Comparator
AZ
–
+
V
DD
8
CMPTR
V
DD
To Digital Section
≈ 6.3V
REF IN
567 910
AZ
3
INT
AZ
2
4
From
Digital
Control
Center
Analog Switch
C
REF
TC826
DE-DE+
DE+DE-
AZ
INT
DE+
DE-
≈ VDD – 2.9V
AZ
–
+
Buffer
INT
DS21477B-page 8
≈ V
DD
12
2002 Microchip TechnologyInc.
TC826
The differential input voltage must be within the device
Common mode range when the converter and measured system share the same power supply common
(ground). If the converter and measured system do not
share the same power s upply common, -IN should be
tiedto analog common. This is the usual connectionfor
batteryoperated systems. Polarity isdetermined at the
end of signal integrate signal phase. The sign bit is a
true polarity i ndication, in that signals less than 1LSB
are correctly determined. This allows precision null
detection limited only by device noise and system
4.1.3REF ERENCE INTEGRATE CYCLE
The final phase is reference i ntegrate or de-integrate.
-IN is internally connected to analog common and +IN
is connected with the correct polarity to cause the integratoroutputto return to zero. The timerequiredforthe
output to return to zero is proportional to the input signal and is between0 and 40 counts. The digitalreading
displayed is:
EQUATION 4-2:
noise.
FIGURE 4-2:CONVERSION HAS THREE PHASES
Auto-Zero Phase (AZ)Signal Integrate
Integrator
Output
Analog Common
Potential
Internal
System
Clock (FSYS)
Phase (SI)
V
20 =
Reference Integrate Phase (RI)
True Zero
Crossing
(De-integrate)
Sign Bit Determined
Zero Crossing
Detected
IN
V
REF
Internal Data
Latch Update
Signal
T
I
19 Counts
Minimum
One Conversion Cycle = 80 Counts(T
20
Counts
TD ≈ V
IN
CONV
Number of Counts
Proportional to
VIN
41 Counts
Maximum
= 80 X
FSYS
1
)
2002 Microchip TechnologyInc.DS21477B-page 9
TC826
4.2System Timing
The oscillator frequency is divided by 32 prior to clocking the internal counters. The three-phase measurement cycle takes a total of 80 clock pulses. The 80
count cycle is independent of input signal magnitude.
Each phase of the measurement cycle has the following length:
• Auto-Zero Phase: 19 to 59 Counts
For signals less than full scale, the auto-zero is
assignedtheunusedreference integrate time period.
• Signal Integrate: 20 Counts
This time period is fixed. The integration period is:
EQUATION 4-3:
TSI=20
WhereF
is the externally set clock frequency.
OSC
• Reference Integrate: 0 to 41 Counts
32
F
OSC
4.3Reference Voltage Selection
A full scale reading requires the input signal be twice
the reference voltage. The reference potential is measured between REF IN (Pin 5) and ANALOG
COMMON (Pin 2).
TABLE 4-1:
Required Full Scale VoltageV
20mV10mV
2V1V
The internal voltage reference potential available at
analog common will normally be used to supply the
converter’s reference. This potential is stable whenever the supply potential is greater than approximately
7V.Inapplicationswhereanexternally generatedreference voltage is desired, refer to Figure 4-3.
The reference voltageis adjustedwith a near full scale
input signal. Adjust for proper LCD display read out.
FIGURE 4-3:EXTERNAL REF ERENCE
V+
REF
4.4Components Value Selection
4.4.1I NTE GRATING RESISTOR (R
The desired full scale i nput voltage and output current
capabilityofthe input buffer and integratoramplifierset
the integration resistor v alue. The internal class A output stage amplifiers will supply a 1µA drive current with
minimal linearity error. R
is easily calculated for a
INT
1µA full scale current:
EQUATION 4-4:
R
Full Scale Voltage(V)
=
INT
1x10–6
Where VFS= Full Scale Analog Input
V
=
1x10–6
4.4.2INTEGRATING CAPACITOR (C
The integrating capacitor should be selected to maximize integratoroutput swing. The integrator output will
swingtowithin0.4VofV
+orVS- without saturating.
S
The integrating capacitor is easily calculated:
EQUATION 4-5:
V
Where: V
INT
= IntegratorSwing
INT
= Oscillator Fr equency
F
OSC
R
INT
FS
=
C
640
F
OSCxVINT
The integrating capacitor should be selected for low
dielectricabsorption to prevent rollover errors.Polypropylene capacitors are suggested.
4.4.3AUTO-ZERO CAPACITOR (CAZ)
CAZshould be 2-3 times larger than the integration
capacitor.Apolypropylene capacitorissuggested. Typical values from 0.14µF to 0.068µFaresatisfactory.
4.4.4REFERENCE CAPACITOR (C
A1µF capacitoris suggested. Low leakage capacitors,
such as polypropylene, are recommended.
Several capacitor/resistor combinations for common
full scale input conditionsare given in Table 4-2.
FS
INT
INT
REF
)
)
)
8
V+
TC826
REF IN
ANALOG
COMMON
(b)
DS21477B-page 10
MCP1525
5
2
1µF
2.50V
Reference
2002 Microchip TechnologyInc.
TC826
TABLE 4-2:SUGGESTED COMPONENT
VALUES
2mV
Comp.2VFull Scale
R
INT
C
INT
C
REF
C
AZ
R
OSC
Note: Approximately 5 conversions/second.
V
≈ 1V
REF
2MΩ200kΩ20kΩ
0.033µF0.033µF0.033µF
1µF1µF1µF
0.068µF0.068µF1.14µF
430kΩ430kΩ430kΩ
Full Scale
V
≈ 100V
REF
20mV
Full Scale
V
≈ 10V
REF
4.5Differential Signal Inputs
The TC826 is designed with t rue differential inputs and
accepts input signals within the input stage Common
mode voltage range (V
). The typical range is V+ -1
CM
to V- +1V. Common mode voltages are removed from
the system when the TC826 operates from a battery or
floating power source (isolated from measured system) and -IN is connectedto analog common (V
COM
).
In systems where Common mode rejection ratio minimizes error. Common mode voltages do, however,
affect the integrator output level. Integrator output saturation must be prevented. A worse case condition
exists if a l arge positive V
exists in conjunction with
CM
a full scale negative differential signal. The negative
signal drives the integrator output positive along with
V
. For suchapplications,theintegratoroutput swing
CM
can be reduced below the recommended 2V f ull scale
swing. The integrator output will swing within 0.3V of
V
or VSSwithout increased linearity error.
DD
4.6Digital Section
The TC826 containsall the segment drivers necessary
to drive a liquid crystal display (LCD). An LCD backplane driver is included. The backplane frequency is
the external clock frequency divided by 256. A 430kΩ
OSC gets the backplane frequency to approximately
55Hz, with a 5V nominal amplitude. When a segment
driver is in phase with the backplane signal, the segment is ‘OFF’. An out-of-phase segment drive signal
causes the segment to be ‘ON’ or visible. This AC drive
configuration results in negligible DC voltage across
each LCD segment. This insures long LCD display life.
The polarity segment drive, -POL, is ‘ON’ for negative
analoginputs.If+INand -IN are reversed,this indicator
would reverse.TheTC826 transferfunctionisshownin
Figure 4-4.
FIGURE 4-4:TRANSFER FUNCTION
Over Range
40
39
2
Digital Display
1
-0.5
0
-1-2
0.5
Indication
12339 39.5 40 40.5
Analog Input
V
FS
)
(X
40
4.7BAR/DOT Input (Pin 6 1)
The BAR/DOT input allows the user to select the display format. The TC826 powers up in the BAR mode.
SelecttheDOTdisplayf ormat by connecting BAR/DOT
to the negative supply (Pin 12) through a 1MΩ resistor.
4.8HOLD Input (Pin 62)
The TC826 data output latches are not updated at the
end of each conversion if HOLD
is tied to the negative
supply (Pin 12) through a 1MΩ resistor. The LCD display continuously displays the previous conversion
results.
The HOLD
pin is normally pulled high by an internal
pull-up.
4.9TEST Input (Pin 63)
The TC826 enters a Test mode with the TEST input
connectedtothenegativesupply(Pin12).The connection must be made through a 1MΩ resistor. The TEST
input is normally internally pulled high. A low input sets
the output data latch to al l ones. The BAR Display
mode is set. The 41 LCD output segments (zero plus
40 datasegments)andoverr ange annunciator flashon
and off at 1/4 the conversion rate. The polarity annunciator (POL-) segment will be on, but not flashing.
4.10Over Range Display Operation
(OR, Pin 59)
An out-of-range input signal will be indicated on the
LCD display by the OR annunciator driver (Pin 59)
becoming active.
In the BAR display format,the 41 bar segmentsand the
overrangeannunciator,OR,willf lash ON and OFF.The
flashrateisonfourththeconversionrate(F
IntheDOTDisplaymode,ORflashesandallotherdata
segment drivers are off.
OSC
/2560).
2002 Microchip TechnologyInc.DS21477B-page 11
TC826
4.11Polarity Indication (POL-, Pin 60)
The TC826 converts and displaysdata for positive and
negative input signals. The POL LCD segment driver
(Pin 60) is active for negative signals.
4.12Oscillator Operation
The TC826 external oscillator f requency, F
by resistor R
connected between pins 13 and 14.
OSC
The oscillator frequency versus resistance curve is
shown in Figure 4-5.
FIGURE 4-5:OSCILLATOR
FREQUENCY VS. R
20
50
R
OSC
TA = 25°C
to VSS = 9V
V
DD
(X 100kΩ)
18
16
40
14
12
30
(kHz)
10
8
20
OSC
F
6
CONV (CONV/SEC)
4
10
2
0
0
0
2468101214161820
OSC
,isset
OSC
FIGURE 4-6:EXTERNAL OSCILLATOR
CONNECTION
8
9V
A. Single 9V Supply
V
DD
8
TC826
V
SS
B. Dual Supply
13
12
TC826
1213
0.1µf
OSC114OSC2
0.1µf
External
Oscillator
Oscillator
VDD = 5V
Power
Supply
= 5V
V
SS
F
is divided by 32 to provide an internal system
OSC
clock, FYSY. Each conversion requires 80 internal
clock cycles. The internal system clock is di vided by 8
to provide the LCD backplanedrivefrequency.The display flash rate duringan input out-of-range signal is set
by dividing FSYS by 320.
The internal oscillator may be bypassed by driving
OSC1 (Pin 13) with an externalsignalgenerator.OSC2
(Pin 14) should be leftunconnected.
The oscillator should swing from V
to VSSin single
DD
supplyoperation(Figure 4-6). In dualsupply operation,
the signal should swing from power supply ground to
V
.
DD
4.13LCD Display Format
The input signal can be displayed i n two formats
(Figure4-7). The BAR/DOT
format. The TC826 measurement cycle operates
identically for either mode.
FIGURE 4-7:DISPLAY OPTION
A. BAR Mode
1. Input = 0
Bar 4OffOff
Bar 3
Bar 2
Bar 1
Bar 0
B. DOT Mode
1. Input = 0
Bar 4
Bar 3
Bar 2
Bar 1
Bar 0
input (Pin 61) selects the
FORMATS
2. Input = 5%
of Full Scale
OffOff
OffOn
OffOn
On
2. Input = 5%
of Full Scale
Off
Off
Off
Off
On
On
Off
Off
On
Off
Off
DS21477B-page 12
2002 Microchip TechnologyInc.
TC826
4.14BAR Format
The TC826 powers up in the BAR mode. BAR/DOT is
pulled high internally. This displayformat is similar to a
thermometer display. All bars/LCD segments including
zero, below the bar/LCD segment equaling the input
signal level, are on. A half scale input signal,for example, would be displayed with BAR 0 to BAR 20 on.
4.15DOT Format
By connecting BAR/DOT to VSSthrough a 1MΩ resistor,the DOT mode is selected. Only the BAR LCD segment equaling the input signal is on. The zero segment
is on for zero input.
This mode is useful for moving cursor or ‘needle’ applications.
4.16LCD Displays
Most end products will use a custom LCD display for
finalproduction.Custom LCD displays are low cost and
availablefromallmanufacturers. The TC826 interfaces
to non-multiplexed LCD displays.A backplane driver is
included on-chip.
To speed initial evaluation and prototype work, a standard TC826 LCD display is available from Varitronix.
Varitronix Ltd. LCDs
4/F Liven House
61-63 King Yip Street
Kwun Tong, Kowloon
Hong Kong
Tel: (852)2389-4317
Fax: (852)2343-9555
USA Office:
VL El ectronics / Varitronix
3250 Wilshire Blvd., Suite 901
Los Angeles, CA 90010
Tel: (213) 738-8700
Fax: (213) 738-5340
• Part No.: VBG-413-DP
Other standard LCD displays suitable for development
work are available in both l inear and circular formats.
One m anufacturer is:
UCE Inc.
24 Fi tch Street
Norwalk, CT 06855
Tel: 203/838-7509
• Part No. 5040: 50 segment circular display with
3-digit numeric scale.
• Part No. 5020: 50 segment linear display.
4.17LCD Backplane Driver (BP, Pin 15)
Additionaldriveelectronicsare not requiredtointerface
the TC826 to an LCD display. The TC826 has an onchip backplane generator and driver. The backplane
frequency is:
FBP = F
Figure 4-8 gives typical backplane driver rise/fall time
versus backplane capacitance.
OSC
/256
FIGURE 4-8:BACKPLANE DRIVE RISE/
FALL TIME VS.
CAPACITANCE
10
TA = 25°C
9
V
= 9V
S
8
7
6
5
4
3
2
Rise/Fall Time (X 100ns)
1
0 12345678010
Backplane Capacitance (X 100pf)
4.18Flat Package Socket
Sockets suitable for prototype work are available. A
USA source is:
Nepenthe Distribution
2471 East Bayshore, Suite 520
Palo Alto, CA 94303
Tel: 415/856-9332
T elex: 910/373-2060
• ‘BQ’ Socket Part No.: IC51-064-042 BQ
2002 Microchip TechnologyInc.DS21477B-page 13
TC826
)
5.0PACKAGING INFORMATION
5.1Package Marking Information
Package marking data not available at this time.
5.2Taping Form
Component Taping Orientation for 64-Pin PQFP Devices
User Direction of Feed
PIN 1
W
Carrier Tape, Number of Components Per Reel and Reel Size
Package Carrier Width (W) Pitch (P) Part Per Full Reel Reel Size
64-Pin PQFP 32 mm 24 mm 250 13 in
Note: Drawing does not represent total number of pins.
5.3Package Dimensions
64-Pin PQFP
PIN 1
.018 (0.45)
.012 (0.30)
.031 (0.80) TYP.
P
Standard Reel Component Orientation
for TR Suffix Device
.009 (0.23)
.005 (0.13)
.555 (14.10)
.547 (13.90)
.687 (17.45)
.667 (16.95)
7° MAX.
.041 (1.03)
.031 (0.78)
DS21477B-page 14
.555 (14.10)
.547 (13.90)
.687 (17.45)
.667 (16.95)
.010 (0.25) TYP.
.120 (3.05)
.100 (2.55)
.130 (3.30) MAX.
Dimensions: mm (inches
2002 Microchip TechnologyInc.
NOTES:
TC826
2002 Microchip TechnologyInc.DS21477B-page 15
TC826
SALES AND SUPPORT
Data Sheets
Products supportedby a preliminaryData Sheet may have an errata sheet describing minor operational differences and recommendedworkarounds.To determine if an erratasheetexists for a particular device,please contact one of the following:
1.Your local Microchip sales office
2.The Microchip Corporate LiteratureCenter U.S. FAX:(480)792-7277
3.The Microchip Worldwide Site (www.microchip.com)
Pleasespecify which device, revision of silicon and Data Sheet (includeLiterature#) you are using.
New Customer Notification System
Register on our web site (www.microchip.com/cn) to r eceive the most current information on our products.
DS21477B-page 16
2002 Microchip TechnologyInc.
TC826
Information contained in this publication regarding device
applications and the like is intended through suggestion only
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
No representation or warranty is given and no liability is
assumed by Microchip Technology Incorporated with respect
to the accuracy or use of such information,or infringement of
patents or other intellectual property rights arising from such
use or otherwise. Use of Microchip’s products as critical components in life support systems is not authorized except with
express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property
rights.
Trademarks
The Microchip name and logo, the Microchip logo, FilterLa b,
K
EELOQ,microID,MPLAB,PIC,PICmicro,PICMASTER,
PICSTART, PRO MATE, SEEVAL and The Embedded Control
SolutionsCompany areregiste red trademarksof MicrochipTechnologyIncorp or ated in the U.S.A. and other countries .
dsPIC, ECONOMONITOR, Fa nSense, FlexROM, fuzzyLAB,
In-Circuit Serial Programming, ICSP, ICEPIC, microPort,
Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM,
MXDEV, PICC, PICDEM, PICDE M.net, rfPIC, Select M ode
and TotalEndurancearetrademarksofMicrochipTechnology
Incorporated in the U.S.A.
Serialized Quick Turn Programming (SQTP) is a service mark
of Microchip TechnologyIncorporated in t he U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
Microchip received QS-9000 quality system
certification for its worldwide headquarters,
design and wafer fabrication facilities in
Chandler and Tempe, Arizona in July 1999
and Mountain View, California in March 2002.
The Company’s quality system processes and
procedures are QS-9000 compliant for its
®
PICmicro
devices, Serial EEPROMs, microperipherals,
non-volatile memory and analog products. In
addition, Microchip’s quality system for the
design and manufacture of development
systemsisISO 9001certified.
2002 Microchip TechnologyInc.DS21477B-page 17
8-bit MCUs, KEELOQ®code hopping
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