■Wide Input Voltage Range ....................1.5V to 10V
■Efficient Voltage Conversion.........................99.9%
■Excellent Power Efficiency ...............................98%
■Low Power Supply...............................80µA @ 5V
■Low Cost and Easy to Use
— Only Two External Capacitors Required
■RS232 Negative Power Supply
■Available in Small Outline (SO) Package
■Improved ESD Protection ....................... Up to 3kV
■No Dx Diode Required for High Voltage Operation
PIN CONFIGURATION (DIP and SOIC)
NC
CAP
ND
CAP
1
+
2
3
–
4
TC7660CPA
TC7660EPA
TC7660IJA
+
8
V
7
OSC
LOW
6
VOLTAGE (LV)
5
V
OUT
NC = NO INTERNAL CONNECTION
NC
CAP
GND
CAP
1
+
2
3
–
4
TC7660COA
TC7660CPA
+
8
V
OSC
7
LOW
6
VOLTAGE (LV)
V
5
OUT
GENERAL DESCRIPTION
The TC7660 is a pin-compatible replacement for the
Industry standard TC7660 charge pump voltage converter.
It converts a +1.5V to +10V input to a corresponding – 1.5V
to -10V output using only two low-cost capacitors, eliminating inductors and their associated cost, size and EMI.
IN
The on-board oscillator operates at a nominal frequency of 10kHz. Operation below 10kHz (for lower supply
current applications) is possible by connecting an external
capacitor from OSC to ground (with pin 1 open).
The TC7660 is available in both 8-pin DIP and 8-pin
SOIC packages in commercial and extended temperature
ranges.
ORDERING INFORMATION
Temperature
Part No.PackageRange
TC7660COA8-Pin SOIC0°C to +70°C
TC7660CPA8-Pin Plastic DIP0°C to +70°C
TC7660EOA8-Pin SOIC– 40°C to +85°C
TC7660EPA8-Pin Plastic DIP– 40°C to +85°C
TC7660IJA8-Pin CerDIP– 40°C to +85°C
TC7660MJA8-Pin CerDIP– 55°C to +125°C
I Suffix...............................................– 25°C to +85°C
E Suffix ............................................. – 40°C to +85°C
M Suffix........................................... – 55°C to +125°C
Storage Temperature Range ................– 65°C to +150°C
Lead Temperature (Soldering, 10 sec) .................+300°C
*Static-sensitive device. Unused devices must be stored in conductive
material. Protect devices from static discharge and static fields. Stresses
above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional
operation of the device at these or any other conditions above those
indicated in the operation sections of the specifications is not implied.
Exposure to absolute maximum rating conditions for extended periods
may affect device reliability.
ELECTRICAL CHARACTERISTICS: Specifications Measured Over Operating Temperature Range With,
V+ = 5V, C
SymbolParameterTest ConditionsMinTypMaxUnit
+
I
+
V
H
+
V
L
R
OUT
F
OSC
P
EFF
V
OUT EFF
Z
OSC
NOTES: 1. Connecting any input terminal to voltages greater than V+ or less than GND may cause destructive latch-up. It is recommended that no
Supply CurrentRL = ∞—80180µA
Supply Voltage Range, HighMin ≤ TA ≤ Max,3—10V
RL = 10 kΩ, LV Open
Supply Voltage Range, LowMin ≤ TA ≤ Max,1.5—3.5V
RL = 10 kΩ, LV to GND
Output Source ResistanceI
= 20mA, TA = 25°C—70100Ω
OUT
I
= 20mA, 0°C ≤ TA ≤ +70°C——120Ω
OUT
(C Device)
I
= 20mA, – 40°C ≤ TA ≤ +85°C——130Ω
OUT
(I Device)
= 20mA, –55°C ≤ TA ≤ +125°C—104150Ω
I
OUT
(M Device)
+
V
= 2V, I
0°C ≤ TA ≤ +70°C
+
V
= 2V, I
– 55°C ≤ TA ≤ +125°C (Note 3)
Oscillator FrequencyPin 7 open—10—kHz
Power EfficiencyRL = 5kΩ9598—%
Voltage Conversion EfficiencyRL = ∞9799.9—%
Oscillator ImpedanceV+ = 2V—1—MΩ
V+ = 5V—100—kΩ
inputs from sources operating from external supplies be applied prior to "power up" of the TC7660.
2. Derate linearly above 50°C by 5.5 mW/°C.
3. TC7660M only.
4. The TC7660 can be operated without the Dx diode over full temperature and voltage range.
= 0, Test Circuit (Figure 1), unless otherwise indicated.
The TC7660 contains all the necessary circuitry to
implement a voltage inverter, with the exception of two
external capacitors, which may be inexpensive 10 µF polarized electrolytic capacitors. Operation is best understood by
considering Figure 2, which shows an idealized voltage
inverter. Capacitor C1 is charged to a voltage, V+, for the half
cycle when switches S1 and S3 are closed. (Note: Switches
S2 and S4 are open during this half cycle.) During the second
half cycle of operation, switches S2 and S4 are closed, with
S1 and S3 open, thereby shifting capacitor C1 negatively by
V+ volts. Charge is then transferred from C1 to C2, such that
the voltage on C2 is exactly V+, assuming ideal switches and
no load on C2.
TC7660
The four switches in Figure 2 are MOS power switches;
S1 is a P-channel device, and S2, S3 and S4 are N-channel
devices. The main difficulty with this approach is that in
integrating the switches, the substrates of S3 and S4 must
always remain reverse-biased with respect to their sources,
but not so much as to degrade their ON resistances. In
addition, at circuit start-up, and under output short circuit
conditions (V
and the substrate bias adjusted accordingly. Failure to
accomplish this will result in high power losses and probable
device latch-up.
This problem is eliminated in the TC7660 by a logic
network which senses the output voltage (V
with the level translators, and switches the substrates of S
and S4 to the correct level to maintain necessary reverse
bias.
The voltage regulator portion of the TC7660 is an
integral part of the anti-latch-up circuitry. Its inherent voltage
drop can, however, degrade operation at low voltages. To
improve low-voltage operation, the LV pin should be
connected to GND, disabling the regulator. For supply
voltages greater than 3.5V, the LV terminal must be left
open to ensure latch-up-proof operation and prevent device
damage.
Theoretical Power Efficiency
Considerations
In theory, a capacitive charge pump can approach
100% efficiency if certain conditions are met:
The TC7660 approaches these conditions for negative
voltage multiplication if large values of C1 and C2 are used.
Energy is lost only in the transfer of charge between
capacitors if a change in voltage occurs. The energy lost
is defined by:
2
E = 1/2 C1 (V
1
– V
2
)
2
V1 and V2 are the voltages on C1 during the pump and
transfer cycles. If the impedances of C1 and C2 are relatively
high at the pump frequency (refer to Figure 2), compared to
the value of RL, there will be a substantial difference in
voltages V1 and V2. Therefore, it is not only desirable to
make C2 as large as possible to eliminate output voltage
ripple, but also to employ a correspondingly large value for
C
in order to achieve maximum efficiency of operation.
1
Dos and Don'ts
• Do not exceed maximum supply voltages.
• Do not connect LV terminal to GND for supply voltages
greater than 3.5V.
• Do not short circuit the output to V+ supply for voltages
above 5.5V for extended periods; however, transient
conditions including start-up are okay.
• When using polarized capacitors in the inverting mode,
the + terminal of C1 must be connected to pin 2 of the
TC7660 and the + terminal of C2 must be connected to
GND Pin 3.
Simple Negative Voltage Converter
Figure 3 shows typical connections to provide a negative supply where a positive supply is available. A similar
scheme may be employed for supply voltages anywhere in
the operating range of +1.5V to +10V, keeping in mind that
pin 6 (LV) is tied to the supply negative (GND) only for supply
voltages below 3.5V.
The output characteristics of the circuit in Figure 3 are
those of a nearly idea l voltage source in series with 70Ω.
Thus, for a load current of –10mA and a supply voltage of
+5V, the output voltage would be – 4.3V.
The dynamic output impedance of the TC7660 is due,
primarily, to capacitive reactance of the charge transfer
capacitor (C1). Since this capacitor is connected to the
output for only 1/2 of the cycle, the equation is:
2
XC = = 3.18Ω,
2πf C
1
where f = 10kHz and C1 = 10µF.
+
V
C
10µF
1
2
+
1
*
TC7660
3
4
1. V
Figure 3. Simple Negative Converter
OUT
= –n V+for 1.5V V+ 10VNOTES:
8
7
6
5
V
*
OUT
C
2
10µF
+
Paralleling Devices
Any number of TC7660 voltage converters may be
paralleled to reduce output resistance (Figure 4). The reservoir capacitor, C2, serves all devices, while each device
requires its own pump capacitor, C1. The resultant output
resistance would be approximately:
The TC7660 may be cascaded as shown (Figure 6) to
produce larger negative multiplication of the initial supply
voltage. However, due to the finite efficiency of each device,
the practical limit is 10 devices for light loads. The output
voltage is defined by:
V
= –n (VIN)
OUT
where n is an integer representing the number of devices
cascaded. The resulting output resistance would be approximately the weighted sum of the individual TC7660
R
values.
OUT
Changing the TC7660 Oscillator Frequency
It may be desirable in some applications (due to noise or
other considerations) to increase the oscillator frequency.
This is achieved by overdriving the oscillator from an external clock, as shown in Figure 6. In order to prevent possible
1
2
TC7660
C
1
3
"n"
4
8
R
7
6
5
L
C
2
+
device latch-up, a 1kΩ resistor must be used in series with
the clock output. In a situation where the designer has
generated the external clock frequency using TTL logic, the
addition of a 10kΩ pull-up resistor to V+ supply is required.
Note that the pump frequency with external clocking, as with
internal clocking, will be 1/2 of the clock frequency. Output
transitions occur on the positive-going edge of the clock.
It is also possible to increase the conversion efficiency
of the TC7660 at low load levels by lowering the oscillator
frequency. This reduces the switching losses, and is achieved
by connecting an additional capacitor, C
, as shown in
OSC
Figure 7. Lowering the oscillator frequency will cause an
undesirable increase in the impedance of the pump (C1) and
the reservoir (C2) capacitors. To overcome this, increase the
values of C1 and C2 by the same factor that the frequency
has been reduced. For example, the addition of a 100pF
capacitor between pin 7 (OSC) and pin 8 (V+) will lower the
oscillator frequency to 1kHz from its nominal frequency of
10kHz (a multiple of 10), and necessitate a corresponding
increase in the values of C1 and C2 (from 10µF to 100µF).
Figure 5. Increased Output Voltage by Cascading Devices
10µF
+
7
1
2
3
4
TC7660
"n"
8
7
6
5
+
10µF
V
OUT
*
Page 8
TC7660
CHARGE PUMP DC-TO-DC
VOLTAGE CONVERTER
+
V
CMOS
GATE
V
OUT
10µF
+
+
V
C
OSC
V
OUT
C
2
+
10µF
C
1
1
2
+
3
TC7660
4
Figure 6. External Clocking
1
2
+
TC7660
3
4
Figure 7. Lowering Oscillator Frequency
8
7
6
5
8
7
6
5
V
+
1 kΩ
Positive Voltage Multiplication
The TC7660 may be employed to achieve positive
voltage multiplication using the circuit shown in Figure 8. In
this application, the pump inverter switches of the TC7660
are used to charge C1 to a voltage level of V+– VF (where V
is the supply voltage and VF is the forward voltage drop of
diode D1). On the transfer cycle, the voltage on C1 plus the
supply voltage (V+) is applied through diode D2 to capacitor
C2. The voltage thus created on C2 becomes (2 V+) – (2 VF),
or twice the supply voltage minus the combined forward
voltage drops of diodes D1 and D2.
The source impedance of the output (V
on the output current, but for V+ = 5V and an output current
of 10 mA, it will be approximately 60Ω.
+
V
1
2
3
4
TC7660
8
D
7
6
5
1
D
+
C
1
OUT
2
+
) will depend
V
=
OUT
(2 V+) – (2 VF)
C
2
Combined Negative Voltage Conversion
and Positive Supply Multiplication
Figure 9 combines the functions shown in Figures 3 and
8 to provide negative voltage conversion and positive voltage multiplication simultaneously. This approach would be,
for example, suitable for generating +9V and – 5V from an
existing +5V supply. In this instance, capacitors C1 and C
perform the pump and reservoir functions, respectively, for
the generation of the negative voltage, while capacitors C
and C4 are pump and reservoir, respectively, for the multiplied positive voltage. There is a penalty in this configuration
which combines both functions, however, in that the source
impedances of the generated supplies will be somewhat
higher due to the finite impedance of the common charge
pump driver at pin 2 of the device.
+
V
1
2
TC7660
3
+
+
4
C
1
Figure 9. Combined Negative Converter and Positive Multiplier
8
7
6
5
+
C
2
+
D
1
V
(2 V+) – (2 VF)
D
2
OUT
+
Efficient Positive Voltage
Multiplication/Conversion
Since the switches that allow the charge pumping operation are bidirectional, the charge transfer can be performed backwards as easily as forwards. Figure 10 shows
a TC7660 transforming – 5V to +5V (or +5V to +10V, etc.).
The only problem here is that the internal clock and switchdrive section will not operate until some positive voltage has
been generated. An initial inefficient pump, as shown in
Figure 9, could be used to start this circuit up, after which it
will bypass the other (D1 and D2 in Figure 9 would never turn
on), or else the diode and resistor shown dotted in Figure 10
can be used to "force" the internal regulator on.
The same bidirectional characteristics used in Figure 10
can also be used to split a higher supply in half, as shown in
Figure 11. The combined load will be evenly shared between the two sides. Once again, a high value resistor to the
LV pin ensures start-up. Because the switches share the
load in parallel, the output impedance is much lower than in
the standard circuits, and higher currents can be drawn from
the device. By using this circuit, and then the circuit of
Figure 5, +15V can be converted (via +7.5V and –7.5V) to a
nominal – 15V, though with rather high series resistance
(~250Ω).
Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by
updates. It is your re sponsib ility to en sure t hat you r appl ication m eets with y our sp ecifications . No represen tation or warra nty is given and no liability is
assumed by Microc hip Technology Incorporated with re spec t to the accur acy or use of such infor mation, or infrin gemen t of patents or other intel lectual
property rights arising from such use or otherwise. Use of Microchipís products as critical components in life support systems is not authorized except with
express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, except as maybe explicitly expressed herein, under any intellectual property rights. The Micro chip logo and name are registered trad emarks of Microchip Technology Inc. in the U.S.A. and oth er countries. All rights
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