Datasheet TC7126CLW, TC7126CKW, TC7126ARIPL, TC7126ARCPL, TC7126AIPL Datasheet (Microchip Technology)

TC7126/A

3-1/2 Digit Analog-to-Digital Converters

Features

• Internal Reference with LowTemperature Drift

- TC7126: 80ppm/°C Typical

- TC7126A: 35ppm/°C Typical

• Zero Reading with Zero Input

• Low Noise: 15µV

• High Resolution: 0.05%

• Low Input Leakage Current: 1pA Typ., 10pA Max.

• PrecisionNull Detectors with True Polarity at Zero

• High-ImpedanceDifferential Input

• Convenient9V Battery Operation with Low Power
Dissipation: 500µWTyp.,900µWMax.

P-P

Applications

• Thermometry

• Bridge Readouts: StrainGauges, Load Cells,
Null Detectors

• Digital Meters and Panel Meters:

- Voltage/Current/Ohms/Power, pH

• Digital Scales, Process Monitors

Device Selection Table

Package

Code

CPL 40-Pin PDIP 0°Cto+70°C

IPL 40-Pin PDIP (TC7126Only) -25°Cto+85°C

CKW 44-Pin PQFP 0°Cto+70°C

CLW 44-Pin PLCC 0°Cto+70°C

Package

Temperature

Range

General Description

The TC7126A is a 3-1/2 digit CMOS analog-to-digital
converter (ADC) containing all the active components
necessary to construct a 0.05% resolution measure­ment system. Seven-segment decoders, digit and
polarity drivers, voltage reference, and clock circuit are
integrated on-chip. The TC7126A directly drives a liq­uid crystal display (LCD), and includes a backplane
driver.

A low cost, high resolution indicating meter requires
only a display, four resistors, and four capacitors. The
TC7126A's extremely low power drain and 9V battery
operation make it ideal for portable applications.

The TC7126A reduces linearity error to less than 1
count. Rollover error (the difference in r eadings for
equal magnitude, but opposite polarity input signals) i s
below ±1 count. High-impedance differential inputs
offer 1pA leakage current and a 10
ance. The 15µV
solid" reading, and the auto-zero cycle ensures a zero
display reading with a 0V input.

The TC7126A features a precision, low drift internal
voltage reference and is functionally i dentical to the
TC7126. A l ow drift external reference is not normally
required with the TC7126A.

noise performance ensures a "rock

P-P

12

Ω input imped-



2002 Microchip TechnologyInc. DS21458B-page 1

TC7126/A

Package Type

1

A

B1C1D1V+

6543 1442

F

7

1

G

8

1

E

9

1

D

10

2

C

11

2

12

NC

B

13

2

A

2

F

2

E

2

D

3

18 19 20 21 23 24

3

3

B

F

V+

D

1

C

1

B

1

A

1's

1

F

1

G

1

E

1

D

2

C

2

B

A

F

E

D

B

F

E

AB

POL

2

2

2

2

3

3

3

3

4

10's

100's

1000's

(Minus Sign)

44-Pin PLCC

OSC1

OSC242OSC341TEST

NC

43

TC7126CLW

TC7126ACLW

NC

BP

25 26 27 28

G

22

4

3

E

AB

POL

40-Pin PDIP (Normal)

1

Normal Pin

2

Configuration

3

4

5

6

7

TC7126CPL

8

TC7126ACPL

TC7126IPL

9

TC7126AIPL

10

11

12

13

14

15

16

17

18

19

20

40

3A3C3G2

40

OSC1

39

OSC2

38

OSC3

37

TEST

36

+

V

REF

35

-

V

REF

34

+

C

REF

C

-

33

REF

ANALOG

32

COMMON

31

V

+

IN

30

-

V

IN

C

29

AZ

28

V

BUFF

27

V

INT

26

V-

25

G

2

24

C

3

23

A

3

22

G

3

21

BP
(Backplane)

+

REF

V

100's

V

39

C

38

C

37

ANALOG

36

COMMON
V

35

34

NC

V

33

3214

C

3115

V

3016

V

2917

V-

REF

REF

REF

+

IN

-

IN

AZ

BUFF

INT

44-Pin PQFP

-

+

+

­+

REF

REF

REF

REF

V

V

C

C

44 43 42 41 39 3840

NC

NC

TEST

OSC3

NC

OSC2

OSC1

V+

D

C

B

1

2

3

4

5

6

7

8

9

1

10

1

11

1

12 13 14 15 17 18

1

1G1E1

F

A

TC7126CKW

TC7126ACKW

16

-

+

-

-

IN

ANALOG

IN

COMMON

V

V

2

2B2A2F2E2

D

C

AZ

BUFF

INT

C

V

37

V

36

35

19 20 21 22

V-

34

33

NC

32

G

2

C

31

3

A

30

3

G

29

3

BP

28

POL

27

AB

26

4

E

25

3

F

24

3

B

23

3

3

D

44-Pin PDIP (Reverse)

OSC1

OSC2

OSC3

TEST

V

REF

V

REF

C

REF

C

REF

ANALOG

COMMON

V

IN

V

IN

C

AZ

V

BUFF

V

INT

V-

G

C

100's

A

G

BP

(Backplane)

1

2

3

4

+

5

-

6

+

7

TC7126RCPL

-

8

TC7126ARCPL

9

TC7126ARIPL

+

10

-

11

12

13

14

15

16

2

17

3

18

3

19

3

20

Reverse Pin

Configuration

TC7126RIPL

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

21

V+

D

1

C

1

B

1

A

1's

1

F

1

G

1

E

1

D

2

C

2

B

2

10's

A

2

F

2

E

2

D

3

B

3

100's

F

3

E

3

AB

1000's

4

POL
(Minus Sign)

DS21458B-page 2

NC = No Internal Connection



2002 Microchip TechnologyInc.

Typical Application

TC7126/A

+

Analog

Input

–

1MΩ

0.01µF

180kΩ

0.15µF

0.1µF

2–19

POL

BP

V+

REF

REF

V-

TC7126A

Segment
Drive

20

21

1

36

+

35

­26

0.33
µF

34

+

REF

31

+

V

IN

30

-

V

IN

ANALOG

32

COMMON

28

V

BUFF

29

C

AZ

27

V

INT

39 38 40

R

OSC

560kΩ

33

C

REF

C

OSC

50pF

-C

22–25

V

V

OSC1OSC3OSC2

Note: Pin numbers refer to 40-pin DIP.

TC7126

Minus Sign

240kΩ

10kΩ

1 Conversion/Sec

To Analog Common (Pin 32)

LCD

Backplane

+

9V



2002 Microchip TechnologyInc. DS21458B-page 3

TC7126/A

Functional Block Diagram

V+

0.5mA

LCD

Output

Segment

2mA

BP

6.2V

Control Logic

4

OSC

F

Clock

TEST

V+

1

V

INT

÷ 200

Decode

7-Segment

Decode

7-Segment

Decode

7-Segment

27333634

Data Latch

Section

To Digital

+

Tens Units

Hundreds

Thousands

Comparator Output

To Switch Drivers From

–

21

LCD Segment Drivers

INT

C

V-

26

500Ω

= 1V

TH

V

Internal Digital Ground

OSC3OSC1

39

OSC

OSC2

R

OSC

C

Typical Segment Output

AZ

C

INT

R

TC7126A

REF

C

–

–

ZI &

ZI & AZ

10

+

+

AZ

µA

Integrator

29

1

V+

28

BUFF

V

-

REF

C

­35

REF

+V

REF

V

+

REF

C

AZ

ZI

31

Comparator

Low

DE

(+)

(–)

DE

INT

+

IN

V

REF

Temp Co

V

–

+

V+ – 2.8V

DE (–)

DE (+)

32

Analog

AZ & DE (±)

-

IN

V

Common

26

40 38

V-

INT

DS21458B-page 4



2002 Microchip TechnologyInc.

TC7126/A

1.0 ELECTRICAL
CHARACTERISTICS

Absolute Maximum Ratings*

Supply Voltage (V+ to V-).......................................15V

Analog Input Voltage(either Input) (Note 1)... V+ to V-

*Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device. These
are stress ratings only and functional operation of the device
at these or any other conditions above those indicated in the
operation sections of the specifications is not implied.
Exposure to Absolute Maximum Rating conditions for
extended periods may affectdevice reliability.

Reference Input Voltage (either Input)............ V+ to V-

Clock Input ................................................... Test to V+

Package Power Dissipation (T

≤ 70°C) (Note 2):

A

44-Pin PQFP...............................................1.00W

40-Pin PLCC...............................................1.23W

44-Pin PDIP ................................................1.23W

Operating Temperature Range:

C (Commercial) Devices.................. 0°C to +70°C

I (Industrial) Devices....................-25°Cto +85°C

StorageTemperature Range..............-65°C to +150°C

TC7126/A ELECTRICAL SPECIFICATIONS

Electrical Characteristics: VS=+9V,f

Symbol Parameter Min Typ Max Unit Test Conditions

Input

Z

IR

Z

RD

NL LinearityError -1 ±0.2 1 Count FullScale= 200mV or 2V

e

N

I

L

CMRR Common Mode Rejection Ra tio — 50 — µV/V V

Analog Common

V

CTC

V

C

Note 1: Input voltages may exceed the supply voltages, provided the input current is limited to ±100µA.

Zero InputReading -000.0 ±000.0 +000.0 Digital

Zero Reading Dri ft — 0.2 1 µV/°C VIN=0V,0°C≤ TA≤ +70°C
Ratiometric Reading 999 999/1000 1000 Digital

Rollover Error -1 ±0.2 1 Count V
Noise — 15 — µV
Input Leakage Current — 1 10 pA VIN=0V

Scale Factor Temperature
Coefficient

Analog Common Temperature
Coefficient

Analog Common Voltage 2.7 3.05 3.35 V 250kΩ BetweenCommonandV+

2: Dissipationrating assumes device is mounted with all leads solderedto printedcircuit board.
3: Refer to “Differential Input” discussion.
4: Backplane drive is in phasewith segment drive for “OFF” segment,180°out of phase for “ON” segment. Frequency is

20 times conversion rate. Average DC component is less than 50mV.

5: See “Typical Application”.
6: During Auto-Zero phase, current is 10-20µA higher. A 48kHz ocillatorincreases currentby 8µA (Typical). Common

current is not included.

– 16kHz, and TA= +25°C, unless otherwise noted.

CLK

—1 5ppm/°CV

— — — — 250kΩ Between Commonand V+
——— —0°C≤ T
— 80 — ppm/°C TC7126
— 35 75 ppm/°C TC7126A
— 35 100 ppm/°C -25°C ≤ T

Reading

Reading

P-P

VIN=0V
Full Scale = 200mV

V

IN=VREF,VREF

Max DeviationF rom B est Fit
StraightLine

-=VIN+ ≈ 200mV

IN

VIN= 0V,FullScale= 200mV

=±1V,VIN=0V

CM

Full Scale = 200mV

=199mV,0°C≤ TA≤ +70°C

IN

Ext. Ref. Temp Coeff. = 0ppm/°C

≤ +70°C ("C" Devices)

A

(TC7126A)

=100mV

≤ +85°C ("I" Device)

A



2002 Microchip TechnologyInc. DS21458B-page 5

TC7126/A

TC7126/A ELECTRICAL SPECIFICATIONS (CONTINUED)

Electrical Characteristics: VS=+9V,f

Symbol Parameter Min Typ Max Unit Test Conditions

LCD Drive

V

LCD Segment DriveVoltage 4 5 6 V

SD

LCD Backplane Drive Voltage 4 5 6 V

V

BD

Power Supply

I

Power SupplyCurrent — 55 100 µAVIN= 0V, V+ to V- = 9V (Note 6)

S

Note 1: Input voltages may exceed the supply voltages, provided the input current is limited to ±100µA.

2: Dissipationrating assumes device is mounted with all leads solderedto printedcircuit board.
3: Refer to “Differential Input” discussion.
4: Backplane drive is in phasewith segment drive for “OFF” segment,180°out of phase for “ON” segment. Frequency is

20 times conversion rate. Average DC component is less than 50mV.

5: See “Typical Application”.
6: During Auto-Zero phase, current is 10-20µA higher. A 48kHz ocillatorincreases currentby 8µA (Typical). Common

current is not included.

– 16kHz, and TA= +25°C, unless otherwise noted.

CLK

P-P
P-P

V+ to V- = 9V
V+ to V- = 9V

DS21458B-page 6



2002 Microchip TechnologyInc.

2.0 PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 2-1.

TABLE 2-1: PIN FUNCTION TABLE

Pin Number

(40-Pin PDIP)

Normal

1 (40) V+ Positive supply voltage.
2(39)D
3(38)C
4(37)B
5(36)A
6(35)F
7(34)G
8(33)E

9(32)D
10 (31) C
11 (30) B
12 (29) A
13 (28) F
14 (27) E
15 (26) D
16 (25) B
17 (24) F
18 (23) E
19 (22) AB
20 (21) POL Activates the negativepolarity display.
21 (20) BP LCD Backplane drive output(TC7106A). Digital Ground (TC7107A).
22 (19) G
23 (18) A
24 (17) C
25 (16) G
26 (15) V- Negative power supply voltage.
27 (14) V

28 (13) V

29 (12) C

30 (11) V
31 (10) V
32 (9) ANALOG

33 (8) C

(Reversed) Symbol Description

Activates the D sectionof the unitsdisplay.

1

Activates the C sectionof the unitsdisplay.

1

Activates the B section of the units display.

1

Activates the A section of the units display.

1

Activates the F section of the units display.

1

Activates the G section of the unitsdisplay.

1

Activates the E section of the units display.

1

Activates the D section of the tensdisplay.

2

Activates the C section of the tensdisplay.

2

Activates the B sectionof the tensdisplay.

2

Activates the A sectionof the tensdisplay.

2

Activates the F section of the tens display.

2

Activates the E sectionof the tensdisplay.

2

Activates the D section of the hundreds display.

3

Activates the B section of the hundreds display.

3

Activates the F section of the hundreds display.

3

Activates the E section of the hundreds display.

3

Activates both halves of the 1 in the thousands display.

4

Activates the G section of the hundreds display.

3

Activates the A section of the hundreds display.

3

Activates the C section of the hundreds display.

3

Activates the G section of the tensdisplay.

2

The integrating capacitor should be selected to give the maximum voltage swing that

INT

ensures component tolerance buildup will not allow the integrator output to saturate.
When analog common is used as a reference and the conversion rate is 3 readings
per second, a 0.047µF capacitor may be used. The capacitor must have a low
dielectric constant to preventrollover errors.See Section 6.3, IntegratingCapacitor
for additional details.

BUFF

Integration resistor connection. Use a 180kΩ resistor for a 200mV full-scale range
anda1.8MΩ resistor for a 2V full scalerange.

The size of the auto-zero capacitor influences system noise. Use a 0.33µF capacitor

AZ

for 200mV full scale,and a 0.033µF capacitorfor2V full scale.See Section6.1,
Auto-Zero Capacitorforadditionaldetails.

- The analog LOW input is connected to this pin.

IN

+ The analog HIGH input signal is connected to this pin.

IN

This pin is primarily used to set the Analog Common mode voltage for battery opera-

COMMON

tion, or in systems where the input signalis referenced to the powersupply.It also
actsas a reference voltage source. See Section 7.3, AnalogCommon for additional
details.

- See Pin 34.

REF

TC7126/A



2002 Microchip TechnologyInc. DS21458B-page 7

TC7126/A

TABLE 2-1: PIN FUNCTION TABLE (CONTINUED)

Pin Number

(40-Pin PDIP)

Normal

34 (7) C

35 (6) V
36 (5) V

37 (4) TEST Lamp test. When pulled HIGH (to V+), all segments willbeturned on and the display

38 (3) OSC3 See Pin 40.
39 (2) OSC2 See Pin 40.
40 (1) OSC1 Pins 40, 39 and 38 make up the oscillator section. For a 48kHz clock (3 readings,

(Reversed) Symbol Description

+A0.1µF capacitor is used in most applications. If a large Common mode voltage

REF

exists (for example, the V
used, a 1µF capacitor is recommended and will hold the rollover error to 0.5 count.

- See Pin 36.

REF

+ Theanalog inputrequiredto generate a full scale output(1999 counts).Place 100mV

REF

between Pins 35 and 36 for 199.9mV full scale. Place 1V between Pins 35 and 36 for
2V full scale. See Section 6.6, Reference Voltage for additional information.

should read -1888.It may also be used as a negativesupply for externally
generated decimal points. See Section 7.4, TEST for additional information.

39 per second), connect Pin 40 to the junction of a 180kΩ resistor and a 50pF
capacitor.The 180kΩ resistor is tied to Pin 39 and the 50pF capacitor is tied to
Pin 38.

- pin is not at analog common) and a 200mV scale is

IN

DS21458B-page 8



2002 Microchip TechnologyInc.

TC7126/A

q

y

3.0 DETAILED DESCRIPTION

(All Pin Designations Refer to 40-Pin PDIP.)

3.1 Dual Slope Conversion Principles

The TC7126A is a dual slope, i ntegrating analog-to­digital converter. An understanding of the dual slope
conversion technique will aid in following the detailed
TC7126/A operation theory.

The conventional dual slope converter measurement
cycle has two distinctphases:

• Input Signal Integration

• Reference VoltageIntegration (De-integration)
Theinputsignalbeingconvertedisintegratedforafixed

time period (T
pulses.An opposite polarity constant reference voltage
is then integrated until the integrator output voltage
returnstozero.Thereference integrationtimeisdirectly
proportional to the input signal (T

FIGURE 3-1: BASIC DUAL SLOPE

Analog

Input

Signal

REF

Voltage

). Time is measured by counting clock

SI

)(seeFigure3-1).

RI

CONVERTER

Integrator

–

+

Switch

Driver

Polarity Control

Phase
Control

Comparator

–

+

Control

Logic

Clock

A simple mathematical equation relates the input sig­nal, reference voltage and integrationtime:

EQUATION 3-1:

T

SI

1

V

IN

∫

RC

0

Where:

= Reference voltage

V

R

= Signal integration time (fixed)

T

SI

= Reference v oltage integration time(variable)

T

RI

For a constant VIN:

(t)dt=

VRT

RC

RI

EQUATION 3-2:

T

RI

-------

=

V

IN

V

R

T

SI

The dual slope converter accuracy is unrelated to the
integrating resistor and capacitor values, as long as
they are stable during a measurement cycle. Noise
immunity is an inherent benefit. Noise spikes are inte­grated or averaged to zero during integration periods.
Integrating ADCs are immune to the large conversion
errorsthatplague successiveapproximationconverters
in high noise environments. Interfering signals with fre­quencycomponentsat multiplesoftheaveragingperiod
will be attenuated.IntegratingADCs commonly operate
with the signal integration period set to a multiple of the
50Hz/60Hz power line period (see Figure 3-2).

FIGURE 3-2: NORMAL MODE

REJECTION OF DUAL
SLOPE CONVERTER

Counter

REF

REF

Output

Integrator

Fixed

Signal

Integrate

Time

Display

Variable
Reference
Integrate
Time

V
V

IN
IN

≈ V
≈ 1.2 V

In a simple dual slope converter, a complete conver­sion requires the integrator output to “ramp-up” and
“ramp-down.”

30

20

10

Normal Mode Rejection (dB)

0

0.1/t 1/t 10/t

t = Measurement Period

uenc

Input Fre



2002 Microchip TechnologyInc. DS21458B-page 9

TC7126/A

4.0 ANALOG SECTION

In addition to the basic integrate and de-integrate dual
slope cycles discussed above, the TC7126A design
incorporates an auto-zero cycle. This cycle removes
buffer amplifier, integrator and comparator offset volt­age error terms from the conversion. A true digitalzero
reading results without external adjusting potentiome­ters. A complete conversion consists of three phases:

1. Auto-Zero phase

2. Signal Integrate phase

3. Reference Integrate phase

4.1 Auto-Zero Phase

During the auto-zero phase, thedifferential input signal
is disconnected from the circuit by opening internal
analog gates. The internalnodesare shorted to analog
common ( ground) to establish a zero input condition.
Additional analog gates close a feedback loop around
the integrator and comparator. This loop permits com­parator offset voltage error compensation. The voltage
levelestablishedonC
voltages. The auto-zero phase residual is typically
10µVto15µV. The auto-zero cycle length is 1000 to
3000 clock periods.

4.2 Signal Integrate Phase

The auto-zero loop is entered and the internal differen­tial inputs connect to V
input signal is integrated for a fixed time period. The
TC7126/A signal integration period is 1000 clock
periodsor counts. The externally set clock frequencyis
divided by four before clocking the internal counters.
The i ntegration t ime period is:

EQUATION 4-1:

Where: F

The differential input voltage must be within the device
Common mode range when the converter and mea­sured system share the same power supply common
(ground). If the converter and measured system do not
share the same power supply common, V
tied to analog common.

Polarity is determined at the end of signal integrate
phase. The sign bit is a true polarity indication, in that
signals less than 1LSB are correctly determined. This
allows precision null detection limited only by device
noise and auto-zero residual offsets.

OSC

compensatesfordeviceoffset

AZ

+ and VIN-. The differential

IN

TSI=

4

x 1000

F

OSC

= external clock frequency.

IN

- should be

4.3 Reference Integrate Phase

The third phase is reference integrate or de-integrate.
V

-isinternallyconnectedtoanalogcommon andVIN+

IN

is connected across t he previously charged reference
capacitor. Circuitry within the chip ensures that the
capacitor will be connected with the correct polarity to
cause the integrator output to return to zero. The time
requiredfor the outputtoreturntozeroisproportionalto
the input signal and is between0 and 2000 counts. The
digital reading displayed is:

EQUATION 4-2:

V

V

IN

REF

1000

5.0 DIGITAL SECTION

The TC7126A contains all the segment drivers neces­sary to directly drive a 3-1/2 digit LCD, including an
LCD backplane driver.The backplane frequency is the
external clock frequency divided by 800. For 3 conver­sions per second, the backplane frequency is 60Hz
with a 5V nominalamplitude.When a segment driveris
in phase with the backplane signal, the segment is
OFF. An out of phase segment drive signal causes the
segment to be ON (visible).ThisAC drive configuration
results in negligible DC voltage across each LCD seg­ment, ensuring long LCD life. The polarity segment
driver is ON fornegativeanaloginputs.IfV
are reversed,this indicator reverses.

On the TC7126A, when the TEST pin is pulled to V+, all
segments are turned ON and the display reads -18 88.
During this mode, LCD segments have a constant DC
voltageimpressed.

Note: Do not leave the display in this mode for

more than several minutes. LCDs may be
destroyed if operated wi th DC levels for
extended periods.

The display font and segment drive assignment are
showninFigure5-1.

FIGURE 5-1: DISPLAY FONT AND

SEGMENT ASSIGNMENT

Display Font

1000's 100's 10's 1's

+andVIN-

IN

DS21458B-page 10



2002 Microchip TechnologyInc.

TC7126/A

5.1 System Timing

The oscillator frequency is divided by four pr ior to
clocking the internal decade counters. The four-phase
measurement cycle takes a total of 4000 counts
(16,000 clock pulses). The 4000-count cycle is inde­pendent of input signal magnitude.

Eachphaseofthemeasurementcyclehas the following
length:

1. Auto-Zero Phase: 1000 to 3000 counts
(4000 to 12,000 clock pulses).

For s ignals less than full scale, the auto-zero
phase is assigned the unused reference integrate
time period.

2. Signal Integrate: 1000 counts
(4000 clock pulses).

This time period is fixed. The integration period is:

EQUATION 5-1:

TSI= 4000

Where: F

is the externally set clock frequency.

OSC

3. Reference Integrate: 0 to 2000 counts
(0 to 8000 clock pulses).

The TC7126A is a drop-in replacement for the TC7126
and ICL7126, which offer a greatly improved internal
reference temperature coefficient. No external compo­nent value changes are required to upgrade existing
designs.

F

1

OSC

6.3 Integrating Capacitor(C

C

should be selected to maximize integrator output

INT

INT

)

voltageswingwithoutcausingoutput saturation.Dueto
the TC7126A's superior analog

common temperature

coefficient specification, analog common will normally
supply the differential voltage reference. For this case,
a ±2V full scale integrator output swing is satisfactory.
For 3 readings per second (F

= 48kHz), a 0.047µF

OSC

value is suggested. For 1 reading per second, 0.15µF
is recommended. If a different oscillator frequency is
used, C

must be changed in inverse proportion to

INT

maintain the nominal ±2V integrator swing.

An exact expression for C

INT

is:

EQUATION 6-1:

1

OSC

INT

V





FS





R

INT

must have

INT



(4000)



C

=

INT

F

V

Where:

= Clock frequency at Pin 38

F

OSC

= Full scale input voltage

V

FS

= Integrating resistor

R

INT

= Desired full scale integrator output swing

V

INT

At 3 readings per second, a 750Ω resistor should be
placed in series with C

. This increases accuracy by

INT

compensating for comparator delay. C
low dielectric absorption to minimize rollover error. A
polypropylene capacitor is recommended.

6.0 COMPONENT VALUE

SELECTION

6.1 Auto-Zero Capacitor (CAZ)

The CAZcapacitorsize has some influence on system
noise. A 0.47µF capacitor is recommended for 200mV
full scaleapplicationswhere1LSBis100µV.A0.033µF
capacitoris adequate for 2.0V full scale applications. A
mylar type dielectric capacitor is adequate.

6.2 Reference Voltage Capacitor (C

The reference voltage, used to ramp the integratorout­put voltage back t o zero during the reference integrate
phase, is stored on C
able when V

- is tied to analog common. If a large

REF

Common mode voltage exists (V
mon) and the application requires a 200mV full scale,
increaseC

to 1µF. Rollover error will be held to less

REF

than 0.5 count. A Mylar type dielectric capacitor is
adequate.

.A0.1µF capacitor is accept-

REF

- – analog com-

REF

REF

6.4 Integrating Resistor (R

INT

)

The input buffer amplifier and integrator are designed
with Class A output stages. The output stage idling cur­rent is 6µA. The integrator and buffer can supply 1µA
drive current with negligible linearity errors. R

INT

is cho­sen to remain in the output stage linear drive region, but
not so large that PC board leakage currents induce
errors. For a 200mV full scale, R
scale requires 1.8MΩ

Component

)

Value

C

AZ

R

INT

C

INT

Note: F

OSC

.

Nominal Full Scale Voltage

200mV 2V

0.33µF 0.033µF

180kΩ 1.8MΩ

0.047µF 0.047µF

= 48kHz (3 readings per sec).

is 180kΩ.A2Vfull

INT



2002 Microchip TechnologyInc. DS21458B-page 11

TC7126/A

6.5 Oscillator Com ponents

C

should be 50pF; R

OSC

is selected from the

OSC

equation:

EQUATION 6-2:

OSC

0.45

=

RC

F

For a 48kHz clock (3 conversions per second),
R = 180kΩ.

Note that F

is 44 to generate the TC7126A's inter-

OSC

nal clock. The backplane drive signal is derived by
dividing F

OSC

by 800.

To achieve maximum rejection of 60Hz noise pickup,
the signal integrate period should be a multiple of
60Hz. Oscillator frequencies of 24kHz, 12kHz, 80kHz,
60kHz, 40kHz, etc. should be selected. For 50Hz rejec­tion, oscillator frequencies of 20kHz, 100kHz,
66-2/3kHz, 50kHz, 40kHz, etc. would be suitable. Note
that 40kHz (2.5 readings per second) will reject both
50Hz and 60Hz.

6.6 Reference Voltage Selection

A full scale reading (2000 counts) requires the input
signal be twice the reference voltage.

Required Full Scale Voltage* V

20mV 100mV

2V 1V

Note: V

FS

=2V

REF

.

In some applications, a scale factor other than unity
may exist between a transducer output voltage and the
required digital reading. Assume, for example, a pres­sure transducer output for 2000lb/in
than dividing the input voltage by two, the reference
voltage should be set to 200mV. This permits the trans­ducer input to be used directly.

Thedifferentialreferencecanalsobeusedwherea
digital zero reading is required when V
zero. This is common in temperature measuring instru­mentation. A compensating offset voltage can be
applied between analog common and V
ducer output is connected between V
common.

REF

2

is 400mV. Rather

is not equal to

IN

-. The trans-

IN

+ and analog

IN

7.0 DEVICE PIN FUNCTIONAL
DESCRIPTION

(Pin Numbers Refer to the 40-Pin PDIP.)

7.1 Differential Signal Inputs

+(Pin31),VIN-(Pin30)

V

IN

The TC7126A is designed with true differential inputs
and accepts input signals within the input stage
Common mode voltage range (V
V+ – 1V to V- + 1V. Common mode voltages are
removed from the system when the TC7126A operates
from a battery or floating power source (isolated from
measured system), and V
common (V

)(seeFigure7-2).

COM

IN

In systems where Common mode voltages exist, the
TC7126A's 86 dB Common mode rejection ratio mini­mizes error. Common mode voltages do, however,
affect the integrator output level. A worst case condition
exists if a large positive V

CM

a full scale negative differential signal. The negative
signal drives the integrator output positive along with
V

(see Figure 7-1). For such applications, the inte-

CM

grator output swing can be reduced below the recom­mended 2V full scale swing. The integrator output
will swing within 0.3V of V+ or V- without increased
linearity error.

FIGURE 7-1: COMMON MODE

VOLTAGE REDUCES
AVAILABLEI NTEG RATOR
SWING (V

Input

+

V

IN

–

V

CM

+

–

Buffer

Where:

R

I

=

V

I

tI = Integration time =

= Integration capacitor

C

I

= Integration resistor

R

I

). Typical range is

CM

- is connected to analog

exists in conjunction with

≠ V

IN

C

I

Integrator

)

IN

4000
F

OSC

V

I

[

R

t

I

I CI

COM

–

+

VCM – V

[

DS21458B-page 12



2002 Microchip Technology Inc.

TC7126/A

7.2 Differential Reference
+(Pin36),V

V

REF

The reference voltage can be generated anywhere
within the V+ to V- power supply range.

To prevent rollover type errors being induced by large
Common mode voltages, C

-(Pin35)

REF

should be large com-

REF

The TC7126A offers a significantly improved analog
common temperature coefficient. This potential pro­vides a very stable voltage, suitable for use as a refer­ence. The temperature coefficient of analog common is
typically 35ppm/°C for the TC7126A and 80 ppm/°Cfor
the TC7126.

pared to stray node capacitance.

FIGURE 7-2: COMMON MODE VOLTAGE REMOVED IN BATTERY OPERATION WITH

V

= ANALOG COMMON

IN

V+

V-

Powe r

Source

V+

V-

GND

Measured

System

GND

V

BUFF

V

+

IN

VIN-

ANALOG
COMMON

CAZV

INT

TC7126A

V

+V

-

REF

REF

Segment

Drive

+

9V

BPPOL

OSC1

OSC3

OSC2

V-V+

LCD

7.3 AnalogCommon(Pin32)

The analog common pin is set at a voltage potential
approximately 3V below V+. The potential is between

2.7V and 3.35V below V+. Analog common is tied inter-

nally to an N-channel FET capable of sinking 100µA.
This FET will hold the common line at 3V should an
external load attempt to pull the common line toward
V+. Analog common source current is limited to 1µA.
Therefore, analog common is easily pulled to a more
negative voltage (i.e., below V+ – 3V).

The TC7126A connects the internal V
inputs to analog common during the auto-zero phase.
During the reference integrate phase, V
nected to analog common. If V

- is not externally con-

IN

nected to analog common, a Common mode voltage
exists, but is rejected by the converter's 86dB Com­mon mode rejection ratio. In battery operation, analog
common and V

- are usually connected, removing

IN

Common mode voltage concerns. In systems where
V

- is connected to power supply ground or to a given

IN

voltage, analog common should be connected to V

The analog common pin serves to set the analog sec­tion reference, or common point. The TC7126A is spe­cifically designed to operate from a battery, or in any
measurement system where input signals are not refer­enced (float) with respect to the TC7126A's power
source. The analog common potential of V+ – 3V gives
a 7V end of battery life voltage. The common potential
has a 0.001%/% voltage coefficient and a 15Ω output
impedance.

+andVIN-

IN

- is con-

IN

IN

With sufficiently high total supply voltage (V+ – V- > 7V),
analog common is a very stable potential with excellent
temperature stability (typically 35ppm/°C). This poten­tial can be used to generate the TC7126A's reference
voltage. An external voltage reference will be unneces­sary in most cases because of the 35ppm/°C tempera­ture coefficient. See Section 7.5, TC7126A Internal
Voltage Reference discussion.

7.4 TEST (Pin 37)

The TEST pin potential is 5V less than V+. TEST may
be used as the negative power supply connection for
external CMOS logic. The TEST pin is tied to the inter­nally generated negative logic supply through a 500Ω
resistor. The TEST pin load should be no more than
1mA. See Section 5.0, Digital Section for additional
information on using TEST as a negative digital logic
supply.

If TEST is pulled HIGH (to V+), all segments plus the

minus sign will be activated. DO NOT OPERATE IN

-.

THIS MODE FOR MORE THAN SEVERAL MINUTES.
With TEST = V+, the LCD segments are impressed
with a DC voltage which will destroy the LCD.



2002 Microchip Technology Inc. DS21458B-page 13

TC7126/A

Ω

7.5 TC7126A Internal Voltage
Reference

The TC7126A's analog common voltage temperature
stability has been significantly improved (Figure 7-3).
The "A" version of the industry standard TC7126
device allows users to upgrade old systems and design
new systems, without external voltage references.
External R and C values do not need to be changed.
Figure 7-4 shows analog common supplying the
necessary voltage reference for the TC7126A.

FIGURE 7-3: ANALOG COMMON T E MP.

COEFFICIENT

200

180

160

140

120

100

80

Analog Commom

60

40

Temperature Coefficient (ppm/°C)

20

0

Maximum

Typical

TC7126A

No

Maximum

Specified

Typical

ICL7126

FIGURE 7-4: TC7126A I NTERNAL

VOLTAGE REFERENCE
CONNECTION

9V

+

No

Maximum

Specified

Typical

ICL7136

8.0 TYPICAL APPLICATIONS

8.1 Liquid Crystal Display Sources

Several manufacturers supply standard LCDs to inter­face with the TC7126A, 3-1/2 digit analog-to-digital
converter.

Manufacturer Address/Phone

Crystaloid
Electronics

5282 Hudson Dr.
Hudson, OH 44236
216-655-2429

AND 720 Palomar Ave.

Sunnyvale, CA 94086
408-523-8200

VGI, Inc. 1800 Vernon St., Ste. 2

Roseville, CA 95678
916-783-7878

Hamlin, Inc. 612 E. Lake St.

Lake Mills,
WI 53551
414-648-2361

Note: Contact LCD manufacturer for full product listing/

specifications.

8.2 Decimal Point and Annunciator
Drive

The TEST pin is connected to the internally generated
digital logic supply ground through a 500Ω resistor. The
TEST pin may be used as the negative supply for exter­nal CMOS gate segment drivers. LCD annunciators for
decimal points, low battery indication, or function indi­cation may be added, without adding an additional sup­ply. No more than 1mA should be supplied by the TEST
pin; its potential is approximately 5V below V+ (see
Figure 8-1).

Representative

Part Numbers*

C5335, H5535,
T5135, SX440

FE 0801
FE 0203

LD-B709BZ
LD-H7992AZ

3902, 3933,
3903

26

V-

TC7126A

SET V

REF

DS21458B-page 14

V+

V

REF

V

REF

ANALOG

COMMON

= 1/2 V

1

+

-

REF

36

35

32

V

REF

240k

10kΩ

FIGURE 8-1: DECIMAL POINT AND

ANNUNCIATOR DRIVES

Simple Inverter for Fixed Decimal Point

or Display Annunciator

V+

TC7126A

BP

TEST

Multiple Decimal Point or

Annunciator Driver

V+

BP

TC7126A

TEST

21

37

To LCD
Decimal
Point



V+

4049

To LCD
Decimal
Point

GND

To
Backplane

V+

To LCD
Decimal
Point

4030

GND

2002 Microchip Technology Inc.

TC7126/A

8.3 Flat Package

TheTC7126isavailableinanepoxy64-pinformed
lead package. A test socket for the TC7126ACBQ
device is available:

Part Number: IC 51-42
Manufacturer: Yamaichi
Distribution: Nepenthe Distribution

2471 East Bayshore, Ste. 520
Palo Alto, CA 94043
[phone]

8.4 Ratiometric Resistance
Measurements

The TC7126A’s true differential input and differential
reference make ratiometric reading possible. In a ratio­metric operation, an unknown resistance is measured
with respect to a known standard resistance. No
accurately defined reference voltage is needed.

The unknown resistance is put in series with a known
standard and a current passed through the pair. The
voltage developed across the unknown is applied to the
input and the voltage across the known resistor is
applied to the reference input. If the unknown equals
the standard, the display will read 1000. The displayed
reading can be determined from the following
expression:

EQUATION 8-1:

R

Displayed (Reading) =

The display will over range for R
R

STANDARD

(see Figure 8-2).

UNKNOWN

R

STANDARD

x 1000

UNKNOWN

FIGURE 8-2: LOW PARTS COUNT

RATIOMETRIC
RESISTANCE
MEASUREMENT

V+

V

+

REF

-

R

STANDARD

R

UNKNOWN

V

REF

V

+

IN

TC7126A

V

-

IN

ANALOG
COMMON

≥ 2x

LCD

FIGURE 8-3: 3-1/2 DIGIT TRUE RMS AC DMM

+

1µF

+

1

2

3

4

5

6

7

V

IN

900kΩ

90kΩ

10kΩ

9MΩ

200mV

C1

2V

C2

20V

200V

C1 = 3pF to 10pF, Variable
C2 = 132pF, Variable

COM

1N4148

0.02µF

47kΩ

1Ω

10%

1MΩ

10MΩ

6.8µF

20kΩ
10%

AD636

9V

+

26

V-

V+

TC7126A

+

V

REF

-

V

REF

ANALOG
COMMON

V

+

IN

V

+

OUT

V-

LCD

36

35

32

31

0.01
µF

30

26

Segment

Drive

1

14

13

240kΩ

12

11

10

9

8

2.2
µF

10kΩ

1MΩ 10%

27

29

28

40

38

39

BP



2002 Microchip Technology Inc. DS21458B-page 15

TC7126/A

FIGURE 8-4: INTEGRATED CIRCUIT TEMPERATURE SENSOR

9V

V+

REF02

GND

2

V

OUT

ADJ

TEMP

Constant 5V

51kΩ

6

R

5

4

NC

3

Temperature

Dependent Output

51kΩ

R

V+

V

+

REF

50kΩ

5

2

3

–

1/2

LM358

+

8

1

4

V

=

OUT

1.86V @
+25°C

R

2

50kΩ

R

1

TC7126A

-

V

REF

+

V

IN

VIN-

COMMON

V-

4

FIGURE 8-5: TEMPERATURE SENSO R FIGURE 8-6: POSITIVE TEMPERATURE

COEFFICIENT RESISTOR
TEMPERATURE SENSOR

+

V+ V-

R

20kΩ

R

20kΩ

1

2

-

V

IN

TC7126A

+

V

IN

+

V

REF

-

V

REF

COMMON

9V

160kΩ 300kΩ 300kΩ

1N4148
Sensor

R

50kΩ

2

50kΩ

R

1

+

9V

V+ V-

V

-

IN

+

V

IN

TC7126A

+

V

REF

-

V

REF

COMMON

0.7%/°C
PTC

5.6kΩ 160kΩ

1N4148

R

3

DS21458B-page 16



2002 Microchip Technology Inc.

9.0 PACKAGING INFORMATION

9.1 Package Marking Information

Package marking data not available at this time.

9.2 Taping Form

Component Taping Orientation for 44-Pin PLCC Devices

User Direction of Feed

PIN 1

TC7126/A

W

P

Standard Reel Component Orientation
for TR Suffix Device

Carrier Tape, Number of Components Per Reel and Reel Size

Package Carrier Width (W) Pitch (P) Part Per Full Reel Reel Size

44-Pin PLCC 32 mm 24 mm 500 13 in

Note: Drawing does not represent total number of pins.

Component Taping Orientation for 44-Pin PQFP Devices

User Direction of Feed

PIN 1

W

P

Standard Reel Component Orientation
for TR Suffix Device

Carrier Tape, Number of Components Per Reel and Reel Size

Package Carrier Width (W) Pitch (P) Part Per Full Reel Reel Size

44-Pin PQFP 24 mm 16 mm 500 13 in

Note: Drawing does not represent total number of pins.



2002 Microchip Technology Inc. DS21458B-page 17

TC7126/A

9.3 Package Dimensions

40-Pin PDIP (Wide)

.200 (5.08)
.140 (3.56)

.150 (3.81)
.115 (2.92)

.110 (2.79)
.090 (2.29)

2.065 (52.45)

2.027 (51.49)

.070 (1.78)
.045 (1.14)

.022 (0.56)
.015 (0.38)

PIN 1

.555 (14.10)
.530 (13.46)

.040 (1.02)
.020 (0.51)

.015 (0.38)
.008 (0.20)

.610 (15.49)
.590 (14.99)

3° MIN.

.700 (17.78)
.610 (15.50)

Dimensions: inches (mm)

44-Pin PLCC

.695 (17.65)
.685 (17.40)

.656 (16.66)
.650 (16.51)

.656 (16.66)
.650 (16.51)

.695 (17.65)
.685 (17.40)

PIN 1

.050 (1.27) TYP.

.021 (0.53)
.013 (0.33)

.630 (16.00)
.591 (15.00)

.032 (0.81)
.026 (0.66)

.020 (0.51) MIN.

.120 (3.05)
.090 (2.29)

.180 (4.57)
.165 (4.19)

Dimensions: inches (mm)

DS21458B-page 18



2002 Microchip Technology Inc.

9.3 Package Dimensions (Continued)

(

TC7126/A

44-Pin PQFP

PIN 1

.018 (0.45)
.012 (0.30)

.031 (0.80) TYP.

.398 (10.10)

.390 (9.90)

.557 (14.15)
.537 (13.65)

.398 (10.10)

.390 (9.90)

.557 (14.15)
.537 (13.65)

.009 (0.23)
.005 (0.13)

.096

7° MAX.

.041 (1.03)
.026 (0.65)

.010 (0.25) TYP.

.083 (2.10)
.075 (1.90)

2.45) MAX.

Dimensions: inches (mm)



2002 Microchip Technology Inc. DS21458B-page 19

TC7126/A

PRODUCT IDENTIFICATION SYSTEM

To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.

PART CODE TC7126X X XXX

A or blank*

R (reversed pins) or blank (CPL pkg only)

* "A" parts have an improved reference TC

Package Code (see Device Selection Table)

SALES AND SUPPORT

Data Sheets

Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recom­mended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:

1. Your local Microchip sales office

2. The Microchip Corporate Literature Center U.S. FAX: [phone]

3. The Microchip Worldwide Site (www.microchip.com)

Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.

New Customer Notification System

Register on our web site (www.microchip.com/cn) to receive the most current information on our products.

DS21458B-page 20



2002 Microchip Technology Inc.

TC7126/A

Information contained in this publication regarding device
applications and the like is intended through suggestion only
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
No representation or warranty is given and no liability is
assumed by Microchip Technology Incorporated with respect
to the accuracy or use of such information, or infringement of
patents or other intellectual property rights arising from such
use or otherwise. Use of Microchip’sproductsascriticalcom­ponents in life support systems is not authorized except with
express written approval by Microchip. No licenses are con­veyed, implicitly or otherwise, under any intellectual property
rights.

Trademarks

The Microchip name and logo, the Microchip logo, FilterLab,
K

EELOQ,microID, MPLAB,PIC,PICmicro,PICMASTER,

PICSTART, PRO MATE, SEEVAL and The Embedded Control

Solutions Company are registered trademarks of Microchip Tech­nology Incorporated in the U.S.A. and other countries.

dsPIC, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB,
In-Circuit Serial Programming, ICSP, ICEPIC, microPort,
Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM,
MXDEV, PICC, PICDEM, PICDEM.net, rfPIC, Select Mode
and Total Endurance are trademarks of Microchip Technology
Incorporated in the U.S.A.

Serialized Quick Turn Programming (SQTP) is a service mark
of Microchip Technology Incorporated in the U.S.A.

All other trademarks mentioned herein are property of their
respective companies.

© 2002, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.

Printed on recycled paper.

Microchip received QS-9000 quality system
certification for its worldwide headquarters,
design and wafer fabrication facilities in
Chandler and Tempe, Arizona in July 1999
and Mountain View, California in March 2002.
The Company’s quality system processes and
procedures are QS-9000 compliant for its

®

PICmicro
devices, Serial EEPROMs, microperipherals,
non-volatile memory and analog products. In
addition, Microchip’s quality system for the
design and manufacture of development
systemsisISO 9001certified.



2002 Microchip Technology Inc. DS21458B-page 21

8-bit MCUs, KEELOQ®code hopping

WORLDWIDE SALES AND SERVICE

AMERICAS

Corporate Office

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Tel: [phone] Fax: [phone]

China - Fuzhou

Microchip Technology Consulting (Shanghai)
Co., Ltd., Fuzhou Liaison Office
Unit 28F, World Trade Plaza
No. 71 Wusi Road
Fuzhou 350001, China
Tel: [phone] Fax: [phone]

China - Shanghai

Microchip Technology Consulting (Shanghai)
Co., Ltd.
Room 701, Bldg. B
Far East International Plaza
No. 317 Xian Xia Road
Shanghai, 200051
Tel: [phone] Fax: [phone]

China - Shenzhen

Microchip Technology Consulting (Shanghai)
Co., Ltd., Shenzhen Liaison Office
Rm. 1315, 13/F, Shenzhen Kerry Centre,
Renminnan Lu
Shenzhen 518001, China
Tel: [phone] Fax: [phone]

Hong Kong

Microchip Technology Hongkong Ltd.
Unit 901-6, Tower 2, Metroplaza
223 Hing Fong Road
Kwai Fong, N.T., Hong Kong
Tel: [phone] Fax: [phone]

India

Microchip Technology Inc.
India Liaison Office
Divyasree Chambers
1 Floor, Wing A (A3/A4)
No. 11, O’Shaugnessey Road
Bangalore, 560 025, India
Tel: [phone] Fax: [phone]

Japan

Microchip Technology Japan K.K.
Benex S-1 6F
3-18-20, Shinyokohama
Kohoku-Ku, Yokohama-shi
Kanagawa, 222-0033, Japan
Tel: [phone] Fax: [phone]

Korea

Microchip Technology Korea
168-1, Youngbo Bldg. 3 Floor
Samsung-Dong, Kangnam-Ku
Seoul, Korea 135-882
Tel: [phone] Fax: [phone]

Singapore

Microchip Technology Singapore Pte Ltd.
200 Middle Road
#07-02 Prime Centre
Singapore, 188980
Tel: [phone] Fax: [phone]

Taiwan

Microchip Technology Taiwan
11F-3, No. 207
Tung Hua North Road
Taipei, 105, Taiwan
Tel: [phone] Fax: [phone]

EUROPE

Denmark

Microchip Technology Nordic ApS
Regus Business Cent re
Lautrup hoj 1-3
Ballerup DK-2750 Denmark
Tel: [phone] Fax: [phone]

France

Microchip Technology SARL
Parc d’Activite du Moulin de Massy
43 Rue du Saule Trapu
Batiment A - ler Etage
91300 Massy, France
Tel: [phone] Fax: [phone]

Germany

Microchip Technology GmbH
Gustav-Heinemann Ring 125
D-81739 Munich, Germany
Tel: [phone] Fax: [phone]

Italy

Microchip Technology SRL
Centro Direzionale Colleoni
Palazzo Taurus 1 V. Le Colleoni 1
20041 Agrate Brianza
Milan, Italy
Tel: [phone] Fax: [phone]

United Kingdom

Arizona Microchip Technology Ltd.
505 Eskdale Road
Winnersh Triangle
Wokingham
Berkshire, England RG41 5TU
Tel: [phone] Fax: [phone]

03/01/02

DS21458B-page 22

*DS21458B*



2002 Microchip Technology Inc.