Datasheet TC660EPA, TC660EOA, TC660CPA, TC660COA Datasheet (TelCom Semiconductor)

100mA CHARGE PUMP DC-TO-DC VOLT AGE CONVERTER
EVALUATION
KIT
AVAILABLE

FEATURES

High Output Current ..................................... 100mA
Converts (+1.5V to 5.5V) to (– 1.5V to – 5.5V)
Power Efficiency @100mA......................... 88% typ
Low Power Consumption ................200µA @ 5 V
Low Cost and Easy to Use
— Only Two External Capacitors Required
Selectable Oscillator Frequency ....... 10kHz/90kHz
ESD Protection ...................................................4kV

APPLICATIONS

Laptop Computers
µP Based Controllers
Process Instrumentation
Automotive Instruments

PIN CONFIGURATION (DIP and SOIC)

GENERAL DESCRIPTION

The TC660 DC-to-DC voltage converter generates a negative voltage supply, that can support a 100mA maxi­mum load, from a positive voltage input of 1.5V to 5.5V. Only two external capacitors are required.
IN
Power supply voltage is stored on an undedicated capacitor then inverted and transferred to an output reser­voir capacitor. The on-board oscillator normally runs at a frequency of 10kHz with V+ at 5V. This frequency can be lowered by the addition of an external capacitor from OSC (pin 7) to ground, or raised to 90kHz by connecting the frequency control pin (FC) to V+, in order to optimize capaci­tor size, quiescent current, and output voltage ripple frequency. Operation using input voltage between 1.5V and
3.0V is accommodated by grounding the LV input (pin 6). Operation at higher input voltages (3.0V to 5.5V) is accom­plished by leaving LV open.
The TC660 open circuit output voltage is within 0.1% of the input voltage with the output open-circuited. Power conversion efficiency is 98% when output load is between 2mA and 5mA.
1
TC660
2
3
4
+
8
V
7
OSC
6
LV
5
V
OUT
FC
CAP
GND
CAP
CAP
GND
CAP
FC
1
+
2 3
4
TC660CPA TC660EPA

FUNCTIONAL BLOCK DIAGRAM

1
FC
OSC
LV
7
6
RC
OSCILLATOR
TC660
1
+
2
TC660COA
3
TC660EOA
4
INTERNAL VOLTAGE
REGULATOR
÷ 2
+
8
V
7
OSC
6
LV
5
V
OUT
VOLTAGE–
LEVEL
TRANSLATOR

ORDERING INFORMATION

Part No. Package Temp. Range
TC660COA 8-Pin SOIC 0°C to +70°C TC660CPA 8-Pin Plastic DIP 0°C to +70°C TC660EOA 8-Pin SOIC – 40°C to +85°C TC660EPA 8-Pin Plastic DIP – 40°C to +85°C
TC7660EV Evaluation Kit for
Charge Pump Family
+
V+CAP
82
4
CAP
5
V
OUT
LOGIC
NETWORK
5
6
7
TELCOM SEMICONDUCTOR, INC.
3
GND
8
TC660-2 9/10/96
4-5
TC660
100mA CHARGE PUMP DC-TO-DC
VOLTAGE CONVERTER
ABSOLUTE MAXIMUM RATINGS*
Supply Voltage ........................................................... +6V
LV, FC, OSC Input
Voltage (Note 1) .......................V
Current Into LV (Note 1)...................... 20 µA for V+ >3.5V
Output Short Duration (V
SUPPLY
– 0.3V to (V+ +0.3V)
OUT
5.5V) (Note 3) ..10 Sec
*Static-sensitive device. Unused devices must be stored in conductive material. Protect devices from static discharge and static fields. Stresses above those listed under "Absolute Maximum Ratings" may cause perma­nent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operation sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Power Dissipation (Note 2) (TA 70°C)
SOIC...............................................................470mW
Plastic DIP ......................................................730mW
Operating Temperature Range
C Suffix ..................................................0°C to +70°C
E Suffix .............................................– 40°C to +85°C
Storage Temperature Range ................– 65°C to +150°C
Lead Temperature (Soldering, 10 sec) .................+300°C
ELECTRICAL CHARACTERISTICS: Specifications Measured Over Operating Temperature Range With,
V+ = 5V, C (Figure 1), unless otherwise indicated.
Symbol Parameter Test Conditions Min Typ Max Unit
+
I
+
V
R
OUT
I
OUT
F
OSC
I
OSC
P
EFF
V
OUT EFF
NOTES: 1. Connecting any input terminal to voltages greater than V+ or less than GND may cause destructive latch-up. It is recommended that no
Supply Current RL =
FC pin = OPEN or GND 200 500 µA FC pin = V
Supply Voltage Range LV = HIGH, RL = 1 k 3 5.5 V
LV = GND, RL = 1 k 1.5 5.5
LV = OUT, RL = 1 k (Figure 9) 2.5 5.5 Output Source Resistance I Output Current V
= 100mA 6.5 10
OUT
< – 4V 100 mA
OUT
Oscillator Frequency Pin 7 open; Pin 1 open or GND 10 kHz
Pin 1 = V
+
Input Current Pin 1 open
Pin 1 = V
+
Power Efficiency (Note 4) RL = 1 k connected between V+ & V
= 500 connected between V
R
L
IL = 100mA to GND 88 — Voltage Conversion Efficiency RL = 99 99.9 %
inputs from sources operating from external supplies be applied prior to "power up" of the TC660.
2. Derate linearly above 50°C by 5.5 mW/°C.
3. To prevent damaging the device, do not short V
4. To maximize output voltage and efficiency performance, use low ESR capacitors for C1 and C2.
OUT
to V+.
= Open, C1, C2 = 150µF, FC = Open, Test Circuit
OSC
+
—1 3mA
—90—
+
1.1 µA
OUT
& GND 92 96
OUT
96 98 %
+
5—
4-6
TELCOM SEMICONDUCTOR, INC.
100mA CHARGE PUMP DC-TO-DC VOLTAGE CONVERTER

TYPICAL CHARACTERISTICS

1
TC660
All curves are generated using the test circuit of Figure 1 with V+ = 5V, LV = GND, FC = open, and TA = +25°C, unless otherwise noted.
1)
600
500
400
300
200
SUPPLY CURRENT (µA)
100
4)
2.0
1.6
1.2
0.8
0.4
OUTPUT VOLTAGE DROP
FROM SUPPLY VOLTAGE (V)
Supply Current vs.
Supply Voltage
DOUBLER MODE
LV = OUT
LV = OPEN
0
1.5 2.52.0 3.5 5.04.54.03.0 5.5
LV = GND
SUPPLY VOLTAGE (V)
Output Voltage Drop
vs. Load Current
V+ = 3.5V
V+ = 1.5V
V+ = 2.5V
0
04020 1008060
LOAD CURRENT (mA)
V+ = 4.5V
V+ = 5.5V
2) 3)
Supply Current vs.
Oscillator Frequency
10,000
1000
100
SUPPLY CURRENT (µA)
5)
DOUBLER MODE
10
1
0.01 0.1 1 10 100
OSCILLATOR FREQUENCY (kHz)
INVERTING MODE
Output Voltage vs.
Oscillator Frequency
-5.0
I
= 10mA
-4.5 I
= 1mA
LOAD
-4.0
-3.5
OUTPUT VOLTAGE (V)
-3.0
0.1 0.2 0.4 1 4 10 20 402 100
OSCILLATOR FREQUENCY (kHz)
LOAD
I
LOAD
= 80mA
Efficiency vs. Load Current
100
92
84
76
EFFICIENCY (%)
68
60
04020 1008060
6)
V+ = 3.5V
V+ = 2.5V
V+ = 1.5V
LOAD CURRENT (mA)
Efficiency vs.
Oscillator Frequency
100
96 92
88 84 80 76 72
POWER EFFICIENCY (%)
68 64 60
0.1 0.2 0.4 1 4 10 20 402 100
OSCILLATOR FREQUENCY (kHz)
I
LOAD
I
LOAD
= 1mA
V+ = 5.5V
V+ = 4.5V
= 10mA
I
LOAD
80mA
=
2
3
4
5
6
Output Source Resistance
7) vs. Supply Voltage
15
12
9
6
3
OUTPUT SOURCE RESISTANCE ()
0
0.5 1.51.0 2.0 3.0 3.5 4.02.5 5.55.04.5
SUPPLY VOLTAGE (V)
TELCOM SEMICONDUCTOR, INC.
Output Source Resistance
8) vs. Temperature
16
14
12
10
8
6
OUTPUT SOURCE RESISTANCE ()
4
V+ = 1.5VDC
V+ = 3VDC
0
-20-40
20 40
TEMPERATURE (°C)
V+ = 5VDC
8060 100
9)
Oscillator Frequency
vs. Supply Voltage
12
10
8
6
4
2
OSCILLATOR FREQUENCY (kHz)
0
1.0 2.01.5 2.5 3.0 3.5 4.0 4.5 5.0 5.5
LV GROUNDED
FC = OPEN, OSC = OPEN
SUPPLY VOLTAGE (V)
LV OPEN
7
8
4-7
TC660
)
)
TYPICAL CHARACTERISTICS (Cont.)
10)
Oscillator Frequency
vs. Supply Voltage
100
80
60
40
20
OSCILLATOR FREQUENCY (kHz)
LV GROUNDED
FC = V+, OSC = OPEN
0
1.0 2.01.5 2.5 3.0 3.5 4.0 4.5 5.0 5.5
SUPPLY VOLTAGE (V)
LV OPEN
11) 12)
12
10
8
6
4
2
OSCILATOR FREQUENCY (kHz)
0
Oscillator Frequency
vs. Temperature
FC= OPEN, OSC = OPEN
0
-20-40
20 40
TEMPERATURE (°C)
100mA CHARGE PUMP DC-TO-DC
VOLTAGE CONVERTER
Oscillator Frequency
vs. Temperature
100
80
60
40
FC = V+, OSC = OPEN
20 40-20
0
TEMPERATURE (°C)
10060
80
8060 100
20
OSCILLATOR FREQENCY (kHz)
0
-40
13)
Oscillator Frequency
vs. External Capacitance
14)
TC7660 and TC660 Output
Voltage and Power Efficiency
vs. Load Current, V
100
10
1
0.1
OSCILLATOR FREQUENCY (kHz)
0.01 125 2010 100002000100 500
CAPACITANCE (pF
FC = OPEN
FC = V
+
-3.0
-3.4
-3.8
-4.2
OUTPUT VOLTAGE (V)
-4.6
-5.0 0

PIN DESCRIPTION

Pin No. Symbol Description
1 FC Internal Oscillator frequency control. f 10 kHz when FC OPEN; 90 kHz when
FC = V+. FC has no effect if OSC is overdriven. 2 CAP 3 GND Power-Supply Ground (Inverter) or Positive Input (Doubler) 4 CAP 5V 6 LV "Low-Voltage" pin. Connect to GND Pin for inverter operation when VIN < 3V; leave
7 OSC For external control of internal OSC. Connect ext. C from OSC to GND (close to pkg.)
8V
+
OUT
+
External capacitor, + terminal
External capacitor, – terminal
Negative Voltage output (Inverter) or Ground (Doubler)
open or GND above 3V. When overdriving OSC, connect to GND.
to reduce frequency of oscillator
Positive Voltage Input (Inverter) or Output (Doubler)
TC7660
TC7660
2.0
LOAD CURRENT (mA
EFF
V
OUT
6040 10080
+ =
5V
TC660
TC660
100
92
84
76
68
POWER EFFICIENCY (%)
60
4-8
TELCOM SEMICONDUCTOR, INC.
100mA CHARGE PUMP DC-TO-DC VOLTAGE CONVERTER

Circuit Description

The TC660 contains all the necessary circuitry to com­plete a voltage inverter (Figure 1), with the exception of two external capacitors, which may be inexpensive 150µF polar­ized electrolytic capacitors. Operation is best understood by considering Figure 2, which shows an idealized voltage inverter. Capacitor C1 is charged to a voltage V+ for the half cycle when switches S1 and S3 are closed. (Note: Switches S2 and S4 are open during this half cycle.) During the second half cycle of operation, switches S2 and S4 are closed, with S1 and S3 open, thereby shifting capacitor C1 negatively by V+ volts. Charge is then transferred from C1 to C2, such that the voltage on C2 is exactly V+, assuming ideal switches and no load on C2.
The four switches in Figure 2 are MOS power switches; S1 is a P-channel device, and S2, S3 and S4 are N-channel devices. The main difficulty with this approach is that in integrating the switches, the substrates of S3 and S4 must always remain reverse-biased with respect to their sources, but not so much as to degrade their ON resistances. In addition, at circuit start-up, and under output short circuit conditions (V and the substrate bias adjusted accordingly. Failure to accomplish this would result in high power losses and possible device latch-up. This problem is eliminated in the TC660 by a logic network which senses the output voltage (V
) together with the level translators, and switches the
OUT
substrates of S3 and S4 to the correct level to maintain necessary reverse bias.
To improve low-voltage operation, the “LV” pin should be connected to GND, disabling the internal regulator. For supply voltages greater than 3.0V, the LV terminal should be left open to ensure latch-up-proof operation and prevent device damage.
= V+), the output voltage must be sensed
OUT
TC660
S
1
+
V
S
3
GND
Figure 2. Idealized Switched Capacitor

Theoretical Power Efficiency Considerations

In theory, a voltage multiplier can approach 100%
efficiency if certain conditions are met:
(1) The drive circuitry consumes minimal power. (2) The output switches have extremely low ON
resistance and virtually no offset.
(3) The impedances of the pump and reservoir
capacitors are negligible at the pump frequency.
The TC660 approaches these conditions for negative
voltage multiplication if large values of C1 and C2 are used.
Energy is lost only in the transfer of charge between capacitors if a change in voltage occurs. The energy lost
is defined by:
E = 1/2 C1 (V
S
2
C
1
S
2
– V
1
C
2
4
2
V
= – V
OUT
2
)
IN
1
2
3
4
5
6
+
V
1 2
+
C
1
150 µF
TELCOM SEMICONDUCTOR, INC.
TC660
3 4
Figure 1. TC660 Test Circuit (Inverter)
8 7 6 5
+
I
L
C
2
150 µF
I
S
R
(+5V)
L
V
+
V
OUT
V1 and V2 are the voltages on C1 during the pump and transfer cycles. If the impedances of C1 and C2 are relatively high at the pump frequency (refer to Figure 2) compared to the value of RL, there will be a substantial difference in voltages V1 and V2. Therefore, it is desirable not only to make C2 as large as possible to eliminate output voltage ripple, but also to employ a correspondingly large value for C1 in order to achieve maximum efficiency of operation.
4-9
7
8
TC660
100mA CHARGE PUMP DC-TO-DC
VOLTAGE CONVERTER

Dos and Don'ts

• Do not exceed maximum supply voltages.
• Do not connect the LV terminal to GND for supply voltages greater than 3.0V.
• Do not short circuit the output to V+ in inverting mode and for more than 10 sec (a very slow startup!) in doubler mode.
• When using polarized capacitors in the inverting mode, the + terminal of C1 must be connected to pin 2 of the TC660 and the + terminal of C2 must be connected to GND.

Simple Negative Voltage Converter

Figure 3 shows typical connections to provide a nega­tive supply where a positive supply is available. A similar scheme may be employed for supply voltages anywhere in the operating range of +1.5V to +5.5V, keeping in mind that pin 6 (LV) is tied to the supply negative (GND) only for supply voltages below 3.0V.
+
V
The output characteristics of the circuit in Figure 3 are those of a nearly ideal voltage source in series with 6.5. Thus, for a load current of –100mA and a supply voltage of +5V, the output voltage would be – 4.35V.
The dynamic output impedance of the TC660 is due, primarily, to capacitive reactance of the charge transfer capacitor (C1). Since this capacitor is connected to the output for only 1/2 of the cycle, the equation is:
2
XC = = 0.21Ω,
2πf C
1
where f = 10 kHz and C1 = 150 µF.

Paralleling Devices

Any number of TC660 voltage converters may be paral­leled to reduce output resistance (Figure 4). The reservoir capacitor, C2, serves all devices, while each device requires its own pump capacitor, C1. The resultant output resistance would be approximately:
R
(of TC660)
R
OUT
=
OUT
n (number of devices)
C
150 µF
1 2
+
1
*
C
1
TC660
3 4
1. V
Figure 3. Simple Negative Converter
OUT
= –V+ for 1.5V V+ 5.5VNOTES:
1 2 3 4
8 7 6 5
TC660
"1"
V
*
OUT
C
2
150 µF
+
+
V
8 7 6 5
C
1
1 2
TC660
3
"n"
4
8
R
7 6 5
L
C
2
+
4-10
Figure 4. Paralleling Devices Lowers Output Impedance
TELCOM SEMICONDUCTOR, INC.
100mA CHARGE PUMP DC-TO-DC VOLT AGE CONVERTER
+
V
1
TC660
150 µF
NOTE:
*
. V
1 2
+
OUT
TC660
3
"1"
4
= –n(V+) for 1.5V V+ 5.5V
8 7 6 5
Figure 5. Increased Output Voltage by Cascading Devices
150 µF

Cascading Devices

The TC660 may be cascaded as shown (Figure 5) to produce larger negative multiplication of the initial supply voltage. However, due to the finite efficiency of each device, the practical limit is 10 devices for light loads. The output voltage is defined by:
V
= –n (VIN)
OUT
where n is an integer representing the number of devices cascaded. The resulting output resistance would be ap­proximately the weighted sum of the individual TC660 R values.
OUT

Changing the TC660 Oscillator Frequency

It may be desirable in some applications (due to noise or other considerations) to increase the oscillator frequency. Pin 1, the FC pin, may be connected to V+ to increase oscillator frequency to 90kHz from a nominal of 10 kHz for an input supply voltage of 5.0 volts. The oscillator may also be synchronized to an external clock as shown in Figure 6 and LV must be grounded when overdriving OSC. In a situation where the designer has generated the external
+
V
CMOS GATE
V
OUT
150 µF
+
150 µF
+
V
1 2
+
3
TC660
4
8
OSC
7 6 5
1 2
+
150 µF
+
clock frequency using TTL logic, the addition of a 10k pull­up resistor to V+ supply is required. Note that the pump frequency with external clocking, as with internal clocking, will be 1/2 of the clock frequency. Output transitions occur on the positive-going edge of the clock.
It is also possible to increase the conversion efficiency of the TC660 at low load levels by lowering the oscillator frequency. This reduces the switching losses, and is achieved by connecting an additional capacitor, C Figure 7. Lowering the oscillator frequency will cause an undesirable increase in the impedance of the pump (C1) and the reservoir (C2) capacitors. To overcome this, increase the values of C1 and C2 by the same factor that the frequency has been reduced. For example, the addition of a 100pF capacitor between pin 7 (OSC) and GND will lower the oscillator frequency to 1kHz from its nominal frequency of 10kHz (a multiple of 10), and necessitate a corresponding increase in the values of C1 and C2.
TC660
3
"n"
4
8 7 6 5
+
V
150 µF
, as shown in
OSC

Positive Voltage Doubler

+
V
1 2
+
C
1
TC660
3 4
8 7
C
6 5
OSC
+
OUT
C
2
*
V
2
3
4
5
6
7
OUT
Figure 6. External Clocking
TELCOM SEMICONDUCTOR, INC.
Figure 7. Lowering Oscillator Frequency
8
4-11
TC660
100mA CHARGE PUMP DC-TO-DC
VOLTAGE CONVERTER
+
V
1 2
TC660
3 4
Figure 8. Positive Voltage Doubler
8
D
7 6 5
1
D
+
C
1
2
+
V
=
OUT
(2 V+) – (2 VF)
C
2
Figure 9 shows an improved way of using the TC660 as
a voltage doubler.
In this circuit, C1 is first charged to VIN and C2 is quickly brought to within a diode drop of VIN (to prevent substrate reversal) through D. The optional 200 resistor is only to limit the brief latchup current.
On the next half-cycle, VIN is in series with C1; C2 is then charged to 2 VIN. D is now reverse-biased and plays no further part. For VIN < 3V, R may be necessary to ensure startup.
C
1
R = 0.1 – 1M
200
D
1 2
TC660
3 4
Figure 9. Improved Voltage Doubler
8 7 6 5
R
C
V
= 2 V
2
V
OUT
IN
IN

Combined Negative Voltage Conversion and Positive Supply Multiplication

Figure 10 combines the functions shown in Figures 3 and 8 to provide negative voltage conversion and positive voltage multiplication simultaneously. In this instance, ca­pacitors C1 and C3 perform the pump and reservoir func­tions, respectively, for the generation of the negative volt­age, while capacitors C2 and C4 are pump and reservoir, respectively, for the multiplied positive voltage. There is a penalty in this configuration in that the source impedances of the generated supplies will be somewhat higher due to the finite impedance of the common charge pump driver at pin 2 of the device.
+
V
V
1 2
TC660
3 4
+
C
1
Figure 10. Combined Negative Converter and Positive Multiplier
8 7 6 5
+
C
2
D
D
OUT
+
1
V
OUT
2
(2 V+) – (2 VF)
+
=
C
C
= –V
3
4
+

Efficient Positive Voltage Multiplication/Conversion

Since the switches that allow the charge pumping op­eration are bidirectional, the charge transfer can be per­formed backward as easily as forward. Figure 11 shows a TC660 transforming –5V to +5V. The only problem here is that the internal clock and switch-drive section will not operate until some positive voltage has been generated. A diode and resistor shown dotted in Figure 11 can be used to "force" the internal regulator on.
C
150 µF
V
OUT
1 2
+
1
TC660
3 4
Figure 11. Positive Voltage Multiplier
8 7 6 5
1 M
= –V
V
INPUT
+
150 µF
4-12
TELCOM SEMICONDUCTOR, INC.
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