The TC4421A/TC4422A are improved versions of the
earlier TC4421/TC4422 family of single-output
MOSFET drivers. These devices are high-current
buffer/drivers capable of driving large MOSFETs and
Insulated Gate Bipolar Transistors (IGBTs). The
TC4421A/TC4422A have matched output rise and fall
times, as well as matched leading and falling-edge
propagation delay times. The TC4421A/TC4422A
devices also have very low cross-conduction current,
reducing the overall power dissipation of the device.
These devices are essentially immune to any form of
upset, except direct overvoltage or over-dissipation.
They cannot be latched under any conditions within
their power and voltage ratings. These parts are not
subject to damage or improper operation when up to
5V of ground bounce is present on their ground
terminals. They can accept, without damage or logic
upset, more than 1A inductive current of either polarity
being forced back into their outputs. In addition, all
terminals are fully protected against up to 4 kV of
electrostatic discharge.
The TC4421A/TC4422A inputs may be driven directly
from either TTL or CMOS (3V to 18V). In addition,
300 mV of hysteresis is built into the input, providing
noise immunity and allowing the device to be driven
from slowly rising or falling waveforms.
With both surface-mount and pin-through-hole
packages, in addition to a wide operating temperature
range, the TC4421A/TC4422A family of 9A MOSFET
drivers fit into m ost any applic ation where hig h gate/line
capacitance drive is required.
Package Types
8-Pin
PDIP/SOIC
V
1
DD
INPUT
2
TC4421A
NC
3
TC4422A
GND
4
Note 1: Duplicate pins must both be connected for proper operation.
2: Exposed pad of the DFN package is electrically isolated.
† Stresses above those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device. These
are stress ratings only and functional operation of the device
at these or any other conditions above those indicated in the
operation sections of the specifications is not implied.
Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability.
Input Voltage....................(VDD + 0.3V) to (GND – 5V)
Input Current (VIN > VDD)...................................50 mA
DC CHARACTERISTICS
Electrical Specifications: Unless other wise noted, TA = +25°C with 4.5V ≤ VDD ≤ 18V.
Note:The graphs and tables prov id ed following this note are a statistical s umm ar y b as ed on a limited num ber of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated, TA = +25°C with 4.5V ≤ VDD ≤ 18V.
The VDD input is the bias supp ly for the MO SFET driver
and is rated for 4.5V to 18V with respect to the ground
pin. The VDD input should be bypassed to ground with
a local ceramic capacitor. The value of the capacito r
should be chos en base d on the capaciti ve load th at is
being driven. A minimum val ue of 1. 0µF is suggested.
Pin No.
5-Pin TO-220
SymbolDescription
DD
DD
Supply input, 4.5V to 18V
Metal tab is at the VDD potential
3.3CMOS Push-Pull Output
The MOSFET driver output is a low-impedance,
CMOS, push-pull style output capable of driving a
capacitive load with 9.0A peak currents. The MOSFET
driver output is capable of withstanding 1.5A peak
reverse currents of either polarity.
3.4Ground
3.2Control Input
The MOSFET driver input is a high-impedance,
TTL/CMOS-compatible input. The input also has
300 mV of hysteresis between the high and low
thresholds that prevent s output glitchin g even when the
rise and fall time of the input signal is very slow.
The ground pins are the return path for the bias current
and for the high peak currents that discharge the load
capacitor . The ground pins sh ould be tie d into a g round
plane or have very short traces to the bias supply
source return.
3.5Exposed Metal Pad
The exposed met al p ad of the 6x5 DFN pac ka ge i s n ot
internally connected to any potential. Therefore, this
pad can be connected to a ground plane or other
copper plane on a Printe d Circui t Board (PC B) to a id in
heat removal from the package.
3.6Metal Tab
The metal tab of the TO-220 package is connected to
the V
can be used as a current carrying path for the device.
Dimension Limits
Lead Pitch
Overall Lead Centerse1.263
Space Between Leadse3.0301.02.0400.76
Overall Height
Overall Width
Overall LengthD
Flag LengthH1.2346.55.2585.94
Flag ThicknessF.0451.40.0551.14
Through Hole Center
Through Hole DiameterP.146.1563.713.96
Lead Length
Lead Thickness
Lead Width
Mold Draft Angle
*Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or
protrusions shall not exceed .010" (0.254mm) per side.
JEDEC equivalent: TO-220
Number of Pins
Pitch
Top to Seating PlaneA.140.155.1703.563.944.32
Molded Package ThicknessA2.115.130.1452.923.303.68
Base to Seating PlaneA1.0150.38
Shoulder to Shoulder WidthE.300.313.3257.627.948.26
Molded Package WidthE1.240.250.2606.106.356.60
Overall LengthD.3 60.373.3859.149.469.78
Tip to Seating Plan eL.125.130.1353.183.303.43
Lead Thickness
Upper Lead Width
Lower Lead WidthB.014.018.0220.360.460.56
Overall Row Spacing§
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-001
Drawing No. C04-018
8-Lead Plastic Small Outline (OA) – Narrow, 150 mil (SOIC)
E
E1
p
D
2
B
Number of Pins
Pitch
Foot Angle
Lead Thickness
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-012
Drawing No. C04-057
Note the following details of the code protection feature on Microchip devices:
•Microchip products meet the specification contained in their particular Microchip Data Sheet.
•Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
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Code protection is constantly evolving. We at Microchip are com mitted to continuously improving the code protect ion f eatures of our
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