Page 1
N- and P- Channel Enhancement-Mode Dual MOSFET
VB
VB/
SSD
SGD
lennahC-NlennahC-PlennahC-NlennahC-P8-OS
V002V002-0.721GT0232CT
R
)NO(SD
)xam(egakcaP/rebmuNredrO
TC2320
TC2320
Features
❑ Low threshold
❑ Low on resistance
❑ Independent, electrically isolated N- and P-channels
❑ Low input capacitance
❑ Fast switching speeds
❑ Free from secondary breakdowns
❑ Low input and output leakage
Application
❑ Medical Ultrasound Transmitters
❑ High voltage pulsers
❑ Amplifiers
❑ Buffers
❑ Piezoelectric transducer drivers
❑ General purpose line drivers
❑ Logic level interfaces
Low Threshold DMOS Technology
The Supertex TC2320TG consist of a high voltage low threshold Nchannel and P-channel MOSFET in an SO-8 package. These low
threshold enhancement-mode (normally-off) transistors utilize an
advanced vertical DMOS structure and Supertex’s well-proven
silicon-gate manufacturing process. This combination produces
devices with the power handling capabilities of bipolar transistors
and with the high input impedance and positive temperature
coefficient inherent in MOS devices. Characteristic of all MOS
structures, these devices are free from thermal runaway and
thermally-induced secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a wide range
of switching and amplifying applications where very low threshold
voltage, high breakdown voltage, high input impedance, low input
capacitance, and fast switching speeds are desired.
Package Option
S1
1
D1
8
N-Channel
Absolute Maximum Ratings*
Drain-to-Source Voltage BV
Drain-to-Gate Voltage BV
Gate-to-Source Voltage ±20V
Operating and Storage Temperature -55°C to +150°C
Soldering Temperature* 300°C
*Distance of 1.6mm from case for 10 seconds.
DSS
DGS
G1
S2
G2
2
3
P-Channel
4
SO-8 Package
(top view)
04/23/02
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the
Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.
1
D1
7
D2
6
D2
5
Page 2
N-Channel Electrical Characteristics (@ 25°C unless otherwise specified)
Symbol Parameter Min Typ Max Unit Conditions
BV
DSS
V
GS(th)
∆V
GS(th)
I
GSS
I
DSS
I
D(ON)
R
DS(ON)
∆R
DS(ON)
G
FS
C
ISS
C
OSS
C
RSS
t
d(ON)
t
r
t
d(OFF)
t
f
V
SD
t
rr
Notes:
1.All D.C. parameters 100% tested at 25°C unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)
2.All A.C. parameters sample tested.
Drain-to-Source Breakdown Voltage 200 V ID = 100µA, VGS = 0V
Gate Threshold Voltage 0.6 2.0 V VGS = VDS, ID = 1mA
Change in V
with Temperature -4.5 mV/°CID = 1mA, V
GS(th)
GS
= V
Gate Body Leakage 100 nA VGS = ±20V, VDS = 0V
Zero Gate Voltage Drain Current 1.0 µAV
10.0 µAV
1.0 mA V
= 0V, VDS = 100V
GS
= 0V, VDS = Max Rating
GS
= 0V, VDS = 0.8 Max Rating
GS
TA = 125°C
ON-State Drain Current 0.6
1.2 VGS = 10V, VDS = 25V
A
VGS = 4.5V, VDS = 25V
Static Drain-to-Source 8.0 Ω VGS = 4.5V, ID = 150mA
ON-State Resistance
Change in R
with Temperature 1.0 %/°CV
DS(ON)
Forward Transconductance 150 m VDS = 25V, ID = 200mA
7.0 Ω V
Ω
= 10V, ID = 1.0A
GS
= 4.5V, ID = 150mA
GS
Input Capacitance 110
Common Source Output Capacitance 60 pF V
= 0V, VDS = 25V, f = 1MHz
GS
Reverse Transfer Capacitance 23
Turn-ON Delay Time 20
Rise Time 15
Turn-OFF Delay Time 25
Fall Time 25
ns I
VDD = 25V
= 150mA
D
= 25Ω
R
GEN
Diode Forward Voltage Drop 1.8 V ISD = 200mA, VGS = 0V
Reverse Recovery Time 300 ns ISD = 200mA, VGS = 0V
TC2320
DS
Switching Waveforms and Test Circuit
INPUT
OUTPUT
10V
0V
V
0V
10%
t
(ON)
t
d(ON)
DD
10%
90%
t
r
90%
t
d(OFF)
t
(OFF)
t
F
90%
10%
2
PULSE
GENERATOR
R
gen
INPUT
V
DD
R
L
OUTPUT
D.U.T.
Page 3
P-Channel Electrical Characteristics (@ 25°C unless otherwise specified)
Symbol Parameter Min Typ Max Unit Conditions
BV
DSS
V
GS(th)
∆V
GS(th)
I
GSS
I
DSS
I
D(ON)
R
DS(ON)
∆R
DS(ON)
G
FS
C
ISS
C
OSS
C
RSS
t
d(ON)
t
r
t
d(OFF)
t
f
V
SD
t
rr
Notes:
1.All D.C. parameters 100% tested at 25°C unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)
2.All A.C. parameters sample tested.
Drain-to-Source Breakdown Voltage -200 V VGS = 0V, ID = -2mA
Gate Threshold Voltage -1.0 -2.4 V VGS = VDS, ID= -1mA
Change in V
with Temperature 4.5 mV/°CVGS = VDS, ID= -1mA
GS(th)
Gate Body Leakage -100 nA VGS = ± 20V, VDS = 0V
Zero Gate Voltage Drain Current -10 µAV
-1.0 mA V
ON-State Drain Current -0.25 -0.7 VGS = -4.5V, VDS = -25V
A
= 0V, VDS = Max Rating
GS
= 0V, VDS = 0.8 Max Rating
GS
= 125°C
T
A
-0.75 -2.1 VGS = -10V, VDS = -25V
Static Drain-to-Source
ON-State Resistance
Change in R
with Temperature 1.7 %/°CVGS = -10V, ID = -200mA
DS(ON)
Forward Transconductance 100 250 m VDS = -25V, ID = -200mA
10 15 Ω VGS = -4.5V, ID = -100mA
8.0 12 V
= -10V, ID = -200mA
GS
Ω
Input Capacitance 75 125
V
= 0V, VDS = -25V
Common Source Output Capacitance 20 85 pF
Reverse Transfer Capacitance 10 35
Turn-ON Delay Time 10
ns
GS
f = 1 MHz
Rise Time 15
Turn-OFF Delay Time 20
Fall Time 15
Diode Forward Voltage Drop -1.8 V VGS = 0V, ISD = -0.5A
Reverse Recovery Time 300 ns VGS = 0V, ISD = -0.5A
TC2320
Switching Waveforms and Test Circuit
0V
INPUT
-10V
0V
OUTPUT
V
DD
©2002 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited.
10%
t
d(ON)
t
(ON)
t
r
10%
90%
90%
t
d(OFF)
t
(OFF)
90%
10%
t
F
3
PULSE
GENERATOR
R
gen
INPUT
1235 Bordeaux Drive, Sunnyvale, CA 94089
D.U.T.
OUTPUT
R
L
V
DD
03/23/02
TEL: (408) 744-0100 • FAX: (408) 222-4895
www.supertex.com
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