Datasheet TC1320EUATR, TC1320 Datasheet (Microchip Technology)



2002 Microchip TechnologyInc. DS21386B-page 1

TC1320

Features

• 8-bit Digital-to-Analog Converter

•±2LSBINL

• ±0.8 LSB DNL

• 2.7-5.5V Single Supply Operation

•SimpleSMBus/I

2

CTMSerial Interface

• Low Power: 350µA Operation, 0.5µA Shutdown

• 8-Pin SOIC and 8-Pin MSOP Packages

Applications

• Programmable VoltageSources

• Digital Controlled Amplifiers/Attenuators

• Process Monitoring and Control

Device SelectionTable

General Description

TheTC1320isa seriallyaccessible8-bitvoltage output
digital-to-analog converter (DAC). The DAC produces
an output voltage that ranges from gr ound to an exter­nallysuppliedreferencevoltage.Itoperates from a sin­gle power supply that can range from 2.7V to 5.5V,
making it ideal for a wide range of applications. Built
into the part is a Power-on Reset functionthat ensures
that the device starts at a known condition.

Communicationwith the TC1320 is accomplishedvia a
simple 2-wire SMBus/I

2

C™ compatible serial port with
theTC1320 actingas a slave only device. The host can
enablethe SHDN bit in the CONFIG register to activate
the Low Power Standby mode.

Package Type

Typical Application

Part

Number

Package

Temperature

Range

TC1320EOA 8-Pin SO IC (Narrow) -40°C to +85°C
TC1320EUA 8-Pin MSOP -40°C to +85°C

GND

SDA

V

REF

SCL

NC

V

OUT

V

DD

DAC-OUT

1

8

27

36

45

TC1320

8-Pin MSOP and

8-Pin SOIC (Narrow)

Microcontroller

Serial Port

SDAT

SCLK

V

IN

V

ADJUS

T

V

DD

(1)

(8)

(3)

(2)

DAC

V

REF

(5)

V

OUT

TC1320

+

–

(2)

8-Bit Digital-to-Analog Converter with Two-Wire Interface

TC1320

DS21386B-page 2



2002 Microchip TechnologyInc.

Functional Block Diagram

Serial Port

Interface

SDA

V

DD

DAC-OU

T

V

OUT

Configuration Register

Data Register

Control

V

REF

GND

SCL

DAC

TC1320



2002 Microchip TechnologyInc. DS21386B-page 3

TC1320

1.0 ELECTRICAL
CHARACTERISTICS

Absolute Maximum Ratings*

Supply Voltage (VDD).............................................+6V

Voltage on any Pin..(GND – 0.3V) to (V

DD

+0.3V)

Current on any Pin............................................ ±50mA

Package Thermal Resistance(θ

JA

)............ 330°C C/W

Operating Temperature (T

A

)........................ See Below

StorageTemperature (T

STG

)..............-65°C to +150°C

*Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device. These
are stress ratings only and functional operation of the device
at these or any other conditions above those indicated in the
operation sections of the specifications is not implied.
Exposure to Absolute Maximum Rating conditions for
extended periods may affectdevice reliability.

TC1320 ELECTRICAL SPECIFICATIONS

Electrical Characteristics: VDD= 2.7V to 5.5V, -40°C≤ TA≤ +85°C,V

REF

= 1.2V unless otherwise noted.

Symbol Parameter Min Typ Max Unit Test Conditions

Power Supply

V

DD

Supply Voltage 2.7 350 500 µA

I

DD

Operating Current — 0.35 0.5 mA VDD=5.5V,V

REF

=1.2V

Serial Port Inactive (Note 1)

I

DD-STANDBY

Standby SupplyCurrent — 0.1 1 µAVDD=3.3V

Serial Port Inactive (Note 1)

Static Performance - Analog Section

Resolution — — 8 Bits

INL Integral Non-Linearity at FS, T

A

= +25°C — — ±2 LSB (Note 2)
FSE Full Scale Error — — ±3 %FS
DNL Differential Non-Linearity, T

A

= +25°C — — ±0.8 LSB All Codes (Note 2)

V

OS

Offset Error at V

OUT

—±0.3 ±8 mV(Note 2)

TCV

OS

Offset Error Tempco at V

OUT

—10 —µv/°C

PSRR Power Supply Rejection Ratio — 80 — dB V

DD

at DC

V

REF

Voltage Reference Range 0 — VDD–1.2 V

I

REF

Reference Input Leakage Current — — ±1.0 µA

V

SW

Voltage Swing 0 — V

REF

VV

REF

≤ (VDD–1.2V)

R

OUT

Output Resistance @ V

OUT

—5 — Ω R

OUT

(Ω)

I

OUT

Output Current(Source or Sink) — 2 — mA

I

SC

Output Short-Circuit Current
V

DD

=5.5V

—
—

30
20

50
50

mAmASource

Sink

Dynamic Performance

SR VoltageOutputSlewRate — 0.8 — V/µs
t

SETTLE

Output Voltage Full Scale Settling Time — 10 — µsec

t

WU

Wake-up Time — 20 — µs
Digital Feed Through and Crosstalk — 5 — nV-s SDA = V

DD

,SCL=100kHz

Serial Port Interface

V

IH

LogicInputHigh 2.4 — V

DD

V

V

IL

Logic Input Low — — 0.6 —

V

OL

SDA OutputLow —

—

—
—

0.4

0.6

VVIOL= 3mA (Sinking Current)

I

OL

=6mA

C

IN

Input Capacitance SDA, SCL — 5 0.4 pF

I

LEAK

I/O Leakage — — ±1.0 µA

Note 1: SDA and SCL must be connected to V

DD

or GND.

2: Measured at V

OUT

≥ 50mV referredto GND to avoid output buffer clipping.

TC1320

DS21386B-page 4



2002 Microchip TechnologyInc.

Serial Port AC Timing

f

SMB

SMBus Clock Frequency 10 — 100 kHz

t

IDLE

BusFreeTimePriortoNewTransition 4.7 — — µsec

t

H(START)

START Condition Hold Time 4.0 — — µsec

t

SU(START)

START Condition Setup Time 4.7 — — µsec 90%SCLto10%SDA

(forRepeated START
Condition)

t

SU(STOP)

STOP Condition Setup Time 4.0 — — µsec

t

H-DATA

Data In Hold Time 100 — — nsec

t

SU-DATA

Data In Setup Time 100 — — nsec

t

LOW

Low Clock Period 4.7 — — µsec 10% to 10%

t

HIGH

High Clock Period 4 — — µsec 90% to 90%

t

F

SMBus Fall Time — — 300 nsec 90% to 10%

t

R

SMBusRise Time — — 1000 nsec 10% to 90%

t

POR

Power-on Reset Delay — 500 — µsec VDD ≥ V

POR

(Rising Edge)

TC1320 ELECTRICAL SPECIFICATIONS (CONTINUED)

Electrical Characteristics: VDD= 2.7V to 5.5V, -40°C≤ TA≤ +85°C,V

REF

= 1.2V unless otherwise noted.

Symbol Parameter Min Typ Max Unit Test Conditions

Note 1: SDA and SCL must be connected to V

DD

or GND.

2: Measured at V

OUT

≥ 50mV referredto GND to avoid output buffer clipping.



2002 Microchip TechnologyInc. DS21386B-page 5

TC1320

2.0 PIN DESCRIPTIONS

ThedescriptionsofthepinsarelistedinTable2-1.

TABLE 2-1: PIN F UNCTION TABLE

Pin Number Symbol Type Description

1V

REF

Input Input. Voltage Reference Input can range from 0V to 1.2V below VDD.

2 SDA Bi-Directional Bi-directional. Serial data is transferred on the SMBus in both directions

usingthispin.
3 SCL Input Input. SMBus serial clock. Clocks data into and out of the TC1320.
4 GND Power Ground.
5V

OUT

Output Output. Buffered DAC output voltage. This voltage is a function of the

reference voltageandthe contents of the DATA register.
6 NC None No connection.
7 DAC-OUT Output Output. Unbuffered DAC output voltage. This voltage is a function of the

reference voltageandthe contents of the DATA register. This outputis

unbuffered and care must be takenthatthe pin is connected only to a

high-impedancenode.
8V

DD

Power Positive power supply input. See electrical specifications.

TC1320

DS21386B-page 6



2002 Microchip TechnologyInc.

3.0 DETAILED DESCRIPTION

The TC1320 is a monolithic 8-bit digital-to-analog con­verter, that is designed to operate from a single supply
that can range from 2.7V to 5.5V. The DAC consists of
a data register (DATA), a configuration register
(CONF), and a current output amplifier. The TC1320
uses an external reference, which also determines the
maximum output voltage.

The TC1320 uses a currentsteeringDAC, based on an
array of matched current sources. This current,alonga
precision resistor, converts the contents of the Data
Register and V

REF

into an output voltage, V

OUT

given

by:

V

OUT=VREF

(DATA/256)

3.1 Reference Input

The r eference pin, V

REF

, is a buffered high-impedance
inputand because of this, the load regulationof the ref­erencesourceneedsonlytobeabletotolerate leakage
levels of current (less than 1µA). V

REF

accepts a volt-

age r ange from 0 to (V

DD

– 1. 2V). Input capacitance i s

typically 10pF.

3.2 Output Amplifier

The TC1320 DAC output is buffered with an internal
unitygainrail-to-rail input/outputamplifier,withatypical
slew rate of 0.8V/µsec. Maximum full scale transition
settling time is 10µsec to within ±1/2LSB when loaded
with 1kΩ in parallel with 100pF.

3.3 Standby Mode

The TC1320 allows the host t o put it into a Low Power
(I

DD

=0.5µA, typical) Standby mode. In this mode, the
D/A conversion is halted. The SMBus port operates
normally. Standby mode is enabled by setting the
SHDN bit in the CONFIG register. The table below
summarizes this operation.

TABLE 3-1: STANDBY MODE OPERATION

3.4 SMBus Slave Address

The TC1320 is internally programmedto have a default
SMBus address value of 1001 000b. Seven other
addresses are available by custom order (contact fac­tory).SeeFigure 3-1 for locating addressbitsinSMBus
protocol.

FIGURE 3-1: SMBus P ROT OCO LS

SHDN Bit Operating Mode

0Normal
1 Standby

S

Address R/W

ACK

Command

ACK

Data

ACK P

8-Bits7-Bits

8-Bits

Slave Address Command Byte: selects

which register you are
writing to.

Data Byte: data goes
into the register set
by the command byte.

Write 1-Byte Format

Read 1-Byte Format

S

Address R/W

ACKCommand

ACK

S

Address R/W ACK

Data

NACK

P

7-Bits

8-Bits

7-Bits

8-Bits

Slave Address

Command Byte: selects
which register you are
reading from.

Slave Address: repeated
due to change in data
flow direction.

Data Byte: reads from
the register set by the
command byte.

Receive 1-Byte Format

S

Address R/W ACK

Data NACK P

7-Bits 1

1

0

0

8-Bits

Data Byte: reads data from
the register commanded by
the last Read Byte or Write
B

y

te transmission.

S = START Condition
P = STOP Condition
Shaded = Slave Transmission



2002 Microchip TechnologyInc. DS21386B-page 7

TC1320

4.0 SERIAL PORT OPERATION

The Serial Clock input (SCL) and bi-directional data
port (SDA) form a 2-wire bi-directional serial port for
programming and interrogating the TC1320. The
followingconventionsare used i n this bus architecture:

TABLE 4-1: TC1320 SERIAL BUS

CONVENTIONS

All transfers take place under control of a host, usually
a CPU or microcontroller, acting as the Master, which
provides the clock signal f or all transfers. The TC1320
always operates as a Slave. The serialprotocol is illus­tratedinFigure 3-1. All datatransfershavetwophases;
all bytes are transferred MSB first. Accesses are initi­ated by a START condition (START), followed by a
device address byte and one or more data bytes. The
device address byte includes a Read/Write

selection
bit. Each access must be terminated by a STOP Con­dition (STOP). A convention called Acknowledge
(ACK)confirmsreceiptof each byte. Note that SDA can
change only during periods when SCL is LOW (SDA
changes while SCL is HIGH is reservedforSTARTand
STOP Conditions).

4.1 START Condition (START)

The TC1320 continuously monitors the SDA and SCL
lines for a STARTcondition (a HIGH to LOW transition
of SDA while SCL is HIGH), and will not respond until
this condition is met.

4.2 Address Byte

Immediately following the START Condition, the host
must transmit the address byte to the TC1320. The
7-bit SMBus address for the TC1320 is 1001000.The
7-bit address transmitted in the serial bit stream must
match for the TC1320to respond with an Acknowledge
(indicating t he TC1320 is on the bus and ready to
accept data). The eighth bit in the Address Byte is a
Read/Write

bit. This bit is a 1 for a read operation, or 0
for a write operation. During the first phase of any
transfer, this bit will be set = 0 to indicate that the
command byte is being written.

4.3 Acknowledge (ACK )

Acknowledge (ACK) provides a positive handshake
between the host and the TC1320. The host releases
SDA aftertransmittingeight bits, then generatesaninth
clockcycletoallowtheTC1320topulltheSDAline
LOW to Acknowledge that it successfully received the
previous eight bits of data or address.

4.4 Data Byte

After a successful ACK of the address byte, the host
must transmit the data byte to be written, or clock out
the data to be read. (See the appropriate timing dia­grams.) ACK will be generated after a successful write
of a data byte into the TC1320.

4.5 STOP Condition (STOP)

Communications must be terminated by a STOP con­dition (a LOW to HI GH transition of SDA while SCL is
HIGH). The STOP Condition must be communicated
by the t ransmitter to the TC1320. Refer to Figure 4-1,
Timing Diagrams for serial bus timing.

Term Explanation

Transmitter The device sendingdatatothe bus.
Receiver The device receiving data from the bus.
Master The device which controls the bus: initiating

transfers (START), generating the clock, and

terminating transfers (STOP).
Slave The device addressed by the master.
START A unique condition signaling the beginning of

a transfer indicated by SDA falling

(High - Low) while SCL is high.
STOP A uniquecondition signaling the end of a

transfer indicatedby SDA rising (Low - High)

while SCL is high.
ACK A Receiver Acknowledges the receipt of each

byte withthisuniquecondition.TheReceiver

drives SDA low during SCL high of the ACK

clockpulse. The Master provides the clock

pulse for the ACK cycle.
Busy Communication is not possible becausethe

busisinuse.
Not Busy Whenthe bus is IDLE, bothSDAandSCLwill

remain high.
DataValid The stateof SDA must remain stableduring

theHighperiodofSCLinorderforadatabit

to be considered valid. SDA only changes

statewhile SCL is l ow during normal data

transfers. (See START and STOP conditions.)

TC1320

DS21386B-page 8



2002 Microchip TechnologyInc.

FIGURE 4-1: TIMING DIAGRAMS

4.6 Register Set and Programmer’s
Model

TABLE 4-2: TC1320 COMMAND SET

(SMBus READ_BYTE AND
WRITE_BYTE)

TABLE 4-3: CONFIGURATION REGISTER

(CONFIG), 8-BIT, READ/WRITE

t

SU(START)tH(START)

t

SU-DATA

t

SU(STOP)tIDLE

A = START Condition
B = MSB of Address Clocked into Slave
C = LSB of Address Clocked into Slave
D = R/W Bit Clocked into Slave

A

SMBus Write Timing Diagram

SMBUS Read Timing Diagram

B

CDEFG H

IJ

K

E = Slave Pulls SDA Line Low
F = Acknowledge Bit Clocked into Master
G = MSB of Data Clocked into Master
H = LSB of Data Clocked into Master

I

LOW

I

HIGH

I = Acknowledge Clock Pulse
J = STOP Condition
K = New START Condition

SCL

SDA

t

SU(START)

t

H(START)

t

SU-DATA

t

H-DATA

t

SU(STOP

)

t

IDLE

A = START Condition
B = MSB of Address Clocked into Slave
C = LSB of Address Clocked into Slave
D = R/W Bit Clocked into Slave
E = Slave Pulls SDA Line Low

A

B

CDEFG HIJ

KL

M

F = Acknowledge Bit Clocked into Master
G = MSB of Data Clocked into Slave
H = LSB of Data Clocked into Slave
I = Slave Pulls SDA Line Low

J = Acknowledge Clocked into Master
K = Acknowledge Clock Pulse
L = STOP Condition, Data Executed by Slave
M = New START Condition

I

LOW

I

HIGH

SCL

SDA

Command Byte Description

Command Code Function

RWD 00h Read/Write

Data (DATA)

RWCR 01h Read/Write

Configuration

(CONFIG)

Configuration Register (CONFIG)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

Reserved SHDN

Bit POR Function Type Operation

D[0] 0 Standby Switch Read/

Write

1 = Standby
0=Normal

D[7]-D[1] 0 Reserved;

Always retu rns
Zero when Read

N/A N/A



2002 Microchip TechnologyInc. DS21386B-page 9

TC1320

TABLE 4-4:

DATA REGISTER (DATA),
8-BIT, READ/WRITE

The DAC output voltage is a function of reference volt­ageandthebinary valueofthecontentsoftheDatareg­ister. The transfer function is given by the expression:

EQUATION 4-1:

4.7 Register Set Summary

The TC1320’s register set is summarized in Table 4-5
below.All registers are 8-bits wide.

TABLE 4-5: TC1320 REGISTER S ET

SUMMARY

Data Register (DATA)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

MSBXXXXXXLSB

V

OUT

V

REF

x

DATA

256

---------------- -

=

Name Description POR State Read Write

Data Data Register 0000 0000b XX

Config CONFIG Register 0000 0000b XX

TC1320

DS21386B-page 10



2002 Microchip TechnologyInc.

5.0 PACKAGING INFORMATION

5.1 Package Marking Information

Package marking data not available at this time.

5.2 Taping Forms

Component Taping Orientation for 8-Pin MSOP Devices

Package Carrier Width (W) Pitch (P) Part Per Full Reel Reel Size

8-Pin MSOP 12 mm 8 mm 2500 13 in

Carrier Tape, Number of Components Per Reel and Reel Size

PIN 1

User Direction of Feed

Standard Reel Component Orientation
for TR Suffix Device

W

P

Component Taping Orientation for 8-Pin SOIC (Narrow) Devices

Package Carrier Width (W) Pitch (P) Part Per Full Reel Reel Size

8-Pin SOIC (N) 12 mm 8 mm 2500 13 in

Carrier Tape, Number of Components Per Reel and Reel Size

Standard Reel Component Orientation
for TR Suffix Device

PIN 1

User Direction of Feed

P

W



2002 Microchip TechnologyInc. DS21386B-page 11

TC1320

5.3 Package Dimensions

8-Pin MSOP

.122 (3.10)
.114 (2.90)

.122 (3.10)
.114 (2.90)

.043 (1.10)

MAX.

.006 (0.15)
.002 (0.05)

.016 (0.40)
.010 (0.25)

.197 (5.00)
.189 (4.80)

.008 (0.20)
.005 (0.13)

.028 (0.70)
.016 (0.40)

6° MAX.

.026 (0.65) TYP.

PIN 1

Dimensions: inches (mm)

.050 (1.27) TYP

.

8

.244 (6.20

)

.228 (5.79

)

.157 (3.99

)

.150 (3.81

)

.197 (5.00

)

.189 (4.80

)

.020 (0.51

)

.013 (0.33

)

.010 (0.25

)

.004 (0.10

)

.069 (1.75

)

.053 (1.35

)

.010 (0.25

)

.007 (0.18

)

.050 (1.27

)

.016 (0.40

)

8

-Pin SOI

C

Dimensions: inches (mm)

TC1320

DS21386B-page 12



2002 Microchip TechnologyInc.

SALES AND SUPPORT

Data Sheets

Products supportedby a preliminary Data Sheet may have an errata sheet describing minor operational differences and recom­mendedworkarounds.To determine if an erratasheet exists for a particulardevice, please contactoneof the following:

1. Your local Microchip sales office

2. The MicrochipCorporate Literature Center U.S. FAX:[phone]

3. The Microchip Worldwide Site (www.microchip.com)
Pleasespecify which device, revision of silicon and Data Sheet (includeLiterature#) you are using.

New Customer Notification System

Register on our web site (www.microchip.com/cn) to receive the most current information on our products.



2002 Microchip TechnologyInc. DS21386B-page 13

TC1320

Information contained in this publication regarding device
applications and the like is intended through suggestion only
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
No representation or warranty is given and no liability is
assumed by Microchip Technology Incorporated with respect
to the accuracy or use of such information, or infringement of
patents or other intellectual property rights arising from such
use or otherwise. Use of Microchip’s products as critical com­ponents in life support systems is not authorized except with
express written approval by Microchip. No licenses are con­veyed, implicitly or otherwise, under any intellectual property
rights.

Trademarks

The Microchip name and logo, the Microchip logo, F ilterLab,
K

EELOQ,microID,MPLAB,PIC,PICmicro,PICMASTER,

PICSTART, PRO MATE, SEEVAL and The Embedded Control

SolutionsCompany areregiste r edtrademarksofMicrochip Tech­nologyIncorporated in the U.S.A. and other countries.

dsPIC, ECONOMONITOR, FanSense, Fle xR OM , fuzz yLAB,
In-Circuit Serial Programming, ICSP, ICEPIC, microPort,
Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM,
MXDEV, PICC, PICDEM, PICDEM .n et , rfPIC, Select Mode
and TotalEndurancearetrademarksofMicrochipTechnology
Incorporated in the U.S.A.

Serialized Quick Turn Programming (SQTP) is a service mark
of Microchip TechnologyIncorporated in t he U.S.A.

All other trademarks mentioned herein are property of their
respective companies.

© 2002, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserve d.

Printed on recycled paper.

Microchip received QS-9000 quality system
certification for its worldwide headquarters,
design and wafer fabrication facilities in
Chandler and Tempe, Arizona in July 1999
and Mountain View, California in March 2002.
The Company’s quality system processes and
procedures are QS-9000 compliant for its
PICmicro

®

8-bit MCUs, KEELOQ®code hopping
devices, Serial EEPROMs, microperipherals,
non-volatile memory and analog products. In
addition, Microchip’s quality system for the
design and manufacture of development
systemsisISO 9001certified.

DS21386B-page 14



2002 Microchip Technology Inc.

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1 Floor, Wing A (A3/A4)
No. 11, O’Shaugnessey Road
Bangalore, 560 025, India
Tel: [phone] Fax: [phone]

Japan

Microchip Technology Japan K.K.
Benex S-1 6F
3-18-20, Shinyokohama
Kohoku-Ku, Yokohama-shi
Kanagawa, 222-0033, Japan
Tel: [phone] Fax: [phone]

Korea

Microchip Technology Korea
168-1, Youngbo Bldg. 3 Floor
Samsung-Dong, Kangnam-Ku
Seoul, Korea 135-882
Tel: [phone] Fax: [phone]

Singapore

Microchip Technology Singapore Pte Ltd.
200 Middle Road
#07-02 Prime Centre
Singapore, 188980
Tel: [phone] Fax: [phone]

Taiwan

Microchip Technology Taiwan
11F-3, No. 207
Tung HuaNorth Road
Taipei, 105, Taiwan
Tel: [phone] Fax: [phone]

EUROPE

Denmark

Microchip Technology Nordic ApS
Regus Business Centre
Lautrup hoj 1-3
Ballerup DK-2750 Denmark
Tel: [phone] Fax: [phone]

France

Microchip Technology SARL
Parc d’Activite du Moulin de Massy
43 Rue du Saule Trapu
Batiment A - ler Etage
91300 Massy, France
Tel: [phone] Fax: [phone]

Germany

Microchip Technology GmbH
Gustav-Heinemann Ring 125
D-81739 Munich, Germany
Tel: [phone] Fax: [phone]

Italy

Microchip Technology SRL
Centro Direzionale Colleoni
Palazzo Taurus 1 V. Le Colleoni 1
20041 Agrate Brianza
Milan, Italy
Tel: [phone] Fax: [phone]

United Kingdom

Arizona Microchip Technology Ltd.
505 Eskdale Road
Winnersh Triangle
Wokingham
Berkshire, EnglandRG41 5TU
Tel: [phone] Fax: [phone]

03/01/02

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