Datasheet T15M64A-100N, T15M64A-100P, T15M64A-100J, T15M64A-100D Datasheet (Taiwan Memory Technology)

tm

TE

CH

Preliminary T15M64A

SRAM

FEATURES

• High speed access time: 50/70/85/100ns

• Low power supply current :

- Operating : 35mA(max)

- Standby : 50uA

• Power supply : 5V (± 10%)

• Fully static operation – No clock or refreshing

required

• All inputs and outputs directly LVTTL

compatible

• Common I/O capability

• Data retention voltage : 1.5V (min)

• Available packages :

28-pin DIP(600mil),SOJ, SOP,
TSOP-I (8x13.4mm).

Operating temperature : 0 ~ +70 °C

•

PART NUMBER EXAMPLES

PART NO.

T15M64A-100N
T15M64A-100J
T15M64A-100D

PACKAGE

CODE

N=DIP
J=SOJ
D=SOP

ACCESS

TIME

100ns

8K X 8 LOW POWER

CMOS STATIC RAM

GENERAL DESCRIPTION

The T15M64A is a low power CMOS static
RAM. organized as 8,192 x 8 bits that operates on
a single 5-volt power supply. Low operating and
standby current . Data retention is guaranteed at a
power supply voltage as low as 1.5V. This device
is packaged in a standard 28-pin DIP(600mil), SOJ,
SOP, TSOP-I type.

BLOCK DIAGRAM

→

Vcc

→

V

SS

A 0

.

.

.

A 12

CS

OE

WE

DECODER

CONTROL

CORE

ARRAY

DATA I/O

I/O 1

.

.

.

I/O 8

T15M64A-100P

TSOP-I

P=

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PIN CONFIGURATION

CH

Preliminary T15M64A

NC
A1 2
A7
A6
A5
A4
A3
A2
A1
A0

I/O1
I/O2
I/O3

Vs s

OE

A11

A9
A8

NC

WE

VCC

NC

A12

A7
A6
A5
A4
A3

1
2
3
4
5
6
7
8

9
10
11
12
13
14

1
2
3
4
5
6
7
8

9
10
11
12
13
14

DIP

&

SOJ

TSOP-I

28

Vcc
WE

27
26

NC

25

A8

24

A9

23

A11
OE

22
21

A10
CS

20
19

I/O 8

18

I/O 7

17

I/O 6

16

I/O 5

15

I/O 4

28
27
26
25
24
23
22
21
20
19
18
17
16
15

N C
A 1 2
A 7
A 6
A 5
A 4
A 3
A 2
A 1
A 0
I/O1
I/O2
I/O3
V s s

A10

CS
I/O8
I/O7
I/O6
I/O5
I/O4
VSS
I/O3
I/O2
I/O1

A0

A1

A2

10
11
12
13
14

1
2
3
4
5
6
7
8
9

SOP

28
27
26
25
24
23
22
21
20
19
18
17
16
15

Vcc
WE
NC
A8
A9
A11
OE
A10
CS
I/O 8
I/O 7
I/O 6
I/O 5
I/O 4

PIN DESCRIPTION

SYMBOL DESCRIPTION
A0 - A12 Address Inputs
I/O1 - I/O8 Data Inputs/Outputs

CS

WE
OE

Chip Select Inputs
Write Enable

Output Enable

Vcc Power Supply
Vss Ground

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DC CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS

Supply Voltage to Vss Potential -0.5 to + 7V V
Inputs to Vss Potential -0.5 to Vcc +0.5 V
Power Dissipation 0.7 W
Storage Temperature -60 to +150 °C

RECOMMENDED OPERATING CONDITIONS

Supply Voltage Vcc 4.5 5 5.5 V
Input Voltage, low
Input Voltage, high
Ambient Temperature

TRUTH TABLE

CH

Preliminary T15M64A

PARAMETER RATING UNIT

PARAMETER SYM MIN TYP MAX UNIT

V
V

IL

IH

T

A

-0.3 - 0.8 V

2.2 - Vcc+0.3 V

0 - +70 °C

CS OE WE

H X X Not Selected High-Z Standby
L H H Output Disable High-Z Active
L L H Read Data Out

L X L Write Data In

MODE I/O1- I/O8 Power

Active
Active

OPERATING CHARACTERISTICS

(Vcc = 5V / ± 10%, Vss = 0V, Ta = 0 ~ +70 °C)

PARAMETER SYM. TEST CONDITIONS MIN. TYP. MAX. UNIT

I

Input Leakage Current

Output Leakage Current

Output Low Voltage
Output High Voltage

Operating Power
Supply Current

Standby Power
Supply Current

Vin=Vss to Vcc - - 1 uA

=Vss to Vcc ,

V

I/O

IOH= - 1.0mA

= VIH or WE = VIL

OE

I

= + 2.1mA

OL

V
V

LI

I

LO

OL

OH

CS=

Icc

I

SB

I

SB1

Cycle = MIN.
Duty = 100%

CS

CS ≥

=VIH, Cycle=min, Duty=100%

V

, I/O=0mA

IL

V

cc

-0.2V

CS

V

=

or

IH

-50 - - 35 mA

-70 - - 30 mA

-85 - - 25 mA

-100

- - 1 uA

- - 0.4 V

2.4 - - V

- - 20 mA

- - 0.3 mA

- - 50 uA

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CAPACITANCE

CH

Preliminary T15M64A

(Vcc = 5V /

± 10%

, Ta = 25°C, f = 1 MHz)

PARAMETER SYMBOL CONDITION MAX. UNIT

Input Capacitance
Input/ Output Capacitance

C

IN

C

I/O

V
V

IN

OUT

= 0V

Note: These parameters are sampled but not 100% tested.

AC TEST CONDITIONS

PARAMETER CONDITIONS

Input Pulse Levels 0V to 3V
Input Rise and Fall Times 3 ns
Input and Output Timing Reference Level 1.5V
Output Load See Fig. 1,2

AC TEST LOADS AND WAVEFORM

5V

R1 - 1928 ohm

OUTPUT

30pF
Including
Jig and
Scope

5V

OUTPUT

R2
1020 ohm

= 0V

R1- 1928 ohm

5pF
Including
Jig and
Scope

6 pF
8 pF

R2
1020
ohm

CLZ

OLZ

CHZ

OHZ

, T

WHZ

, TOW )

Fig 1

(For T

, T

, T

, T

Fig 2

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AC CHARACTERISTICS

CH

Preliminary T15M64A

(

V

cc

= 5V /

± 10%

, Vss = 0V, Ta =

0 ~ +70 °C

)

(1) READ CYCLE

PARAMETER SYM.

Read Cycle Time
Address Access Time
Chip Select Access Time
Output Enable to Output Valid
Chip Selection to Output in Low Z
Output Enable to Output in Low Z
Chip Deselection to Output in High Z
Output Disable to Output in High Z
Output Hold from Address Change

* These parameters is measured with 5pF test load.

t

RC

t

AA

t

ACS

t

AOE

t

CLZ*

t

OLZ*

t

CHZ*

t

OHZ*

t

OH

MIN MAX MIN. MAX. MIN. MAX. MIN. MAX.

50 - 70 - 85 - 100 - ns

10 - 10 - 10 - 10 - ns

(2)WRITE CYCLE

-50ns -70ns

- 50 - 70 - 85 - 100 ns

- 50 - 70 - 85 - 100 ns

- 25 - 35 - 40 - 50 ns
7 - 10 - 10 - 10 - ns
5 - 5 - 5 - 5 - ns

- 20 - 25 - 30 - 30 ns

- 20 - 25 - 30 - 30 ns

-85ns -100ns

UNIT

PARAMETER SYM.

t

Write Cycle Time
Chip Selection to End of Write
Address Valid to End of Write
Address Setup Time
Write Pulse Width
Write Recovery Time
Data Valid to End of Write
Data Hold from End of Write
Write to Output in High Z
Output Active from End of Write

* These parameters is measured with 30pF test load.

WC

t

CW

t

AW

tAS
tWP
tWR
tDW
tDH
t

WHZ*

t

OW

MIN MAX MIN. MAX. MIN. MAX. MIN. MAX.

50 - 70 - 85 - 100 - ns
40 - 60 - 70 - 80 - ns
40 - 60 - 70 - 80 - ns

0 - 0 - 0 - 0 - ns

30 - 50 - 60 - 70 - ns

0 - 0 - 0 - 0 - ns

25 - 30 - 35 - 40 - ns

0 - 0 - 0 - 0 - ns

- 20 - 25 - 30 - 30 ns
5 - 5 - 5 - 5 - ns

-50ns -70ns -85ns -100ns

UNIT

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DATA RETENTION CHARACTERISTICS

CH

Preliminary T15M64A

Item Symbol Test Condition Min Typ max unit

Vcc for data retention VDR
Data retention current IDR
Data retention set-up time

t

CDR

CS

V

cc

≥≥≥≥

=5.0,

V

See data retention waveform

Recovery time

t

R

DATA RETENTION WAVE FORM

Da ta R ete ntio n Mode

VCC

CS

Vcc_typ

t

CDR

V

CS >VCC-0.2V

IH

cc

CS

V

-0.2V

≥≥≥≥

> 1.5V

DR

-0.2V

V

cc

1.5 - - V

- 50 uA

0 - -

ms

5 - -

Vcc_TYP

t

R

V

IH

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TIMING WAVEFORMS

READ CYCLE 1

(Address Controlled)

CH

Preliminary T15M64A

Address

D

OUT

READ CYCLE 2

(Chip Select Controlled)

CS

D

OUT

t

OH

t

CLZ

t

AA

t

ACS

t

RC

t

CHZ

t

OH

READ CYCLE 3

(Output Enable Controlled)

Address

OE

CS

D

OUT

t

t

AOE

t

OLZ

t

ACS

t

CLZ

AA

t

RC

t

OHZ

t

CHZ

t

OH

DON'T CARE
UNDEFINED

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WRITE CYCLE 1 (OE CLOCK)

CH

Preliminary T15M64A

Addr ess

OE

CS

WE

D

OUT

D

IN

t

AS

t

OHZ

(1,4)

t

t

CW

WC

t

t

AW

WP

t

WR

t

DW

t

DH

WRITE CYCLE 2

Address

CS

WE

D

OUT

D

IN

(OE =

t

AS

V

Fixed)

IL

t

WHZ

t

WC

t

CW

t

AW

t

WP

(1 ,4 )

t

DW

t

t

DH

WR

t

OW

t

OH

(2 )

(3 )

DON'T CARE
UNDEFINED

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Notes: 1. During this period, I/O pins are in the output state, so input signals of opposite phase to the

2. The data output from

3.

4. Transition is measured ± 500 mV from steady state with

CH

Preliminary T15M64A

outputs should not be applied.

D

are the same as the data written to

OUT

D

provides the read data for the next address.

OUT

guaranteed but not 100% tested.

D

during the write cycle.

IN

C

= 5pF. This parameter is

L

5. If
tWP or (t

required tDW. If
not apply and the write pulse can be as short as the specified tWP.

OE is low during a WE controlled write cycle, the write pulse width must be the larger of

+ tDW) to allow the I/O drivers to turn off and data to be placed on the bus for the

WHZ

OE is high during a WE controlled write cycle, this requirement does

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PACKAGE DIMENSIONS
28-LEAD DIP SRAM (600 mil)

A1

CH

Preliminary T15M64A

A

B

B1

C2

C1

Symbol

A 1.440 1.450 1.460 36.58 36.83 37.08

A1 0.546 0.550 0.554 13.87 13.97 14.07

B - 0.210 - - 5.33 ­B1 0.100 - - 2.54 - ­B2 0.140 0.150 0.160 3.56 3.81 4.06
B3 0.015 - - 0.38 - -

Dimension in inches Dimension in mm

min. typ. max min. typ. max.

D

B2

B3

C

D1

C - 0.100 - - 2.54 ­C1 0.016 0.018 0.020 0.41 0.46 0.51
C2 - 0.060 - - 1.52 -

D 0.600 0.612 0.624 15.24 15.54 15.85
D1 0.630 0.650 0.670 16.0 16.51 17.0

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PACKAGE DIMENSIONS
28-LEAD SOJ SRAM (300 mil)

CH

Preliminary T15M64A

SYMBOL DIMENSIONS IN INCHES DIMENSIONS IN MM

A 0.710±0.002 18.03±0.05
B 0.300±0.005 7.62±0.13
C 0.060±0.002 1.52±0.05
D 0.050±0.001 1.27±0.03

E 0.063±0.001 1.63±0.03

F 0.015±0.002 0.38±0.05
G 0.030±0.002 0.76±0.05
H 0.050±0.002 1.27±0.05

I 0.018±0.002 0.46±0.05
J 0.028±0.002 0.71±0.05

K 0.337±0.002 8.56±0.05

L 0.010±0.001 0.25±0.03

M 0.026±0.002 0.66±0.05

N 0.268±0.003 6.81±0.08
O 0.300±0.002 7.62±0.05

P 0.053±0.001 1.35±0.03
Q 0.140±0.004 3.56±0.10

y 0.004(MAX) 0.10(MAX)

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PACKAGE DIMENSIONS
28-LEAD SOP

CH

Preliminary T15M64A

e1

Symbol

A
A1
A2

b
C
D
E

e

HE

L

28

1

D

S

Seating Plane

Dimension in inches Dimension in mm

min. typ. max min. typ. max.

- - 0.112 - - 2.845

0.004 - - 0.102 - -

0.093 0.098 0.103 2.362 2.489 2.616

0.014 0.016 0.020 0.335 0.406 0.508

0.008 0.010 0.014 0.203 0.254 0.356

- 0.713 0.733 - 18.110 18.618

0.326 0.331 0.336 8.280 8.407 8.534

0.044 0.050 0.056 1.118 1.270 1.422

0.453 0.465 0.477 11.506 11.811 12.116

0.028 0.036 0.044 0.711 0.914 1.117

b

y

15

14

e

EHE

A2

A1

A

De tail F

L

e1

C

Se e D eta il F

Notes :

1. Dimensions D max. & S
include mold flash or tie bar
burrs.

2. Dimension b does not include
dambar protrusion / intrusion.

3. Dimensions D & E include
mold mismatch and determined
at the mold parting line.

4. controlling dimension : inches

5. general appearance spec should
be based on final visual
inspection spec.

LE

LE

S
y
θθθθ

0.059 0.067 0.075 1.499 1.702 1.905

- 39 - - 1.0 -

- - 0.004 - - 0.102

0°

-

10° 0°

-

10°

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PACKAGE DIMENSIONS
28-LEAD TSOP-I (8X13.4mm)

CH

Preliminary T15M64A

D

C

1

14 15

Db

Seating plane

28

"A"

Gauge plane

Detail "A"

b

E

e

A2AA1

Seating plane y

0.010

L

L1

SYMBOL DIMENSIONS IN INCHES DIMENSIONS IN MM

A 0.047(max.) 1.20(max.)
A1 0.004±0.002 0.10±0.05
A2 0.039±0.002 1.00±0.05

b 0.008(typ.) 0.20(typ.)
c 0.006(typ.) 0.15(typ.)

Db 0.465±0.004 11.80±0.10

E 0.315±0.004 8.00±0.10

e 0.022(typ.) 0.55(typ.)

D 0.528±0.008 13.40±0.20

L 0.020±0.004 0.50±0.10

L1 0.0315±0.004 0.80±0.10

y 0.004(max.) 0.10(max.)
θ 0°°°°~5°°°° 0°°°°~5°°°°

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