Datasheet SY89423V Datasheet (MICREL)

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5V/3.3V DUAL

AF2A

HIGH-PERFORMANCE PHASE LOCKED LOOP

ClockWorks™

SY89423V

FEATURES

■ 3.3V and 5V power supply options

■ 1.12GHz maximum VCO frequency

■ 30MHz to 560MHz reference input operating

frequency

■ External 2.0GHz VCO capability

■ Frequency doubler mode

■ Low jitter differential design

■ PECL differential outputs

■ External loop filter optimizes performance/cost

■ Available in 44-pin PLCC package

APPLICATIONS

■ Workstations

■ Advanced communications

■ High-performance computing

PIN CONFIGURATION

VCCOA

FOUTA

VCC

N HFOUTA HFOUTA

S1A S2A F1

S3A

S5B HFINA HFINA

VCCNCFOUTB

65432 44143 42 41 40

7 8 9

10 11 12 13 14 15 16 17

19 20 21 22 24 25 26 27 2823

TOP VIEW

PLCC J44-1

FOUTB

VCCOB

HFOUTB

37 36

S1B

S2B F1B

F2B

33 32

S3B

S4B

HFINB HFINB

DESCRIPTION

The SY89423V device consists of two identical, low jitter, digital Phase Locked Loops based on Micrel-Synergy's differential PLL technology. Each PLL is capable of operating in the 30MHz to 560MHz reference input frequency range, and is independent of the other, and is configurable separately. The PLLs can be configured to be matched in all regards, or can be configured so that PLLB is used as a frequency doubler, while PLLA is used to regenerate the undoubled frequency. Each PLL is capable of operating up to 2000MHz with the HFIN input and an external VCO.

Two reference inputs (RINX and RINX), two feedback inputs (FINX and FINX), two high frequency inputs (HFINX and HFINX), two filter pins (F1X and F2X), two normal outputs (FOUTX and FOUTX), and two high frequency outputs (HFOUTX and HFOUTX) are provided for each of the two PLLs. The reference, feedback, and high frequency inputs can be used as either differential or single-ended inputs. External reference voltage generators are required for single-ended drive.

Feedback for the loops is realized by connecting FOUTX, FOUTX to FINX, FINX by means of external circuitry. This allows the user the flexibility of inserting additional circuitry off-chip in the feedback paths, such as an additional divider. Pulldown resistors are required for the FOUTX and FOUTX pins, and for the HFOUTX and HFOUTX pins.

Use of a phase-frequency detector in each PLL results in excellent locking and tracking characteristics. Error correction voltages are generated by the detector if either phase or frequency deviations occur. The VCO in each PLL has a frequency range covering more than a 2:1 ratio from 480MHz to 1120MHz.

Select pins S1A, S2A, S1B, S2B, and S3B are used to program the N dividers for optimum VCO operation, in other words with the VCO operating in the center of its range. When both S3B and S5B are low, PLLB is identical to PLLA. When S5B is high, the 2X frequency multiplication option is enabled. Select pins S3A and S4B enable the HF inputs for PLLA and PLLB respectively, which allows the use of an external VCO in either PLL. All the select pins are TTL inputs.

FINA

RINA

VEE

RINB

FINB

Rev.: G Amendment: /0

Issue Date: May 2000

VEE

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Micrel

BLOCK DIAGRAM

ClockWorks™

SY89423V

RINA

RIN

FINA FINA

PHASE-FREQUENCY

DETECTOR

S1A S2A

S1B S2B S3B

(1, 2, 4, 8, 10, 12, 16, 20)

F1A F2A

LOOP

FILTER

÷ N

(2, 4, 8, 16)

÷ N

VCO

÷ 2

S3A

HFINA

U X

HFOUTA HFOUTA

FOUTA

FOUTB

RIN

FINB

PHASE-FREQUENCY

DETECTOR

÷ P

(1, 2)

S5B

LOOP

FILTER

F1B F2B

LOOP FILTER COMPONENT SELECTION

S4B

VCO

U X

÷ 2

C = 1.0µF ±10% (X7R dielectric) R = 560Ω ±10%

HFOUTB HFOUTB

HFINB

F1X F2X

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PIN NAMES PIN DESCRIPTION

ClockWorks™

SY89423V

Pin Function I/O

F1A Filter Pin 1A I/O F2A Filter Pin 2A I/O RINA Inverted Reference Input A I RINA Reference Input A I FINA Feedback Input A I FINA Inverted Feedback Input A I HFINA High Frequency Input A I HFINA Inverted High Frequency Input A I FOUTA Frequency Output A O FOUTA Inverted Frequency Output A O HFOUTA High Frequency Output A O HFOUTA Inverted High Frequency Output A O F1B Filter Pin 1B I/O F2B Filter Pin 2B I/O RINB Reference Input B I RINB Inverted Reference Input B I FINB Feedback Input B I FINB Inverted Feedback Input B I HFINB High Frequency Input B I HFINB Inverted High Frequency Input B I FOUTB Frequency Output B O FOUTB Inverted Frequency Output B O HFOUTB High Frequency Output B O HFOUTB Inverted Frequency Output B O VCC VCC — VCCOA Output VCC — VCCOB Output VCC — VEE VEE (0V) — S1A Select Input 1A (TTL) I S2A Select Input 2A (TTL) I S3A Select Input 3A (TTL) I S1B Select Input 1B (TTL) I S2B Select Input 2B (TTL) I S3B Select Input 3B (TTL) I S4B Select Input 4B (TTL) I S5B Select Input 5B (TTL) I

RINA, RINA, RINB, RINB

Reference frequency inputs for loop A and B. These are differential signal pairs and may be driven differentially or single-ended.

FINA, FINA, FINB, FINB

Feedback frequency inputs for loop A and B. These are differential signal pairs and may be driven differentially or single-ended.

HFINA, HFINA, HFINB, HFINB

High frequency feedback inputs. Differential drive is recommended.

F1A, F2A, F1B, F2B

These pins are connection points for the loop filters, which are to be provided off-chip. F1X is the high impedance side, F2X is the reference side. The loop filter should be a first order, low pass with a DC block. The difference voltage on these pins will be a DC level, which is controlled by the loop feedback and determined by the required VCO frequency.

FOUTA, FOUTA, FOUTB, FOUTB

Frequency outputs for the loops. These are differential, positive referenced, emitter-follower signals and must be terminated off-chip. Termination in 50 ohms is recommended.

HFOUTA, HFOUTA, HFOUTB, HFOUTB

High frequency outputs. These are differential, positive referenced, emitter-follower signals and must be terminated off-chip. Termination in 50 ohms is recommended.

S1A, S2A, S3A, S1B, S2B, S3B, S4B, S5B

These inputs are used to select the configuration for PLLA and PLLB. See the Frequency Selection Table for details of the logic.

VCC

This is the positive supply for the chip. It should be decoupled and present a low impedance in order to assure low-jitter operation.

VCCOA, VCCOB

These are the positive supplies for the output buffers. They are constrained to be equal to or less than the value of VCC.

VEE

This pin is the negative supply for the chip and is normally connected to ground (0V).

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FREQUENCY SELECTION TABLE

PLLA

S3A S2A S1A NA FOUTA (MHz) HFOUTA (MHz)

0002 240 – 560 480 – 1120 0014 120 – 280 480 – 1120 0108 60 – 140 480 – 1120 0 1 1 16 30 – 70 480 – 1120 1002HFINA divide by 4 HFINA divide by 2 1014HFINA divide by 8 HFINA divide by 2 1108HFINA divide by 16 HFINA divide by 2 1 1 1 16 HFINA divide by 32 HFINA divide by 2

PLLB

S4B S3B S2B S1B NB FOUTB (MHz) HFOUTB (MHz)

0 0 0 0 2 240 – 560 480 – 1120 0 0 0 1 4 120 – 280 480 – 1120 0 0 1 0 8 60 – 140 480 – 1120 0 0 1 1 16 30 – 70 480 – 1120 0 1 0 0 1 480 – 1120 480 – 1120 0 1 0 1 10 48 – 112 480 – 1120 0 1 1 0 12 40 – 93.3 480 – 1120 0 1 1 1 20 24 – 56 480 – 1120 1 0 0 0 2 HFINB divide by 4 HFINB divide by 2 1 0 0 1 4 HFINB divide by 8 HFINB divide by 2 1 0 1 0 8 HFINB divide by 16 HFINB divide by 2 1 0 1 1 16 HFINB divide by 32 HFINB divide by 2 1 1 0 0 1 HFINB divide by 2 HFINB divide by 2 1 1 0 1 10 HFINB divide by 20 HFINB divide by 2 1 1 1 0 12 HFINB divide by 24 HFINB divide by 2 1 1 1 1 20 HFINB divide by 40 HFINB divide by 2

ClockWorks™

SY89423V

Maximum Feedback

S5B Divide-by-P Frequency (MHz)

0P = 1 560 1 P = 2 1120

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ClockWorks™

SY89423V

ABSOLUTE MAXIMUM RATINGS

(1)

Symbol Parameter Value Unit

VCC Power Supply Voltage –0.5 to +7.0 V VI TTL Input Voltage II TTL Input Current

OUT ECL Output Current mA

(2)

–0.5 to 6.0 V

–30 to +5.0 mA

–Continuous 50

–Surge 100 Tstore Storage Temperature –65 to +150 °C T

A Operating Temperature

NOTES:

1. Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to ABSOLUTE MAXIMUM RATING conditions for extended periods may affect device reliability.

2. Either voltage limit or current limit is sufficient to protect input.

3. All DC and AC electrical characteristics are specified over the operating temperature range.

(3)

0 to +85 °C

5V DC ELECTRICAL CHARACTERISTICS

VCC = VCCOA = VCCOB = 5.0V ±5%

Symbol Parameter Min. Typ. Max. Unit Condition

VCC Power Supply Voltage 4.75 — 5.25 V VCC = VCCO ICC Power Supply Current (VCC)——200mA

CCO Power Supply Current (VCCO) — — 56 mA PECL outputs are open

3.3V DC ELECTRICAL CHARACTERISTICS

VCC = VCCOA = VCCOB = 3.3V ±5%

Symbol Parameter Min. Typ. Max. Unit Condition

VCC Power Supply Voltage 3.135 — 3.465 V VCC = VCCO ICC Power Supply Current (VCC)——200mA

CCO Power Supply Current (VCCO) — — 56 mA PECL outputs are open

PECL DC ELECTRICAL CHARACTERISTICS

VCC = VCCOA = VCCOB = 3.3V or 5.0V ±5%

Symbol Parameter Min. Typ. Max. Unit Condition

VOH Output HIGH Voltage VCC – 1.025 — VCC – 0.780 V VOL Output LOW Voltage VCC – 1.810 — VCC – 1.520 V VIH Input HIGH Voltage VCC – 1.165 — VCC – 0.780 V

IL Input LOW Voltage VCC – 1.810 — VCC – 1.475 V

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TTL DC ELECTRICAL CHARACTERISTICS

VCC = VCCOA = VCCOB = 3.3V or 5.0V ±5%

Symbol Parameter Min. Typ. Max. Unit Condition

VIH Input HIGH Voltage 2.0 — — V VIL Input LOW Voltage — — 0.8 V

IH Input HIGH Current — — 20 µAVIN = 2.7V

100 VIN = VCC

IIL Input LOW Current — — –0.3 mA VIN = 0.5V

IK Input Clamp Voltage — — –1.2 V IIN = –12mA

AC ELECTRICAL CHARACTERISTICS

VCC = VCCOA = VCCOB = 3.3V or 5.0V ±5%

Symbol Parameter Min. Typ. Max. Unit Condition

∆Τ Output Period Jitter — 10 15 ps rms PPW Output Duty Cycle 45 50 55 % tr Output Rise/Fall Time — 300 550 ps —

tf (20% to 80%) — 300 550 RINA, B Reference Frequency Inputs — — 560 MHz FINA, B Feedback Frequency Inputs — — 560 MHz S5B = 0

FINB Feedback Frequency Input — — 1120 MHz S5B = 1 HFINA, B High Frequency Inputs — — 2000 MHz HFOUTA, B High Frequency Outputs — — 1120 MHz FOUTA Frequency Outputs PLLA — — 560 MHz FOUTB Frequency Outputs PLLB — — 1120 MHz

ClockWorks™

SY89423V

PRODUCT ORDERING CODE

Ordering Package Operating

Code Type Range

SY89423VJC J44-1 Commercial SY89423VJCTR J44-1 Commercial

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44 LEAD PLCC (J44-1)

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SY89423V

Rev. 02

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Micrel

ClockWorks™

SY89423V

MICREL-SYNERGY 3250 SCOTT BOULEVARD SANTA CLARA CA 95054 USA

TEL + 1 (408) 980-9191 FAX + 1 (408) 914-7878 WEB http://www.micrel.com

This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or

other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc.