Datasheet SY88993V Datasheet (MICREL)

5V/3.3V 3.2Gbps HIGH-SPEED
LIMITING POST AMPLIFIER

SY88993V

FEATURES

■ > 3.2Gbps operation

■ 3.3V or 5V power supply option

■ Low noise CML data outputs

■ Chatter-Free LOS generation

■ Open Collector TTL LOS output

■ TTL /EN Input

■ Differential PECL inputs for data

■ Single power supply

■ Available in a tiny 10-pin (3mm) MSOP

PIN CONFIGURATION

LOS

1/EN

D

IN

2

/D

IN

V

REF

LVL

MSOP

3

K10-1

4
5

10 V

9
8
7
6

CC

D

OUT

/D

OUT

LOS
GND

DESCRIPTION

The SY88993V limiting post amplifier with its high and
wide bandwidth is ideal for use as a post amplifier in fiber­optic receivers with data rates up to 3.2Gbps. Signals as
small as 4mVp-p can be amplified to drive devices with
CML inputs. The SY88993V generates a chatter-free Loss
of Signal (LOS) open collector TTL output.

The SY88993V incorporates a programmble level detect
function to identify when the input signal has been lost.
This information can be fed back to the /EN input of the
device to maintain stability under loss of signal conditions.
Using LOS
adjusted. The LOS
resistor divider between VCC and V

pin the sensitivity of the level detect can be

LVL

voltage can be set by connecting a

LVL

, Figure 2.

REF

BLOCK DIAGRAM

D

V

D

REF

V

CC

IN

Limiting
Amplifer

IN

CML
Buffer

Enable

D

D

EN

OUT

OUT

APPLICATIONS

■ 1.25Gbps Gigabit Ethernet

■ 531Mbps and 1062Mbps Fibre Channel

■ 622Mbps SONET

■ Gigabit interface converter

■ 2.5Gbps SDH/SONET

LOS

GND

LVL

Level
Detect

LOS

1

Rev.: A Amendment: /1
Issue Date: July 2000

Micrel

SY88993V

PIN NAMES

Pin Type Function

D

IN

/D

IN

LOS
/EN TTL Input Output Enable (Active Low)
LOS TTL Output Loss of Signal Indicator

GND Ground Ground
D

OUT

/D

OUT

V

CC

V

REF

ABSOLUTE MAXIMUM RATINGS

LVL

Data Input Data Input
Data Input Inverting Data Input
Input Loss of Signal Level Set

(Open Collector) (Active High)

CML Output Data Output
CML Output Inverting Data Output
Power Supply Positive Power Supply
Output Reference Voltage Output

for LOS Level Set (see Fig. 3)

(1)

GENERAL DESCRIPTION

General

The SY88993V is an integrated limiting amplifier intended
for high-frequency fiber-optic applications. The circuit
connects to typical transimpedance amplifiers found within
a fiber-optics link. The linear signal output from a
transimpedance amplifier can contain significant amounts
of noise, and may vary in amplitude over time. The
SY88993V limiting amplifier quantizes the signal and outputs
a voltage-limited waveform.

The /EN pin allows the user to disable the output signal
without removing the input signal.

Symbol Rating Value Unit

V

CC

DIN, /D

IN

T

A

T

store

NOTE:

1. Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. This is a stress rating only and functional operation is not implied
at conditions other than those detailed in the operational sections of this data sheet. Exposure to ABSOLUTE MAXIMUM RATlNG conditions for extended
periods may affect device reliability.

Power Supply Voltage 0 to +7.0 V
Input Voltage 0 to V

CC

Operating Temperature Range –40 to +85 °C
Storage Temperature Range –55 to +125 °C

V

2

Micrel

SY88993V

DC ELECTRICAL CHARACTERISTICS

VCC = +3.3V ±10% or +5V ±10%, R

Symbol Parameter Min. Max. Min. Max. Min. Typ. Max. Min. Max. Unit

I

CC

I

IL

I

IH

I

OH

LOS
V

OL

V

REF

V

IH

V

IL

V

OFFSET

V

CMR

NOTES:

1. No output load.

2. VOH = 5.5V.

3. IOL = +2mA.

4. VIN = 2.7V

5. VIN = V

6. VIN = 0.5V

Power Supply 5V — 40 — 40 — 34 40 — 45 mA

(1)

Current
/EN Input LOW–0.3

3.3V — 35 — 35 — 30 35 — 40 mA

(8)

Current
/EN Input HIGH — 20

Current
LOS Output Leakage

LOS

LVL

LVL

Level V

(2)

LOS Output Low — 0.5 — 0.5 — — 0.5 — 0.5 V

(3)

Level
Reference Voltage
/EN Input HIGH

Voltage

VCC –1.38 VCC –1.26 VCC –1.38 VCC –1.26 VCC –1.38 VCC –1.32 VCC –1.26 VCC –1.38 VCC –1.26

/EN Input LOW Voltage — — 0.8 — 0.8 — — 0.8 — V
Differential Output — ±80 — ±80 — ±10 ±80 — ±80 mV

Offset
Common Mode Range GND±2VCC–0.2 GND±2VCC–0.2 GND±2V

CC

= 50Ω to V

LOAD

A = –40°CTA = 0°CTA = +25°CTA = +85°C

T

— –0.3

(4)

— 100

(5)

(6)

CC

— –0.3

—20
— 100

(6)

(4)

(5)

— — –0.3

——20
— — 100

(8)

(4)

(5)

—mA

—20
— 100

(4)

(5)

— 100 — 100 — — 100 — 100 uA

REF

V

CC

V

REF

V

CC

V

REF

—VCCV

REF

V

CC

2.0 — 2.0 — 2.0 — — 2.0 — V

–0.2 GND±2VCC–0.2 V

CC

µA

V

V

3

Micrel

SY88993V

AC ELECTRICAL CHARACTERISTICS

VCC = +3.3V ±10% or +5V ±10%, R

Symbol Parameter Min. Max. Min. Max. Min. Typ. Max. Min. Max. Unit

HYS LOS Hysteresis 2 8 2 8 2 5.6 8 2 8 dB
PSRR Power Supply

Rejection Ratio

t

OFFL

t

OFFH

t

ONL

, t

t

r

V

ID

V

OD

V

SR

Output Spec (D

V

OH

V

OL

Z

O

LOS Release Time
Minimum Input

LOS Release Time
Maximum Input

LOS Assert Time
Differential Output

f

Rise/Fall Time
Input Voltage Range 4 1800 4 1800 4 — 1800 4 1800
Differential Output — — — — — 400

Voltage Swing
LOS Sensitivity Range 4 50 4 50 4 — 50 4 50

OUT

HIGH Level Output
Voltage

LOW Level Output
Voltage

Single-Ended Output
Impedance

Input Spec (DIN and /DIN)

A

V(Diff)

B

–3dB

S

21

Differential Voltage — ————38———dB
Gain

3dB Bandwidth — ————2.5———GHz
Single-Ended Small 26 — 26 — 26 32 — 26 — dB

Signal-Gain

(1)

(4)

and /D

(2)

(3)

(2)

(3)

OUT

(6)

)

(7)

V

V

CC

= 50Ω to V

LOAD

CC

TA = –40°CTA = 0°CTA = +25°CTA = +85°C

—— — — — 35 — ——dB

— 0.5 — 0.5 — 0.1 0.5 — 0.5 µs

— 0.5 — 0.5 — 0.1 0.5 — 0.5 µs

— 0.5 — 0.5 — 0.2 0.5 — 0.5 µs
— 120 — 120 — 70 120 — 120 ps

mVp-p

(5)

— — — mVp-p

mVp-p

–20 V

CC

–280 V

CC

CC

–140 V

V

CC

CC

–280 V

–20 V

CC

CC

–140 V

V

CC

CC

–20 V

–280 V

CC

–200 V

CC

–5 V

CC

CC

–140 V

V

CC

CC

–20 V

–280 V

CC

CC

–140

40 60 40 60 40 50 60 40 60 Ω

mV

mV

NOTES:

1. Input referred noise = RMS output noise/low frequency gain. Input referred, 55MHz.

2. Input is a 200MHz square wave, tr < 300ps, 1.8Vp-p.

3. With input signal VID > 5mVp-p.

4. Input is a 200MHz square wave, tr < 300ps, 50Ω load.

5. VID > 5mVp-p.

6. Output levels are based on 50Ω impedance. If the load impedance is different, the output level will be changed.

7. See output structure.

4

Micrel

R1

R2

V

CC

V

REF

LOS

LVL

APPLICATION NOTE

Output Termination

The SY88993V outputs must be terminated with a 50Ω

load to VCC.

Layout and PCB Design

Since the SY88993V is a high-frequency component,

performance can largely be determined by board layout
and design. A common problem with high-gain amplifiers is
feedback from the large swing outputs to the input via power
supply.

The SY88993V ground pin should be connected to the

circuit board ground. Use multiple PCB vias close to the
part to connect to ground. Avoid long, inductive runs which
can degrade performance.

50Ω

SY88993V

V

V

CC

50Ω

8mA

Z

= 50Ω

0

D

OUT

/D

OUT

= 50Ω

Z

0

CC

50Ω 50Ω

22nF

22nF

0.1µF

ESD STRUCTURE

D

IN

/D

IN

50Ω

50Ω

V

REF

Figure 1. Differential Input Configuration

V

CC

GND

GND

ESD STRUCTURE

Figure 2. Differential Output Configuration

NOTES:

1. Resistor Divider = R2/ (R1 + R2)

2. R1 + R2 ≥ 5kΩ

Figure 3. LOS

Circuit

LVL

PRODUCT ORDERING CODE

5

Ordering Package Operating

Code Type Range

SY88993VKC K10-1 Commercial

Micrel

GBIC Terminal

RX_DATA–

RX_DATA+

TX_DATA–

TX_DATA+

RX_LOS

200Ω

GND

200Ω

68Ω

68Ω

/EN

GND

GND

50Ω

OUT

/OUT

Laserdiode

Photodiode

SY88904

1000pF

LOS

SY88922

/EN

TX_DISABLE

TX_FAULT

22nF

22nF

SY88993V

20KΩ

0.1µF

0.1µF

0.1µF

MD

0.1µF

0.1µF

2MΩ

From

Transimpedance

Amp.

20kΩ

0.1µF

Laser

Module

TX_OUT

TX_FAULT

TX_DISABLE

V

CC

V

CC

D

IN

/D

IN

V

REF

R

SET

V

CC

V

CC

V

CC

R

SER

V

CC

I

BIAS

R

WIN

V

CCDET

I

BIAS

FB

I

BIAS

SET

I

LIMIT

SET

I

PIN

SET

V

REF

V

CC

LOS

IN

LOS

OUT

D

IN

/D

IN

V

REF

V

CC

LOS

LVL

20kΩ 20kΩ 20kΩ

V

CC

50Ω

D

OUT

/D

OUT

50Ω

50Ω

APPLICATION EXAMPLE FOR 3-CHIP SET SOLUTION

SY88993V

6

Micrel

PERFORMANCE CURVE

SY88993V

LOS Assert and Deassert

100

INPUT LEVEL (mVp-p)

Levels vs LOS

90
80
70
60
50
40
30
20
10

0

0 -0.2 -0.4 -0.6 -0.8 -1.0 -1.2

LOS

3.3V
T

2.5Gbps
Pattern 2

= VCC – V (V)

LVL

= 25°C

A

Figure 4.

LOS Assert and Deassert

100

INPUT LEVEL (mVp-p)

Levels vs LOS

90
80
70
60
50
40
30
20
10

0

0 -0.2 -0.4 -0.6 -0.8 -1.0 -1.2

LOS

3.3V
T

2.5Gbps
Pattern 2

= VCC – V (V)

LVL

= 25°C

A

LVL

LVL

LOS Assert and Deassert

100

23

-1

INPUT LEVEL (mVp-p)

Levels vs LOS

90
80
70
60
50
40
30
20
10

0

0 -0.2 -0.4 -0.6 -0.8 -1.0 -1.2

LOS

LVL

LVL

5.0V
T

= 25°C

A

2.5Gbps
Pattern 2

= VCC– V (V)

23

-1

Figure 5.

LOS Assert and Deassert

100

7

-1

INPUT LEVEL (mVp-p)

Levels vs LOS

90
80
70
60
50
40
30
20
10

0

0 -0.2 -0.4 -0.6 -0.8 -1.0 -1.2

LOS

LVL

LVL

5.0V
T

= 25°C

A

2.5Gbps
Pattern 2

= VCC – V (V)

7

-1

Figure 6.

Figure 7.

7

Micrel

10 LEAD MSOP (K10-1)

SY88993V

Rev. 00

MICREL-SYNERGY 3250 SCOTT BOULEVARD SANTA CLARA CA 95054 USA

TEL + 1 [phone] FAX + 1 [phone] WEB http://www.micrel.com

This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or

other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc.

© 2000 Micrel Incorporated

8